All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Igor Mammedov <imammedo@redhat.com>
Cc: "Damien Hedde" <damien.hedde@greensocs.com>,
	"Huacai Chen" <zltjiangshi@gmail.com>,
	"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
	"qemu-riscv@nongnu.org" <qemu-riscv@nongnu.org>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"Paul Burton" <paulburton@kernel.org>,
	qemu-ppc <qemu-ppc@nongnu.org>,
	qemu-devel@nongnu.org,
	"Wainer dos Santos Moschetta" <wainersm@redhat.com>,
	"Aleksandar Markovic" <aleksandar.qemu.devel@gmail.com>,
	qemu-arm <qemu-arm@nongnu.org>,
	"Hervé Poussineau" <hpoussin@reactos.org>,
	"Cleber Rosa" <crosa@redhat.com>,
	"Huacai Chen" <chenhc@lemote.com>,
	"Edgar E . Iglesias" <edgar.iglesias@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"Richard Henderson" <rth@twiddle.net>
Subject: Re: [PATCH 01/16] hw/core/cpu: Let CPU object have a clock source
Date: Wed, 30 Sep 2020 12:16:53 +0200	[thread overview]
Message-ID: <da7248f7-5098-188b-d274-e122c87bb498@amsat.org> (raw)
In-Reply-To: <20200930094313.1120a040@redhat.com>

+arm/ppc/riscv folks

On 9/30/20 9:43 AM, Igor Mammedov wrote:
> On Mon, 28 Sep 2020 19:15:24 +0200
> Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> 
>> Let CPUState have a clock source (named 'clk') and CPUClass
>> have a clock_update() callback. The clock can be optionally
>> set Using qdev_connect_clock_in() from the Clock API.
>> If the clock changes, the optional clock_update() will be
>> called.
> 
> the sole user of it is mips cpu, so question is why
> you are making it part of generic CPUm instead of
> MIPSCPUClass/MIPSCPU?

This is a feature of the CPU, regardless its architecture.

I expect the other archs to start using it soon.

> 
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>>  include/hw/core/cpu.h |  5 +++++
>>  hw/core/cpu.c         | 12 ++++++++++++
>>  2 files changed, 17 insertions(+)
>>
>> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
>> index 6c34798c8b3..6989d90c193 100644
>> --- a/include/hw/core/cpu.h
>> +++ b/include/hw/core/cpu.h
>> @@ -31,6 +31,7 @@
>>  #include "qemu/thread.h"
>>  #include "qemu/plugin.h"
>>  #include "qom/object.h"
>> +#include "hw/clock.h"
>>  
>>  typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
>>                                       void *opaque);
>> @@ -155,6 +156,7 @@ struct TranslationBlock;
>>   * @disas_set_info: Setup architecture specific components of disassembly info
>>   * @adjust_watchpoint_address: Perform a target-specific adjustment to an
>>   * address before attempting to match it against watchpoints.
>> + * @clock_update: Callback for input clock changes
>>   *
>>   * Represents a CPU family or model.
>>   */
>> @@ -176,6 +178,7 @@ struct CPUClass {
>>                                    unsigned size, MMUAccessType access_type,
>>                                    int mmu_idx, MemTxAttrs attrs,
>>                                    MemTxResult response, uintptr_t retaddr);
>> +    void (*clock_update)(CPUState *cpu);
>>      bool (*virtio_is_big_endian)(CPUState *cpu);
>>      int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
>>                             uint8_t *buf, int len, bool is_write);
>> @@ -316,6 +319,7 @@ struct qemu_work_item;
>>   *   QOM parent.
>>   * @nr_cores: Number of cores within this CPU package.
>>   * @nr_threads: Number of threads within this CPU.
>> + * @clock: this CPU source clock (an output clock of another device)
>>   * @running: #true if CPU is currently running (lockless).
>>   * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
>>   * valid under cpu_list_lock.
>> @@ -400,6 +404,7 @@ struct CPUState {
>>      int num_ases;
>>      AddressSpace *as;
>>      MemoryRegion *memory;
>> +    Clock *clock;
>>  
>>      void *env_ptr; /* CPUArchState */
>>      IcountDecr *icount_decr_ptr;
>> diff --git a/hw/core/cpu.c b/hw/core/cpu.c
>> index c55c09f734c..37fcff3ec64 100644
>> --- a/hw/core/cpu.c
>> +++ b/hw/core/cpu.c
>> @@ -30,6 +30,7 @@
>>  #include "qemu/qemu-print.h"
>>  #include "sysemu/tcg.h"
>>  #include "hw/boards.h"
>> +#include "hw/qdev-clock.h"
>>  #include "hw/qdev-properties.h"
>>  #include "trace/trace-root.h"
>>  #include "qemu/plugin.h"
>> @@ -247,6 +248,16 @@ void cpu_reset(CPUState *cpu)
>>      trace_guest_cpu_reset(cpu);
>>  }
>>  
>> +static void cpu_clk_update(void *opaque)
>> +{
>> +    CPUState *cpu = opaque;
>> +    CPUClass *cc = CPU_GET_CLASS(cpu);
>> +
>> +    if (cc->clock_update) {
>> +        cc->clock_update(cpu);
>> +    }
>> +}
>> +
>>  static void cpu_common_reset(DeviceState *dev)
>>  {
>>      CPUState *cpu = CPU(dev);
>> @@ -367,6 +378,7 @@ static void cpu_common_initfn(Object *obj)
>>      /* the default value is changed by qemu_init_vcpu() for softmmu */
>>      cpu->nr_cores = 1;
>>      cpu->nr_threads = 1;
>> +    cpu->clock = qdev_init_clock_in(DEVICE(obj), "clk", cpu_clk_update, cpu);
>>  
>>      qemu_mutex_init(&cpu->work_mutex);
>>      QSIMPLEQ_INIT(&cpu->work_list);
> 


WARNING: multiple messages have this Message-ID (diff)
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Igor Mammedov <imammedo@redhat.com>
Cc: qemu-devel@nongnu.org,
	"Damien Hedde" <damien.hedde@greensocs.com>,
	"Huacai Chen" <zltjiangshi@gmail.com>,
	"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"Paul Burton" <paulburton@kernel.org>,
	"Edgar E . Iglesias" <edgar.iglesias@gmail.com>,
	"Wainer dos Santos Moschetta" <wainersm@redhat.com>,
	"Aleksandar Markovic" <aleksandar.qemu.devel@gmail.com>,
	"Hervé Poussineau" <hpoussin@reactos.org>,
	"Cleber Rosa" <crosa@redhat.com>,
	"Huacai Chen" <chenhc@lemote.com>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"Richard Henderson" <rth@twiddle.net>,
	qemu-arm <qemu-arm@nongnu.org>,
	"qemu-riscv@nongnu.org" <qemu-riscv@nongnu.org>,
	qemu-ppc <qemu-ppc@nongnu.org>
Subject: Re: [PATCH 01/16] hw/core/cpu: Let CPU object have a clock source
Date: Wed, 30 Sep 2020 12:16:53 +0200	[thread overview]
Message-ID: <da7248f7-5098-188b-d274-e122c87bb498@amsat.org> (raw)
In-Reply-To: <20200930094313.1120a040@redhat.com>

+arm/ppc/riscv folks

On 9/30/20 9:43 AM, Igor Mammedov wrote:
> On Mon, 28 Sep 2020 19:15:24 +0200
> Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> 
>> Let CPUState have a clock source (named 'clk') and CPUClass
>> have a clock_update() callback. The clock can be optionally
>> set Using qdev_connect_clock_in() from the Clock API.
>> If the clock changes, the optional clock_update() will be
>> called.
> 
> the sole user of it is mips cpu, so question is why
> you are making it part of generic CPUm instead of
> MIPSCPUClass/MIPSCPU?

This is a feature of the CPU, regardless its architecture.

I expect the other archs to start using it soon.

> 
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>>  include/hw/core/cpu.h |  5 +++++
>>  hw/core/cpu.c         | 12 ++++++++++++
>>  2 files changed, 17 insertions(+)
>>
>> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
>> index 6c34798c8b3..6989d90c193 100644
>> --- a/include/hw/core/cpu.h
>> +++ b/include/hw/core/cpu.h
>> @@ -31,6 +31,7 @@
>>  #include "qemu/thread.h"
>>  #include "qemu/plugin.h"
>>  #include "qom/object.h"
>> +#include "hw/clock.h"
>>  
>>  typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
>>                                       void *opaque);
>> @@ -155,6 +156,7 @@ struct TranslationBlock;
>>   * @disas_set_info: Setup architecture specific components of disassembly info
>>   * @adjust_watchpoint_address: Perform a target-specific adjustment to an
>>   * address before attempting to match it against watchpoints.
>> + * @clock_update: Callback for input clock changes
>>   *
>>   * Represents a CPU family or model.
>>   */
>> @@ -176,6 +178,7 @@ struct CPUClass {
>>                                    unsigned size, MMUAccessType access_type,
>>                                    int mmu_idx, MemTxAttrs attrs,
>>                                    MemTxResult response, uintptr_t retaddr);
>> +    void (*clock_update)(CPUState *cpu);
>>      bool (*virtio_is_big_endian)(CPUState *cpu);
>>      int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
>>                             uint8_t *buf, int len, bool is_write);
>> @@ -316,6 +319,7 @@ struct qemu_work_item;
>>   *   QOM parent.
>>   * @nr_cores: Number of cores within this CPU package.
>>   * @nr_threads: Number of threads within this CPU.
>> + * @clock: this CPU source clock (an output clock of another device)
>>   * @running: #true if CPU is currently running (lockless).
>>   * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
>>   * valid under cpu_list_lock.
>> @@ -400,6 +404,7 @@ struct CPUState {
>>      int num_ases;
>>      AddressSpace *as;
>>      MemoryRegion *memory;
>> +    Clock *clock;
>>  
>>      void *env_ptr; /* CPUArchState */
>>      IcountDecr *icount_decr_ptr;
>> diff --git a/hw/core/cpu.c b/hw/core/cpu.c
>> index c55c09f734c..37fcff3ec64 100644
>> --- a/hw/core/cpu.c
>> +++ b/hw/core/cpu.c
>> @@ -30,6 +30,7 @@
>>  #include "qemu/qemu-print.h"
>>  #include "sysemu/tcg.h"
>>  #include "hw/boards.h"
>> +#include "hw/qdev-clock.h"
>>  #include "hw/qdev-properties.h"
>>  #include "trace/trace-root.h"
>>  #include "qemu/plugin.h"
>> @@ -247,6 +248,16 @@ void cpu_reset(CPUState *cpu)
>>      trace_guest_cpu_reset(cpu);
>>  }
>>  
>> +static void cpu_clk_update(void *opaque)
>> +{
>> +    CPUState *cpu = opaque;
>> +    CPUClass *cc = CPU_GET_CLASS(cpu);
>> +
>> +    if (cc->clock_update) {
>> +        cc->clock_update(cpu);
>> +    }
>> +}
>> +
>>  static void cpu_common_reset(DeviceState *dev)
>>  {
>>      CPUState *cpu = CPU(dev);
>> @@ -367,6 +378,7 @@ static void cpu_common_initfn(Object *obj)
>>      /* the default value is changed by qemu_init_vcpu() for softmmu */
>>      cpu->nr_cores = 1;
>>      cpu->nr_threads = 1;
>> +    cpu->clock = qdev_init_clock_in(DEVICE(obj), "clk", cpu_clk_update, cpu);
>>  
>>      qemu_mutex_init(&cpu->work_mutex);
>>      QSIMPLEQ_INIT(&cpu->work_list);
> 


  reply	other threads:[~2020-09-30 10:34 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-28 17:15 [PATCH 00/16] hw/mips: Set CPU frequency Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 01/16] hw/core/cpu: Let CPU object have a clock source Philippe Mathieu-Daudé
2020-09-30  7:43   ` Igor Mammedov
2020-09-30 10:16     ` Philippe Mathieu-Daudé [this message]
2020-09-30 10:16       ` Philippe Mathieu-Daudé
2020-10-05 16:40       ` Igor Mammedov
2020-10-05 16:40         ` Igor Mammedov
2020-10-05 17:19         ` Philippe Mathieu-Daudé
2020-10-05 17:19           ` Philippe Mathieu-Daudé
2020-10-05 17:44         ` Eduardo Habkost
2020-10-05 17:44           ` Eduardo Habkost
2020-10-05 18:09           ` Philippe Mathieu-Daudé
2020-10-05 18:09             ` Philippe Mathieu-Daudé
2020-10-05 18:29             ` Philippe Mathieu-Daudé
2020-10-05 18:29               ` Philippe Mathieu-Daudé
2020-10-05 19:22               ` Eduardo Habkost
2020-10-05 19:22                 ` Eduardo Habkost
2020-10-06 18:11                 ` Philippe Mathieu-Daudé
2020-10-06 18:11                   ` Philippe Mathieu-Daudé
2020-10-06 19:53                   ` Philippe Mathieu-Daudé
2020-10-06 19:53                     ` Philippe Mathieu-Daudé
2020-10-05 18:43             ` Eduardo Habkost
2020-10-05 18:43               ` Eduardo Habkost
2020-09-28 17:15 ` [PATCH 02/16] target/mips: Move cpu_mips_get_random() with CP0 helpers Philippe Mathieu-Daudé
2020-09-30 18:04   ` Aleksandar Markovic
2020-09-28 17:15 ` [PATCH 03/16] target/mips/cp0_timer: Explicit unit in variable name Philippe Mathieu-Daudé
2020-09-30 18:10   ` Aleksandar Markovic
2020-09-28 17:15 ` [PATCH 04/16] target/mips/cpu: Introduce mips_cpu_properties[] Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 05/16] target/mips/cpu: Set default CPU frequency to 200 MHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 06/16] target/mips: Keep CP0 counter in sync with the CPU frequency Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 07/16] hw/mips/r4k: Explicit CPU frequency is 200 MHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 08/16] hw/mips/fuloong2e: Set CPU frequency to 533 MHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 09/16] hw/mips/mipssim: Correct CPU frequency Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 10/16] hw/mips/jazz: Correct CPU frequencies Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 11/16] hw/mips/cps: Expose input clock and connect it to CPU cores Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 12/16] hw/mips/boston: Set CPU frequency to 1 GHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 13/16] hw/mips/malta: Set CPU frequency to 320 MHz Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 14/16] hw/mips/cps: Do not allow use without input clock Philippe Mathieu-Daudé
2020-09-28 17:15 ` [PATCH 15/16] target/mips/cpu: Do not allow system-mode " Philippe Mathieu-Daudé
2020-09-29 13:01   ` Igor Mammedov
2020-09-29 14:40     ` Philippe Mathieu-Daudé
2020-10-05  7:39       ` Philippe Mathieu-Daudé
2020-10-05 16:25       ` Igor Mammedov
2020-09-28 17:15 ` [PATCH 16/16] tests/acceptance: Test the MIPSsim machine Philippe Mathieu-Daudé
2020-09-28 20:33   ` Willian Rampazzo
2020-09-29  9:09     ` Philippe Mathieu-Daudé
2020-09-29  9:38       ` Alex Bennée
2020-09-29  9:50         ` Philippe Mathieu-Daudé
2020-09-30  8:43         ` Daniel P. Berrangé
2020-09-30  9:49           ` Alex Bennée
2020-09-30 10:08             ` Philippe Mathieu-Daudé
2020-09-29  2:46 ` [PATCH 00/16] hw/mips: Set CPU frequency no-reply
2020-09-29  8:58   ` Philippe Mathieu-Daudé
2020-09-30  7:40 ` Igor Mammedov
2020-09-30 10:13   ` Philippe Mathieu-Daudé
2020-10-09 15:40 ` Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=da7248f7-5098-188b-d274-e122c87bb498@amsat.org \
    --to=f4bug@amsat.org \
    --cc=aleksandar.qemu.devel@gmail.com \
    --cc=aleksandar.rikalo@syrmia.com \
    --cc=aurelien@aurel32.net \
    --cc=chenhc@lemote.com \
    --cc=crosa@redhat.com \
    --cc=damien.hedde@greensocs.com \
    --cc=edgar.iglesias@gmail.com \
    --cc=ehabkost@redhat.com \
    --cc=hpoussin@reactos.org \
    --cc=imammedo@redhat.com \
    --cc=paulburton@kernel.org \
    --cc=philmd@redhat.com \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    --cc=rth@twiddle.net \
    --cc=wainersm@redhat.com \
    --cc=zltjiangshi@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.