From: Viresh Kumar <viresh.kumar@linaro.org> To: stable@vger.kernel.org, Julien Thierry <Julien.Thierry@arm.com>, Mark Rutland <mark.rutland@arm.com> Cc: Viresh Kumar <viresh.kumar@linaro.org>, linux-arm-kernel@lists.infradead.org, Catalin Marinas <catalin.marinas@arm.com>, Marc Zyngier <marc.zyngier@arm.com>, Will Deacon <will.deacon@arm.com>, Russell King <rmk+kernel@arm.linux.org.uk>, Vincent Guittot <vincent.guittot@linaro.org>, mark.brown@arm.com Subject: [PATCH ARM64 v4.4 V3 43/44] arm64: Kill PSCI_GET_VERSION as a variant-2 workaround Date: Thu, 29 Aug 2019 17:04:28 +0530 [thread overview] Message-ID: <dac25c25ca7be303edee245f83498a0f2c545de9.1567077734.git.viresh.kumar@linaro.org> (raw) In-Reply-To: <cover.1567077734.git.viresh.kumar@linaro.org> From: Marc Zyngier <marc.zyngier@arm.com> commit 3a0a397ff5ff8b56ca9f7908b75dee6bf0b5fabb upstream. Now that we've standardised on SMCCC v1.1 to perform the branch prediction invalidation, let's drop the previous band-aid. If vendors haven't updated their firmware to do SMCCC 1.1, they haven't updated PSCI either, so we don't loose anything. Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> [ v4.4: Dropped switch.c changes ] Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> --- arch/arm64/kernel/bpi.S | 24 ------------------ arch/arm64/kernel/cpu_errata.c | 45 ++++++++++------------------------ 2 files changed, 13 insertions(+), 56 deletions(-) diff --git a/arch/arm64/kernel/bpi.S b/arch/arm64/kernel/bpi.S index c72f261f4b64..dc4eb154e33b 100644 --- a/arch/arm64/kernel/bpi.S +++ b/arch/arm64/kernel/bpi.S @@ -54,30 +54,6 @@ ENTRY(__bp_harden_hyp_vecs_start) vectors __kvm_hyp_vector .endr ENTRY(__bp_harden_hyp_vecs_end) -ENTRY(__psci_hyp_bp_inval_start) - sub sp, sp, #(8 * 18) - stp x16, x17, [sp, #(16 * 0)] - stp x14, x15, [sp, #(16 * 1)] - stp x12, x13, [sp, #(16 * 2)] - stp x10, x11, [sp, #(16 * 3)] - stp x8, x9, [sp, #(16 * 4)] - stp x6, x7, [sp, #(16 * 5)] - stp x4, x5, [sp, #(16 * 6)] - stp x2, x3, [sp, #(16 * 7)] - stp x0, x1, [sp, #(16 * 8)] - mov x0, #0x84000000 - smc #0 - ldp x16, x17, [sp, #(16 * 0)] - ldp x14, x15, [sp, #(16 * 1)] - ldp x12, x13, [sp, #(16 * 2)] - ldp x10, x11, [sp, #(16 * 3)] - ldp x8, x9, [sp, #(16 * 4)] - ldp x6, x7, [sp, #(16 * 5)] - ldp x4, x5, [sp, #(16 * 6)] - ldp x2, x3, [sp, #(16 * 7)] - ldp x0, x1, [sp, #(16 * 8)] - add sp, sp, #(8 * 18) -ENTRY(__psci_hyp_bp_inval_end) .macro smccc_workaround_1 inst sub sp, sp, #(8 * 4) diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index d5fd7be563bc..2a17789bb963 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -50,7 +50,6 @@ is_affected_midr_range(const struct arm64_cpu_capabilities *entry, int scope) DEFINE_PER_CPU_READ_MOSTLY(struct bp_hardening_data, bp_hardening_data); #ifdef CONFIG_KVM -extern char __psci_hyp_bp_inval_start[], __psci_hyp_bp_inval_end[]; extern char __smccc_workaround_1_smc_start[]; extern char __smccc_workaround_1_smc_end[]; extern char __smccc_workaround_1_hvc_start[]; @@ -97,8 +96,6 @@ static void __install_bp_hardening_cb(bp_hardening_cb_t fn, spin_unlock(&bp_lock); } #else -#define __psci_hyp_bp_inval_start NULL -#define __psci_hyp_bp_inval_end NULL #define __smccc_workaround_1_smc_start NULL #define __smccc_workaround_1_smc_end NULL #define __smccc_workaround_1_hvc_start NULL @@ -143,24 +140,25 @@ static void call_hvc_arch_workaround_1(void) arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_WORKAROUND_1, NULL); } -static bool check_smccc_arch_workaround_1(const struct arm64_cpu_capabilities *entry) +static int enable_smccc_arch_workaround_1(void *data) { + const struct arm64_cpu_capabilities *entry = data; bp_hardening_cb_t cb; void *smccc_start, *smccc_end; struct arm_smccc_res res; if (!entry->matches(entry, SCOPE_LOCAL_CPU)) - return false; + return 0; if (psci_ops.smccc_version == SMCCC_VERSION_1_0) - return false; + return 0; switch (psci_ops.conduit) { case PSCI_CONDUIT_HVC: arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, ARM_SMCCC_ARCH_WORKAROUND_1, &res); if (res.a0) - return false; + return 0; cb = call_hvc_arch_workaround_1; smccc_start = __smccc_workaround_1_hvc_start; smccc_end = __smccc_workaround_1_hvc_end; @@ -170,35 +168,18 @@ static bool check_smccc_arch_workaround_1(const struct arm64_cpu_capabilities *e arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, ARM_SMCCC_ARCH_WORKAROUND_1, &res); if (res.a0) - return false; + return 0; cb = call_smc_arch_workaround_1; smccc_start = __smccc_workaround_1_smc_start; smccc_end = __smccc_workaround_1_smc_end; break; default: - return false; + return 0; } install_bp_hardening_cb(entry, cb, smccc_start, smccc_end); - return true; -} - -static int enable_psci_bp_hardening(void *data) -{ - const struct arm64_cpu_capabilities *entry = data; - - if (psci_ops.get_version) { - if (check_smccc_arch_workaround_1(entry)) - return 0; - - install_bp_hardening_cb(entry, - (bp_hardening_cb_t)psci_ops.get_version, - __psci_hyp_bp_inval_start, - __psci_hyp_bp_inval_end); - } - return 0; } #endif /* CONFIG_HARDEN_BRANCH_PREDICTOR */ @@ -283,32 +264,32 @@ const struct arm64_cpu_capabilities arm64_errata[] = { { .capability = ARM64_HARDEN_BRANCH_PREDICTOR, MIDR_ALL_VERSIONS(MIDR_CORTEX_A57), - .enable = enable_psci_bp_hardening, + .enable = enable_smccc_arch_workaround_1, }, { .capability = ARM64_HARDEN_BRANCH_PREDICTOR, MIDR_ALL_VERSIONS(MIDR_CORTEX_A72), - .enable = enable_psci_bp_hardening, + .enable = enable_smccc_arch_workaround_1, }, { .capability = ARM64_HARDEN_BRANCH_PREDICTOR, MIDR_ALL_VERSIONS(MIDR_CORTEX_A73), - .enable = enable_psci_bp_hardening, + .enable = enable_smccc_arch_workaround_1, }, { .capability = ARM64_HARDEN_BRANCH_PREDICTOR, MIDR_ALL_VERSIONS(MIDR_CORTEX_A75), - .enable = enable_psci_bp_hardening, + .enable = enable_smccc_arch_workaround_1, }, { .capability = ARM64_HARDEN_BRANCH_PREDICTOR, MIDR_ALL_VERSIONS(MIDR_BRCM_VULCAN), - .enable = enable_psci_bp_hardening, + .enable = enable_smccc_arch_workaround_1, }, { .capability = ARM64_HARDEN_BRANCH_PREDICTOR, MIDR_ALL_VERSIONS(MIDR_CAVIUM_THUNDERX2), - .enable = enable_psci_bp_hardening, + .enable = enable_smccc_arch_workaround_1, }, #endif { -- 2.21.0.rc0.269.g1a574e7a288b
WARNING: multiple messages have this Message-ID (diff)
From: Viresh Kumar <viresh.kumar@linaro.org> To: stable@vger.kernel.org, Julien Thierry <Julien.Thierry@arm.com>, Mark Rutland <mark.rutland@arm.com> Cc: Marc Zyngier <marc.zyngier@arm.com>, Viresh Kumar <viresh.kumar@linaro.org>, Will Deacon <will.deacon@arm.com>, mark.brown@arm.com, Catalin Marinas <catalin.marinas@arm.com>, Russell King <rmk+kernel@arm.linux.org.uk>, linux-arm-kernel@lists.infradead.org Subject: [PATCH ARM64 v4.4 V3 43/44] arm64: Kill PSCI_GET_VERSION as a variant-2 workaround Date: Thu, 29 Aug 2019 17:04:28 +0530 [thread overview] Message-ID: <dac25c25ca7be303edee245f83498a0f2c545de9.1567077734.git.viresh.kumar@linaro.org> (raw) In-Reply-To: <cover.1567077734.git.viresh.kumar@linaro.org> From: Marc Zyngier <marc.zyngier@arm.com> commit 3a0a397ff5ff8b56ca9f7908b75dee6bf0b5fabb upstream. Now that we've standardised on SMCCC v1.1 to perform the branch prediction invalidation, let's drop the previous band-aid. If vendors haven't updated their firmware to do SMCCC 1.1, they haven't updated PSCI either, so we don't loose anything. Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> [ v4.4: Dropped switch.c changes ] Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> --- arch/arm64/kernel/bpi.S | 24 ------------------ arch/arm64/kernel/cpu_errata.c | 45 ++++++++++------------------------ 2 files changed, 13 insertions(+), 56 deletions(-) diff --git a/arch/arm64/kernel/bpi.S b/arch/arm64/kernel/bpi.S index c72f261f4b64..dc4eb154e33b 100644 --- a/arch/arm64/kernel/bpi.S +++ b/arch/arm64/kernel/bpi.S @@ -54,30 +54,6 @@ ENTRY(__bp_harden_hyp_vecs_start) vectors __kvm_hyp_vector .endr ENTRY(__bp_harden_hyp_vecs_end) -ENTRY(__psci_hyp_bp_inval_start) - sub sp, sp, #(8 * 18) - stp x16, x17, [sp, #(16 * 0)] - stp x14, x15, [sp, #(16 * 1)] - stp x12, x13, [sp, #(16 * 2)] - stp x10, x11, [sp, #(16 * 3)] - stp x8, x9, [sp, #(16 * 4)] - stp x6, x7, [sp, #(16 * 5)] - stp x4, x5, [sp, #(16 * 6)] - stp x2, x3, [sp, #(16 * 7)] - stp x0, x1, [sp, #(16 * 8)] - mov x0, #0x84000000 - smc #0 - ldp x16, x17, [sp, #(16 * 0)] - ldp x14, x15, [sp, #(16 * 1)] - ldp x12, x13, [sp, #(16 * 2)] - ldp x10, x11, [sp, #(16 * 3)] - ldp x8, x9, [sp, #(16 * 4)] - ldp x6, x7, [sp, #(16 * 5)] - ldp x4, x5, [sp, #(16 * 6)] - ldp x2, x3, [sp, #(16 * 7)] - ldp x0, x1, [sp, #(16 * 8)] - add sp, sp, #(8 * 18) -ENTRY(__psci_hyp_bp_inval_end) .macro smccc_workaround_1 inst sub sp, sp, #(8 * 4) diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index d5fd7be563bc..2a17789bb963 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -50,7 +50,6 @@ is_affected_midr_range(const struct arm64_cpu_capabilities *entry, int scope) DEFINE_PER_CPU_READ_MOSTLY(struct bp_hardening_data, bp_hardening_data); #ifdef CONFIG_KVM -extern char __psci_hyp_bp_inval_start[], __psci_hyp_bp_inval_end[]; extern char __smccc_workaround_1_smc_start[]; extern char __smccc_workaround_1_smc_end[]; extern char __smccc_workaround_1_hvc_start[]; @@ -97,8 +96,6 @@ static void __install_bp_hardening_cb(bp_hardening_cb_t fn, spin_unlock(&bp_lock); } #else -#define __psci_hyp_bp_inval_start NULL -#define __psci_hyp_bp_inval_end NULL #define __smccc_workaround_1_smc_start NULL #define __smccc_workaround_1_smc_end NULL #define __smccc_workaround_1_hvc_start NULL @@ -143,24 +140,25 @@ static void call_hvc_arch_workaround_1(void) arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_WORKAROUND_1, NULL); } -static bool check_smccc_arch_workaround_1(const struct arm64_cpu_capabilities *entry) +static int enable_smccc_arch_workaround_1(void *data) { + const struct arm64_cpu_capabilities *entry = data; bp_hardening_cb_t cb; void *smccc_start, *smccc_end; struct arm_smccc_res res; if (!entry->matches(entry, SCOPE_LOCAL_CPU)) - return false; + return 0; if (psci_ops.smccc_version == SMCCC_VERSION_1_0) - return false; + return 0; switch (psci_ops.conduit) { case PSCI_CONDUIT_HVC: arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, ARM_SMCCC_ARCH_WORKAROUND_1, &res); if (res.a0) - return false; + return 0; cb = call_hvc_arch_workaround_1; smccc_start = __smccc_workaround_1_hvc_start; smccc_end = __smccc_workaround_1_hvc_end; @@ -170,35 +168,18 @@ static bool check_smccc_arch_workaround_1(const struct arm64_cpu_capabilities *e arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, ARM_SMCCC_ARCH_WORKAROUND_1, &res); if (res.a0) - return false; + return 0; cb = call_smc_arch_workaround_1; smccc_start = __smccc_workaround_1_smc_start; smccc_end = __smccc_workaround_1_smc_end; break; default: - return false; + return 0; } install_bp_hardening_cb(entry, cb, smccc_start, smccc_end); - return true; -} - -static int enable_psci_bp_hardening(void *data) -{ - const struct arm64_cpu_capabilities *entry = data; - - if (psci_ops.get_version) { - if (check_smccc_arch_workaround_1(entry)) - return 0; - - install_bp_hardening_cb(entry, - (bp_hardening_cb_t)psci_ops.get_version, - __psci_hyp_bp_inval_start, - __psci_hyp_bp_inval_end); - } - return 0; } #endif /* CONFIG_HARDEN_BRANCH_PREDICTOR */ @@ -283,32 +264,32 @@ const struct arm64_cpu_capabilities arm64_errata[] = { { .capability = ARM64_HARDEN_BRANCH_PREDICTOR, MIDR_ALL_VERSIONS(MIDR_CORTEX_A57), - .enable = enable_psci_bp_hardening, + .enable = enable_smccc_arch_workaround_1, }, { .capability = ARM64_HARDEN_BRANCH_PREDICTOR, MIDR_ALL_VERSIONS(MIDR_CORTEX_A72), - .enable = enable_psci_bp_hardening, + .enable = enable_smccc_arch_workaround_1, }, { .capability = ARM64_HARDEN_BRANCH_PREDICTOR, MIDR_ALL_VERSIONS(MIDR_CORTEX_A73), - .enable = enable_psci_bp_hardening, + .enable = enable_smccc_arch_workaround_1, }, { .capability = ARM64_HARDEN_BRANCH_PREDICTOR, MIDR_ALL_VERSIONS(MIDR_CORTEX_A75), - .enable = enable_psci_bp_hardening, + .enable = enable_smccc_arch_workaround_1, }, { .capability = ARM64_HARDEN_BRANCH_PREDICTOR, MIDR_ALL_VERSIONS(MIDR_BRCM_VULCAN), - .enable = enable_psci_bp_hardening, + .enable = enable_smccc_arch_workaround_1, }, { .capability = ARM64_HARDEN_BRANCH_PREDICTOR, MIDR_ALL_VERSIONS(MIDR_CAVIUM_THUNDERX2), - .enable = enable_psci_bp_hardening, + .enable = enable_smccc_arch_workaround_1, }, #endif { -- 2.21.0.rc0.269.g1a574e7a288b _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-08-29 11:36 UTC|newest] Thread overview: 128+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-08-29 11:33 [PATCH ARM64 v4.4 V3 00/44] V4.4 backport of arm64 Spectre patches Viresh Kumar 2019-08-29 11:33 ` Viresh Kumar 2019-08-29 11:33 ` [PATCH ARM64 v4.4 V3 01/44] arm64: barrier: Add CSDB macros to control data-value prediction Viresh Kumar 2019-08-29 11:33 ` Viresh Kumar 2019-08-30 9:39 ` Mark Rutland 2019-08-30 9:39 ` Mark Rutland 2019-08-29 11:33 ` [PATCH ARM64 v4.4 V3 02/44] arm64: Implement array_index_mask_nospec() Viresh Kumar 2019-08-29 11:33 ` Viresh Kumar 2019-08-30 9:40 ` Mark Rutland 2019-08-30 9:40 ` Mark Rutland 2019-08-29 11:33 ` [PATCH ARM64 v4.4 V3 03/44] arm64: move TASK_* definitions to <asm/processor.h> Viresh Kumar 2019-08-29 11:33 ` Viresh Kumar 2019-08-30 9:40 ` Mark Rutland 2019-08-30 9:40 ` Mark Rutland 2019-08-29 11:33 ` [PATCH ARM64 v4.4 V3 04/44] arm64: Make USER_DS an inclusive limit Viresh Kumar 2019-08-29 11:33 ` Viresh Kumar 2019-08-30 9:40 ` Mark Rutland 2019-08-30 9:40 ` Mark Rutland 2019-08-29 11:33 ` [PATCH ARM64 v4.4 V3 05/44] arm64: Use pointer masking to limit uaccess speculation Viresh Kumar 2019-08-29 11:33 ` Viresh Kumar 2019-08-30 9:40 ` Mark Rutland 2019-08-30 9:40 ` Mark Rutland 2019-08-29 11:33 ` [PATCH ARM64 v4.4 V3 06/44] arm64: entry: Ensure branch through syscall table is bounded under speculation Viresh Kumar 2019-08-29 11:33 ` Viresh Kumar 2019-08-30 9:40 ` Mark Rutland 2019-08-30 9:40 ` Mark Rutland 2019-08-29 11:33 ` [PATCH ARM64 v4.4 V3 07/44] arm64: uaccess: Prevent speculative use of the current addr_limit Viresh Kumar 2019-08-29 11:33 ` Viresh Kumar 2019-08-30 9:40 ` Mark Rutland 2019-08-30 9:40 ` Mark Rutland 2019-08-29 11:33 ` [PATCH ARM64 v4.4 V3 08/44] arm64: uaccess: Don't bother eliding access_ok checks in __{get, put}_user Viresh Kumar 2019-08-29 11:33 ` Viresh Kumar 2019-08-30 9:41 ` Mark Rutland 2019-08-30 9:41 ` Mark Rutland 2019-08-29 11:33 ` [PATCH ARM64 v4.4 V3 09/44] mm/kasan: add API to check memory regions Viresh Kumar 2019-08-29 11:33 ` Viresh Kumar 2019-08-30 9:41 ` Mark Rutland 2019-08-30 9:41 ` Mark Rutland 2019-08-29 11:33 ` [PATCH ARM64 v4.4 V3 10/44] arm64: kasan: instrument user memory access API Viresh Kumar 2019-08-29 11:33 ` Viresh Kumar 2019-08-30 9:41 ` Mark Rutland 2019-08-30 9:41 ` Mark Rutland 2019-08-29 11:33 ` [PATCH ARM64 v4.4 V3 11/44] arm64: uaccess: Mask __user pointers for __arch_{clear, copy_*}_user Viresh Kumar 2019-08-29 11:33 ` Viresh Kumar 2019-08-30 9:41 ` Mark Rutland 2019-08-30 9:41 ` Mark Rutland 2019-08-29 11:33 ` [PATCH ARM64 v4.4 V3 12/44] arm64: cpufeature: Test 'matches' pointer to find the end of the list Viresh Kumar 2019-08-29 11:33 ` Viresh Kumar 2019-09-02 14:27 ` Mark Rutland 2019-09-02 14:27 ` Mark Rutland 2019-09-05 7:45 ` Viresh Kumar 2019-09-05 7:45 ` Viresh Kumar 2019-09-06 13:49 ` Mark Rutland 2019-09-06 13:49 ` Mark Rutland 2019-09-10 9:35 ` Viresh Kumar 2019-09-10 9:35 ` Viresh Kumar 2019-10-11 6:36 ` Viresh Kumar 2019-10-11 6:36 ` Viresh Kumar 2019-08-29 11:33 ` [PATCH ARM64 v4.4 V3 13/44] arm64: cpufeature: Add scope for capability check Viresh Kumar 2019-08-29 11:33 ` Viresh Kumar 2019-08-29 11:33 ` [PATCH ARM64 v4.4 V3 14/44] arm64: Introduce cpu_die_early Viresh Kumar 2019-08-29 11:33 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 15/44] arm64: Add a helper for parking CPUs in a loop Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 16/44] arm64: Move cpu_die_early to smp.c Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 17/44] arm64: Verify CPU errata work arounds on hotplugged CPU Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 18/44] arm64: errata: Calling enable functions for CPU errata too Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 19/44] arm64: Rearrange CPU errata workaround checks Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 20/44] arm64: Run enable method for errata work arounds on late CPUs Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 21/44] arm64: cpufeature: Pass capability structure to ->enable callback Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 22/44] drivers/firmware: Expose psci_get_version through psci_ops structure Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 23/44] arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 24/44] arm64: Move post_ttbr_update_workaround to C code Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 25/44] arm64: Add skeleton to harden the branch predictor against aliasing attacks Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 26/44] arm64: Move BP hardening to check_and_switch_context Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 27/44] arm64: entry: Apply BP hardening for high-priority synchronous exceptions Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 28/44] arm64: entry: Apply BP hardening for suspicious interrupts from EL0 Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 29/44] arm64: cputype: Add missing MIDR values for Cortex-A72 and Cortex-A75 Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 30/44] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 31/44] arm64: Implement branch predictor hardening for affected Cortex-A CPUs Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 32/44] arm64: cputype info for Broadcom Vulcan Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 33/44] arm64: cputype: Add MIDR values for Cavium ThunderX2 CPUs Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 34/44] arm64: Branch predictor hardening for Cavium ThunderX2 Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 35/44] ARM: 8478/2: arm/arm64: add arm-smccc Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 36/44] arm/arm64: KVM: Advertise SMCCC v1.1 Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 37/44] arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 38/44] firmware/psci: Expose PSCI conduit Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 39/44] firmware/psci: Expose SMCCC version through psci_ops Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 40/44] arm/arm64: smccc: Make function identifiers an unsigned quantity Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 41/44] arm/arm64: smccc: Implement SMCCC v1.1 inline primitive Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 42/44] arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar [this message] 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 43/44] arm64: Kill PSCI_GET_VERSION as a variant-2 workaround Viresh Kumar 2019-08-29 11:34 ` [PATCH ARM64 v4.4 V3 44/44] arm64: futex: Mask __user pointers prior to dereference Viresh Kumar 2019-08-29 11:34 ` Viresh Kumar 2019-08-30 9:42 ` Mark Rutland 2019-08-30 9:42 ` Mark Rutland 2019-09-03 5:15 ` Viresh Kumar 2019-09-03 5:15 ` Viresh Kumar 2019-08-29 16:18 ` [PATCH ARM64 v4.4 V3 00/44] V4.4 backport of arm64 Spectre patches Mark Rutland 2019-08-29 16:18 ` Mark Rutland
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