From: Schrempf Frieder <frieder.schrempf@kontron.de>
To: Adam Ford <aford173@gmail.com>, Jacky Bai <ping.bai@nxp.com>,
"NXP Linux Team" <linux-imx@nxp.com>, Peng Fan <peng.fan@nxp.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
Fabio Estevam <festevam@gmail.com>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
dl-linux-imx <linux-imx@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Shawn Guo <shawnguo@kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 5/7] arm64: dts: imx8mm: add GPC power domains
Date: Wed, 5 Feb 2020 15:41:41 +0000 [thread overview]
Message-ID: <db801b5e-0482-0379-c19e-5c293532c493@kontron.de> (raw)
In-Reply-To: <CAHCN7xLwJvqb=Pc8oOxdRLOExjw-cDKaEmm4-bR3Yt=t+OwY6Q@mail.gmail.com>
Hi,
On 05.12.19 04:15, Adam Ford wrote:
> On Wed, Dec 4, 2019 at 8:37 PM Jacky Bai <ping.bai@nxp.com> wrote:
>>
>>> -----Original Message-----
>>> From: Adam Ford <aford173@gmail.com>
>>> Sent: Thursday, December 5, 2019 10:19 AM
>>> To: linux-arm-kernel@lists.infradead.org
>>> Cc: Adam Ford <aford173@gmail.com>; Rob Herring <robh+dt@kernel.org>;
>>> Mark Rutland <mark.rutland@arm.com>; Shawn Guo
>>> <shawnguo@kernel.org>; Sascha Hauer <s.hauer@pengutronix.de>;
>>> Pengutronix Kernel Team <kernel@pengutronix.de>; Fabio Estevam
>>> <festevam@gmail.com>; dl-linux-imx <linux-imx@nxp.com>;
>>> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org
>>> Subject: [PATCH 5/7] arm64: dts: imx8mm: add GPC power domains
>>>
>>> There is a power domain controller on the i.XM8M Mini used for handling
>>> interrupts and controlling certain peripherals like USB OTG and PCIe, which
>>> are currently unavailable.
>>>
>>> This patch enables support the controller itself to the help facilitate enabling
>>> additional peripherals.
>>>
>>> Signed-off-by: Adam Ford <aford173@gmail.com>
>>> ---
>>> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 82
>>> ++++++++++++++++++++++-
>>> 1 file changed, 81 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
>>> b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
>>> index 23c8fad7932b..d05c5b617a4d 100644
>>> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
>>> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
>>> @@ -4,6 +4,7 @@
>>> */
>>>
>>> #include <dt-bindings/clock/imx8mm-clock.h>
>>> +#include <dt-bindings/power/imx8m-power.h>
>>> #include <dt-bindings/gpio/gpio.h>
>>> #include <dt-bindings/input/input.h>
>>> #include <dt-bindings/interrupt-controller/arm-gic.h>
>>> @@ -13,7 +14,7 @@
>>>
>>> / {
>>> compatible = "fsl,imx8mm";
>>> - interrupt-parent = <&gic>;
>>> + interrupt-parent = <&gpc>;
>>
>> NACK, for imx8mm, imx8mn & future i.MX8M SOC, we don't treat GPC as interrupt controller in linux anymore.
>> Above change will break the low power mode support(suspend/resume)
>
> What makes it different than the i.MX8MQ? The I basically copied this
> from the i.MX8MQ and updated the bit locations and tried to leave
> everything else the same.
>
> I'm OK with removing the interrupt controller stuff, but if that's
> required, I'd like to understand why it's still in the i.MX8Q.
I would also like to know how NXP plans to implement things like GPC in
mainline. I currently use a tree [1] that doesn't use any power domain
driver but USB, LCDIF and MIPI-DSI are working fine.
For this I ported some patches from the imx_5.4.0_8dxlphantom_er tree in
the NXP repository [2] and added a few small hacks to enable missing
clocks, etc.
Is there some roadmap for the upstream support of the different drivers
and features of the i.MX8MM?
Thanks,
Frieder
[1] https://git.kontron-electronics.de/linux/linux/commits/v5.4-ktn
[2]
https://source.codeaurora.org/external/imx/linux-imx/log/?h=imx_5.4.0_8dxlphantom_er
>
> adam
>>
>> BR
>> Jacky Bai
>>
>>> #address-cells = <2>;
>>> #size-cells = <2>;
>>>
>>> @@ -495,6 +496,85 @@
>>> interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
>>> #reset-cells = <1>;
>>> };
>>> +
>>> + gpc: gpc@303a0000 {
>>> + compatible = "fsl,imx8mm-gpc";
>>> + reg = <0x303a0000 0x10000>;
>>> + interrupt-parent = <&gic>;
>>> + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
>>> + interrupt-controller;
>>> + #interrupt-cells = <3>;
>>> +
>>> + pgc {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + pgc_mipi: power-domain@0 {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_DOMAIN_MIPI>;
>>> + };
>>> +
>>> + pgc_pcie: power-domain@1 {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_DOMAIN_PCIE>;
>>> + };
>>> +
>>> + pgc_otg1: power-domain@2 {
>>> + #power-domain-cells = <0>;
>>> + reg =
>>> <IMX8MM_POWER_DOMAIN_USB_OTG1>;
>>> + };
>>> +
>>> + pgc_otg2: power-domain@3 {
>>> + #power-domain-cells = <0>;
>>> + reg =
>>> <IMX8MM_POWER_DOMAIN_USB_OTG2>;
>>> + };
>>> +
>>> + pgc_ddr1: power-domain@4 {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_DOMAIN_DDR1>;
>>> + };
>>> +
>>> + pgc_gpu2d: power-domain@5 {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_DOMAIN_GPU2D>;
>>> + };
>>> +
>>> + pgc_gpu: power-domain@6 {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_DOMAIN_GPU>;
>>> + };
>>> +
>>> + pgc_vpu: power-domain@7 {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_DOMAIN_VPU>;
>>> + };
>>> +
>>> + pgc_gpu3d: power-domain@8 {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_DOMAIN_GPU3D>;
>>> + };
>>> +
>>> + pgc_disp: power-domain@9 {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_DOMAIN_DISP>;
>>> + };
>>> +
>>> + pgc_vpu_g1: power-domain@a {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_VPU_G1>;
>>> + };
>>> +
>>> + pgc_vpu_g2: power-domain@b {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_VPU_G2>;
>>> + };
>>> +
>>> + pgc_vpu_h1: power-domain@c {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_VPU_H1>;
>>> + };
>>> + };
>>> + };
>>> };
>>>
>>> aips2: bus@30400000 {
>>> --
>>> 2.20.1
>>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
WARNING: multiple messages have this Message-ID (diff)
From: Schrempf Frieder <frieder.schrempf@kontron.de>
To: Adam Ford <aford173@gmail.com>, Jacky Bai <ping.bai@nxp.com>,
"NXP Linux Team" <linux-imx@nxp.com>, Peng Fan <peng.fan@nxp.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
dl-linux-imx <linux-imx@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 5/7] arm64: dts: imx8mm: add GPC power domains
Date: Wed, 5 Feb 2020 15:41:41 +0000 [thread overview]
Message-ID: <db801b5e-0482-0379-c19e-5c293532c493@kontron.de> (raw)
In-Reply-To: <CAHCN7xLwJvqb=Pc8oOxdRLOExjw-cDKaEmm4-bR3Yt=t+OwY6Q@mail.gmail.com>
Hi,
On 05.12.19 04:15, Adam Ford wrote:
> On Wed, Dec 4, 2019 at 8:37 PM Jacky Bai <ping.bai@nxp.com> wrote:
>>
>>> -----Original Message-----
>>> From: Adam Ford <aford173@gmail.com>
>>> Sent: Thursday, December 5, 2019 10:19 AM
>>> To: linux-arm-kernel@lists.infradead.org
>>> Cc: Adam Ford <aford173@gmail.com>; Rob Herring <robh+dt@kernel.org>;
>>> Mark Rutland <mark.rutland@arm.com>; Shawn Guo
>>> <shawnguo@kernel.org>; Sascha Hauer <s.hauer@pengutronix.de>;
>>> Pengutronix Kernel Team <kernel@pengutronix.de>; Fabio Estevam
>>> <festevam@gmail.com>; dl-linux-imx <linux-imx@nxp.com>;
>>> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org
>>> Subject: [PATCH 5/7] arm64: dts: imx8mm: add GPC power domains
>>>
>>> There is a power domain controller on the i.XM8M Mini used for handling
>>> interrupts and controlling certain peripherals like USB OTG and PCIe, which
>>> are currently unavailable.
>>>
>>> This patch enables support the controller itself to the help facilitate enabling
>>> additional peripherals.
>>>
>>> Signed-off-by: Adam Ford <aford173@gmail.com>
>>> ---
>>> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 82
>>> ++++++++++++++++++++++-
>>> 1 file changed, 81 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
>>> b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
>>> index 23c8fad7932b..d05c5b617a4d 100644
>>> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
>>> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
>>> @@ -4,6 +4,7 @@
>>> */
>>>
>>> #include <dt-bindings/clock/imx8mm-clock.h>
>>> +#include <dt-bindings/power/imx8m-power.h>
>>> #include <dt-bindings/gpio/gpio.h>
>>> #include <dt-bindings/input/input.h>
>>> #include <dt-bindings/interrupt-controller/arm-gic.h>
>>> @@ -13,7 +14,7 @@
>>>
>>> / {
>>> compatible = "fsl,imx8mm";
>>> - interrupt-parent = <&gic>;
>>> + interrupt-parent = <&gpc>;
>>
>> NACK, for imx8mm, imx8mn & future i.MX8M SOC, we don't treat GPC as interrupt controller in linux anymore.
>> Above change will break the low power mode support(suspend/resume)
>
> What makes it different than the i.MX8MQ? The I basically copied this
> from the i.MX8MQ and updated the bit locations and tried to leave
> everything else the same.
>
> I'm OK with removing the interrupt controller stuff, but if that's
> required, I'd like to understand why it's still in the i.MX8Q.
I would also like to know how NXP plans to implement things like GPC in
mainline. I currently use a tree [1] that doesn't use any power domain
driver but USB, LCDIF and MIPI-DSI are working fine.
For this I ported some patches from the imx_5.4.0_8dxlphantom_er tree in
the NXP repository [2] and added a few small hacks to enable missing
clocks, etc.
Is there some roadmap for the upstream support of the different drivers
and features of the i.MX8MM?
Thanks,
Frieder
[1] https://git.kontron-electronics.de/linux/linux/commits/v5.4-ktn
[2]
https://source.codeaurora.org/external/imx/linux-imx/log/?h=imx_5.4.0_8dxlphantom_er
>
> adam
>>
>> BR
>> Jacky Bai
>>
>>> #address-cells = <2>;
>>> #size-cells = <2>;
>>>
>>> @@ -495,6 +496,85 @@
>>> interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
>>> #reset-cells = <1>;
>>> };
>>> +
>>> + gpc: gpc@303a0000 {
>>> + compatible = "fsl,imx8mm-gpc";
>>> + reg = <0x303a0000 0x10000>;
>>> + interrupt-parent = <&gic>;
>>> + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
>>> + interrupt-controller;
>>> + #interrupt-cells = <3>;
>>> +
>>> + pgc {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + pgc_mipi: power-domain@0 {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_DOMAIN_MIPI>;
>>> + };
>>> +
>>> + pgc_pcie: power-domain@1 {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_DOMAIN_PCIE>;
>>> + };
>>> +
>>> + pgc_otg1: power-domain@2 {
>>> + #power-domain-cells = <0>;
>>> + reg =
>>> <IMX8MM_POWER_DOMAIN_USB_OTG1>;
>>> + };
>>> +
>>> + pgc_otg2: power-domain@3 {
>>> + #power-domain-cells = <0>;
>>> + reg =
>>> <IMX8MM_POWER_DOMAIN_USB_OTG2>;
>>> + };
>>> +
>>> + pgc_ddr1: power-domain@4 {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_DOMAIN_DDR1>;
>>> + };
>>> +
>>> + pgc_gpu2d: power-domain@5 {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_DOMAIN_GPU2D>;
>>> + };
>>> +
>>> + pgc_gpu: power-domain@6 {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_DOMAIN_GPU>;
>>> + };
>>> +
>>> + pgc_vpu: power-domain@7 {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_DOMAIN_VPU>;
>>> + };
>>> +
>>> + pgc_gpu3d: power-domain@8 {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_DOMAIN_GPU3D>;
>>> + };
>>> +
>>> + pgc_disp: power-domain@9 {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_DOMAIN_DISP>;
>>> + };
>>> +
>>> + pgc_vpu_g1: power-domain@a {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_VPU_G1>;
>>> + };
>>> +
>>> + pgc_vpu_g2: power-domain@b {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_VPU_G2>;
>>> + };
>>> +
>>> + pgc_vpu_h1: power-domain@c {
>>> + #power-domain-cells = <0>;
>>> + reg = <IMX8MM_POWER_VPU_H1>;
>>> + };
>>> + };
>>> + };
>>> };
>>>
>>> aips2: bus@30400000 {
>>> --
>>> 2.20.1
>>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-02-05 15:41 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-05 2:19 [PATCH 0/7] soc: imx: Enable additional functionality of i.MX8M Adam Ford
2019-12-05 2:19 ` Adam Ford
2019-12-05 2:19 ` [PATCH 1/7] soc: imx: gpcv2: Rename imx8mq-power.h to imx8m-power.h Adam Ford
2019-12-05 2:19 ` Adam Ford
2019-12-05 2:19 ` [PATCH 2/7] soc: imx: gpcv2: Update imx8m-power.h to include iMX8M Mini Adam Ford
2019-12-05 2:19 ` Adam Ford
2019-12-05 2:19 ` [PATCH 3/7] soc: imx: gpcv2: add support for i.MX8M Mini SoC Adam Ford
2019-12-05 2:19 ` Adam Ford
2019-12-05 2:33 ` Jacky Bai
2019-12-05 2:33 ` Jacky Bai
2019-12-05 3:13 ` Adam Ford
2019-12-05 3:13 ` Adam Ford
2019-12-05 2:19 ` [PATCH 4/7] dt-bindings: imx-gpcv2: Update bindings to support i.MX8M Mini Adam Ford
2019-12-05 2:19 ` Adam Ford
2019-12-05 2:19 ` [PATCH 5/7] arm64: dts: imx8mm: add GPC power domains Adam Ford
2019-12-05 2:19 ` Adam Ford
2019-12-05 2:37 ` Jacky Bai
2019-12-05 2:37 ` Jacky Bai
2019-12-05 3:15 ` Adam Ford
2019-12-05 3:15 ` Adam Ford
2020-02-05 15:41 ` Schrempf Frieder [this message]
2020-02-05 15:41 ` Schrempf Frieder
2019-12-05 2:19 ` [PATCH 6/7] ARM64: dts: imx8mm: Fix clocks and power domain for USB OTG Adam Ford
2019-12-05 2:19 ` Adam Ford
2019-12-05 2:19 ` [PATCH 7/7] arm64: dts: imx8mm: Add PCIe support Adam Ford
2019-12-05 2:19 ` Adam Ford
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