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* [PATCH] dmaengine: fsl-edma: fix wrong tcd endianness for big-endian cpu
@ 2020-05-29 20:15 Angelo Dureghello
  2020-06-01  9:08 ` kbuild test robot
  0 siblings, 1 reply; 2+ messages in thread
From: Angelo Dureghello @ 2020-05-29 20:15 UTC (permalink / raw)
  To: vkoul
  Cc: dmaengine, peng.ma, maowenan, yibin.gong, festevam, Angelo Dureghello

Due to recent fixes in m68k arch-specific I/O accessor macros, this
driver is not working anymore for ColdFire. Fix wrong tcd endianness
removing additional swaps, since edma_xxx() functions should already
take care of any eventual swap when needed.

Note, i could only test the change in ColdFire mcf54415 and Vybrid
vf50 / Colibri where i don't see any issue. So, every feedback and
test for all other SoCs involved is really appreciated.

Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
---
 drivers/dma/fsl-edma-common.c | 25 ++++++++++++-------------
 1 file changed, 12 insertions(+), 13 deletions(-)

diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c
index 5697c3622699..2008d0cedb66 100644
--- a/drivers/dma/fsl-edma-common.c
+++ b/drivers/dma/fsl-edma-common.c
@@ -353,25 +353,24 @@ static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan,
 	 * TCD parameters are stored in struct fsl_edma_hw_tcd in little
 	 * endian format. However, we need to load the TCD registers in
 	 * big- or little-endian obeying the eDMA engine model endian.
+	 * The swap, when needed, is performed from edma_xxx() functions.
 	 */
 	edma_writew(edma, 0,  &regs->tcd[ch].csr);
-	edma_writel(edma, le32_to_cpu(tcd->saddr), &regs->tcd[ch].saddr);
-	edma_writel(edma, le32_to_cpu(tcd->daddr), &regs->tcd[ch].daddr);
+	edma_writel(edma, tcd->saddr, &regs->tcd[ch].saddr);
+	edma_writel(edma, tcd->daddr, &regs->tcd[ch].daddr);
 
-	edma_writew(edma, le16_to_cpu(tcd->attr), &regs->tcd[ch].attr);
-	edma_writew(edma, le16_to_cpu(tcd->soff), &regs->tcd[ch].soff);
+	edma_writew(edma, tcd->attr, &regs->tcd[ch].attr);
+	edma_writew(edma, tcd->soff, &regs->tcd[ch].soff);
 
-	edma_writel(edma, le32_to_cpu(tcd->nbytes), &regs->tcd[ch].nbytes);
-	edma_writel(edma, le32_to_cpu(tcd->slast), &regs->tcd[ch].slast);
+	edma_writel(edma, tcd->nbytes, &regs->tcd[ch].nbytes);
+	edma_writel(edma, tcd->slast, &regs->tcd[ch].slast);
 
-	edma_writew(edma, le16_to_cpu(tcd->citer), &regs->tcd[ch].citer);
-	edma_writew(edma, le16_to_cpu(tcd->biter), &regs->tcd[ch].biter);
-	edma_writew(edma, le16_to_cpu(tcd->doff), &regs->tcd[ch].doff);
+	edma_writew(edma, tcd->citer, &regs->tcd[ch].citer);
+	edma_writew(edma, tcd->biter, &regs->tcd[ch].biter);
+	edma_writew(edma, tcd->doff, &regs->tcd[ch].doff);
+	edma_writel(edma, tcd->dlast_sga, &regs->tcd[ch].dlast_sga);
 
-	edma_writel(edma, le32_to_cpu(tcd->dlast_sga),
-			&regs->tcd[ch].dlast_sga);
-
-	edma_writew(edma, le16_to_cpu(tcd->csr), &regs->tcd[ch].csr);
+	edma_writew(edma, tcd->csr, &regs->tcd[ch].csr);
 }
 
 static inline
-- 
2.26.2


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2020-05-29 20:15 [PATCH] dmaengine: fsl-edma: fix wrong tcd endianness for big-endian cpu Angelo Dureghello
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