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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Sia Jee Heng <jee.heng.sia@intel.com>
Cc: vkoul@kernel.org, Eugeniy.Paltsev@synopsys.com,
	dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 00/15] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA
Date: Mon, 12 Oct 2020 16:59:05 +0300
Message-ID: <20201012135905.GX4077@smile.fi.intel.com> (raw)
In-Reply-To: <20201012042200.29787-1-jee.heng.sia@intel.com>

On Mon, Oct 12, 2020 at 12:21:45PM +0800, Sia Jee Heng wrote:
> The below patch series are to support AxiDMA running on Intel KeemBay SoC.
> The base driver is dw-axi-dmac but code refactoring is needed, for example:
> - Support YAML Schemas DT binding.
> - Replacing Linked List with virtual descriptor management.
> - Remove unrelated hw desc stuff from dma memory pool.
> - Manage dma memory pool alloc/destroy based on channel activity.
> - Support dmaengine device_sync() callback.
> - Support dmaengine device_config().
> - Support dmaegnine device_prep_slave_sg().
> - Support dmaengine device_prep_dma_cyclic().
> - Support of_dma_controller_register().
> - Support burst residue granularity.
> - Support Intel KeemBay AxiDMA registers.
> - Support Intel KeemBay AxiDMA device handshake.
> - Support Intel KeemBay AxiDMA BYTE and HALFWORD device operation.
> - Add constraint to Max segment size.
> 
> This patch set is to replace the patch series submitted at:
> https://lore.kernel.org/dmaengine/1599213094-30144-1-git-send-email-jee.heng.sia@intel.com/

And it means effectively the bumped version, besides the fact that you double
sent this one...


Please fix and resend. Note, now is merge window is open. Depends on
maintainer's flow it may be good or bad time to resend with properly formed
changelog and version of the series.

> This patch series are tested on Intel KeemBay platform.
> 
> 
> Sia Jee Heng (15):
>   dt-bindings: dma: Add YAML schemas for dw-axi-dmac
>   dmaengine: dw-axi-dmac: simplify descriptor management
>   dmaengine: dw-axi-dmac: move dma_pool_create() to
>     alloc_chan_resources()
>   dmaengine: dw-axi-dmac: Add device_synchronize() callback
>   dmaengine: dw-axi-dmac: Add device_config operation
>   dmaengine: dw-axi-dmac: Support device_prep_slave_sg
>   dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic()
>   dmaengine: dw-axi-dmac: Support of_dma_controller_register()
>   dmaengine: dw-axi-dmac: Support burst residue granularity
>   dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA support
>   dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA
>   dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields
>   dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshake
>   dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD
>     registers
>   dmaengine: dw-axi-dmac: Set constraint to the Max segment size
> 
>  .../bindings/dma/snps,dw-axi-dmac.txt         |  39 -
>  .../bindings/dma/snps,dw-axi-dmac.yaml        | 149 ++++
>  .../dma/dw-axi-dmac/dw-axi-dmac-platform.c    | 696 +++++++++++++++---
>  drivers/dma/dw-axi-dmac/dw-axi-dmac.h         |  33 +-
>  4 files changed, 783 insertions(+), 134 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt
>  create mode 100644 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
> 
> -- 
> 2.18.0
> 

-- 
With Best Regards,
Andy Shevchenko



  parent reply index

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-12  4:21 Sia Jee Heng
2020-10-12  4:21 ` [PATCH 01/15] dt-bindings: dma: Add YAML schemas for dw-axi-dmac Sia Jee Heng
2020-10-12  4:21 ` [PATCH 02/15] dmaengine: dw-axi-dmac: simplify descriptor management Sia Jee Heng
2020-10-12  4:21 ` [PATCH 03/15] dmaengine: dw-axi-dmac: move dma_pool_create() to alloc_chan_resources() Sia Jee Heng
2020-10-12  4:21 ` [PATCH 04/15] dmaengine: dw-axi-dmac: Add device_synchronize() callback Sia Jee Heng
2020-10-12  4:21 ` [PATCH 05/15] dmaengine: dw-axi-dmac: Add device_config operation Sia Jee Heng
2020-10-12  4:21 ` [PATCH 06/15] dmaengine: dw-axi-dmac: Support device_prep_slave_sg Sia Jee Heng
2020-10-12  4:21 ` [PATCH 07/15] dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic() Sia Jee Heng
2020-10-12  4:21 ` [PATCH 08/15] dmaengine: dw-axi-dmac: Support of_dma_controller_register() Sia Jee Heng
2020-10-12  4:21 ` [PATCH 09/15] dmaengine: dw-axi-dmac: Support burst residue granularity Sia Jee Heng
2020-10-12  4:21 ` [PATCH 10/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA support Sia Jee Heng
2020-10-12  4:21 ` [PATCH 11/15] dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA Sia Jee Heng
2020-10-12  4:21 ` [PATCH 12/15] dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields Sia Jee Heng
2020-10-12  4:21 ` [PATCH 13/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshake Sia Jee Heng
2020-10-12  4:21 ` [PATCH 14/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD registers Sia Jee Heng
2020-10-12  4:22 ` [PATCH 15/15] dmaengine: dw-axi-dmac: Set constraint to the Max segment size Sia Jee Heng
2020-10-12 13:59 ` Andy Shevchenko [this message]
2020-10-13  5:49   ` [PATCH 00/15] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA Sia, Jee Heng
2020-10-13  7:01     ` Vinod Koul
2020-10-13  7:12       ` Sia, Jee Heng
2020-10-13  7:16         ` Vinod Koul
2020-10-16 14:51 ` Eugeniy Paltsev
2020-10-19  1:22   ` Sia, Jee Heng
2020-10-19 11:39     ` andriy.shevchenko
2020-10-21  1:54       ` Sia, Jee Heng

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