From: Radhey Shyam Pandey <radheys@xilinx.com>
To: Lars-Peter Clausen <lars@metafoo.de>,
"vkoul@kernel.org" <vkoul@kernel.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
Michal Simek <michals@xilinx.com>
Cc: "dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
git <git@xilinx.com>
Subject: RE: [RFC v2 PATCH 6/7] dmaengine: xilinx_dma: Use tasklet_hi_schedule for timing critical usecase
Date: Fri, 11 Jun 2021 18:30:24 +0000 [thread overview]
Message-ID: <BY5PR02MB652096A6F787E277BFD404A2C7349@BY5PR02MB6520.namprd02.prod.outlook.com> (raw)
In-Reply-To: <52f01459-13be-ff29-1c07-b98636169c74@metafoo.de>
> -----Original Message-----
> From: Lars-Peter Clausen <lars@metafoo.de>
> Sent: Thursday, April 15, 2021 12:41 PM
> To: Radhey Shyam Pandey <radheys@xilinx.com>; vkoul@kernel.org;
> robh+dt@kernel.org; Michal Simek <michals@xilinx.com>
> Cc: dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org; git
> <git@xilinx.com>
> Subject: Re: [RFC v2 PATCH 6/7] dmaengine: xilinx_dma: Use
> tasklet_hi_schedule for timing critical usecase
>
> On 4/9/21 7:56 PM, Radhey Shyam Pandey wrote:
> > Schedule tasklet with high priority to ensure that callback processing
> > is prioritized. It improves throughput for netdev dma clients.
> Do you have specific numbers on the throughput improvement?
IIRC there was ~5% performance improvement but I did that a long back
on an older kernel 4.8 and after that onward I always checked overall
performance (having all optimization applied). In next version i will
redo incremental profiling and capture improvement % in the commit
description.
Thanks,
Radhey
next prev parent reply other threads:[~2021-06-11 18:30 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-09 17:55 [RFC v2 PATCH 0/7] Xilinx DMA enhancements and optimization Radhey Shyam Pandey
2021-04-09 17:55 ` [RFC v2 PATCH 1/7] dt-bindings: dmaengine: xilinx_dma: Add xlnx,axistream-connected property Radhey Shyam Pandey
2021-04-12 18:25 ` Rob Herring
2021-04-09 17:56 ` [RFC v2 PATCH 2/7] dt-bindings: dmaengine: xilinx_dma: Add xlnx,irq-delay property Radhey Shyam Pandey
2021-04-12 18:25 ` Rob Herring
2021-04-09 17:56 ` [RFC v2 PATCH 3/7] dmaengine: xilinx_dma: Pass AXI4-Stream control words to dma client Radhey Shyam Pandey
2021-04-09 17:56 ` [RFC v2 PATCH 4/7] dmaengine: xilinx_dma: Increase AXI DMA transaction segment count Radhey Shyam Pandey
2021-04-09 17:56 ` [RFC v2 PATCH 5/7] dmaengine: xilinx_dma: Freeup active list based on descriptor completion bit Radhey Shyam Pandey
2021-04-15 7:08 ` Lars-Peter Clausen
2021-06-11 16:16 ` Radhey Shyam Pandey
2021-04-15 7:26 ` Lars-Peter Clausen
2021-06-11 18:58 ` Radhey Shyam Pandey
2021-04-09 17:56 ` [RFC v2 PATCH 6/7] dmaengine: xilinx_dma: Use tasklet_hi_schedule for timing critical usecase Radhey Shyam Pandey
2021-04-15 7:10 ` Lars-Peter Clausen
2021-06-11 18:30 ` Radhey Shyam Pandey [this message]
2021-04-09 17:56 ` [RFC v2 PATCH 7/7] dmaengine: xilinx_dma: Program interrupt delay timeout Radhey Shyam Pandey
2021-04-15 7:33 ` Lars-Peter Clausen
2021-06-11 19:33 ` Radhey Shyam Pandey
2021-04-15 7:06 ` [RFC v2 PATCH 0/7] Xilinx DMA enhancements and optimization Lars-Peter Clausen
2021-06-11 16:13 ` Radhey Shyam Pandey
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