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From: <jerinj@marvell.com>
To: <dev@dpdk.org>
Cc: <thomas@monjalon.net>, Jerin Jacob <jerinj@marvell.com>,
	Vamsi Attunuru <vattunuru@marvell.com>
Subject: [dpdk-dev] [PATCH v1 17/27] drivers: add init and fini on octeontx2 NPA object
Date: Thu, 23 May 2019 13:43:29 +0530
Message-ID: <20190523081339.56348-18-jerinj@marvell.com> (raw)
In-Reply-To: <20190523081339.56348-1-jerinj@marvell.com>

From: Jerin Jacob <jerinj@marvell.com>

NPA object needs to initialize memory for queue interrupts context,
pool resource management, etc. This patch adds support for initializing
and finalizing the NPA object.

This patch also updates the otx2_npa_lf definition to meet the init/fini
requirements.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
---
 drivers/common/octeontx2/Makefile             |   1 +
 drivers/common/octeontx2/meson.build          |   2 +-
 drivers/common/octeontx2/otx2_common.h        |   7 +-
 drivers/common/octeontx2/otx2_dev.h           |   1 +
 drivers/mempool/octeontx2/otx2_mempool.c      | 344 +++++++++++++++++-
 drivers/mempool/octeontx2/otx2_mempool.h      |  55 +++
 .../rte_mempool_octeontx2_version.map         |   4 +
 7 files changed, 403 insertions(+), 11 deletions(-)
 create mode 100644 drivers/mempool/octeontx2/otx2_mempool.h

diff --git a/drivers/common/octeontx2/Makefile b/drivers/common/octeontx2/Makefile
index 78243e555..fabc32537 100644
--- a/drivers/common/octeontx2/Makefile
+++ b/drivers/common/octeontx2/Makefile
@@ -11,6 +11,7 @@ LIB = librte_common_octeontx2.a
 
 CFLAGS += $(WERROR_FLAGS)
 CFLAGS += -I$(RTE_SDK)/drivers/common/octeontx2
+CFLAGS += -I$(RTE_SDK)/drivers/mempool/octeontx2
 CFLAGS += -I$(RTE_SDK)/drivers/bus/pci
 
 ifneq ($(CONFIG_RTE_ARCH_64),y)
diff --git a/drivers/common/octeontx2/meson.build b/drivers/common/octeontx2/meson.build
index 44ac90085..b79145788 100644
--- a/drivers/common/octeontx2/meson.build
+++ b/drivers/common/octeontx2/meson.build
@@ -22,4 +22,4 @@ endforeach
 
 deps = ['eal', 'pci', 'ethdev']
 includes += include_directories('../../common/octeontx2',
-		'../../bus/pci')
+		'../../mempool/octeontx2', '../../bus/pci')
diff --git a/drivers/common/octeontx2/otx2_common.h b/drivers/common/octeontx2/otx2_common.h
index d4bc2f59c..dd35360d0 100644
--- a/drivers/common/octeontx2/otx2_common.h
+++ b/drivers/common/octeontx2/otx2_common.h
@@ -37,12 +37,7 @@
 #endif
 
 /* Intra device related functions */
-struct otx2_npa_lf {
-	struct otx2_mbox *mbox;
-	struct rte_pci_device *pci_dev;
-	struct rte_intr_handle *intr_handle;
-};
-
+struct otx2_npa_lf;
 struct otx2_idev_cfg {
 	uint16_t sso_pf_func;
 	uint16_t npa_pf_func;
diff --git a/drivers/common/octeontx2/otx2_dev.h b/drivers/common/octeontx2/otx2_dev.h
index 8fa5f32d2..be862ad1b 100644
--- a/drivers/common/octeontx2/otx2_dev.h
+++ b/drivers/common/octeontx2/otx2_dev.h
@@ -10,6 +10,7 @@
 #include "otx2_common.h"
 #include "otx2_irq.h"
 #include "otx2_mbox.h"
+#include "otx2_mempool.h"
 
 /* Common HWCAP flags. Use from LSB bits */
 #define OTX2_HWCAP_F_VF		BIT_ULL(0) /* VF device */
diff --git a/drivers/mempool/octeontx2/otx2_mempool.c b/drivers/mempool/octeontx2/otx2_mempool.c
index fd8e147f5..fa74b7532 100644
--- a/drivers/mempool/octeontx2/otx2_mempool.c
+++ b/drivers/mempool/octeontx2/otx2_mempool.c
@@ -2,12 +2,350 @@
  * Copyright(C) 2019 Marvell International Ltd.
  */
 
+#include <rte_atomic.h>
 #include <rte_bus_pci.h>
 #include <rte_common.h>
 #include <rte_eal.h>
+#include <rte_io.h>
+#include <rte_malloc.h>
+#include <rte_mbuf_pool_ops.h>
 #include <rte_pci.h>
 
 #include "otx2_common.h"
+#include "otx2_dev.h"
+#include "otx2_mempool.h"
+
+#define OTX2_NPA_DEV_NAME	RTE_STR(otx2_npa_dev_)
+#define OTX2_NPA_DEV_NAME_LEN	(sizeof(OTX2_NPA_DEV_NAME) + PCI_PRI_STR_SIZE)
+
+static inline int
+npa_lf_alloc(struct otx2_npa_lf *lf)
+{
+	struct otx2_mbox *mbox = lf->mbox;
+	struct npa_lf_alloc_req *req;
+	struct npa_lf_alloc_rsp *rsp;
+	int rc;
+
+	req = otx2_mbox_alloc_msg_npa_lf_alloc(mbox);
+	req->aura_sz = lf->aura_sz;
+	req->nr_pools = lf->nr_pools;
+
+	rc = otx2_mbox_process_msg(mbox, (void *)&rsp);
+	if (rc)
+		return NPA_LF_ERR_ALLOC;
+
+	lf->stack_pg_ptrs = rsp->stack_pg_ptrs;
+	lf->stack_pg_bytes = rsp->stack_pg_bytes;
+	lf->qints = rsp->qints;
+
+	return 0;
+}
+
+static int
+npa_lf_free(struct otx2_mbox *mbox)
+{
+	otx2_mbox_alloc_msg_npa_lf_free(mbox);
+
+	return otx2_mbox_process(mbox);
+}
+
+static int
+npa_lf_init(struct otx2_npa_lf *lf, uintptr_t base, uint8_t aura_sz,
+	    uint32_t nr_pools, struct otx2_mbox *mbox)
+{
+	uint32_t i, bmp_sz;
+	int rc;
+
+	/* Sanity checks */
+	if (!lf || !base || !mbox || !nr_pools)
+		return NPA_LF_ERR_PARAM;
+
+	if (base & AURA_ID_MASK)
+		return NPA_LF_ERR_BASE_INVALID;
+
+	if (aura_sz == NPA_AURA_SZ_0 || aura_sz >= NPA_AURA_SZ_MAX)
+		return NPA_LF_ERR_PARAM;
+
+	memset(lf, 0x0, sizeof(*lf));
+	lf->base = base;
+	lf->aura_sz = aura_sz;
+	lf->nr_pools = nr_pools;
+	lf->mbox = mbox;
+
+	rc = npa_lf_alloc(lf);
+	if (rc)
+		goto exit;
+
+	bmp_sz = rte_bitmap_get_memory_footprint(nr_pools);
+
+	/* Allocate memory for bitmap */
+	lf->npa_bmp_mem = rte_zmalloc("npa_bmp_mem", bmp_sz,
+					RTE_CACHE_LINE_SIZE);
+	if (lf->npa_bmp_mem == NULL) {
+		rc = -ENOMEM;
+		goto lf_free;
+	}
+
+	/* Initialize pool resource bitmap array */
+	lf->npa_bmp = rte_bitmap_init(nr_pools, lf->npa_bmp_mem, bmp_sz);
+	if (lf->npa_bmp == NULL) {
+		rc = -EINVAL;
+		goto bmap_mem_free;
+	}
+
+	/* Mark all pools available */
+	for (i = 0; i < nr_pools; i++)
+		rte_bitmap_set(lf->npa_bmp, i);
+
+	/* Allocate memory for qint context */
+	lf->npa_qint_mem = rte_zmalloc("npa_qint_mem",
+			sizeof(struct otx2_npa_qint) * nr_pools, 0);
+	if (lf->npa_qint_mem == NULL) {
+		rc = -ENOMEM;
+		goto bmap_free;
+	}
+
+	return 0;
+
+bmap_free:
+	rte_bitmap_free(lf->npa_bmp);
+bmap_mem_free:
+	rte_free(lf->npa_bmp_mem);
+lf_free:
+	npa_lf_free(lf->mbox);
+exit:
+	return rc;
+}
+
+static int
+npa_lf_fini(struct otx2_npa_lf *lf)
+{
+	if (!lf)
+		return NPA_LF_ERR_PARAM;
+
+	rte_free(lf->npa_qint_mem);
+	rte_bitmap_free(lf->npa_bmp);
+	rte_free(lf->npa_bmp_mem);
+
+	return npa_lf_free(lf->mbox);
+
+}
+
+static inline uint32_t
+otx2_aura_size_to_u32(uint8_t val)
+{
+	if (val == NPA_AURA_SZ_0)
+		return 128;
+	if (val >= NPA_AURA_SZ_MAX)
+		return BIT_ULL(20);
+
+	return 1 << (val + 6);
+}
+
+static inline int
+npa_lf_attach(struct otx2_mbox *mbox)
+{
+	struct rsrc_attach_req *req;
+
+	req = otx2_mbox_alloc_msg_attach_resources(mbox);
+	req->npalf = true;
+
+	return otx2_mbox_process(mbox);
+}
+
+static inline int
+npa_lf_detach(struct otx2_mbox *mbox)
+{
+	struct rsrc_detach_req *req;
+
+	req = otx2_mbox_alloc_msg_detach_resources(mbox);
+	req->npalf = true;
+
+	return otx2_mbox_process(mbox);
+}
+
+static inline int
+npa_lf_get_msix_offset(struct otx2_mbox *mbox, uint16_t *npa_msixoff)
+{
+	struct msix_offset_rsp *msix_rsp;
+	int rc;
+
+	/* Get NPA and NIX MSIX vector offsets */
+	otx2_mbox_alloc_msg_msix_offset(mbox);
+
+	rc = otx2_mbox_process_msg(mbox, (void *)&msix_rsp);
+
+	*npa_msixoff = msix_rsp->npa_msixoff;
+
+	return rc;
+}
+
+/**
+ * @internal
+ * Finalize NPA LF.
+ */
+int
+otx2_npa_lf_fini(void)
+{
+	struct otx2_idev_cfg *idev;
+	int rc = 0;
+
+	idev = otx2_intra_dev_get_cfg();
+	if (idev == NULL)
+		return -ENOMEM;
+
+	if (rte_atomic16_add_return(&idev->npa_refcnt, -1) == 0) {
+		rc |= npa_lf_fini(idev->npa_lf);
+		rc |= npa_lf_detach(idev->npa_lf->mbox);
+		otx2_npa_set_defaults(idev);
+	}
+
+	return rc;
+}
+
+/**
+ * @internal
+ * Initialize NPA LF.
+ */
+int
+otx2_npa_lf_init(struct rte_pci_device *pci_dev, void *otx2_dev)
+{
+	struct otx2_dev *dev = otx2_dev;
+	struct otx2_idev_cfg *idev;
+	struct otx2_npa_lf *lf;
+	uint16_t npa_msixoff;
+	uint32_t nr_pools;
+	uint8_t aura_sz;
+	int rc;
+
+	idev = otx2_intra_dev_get_cfg();
+	if (idev == NULL)
+		return -ENOMEM;
+
+	/* Is NPA LF initialized by any another driver? */
+	if (rte_atomic16_add_return(&idev->npa_refcnt, 1) == 1) {
+
+		rc = npa_lf_attach(dev->mbox);
+		if (rc)
+			goto fail;
+
+		rc = npa_lf_get_msix_offset(dev->mbox, &npa_msixoff);
+		if (rc)
+			goto npa_detach;
+
+		aura_sz = NPA_AURA_SZ_128;
+		nr_pools = otx2_aura_size_to_u32(aura_sz);
+
+		lf = &dev->npalf;
+		rc = npa_lf_init(lf, dev->bar2 + (RVU_BLOCK_ADDR_NPA << 20),
+					aura_sz, nr_pools, dev->mbox);
+
+		if (rc)
+			goto npa_detach;
+
+		lf->pf_func = dev->pf_func;
+		lf->npa_msixoff = npa_msixoff;
+		lf->intr_handle = &pci_dev->intr_handle;
+		lf->pci_dev = pci_dev;
+
+		idev->npa_pf_func = dev->pf_func;
+		idev->npa_lf = lf;
+		rte_smp_wmb();
+
+		rte_mbuf_set_platform_mempool_ops("octeontx2_npa");
+		otx2_npa_dbg("npa_lf=%p pools=%d sz=%d pf_func=0x%x msix=0x%x",
+			     lf, nr_pools, aura_sz, lf->pf_func, npa_msixoff);
+	}
+
+	return 0;
+
+npa_detach:
+	npa_lf_detach(dev->mbox);
+fail:
+	rte_atomic16_dec(&idev->npa_refcnt);
+	return rc;
+}
+
+static inline char*
+otx2_npa_dev_to_name(struct rte_pci_device *pci_dev, char *name)
+{
+	snprintf(name, OTX2_NPA_DEV_NAME_LEN,
+		 OTX2_NPA_DEV_NAME  PCI_PRI_FMT,
+		 pci_dev->addr.domain, pci_dev->addr.bus,
+		 pci_dev->addr.devid, pci_dev->addr.function);
+
+	return name;
+}
+
+static int
+otx2_npa_init(struct rte_pci_device *pci_dev)
+{
+	char name[OTX2_NPA_DEV_NAME_LEN];
+	const struct rte_memzone *mz;
+	struct otx2_dev *dev;
+	int rc = -ENOMEM;
+
+	mz = rte_memzone_reserve_aligned(otx2_npa_dev_to_name(pci_dev, name),
+					 sizeof(*dev), SOCKET_ID_ANY,
+					 0, OTX2_ALIGN);
+	if (mz == NULL)
+		goto error;
+
+	dev = mz->addr;
+
+	/* Initialize the base otx2_dev object */
+	rc = otx2_dev_init(pci_dev, dev);
+	if (rc)
+		goto malloc_fail;
+
+	/* Grab the NPA LF if required */
+	rc = otx2_npa_lf_init(pci_dev, dev);
+	if (rc)
+		goto dev_uninit;
+
+	dev->drv_inited = true;
+	return 0;
+
+dev_uninit:
+	otx2_npa_lf_fini();
+	otx2_dev_fini(pci_dev, dev);
+malloc_fail:
+	rte_memzone_free(mz);
+error:
+	otx2_err("Failed to initialize npa device rc=%d", rc);
+	return rc;
+}
+
+static int
+otx2_npa_fini(struct rte_pci_device *pci_dev)
+{
+	char name[OTX2_NPA_DEV_NAME_LEN];
+	const struct rte_memzone *mz;
+	struct otx2_dev *dev;
+
+	mz = rte_memzone_lookup(otx2_npa_dev_to_name(pci_dev, name));
+	if (mz == NULL)
+		return -EINVAL;
+
+	dev = mz->addr;
+	if (!dev->drv_inited)
+		goto dev_fini;
+
+	dev->drv_inited = false;
+	otx2_npa_lf_fini();
+
+dev_fini:
+	if (otx2_npa_lf_active(dev)) {
+		otx2_info("%s: common resource in use by other devices",
+			  pci_dev->name);
+		return -EAGAIN;
+	}
+
+	otx2_dev_fini(pci_dev, dev);
+	rte_memzone_free(mz);
+
+	return 0;
+}
 
 static int
 npa_remove(struct rte_pci_device *pci_dev)
@@ -15,8 +353,7 @@ npa_remove(struct rte_pci_device *pci_dev)
 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 		return 0;
 
-	RTE_SET_USED(pci_dev);
-	return 0;
+	return otx2_npa_fini(pci_dev);
 }
 
 static int
@@ -27,8 +364,7 @@ npa_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 		return 0;
 
-	RTE_SET_USED(pci_dev);
-	return 0;
+	return otx2_npa_init(pci_dev);
 }
 
 static const struct rte_pci_id pci_npa_map[] = {
diff --git a/drivers/mempool/octeontx2/otx2_mempool.h b/drivers/mempool/octeontx2/otx2_mempool.h
new file mode 100644
index 000000000..e1c255c60
--- /dev/null
+++ b/drivers/mempool/octeontx2/otx2_mempool.h
@@ -0,0 +1,55 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#ifndef __OTX2_MEMPOOL_H__
+#define __OTX2_MEMPOOL_H__
+
+#include <rte_bitmap.h>
+#include <rte_bus_pci.h>
+#include <rte_devargs.h>
+#include <rte_mempool.h>
+
+#include "otx2_common.h"
+#include "otx2_mbox.h"
+
+enum npa_lf_status {
+	NPA_LF_ERR_PARAM	    = -512,
+	NPA_LF_ERR_ALLOC	    = -513,
+	NPA_LF_ERR_INVALID_BLOCK_SZ = -514,
+	NPA_LF_ERR_AURA_ID_ALLOC    = -515,
+	NPA_LF_ERR_AURA_POOL_INIT   = -516,
+	NPA_LF_ERR_AURA_POOL_FINI   = -517,
+	NPA_LF_ERR_BASE_INVALID     = -518,
+};
+
+struct otx2_npa_lf;
+struct otx2_npa_qint {
+	struct otx2_npa_lf *lf;
+	uint8_t qintx;
+};
+
+struct otx2_npa_lf {
+	uint16_t qints;
+	uintptr_t base;
+	uint8_t aura_sz;
+	uint16_t pf_func;
+	uint32_t nr_pools;
+	void *npa_bmp_mem;
+	void *npa_qint_mem;
+	uint16_t npa_msixoff;
+	struct otx2_mbox *mbox;
+	uint32_t stack_pg_ptrs;
+	uint32_t stack_pg_bytes;
+	struct rte_bitmap *npa_bmp;
+	struct rte_pci_device *pci_dev;
+	struct rte_intr_handle *intr_handle;
+};
+
+#define AURA_ID_MASK  (BIT_ULL(16) - 1)
+
+/* NPA LF */
+int otx2_npa_lf_init(struct rte_pci_device *pci_dev, void *otx2_dev);
+int otx2_npa_lf_fini(void);
+
+#endif /* __OTX2_MEMPOOL_H__ */
diff --git a/drivers/mempool/octeontx2/rte_mempool_octeontx2_version.map b/drivers/mempool/octeontx2/rte_mempool_octeontx2_version.map
index fc8c95e91..44d084ea0 100644
--- a/drivers/mempool/octeontx2/rte_mempool_octeontx2_version.map
+++ b/drivers/mempool/octeontx2/rte_mempool_octeontx2_version.map
@@ -1,4 +1,8 @@
 DPDK_19.05 {
+	global:
+
+	otx2_npa_lf_init;
+	otx2_npa_lf_fini;
 
 	local: *;
 };
-- 
2.21.0


  parent reply index

Thread overview: 122+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-23  8:13 [dpdk-dev] [PATCH v1 00/27] OCTEON TX2 common and mempool driver jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 01/27] common/octeontx2: add build infrastructure and HW definition jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 02/27] common/octeontx2: add IO handling APIs jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 03/27] common/octeontx2: add mbox request and response definition jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 04/27] common/octeontx2: add mailbox base support infra jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 05/27] common/octeontx2: add runtime log infra jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 06/27] common/octeontx2: add mailbox send and receive support jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 07/27] common/octeontx2: introduce common device class jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 08/27] common/octeontx2: introduce irq handling functions jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 09/27] common/octeontx2: handle intra device operations jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 10/27] common/octeontx2: add AF to PF mailbox IRQ and msg handlers jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 11/27] common/octeontx2: add PF to VF " jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 12/27] common/octeontx2: add VF mailbox IRQ and msg handler jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 13/27] common/octeontx2: add uplink message support jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 14/27] common/octeontx2: add FLR IRQ handler jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 15/27] doc: add Marvell OCTEON TX2 platform guide jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 16/27] mempool/octeontx2: add build infra and device probe jerinj
2019-05-23  8:13 ` jerinj [this message]
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 18/27] mempool/octeontx2: add NPA HW operations jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 19/27] mempool/octeontx2: add NPA IRQ handler jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 20/27] mempool/octeontx2: add context dump support jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 21/27] mempool/octeontx2: add mempool alloc op jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 22/27] mempool/octeontx2: add mempool free op jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 23/27] mempool/octeontx2: add remaining slow path ops jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 24/27] mempool/octeontx2: add fast path mempool ops jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 25/27] mempool/octeontx2: add optimized dequeue operation for arm64 jerinj
2019-05-24 13:32   ` Aaron Conole
2019-05-27  9:20     ` Jerin Jacob Kollanukkaran
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 26/27] mempool/octeontx2: add devargs for max pool selection jerinj
2019-05-23  8:13 ` [dpdk-dev] [PATCH v1 27/27] doc: add Marvell OCTEON TX2 mempool documentation jerinj
2019-06-01  1:48 ` [dpdk-dev] [PATCH v2 00/27] OCTEON TX2 common and mempool driver jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 01/27] common/octeontx2: add build infrastructure and HW definition jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 02/27] common/octeontx2: add IO handling APIs jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 03/27] common/octeontx2: add mbox request and response definition jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 04/27] common/octeontx2: add mailbox base support infra jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 05/27] common/octeontx2: add runtime log infra jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 06/27] common/octeontx2: add mailbox send and receive support jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 07/27] common/octeontx2: introduce common device class jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 08/27] common/octeontx2: introduce irq handling functions jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 09/27] common/octeontx2: handle intra device operations jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 10/27] common/octeontx2: add AF to PF mailbox IRQ and msg handlers jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 11/27] common/octeontx2: add PF to VF " jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 12/27] common/octeontx2: add VF mailbox IRQ and msg handler jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 13/27] common/octeontx2: add uplink message support jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 14/27] common/octeontx2: add FLR IRQ handler jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 15/27] doc: add Marvell OCTEON TX2 platform guide jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 16/27] mempool/octeontx2: add build infra and device probe jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 17/27] drivers: add init and fini on octeontx2 NPA object jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 18/27] mempool/octeontx2: add NPA HW operations jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 19/27] mempool/octeontx2: add NPA IRQ handler jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 20/27] mempool/octeontx2: add context dump support jerinj
2019-06-01  1:48   ` [dpdk-dev] [PATCH v2 21/27] mempool/octeontx2: add mempool alloc op jerinj
2019-06-01  1:49   ` [dpdk-dev] [PATCH v2 22/27] mempool/octeontx2: add mempool free op jerinj
2019-06-01  1:49   ` [dpdk-dev] [PATCH v2 23/27] mempool/octeontx2: add remaining slow path ops jerinj
2019-06-01  1:49   ` [dpdk-dev] [PATCH v2 24/27] mempool/octeontx2: add fast path mempool ops jerinj
2019-06-01  1:49   ` [dpdk-dev] [PATCH v2 25/27] mempool/octeontx2: add optimized dequeue operation for arm64 jerinj
2019-06-01  1:49   ` [dpdk-dev] [PATCH v2 26/27] mempool/octeontx2: add devargs for max pool selection jerinj
2019-06-01  1:49   ` [dpdk-dev] [PATCH v2 27/27] doc: add Marvell OCTEON TX2 mempool documentation jerinj
2019-06-17 15:55   ` [dpdk-dev] [PATCH v3 00/27] OCTEON TX2 common and mempool driver jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 01/27] common/octeontx2: add build infrastructure and HW definition jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 02/27] common/octeontx2: add IO handling APIs jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 03/27] common/octeontx2: add mbox request and response definition jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 04/27] common/octeontx2: add mailbox base support infra jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 05/27] common/octeontx2: add runtime log infra jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 06/27] common/octeontx2: add mailbox send and receive support jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 07/27] common/octeontx2: introduce common device class jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 08/27] common/octeontx2: introduce irq handling functions jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 09/27] common/octeontx2: handle intra device operations jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 10/27] common/octeontx2: add AF to PF mailbox IRQ and msg handlers jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 11/27] common/octeontx2: add PF to VF " jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 12/27] common/octeontx2: add VF mailbox IRQ and msg handler jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 13/27] common/octeontx2: add uplink message support jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 14/27] common/octeontx2: add FLR IRQ handler jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 15/27] doc: add Marvell OCTEON TX2 platform guide jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 16/27] mempool/octeontx2: add build infra and device probe jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 17/27] drivers: add init and fini on octeontx2 NPA object jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 18/27] mempool/octeontx2: add NPA HW operations jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 19/27] mempool/octeontx2: add NPA IRQ handler jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 20/27] mempool/octeontx2: add context dump support jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 21/27] mempool/octeontx2: add mempool alloc op jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 22/27] mempool/octeontx2: add mempool free op jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 23/27] mempool/octeontx2: add remaining slow path ops jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 24/27] mempool/octeontx2: add fast path mempool ops jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 25/27] mempool/octeontx2: add optimized dequeue operation for arm64 jerinj
2019-06-17 21:25       ` Aaron Conole
2019-06-18  7:39         ` [dpdk-dev] [EXT] " Pavan Nikhilesh Bhagavatula
2019-06-21 19:26           ` Aaron Conole
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 26/27] mempool/octeontx2: add devargs for max pool selection jerinj
2019-06-17 15:55     ` [dpdk-dev] [PATCH v3 27/27] doc: add Marvell OCTEON TX2 mempool documentation jerinj
2019-06-20  8:39     ` [dpdk-dev] [PATCH v3 00/27] OCTEON TX2 common and mempool driver Jerin Jacob Kollanukkaran
2019-06-22 13:23     ` [dpdk-dev] [PATCH v4 " jerinj
2019-06-22 13:23       ` [dpdk-dev] [PATCH v4 01/27] common/octeontx2: add build infrastructure and HW definition jerinj
2019-06-22 13:23       ` [dpdk-dev] [PATCH v4 02/27] common/octeontx2: add IO handling APIs jerinj
2019-06-22 13:23       ` [dpdk-dev] [PATCH v4 03/27] common/octeontx2: add mbox request and response definition jerinj
2019-06-22 13:23       ` [dpdk-dev] [PATCH v4 04/27] common/octeontx2: add mailbox base support infra jerinj
2019-06-22 13:23       ` [dpdk-dev] [PATCH v4 05/27] common/octeontx2: add runtime log infra jerinj
2019-06-22 13:23       ` [dpdk-dev] [PATCH v4 06/27] common/octeontx2: add mailbox send and receive support jerinj
2019-06-22 13:23       ` [dpdk-dev] [PATCH v4 07/27] common/octeontx2: introduce common device class jerinj
2019-06-22 13:23       ` [dpdk-dev] [PATCH v4 08/27] common/octeontx2: introduce irq handling functions jerinj
2019-06-22 13:23       ` [dpdk-dev] [PATCH v4 09/27] common/octeontx2: handle intra device operations jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 10/27] common/octeontx2: add AF to PF mailbox IRQ and msg handlers jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 11/27] common/octeontx2: add PF to VF " jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 12/27] common/octeontx2: add VF mailbox IRQ and msg handler jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 13/27] common/octeontx2: add uplink message support jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 14/27] common/octeontx2: add FLR IRQ handler jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 15/27] doc: add Marvell OCTEON TX2 platform guide jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 16/27] mempool/octeontx2: add build infra and device probe jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 17/27] drivers: add init and fini on octeontx2 NPA object jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 18/27] mempool/octeontx2: add NPA HW operations jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 19/27] mempool/octeontx2: add NPA IRQ handler jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 20/27] mempool/octeontx2: add context dump support jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 21/27] mempool/octeontx2: add mempool alloc op jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 22/27] mempool/octeontx2: add mempool free op jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 23/27] mempool/octeontx2: add remaining slow path ops jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 24/27] mempool/octeontx2: add fast path mempool ops jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 25/27] mempool/octeontx2: add optimized dequeue operation for arm64 jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 26/27] mempool/octeontx2: add devargs for max pool selection jerinj
2019-06-22 13:24       ` [dpdk-dev] [PATCH v4 27/27] doc: add Marvell OCTEON TX2 mempool documentation jerinj
2019-06-25 21:25         ` Thomas Monjalon
2019-06-25 21:39       ` [dpdk-dev] [PATCH v4 00/27] OCTEON TX2 common and mempool driver Thomas Monjalon
2019-06-26 23:10         ` Stephen Hemminger
2019-06-26 13:14       ` Ferruh Yigit

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