* [PATCH v3 01/11] dt-bindings: usb: convert usb-device.txt to YAML schema
@ 2020-11-18 8:21 Chunfeng Yun
2020-11-18 8:21 ` [PATCH v3 02/11] dt-bindings: net: btusb: change reference file name Chunfeng Yun
` (10 more replies)
0 siblings, 11 replies; 25+ messages in thread
From: Chunfeng Yun @ 2020-11-18 8:21 UTC (permalink / raw)
To: Rob Herring
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Matthias Brugger,
Vinod Koul, linux-mediatek, netdev, Chunfeng Yun, Jakub Kicinski,
Stanley Chu, David S . Miller, linux-arm-kernel
Convert usb-device.txt to YAML schema usb-device.yaml
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
v3:
1. remove $nodenmae and items key word for compatilbe;
2. add additionalProperties;
The followings are suggested by Rob:
3. merge the following patch
[v2,1/4] dt-bindings: usb: convert usb-device.txt to YAML schema
[v2,2/4] dt-bindings: usb: add properties for hard wired devices
4. define the unit-address for hard-wired device in usb-hcd.yaml,
also define its 'reg' and 'compatible';
5. This series is base on Serge's series:
https://patchwork.kernel.org/project/linux-usb/cover/20201111090853.14112-1-Sergey.Semin@baikalelectronics.ru/
[v4,00/18] dt-bindings: usb: Add generic USB HCD, xHCI, DWC USB3 DT schema
v2 changes suggested by Rob:
1. modify pattern to support any USB class
2. convert usb-device.txt into usb-device.yaml
---
.../devicetree/bindings/usb/usb-device.txt | 102 --------------
.../devicetree/bindings/usb/usb-device.yaml | 125 ++++++++++++++++++
.../devicetree/bindings/usb/usb-hcd.yaml | 33 +++++
3 files changed, 158 insertions(+), 102 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/usb/usb-device.txt
create mode 100644 Documentation/devicetree/bindings/usb/usb-device.yaml
diff --git a/Documentation/devicetree/bindings/usb/usb-device.txt b/Documentation/devicetree/bindings/usb/usb-device.txt
deleted file mode 100644
index 036be172b1ae..000000000000
--- a/Documentation/devicetree/bindings/usb/usb-device.txt
+++ /dev/null
@@ -1,102 +0,0 @@
-Generic USB Device Properties
-
-Usually, we only use device tree for hard wired USB device.
-The reference binding doc is from:
-http://www.devicetree.org/open-firmware/bindings/usb/usb-1_0.ps
-
-Four types of device-tree nodes are defined: "host-controller nodes"
-representing USB host controllers, "device nodes" representing USB devices,
-"interface nodes" representing USB interfaces and "combined nodes"
-representing simple USB devices.
-
-A combined node shall be used instead of a device node and an interface node
-for devices of class 0 or 9 (hub) with a single configuration and a single
-interface.
-
-A "hub node" is a combined node or an interface node that represents a USB
-hub.
-
-
-Required properties for device nodes:
-- compatible: "usbVID,PID", where VID is the vendor id and PID the product id.
- The textual representation of VID and PID shall be in lower case hexadecimal
- with leading zeroes suppressed. The other compatible strings from the above
- standard binding could also be used, but a device adhering to this binding
- may leave out all except for "usbVID,PID".
-- reg: the number of the USB hub port or the USB host-controller port to which
- this device is attached. The range is 1-255.
-
-
-Required properties for device nodes with interface nodes:
-- #address-cells: shall be 2
-- #size-cells: shall be 0
-
-
-Required properties for interface nodes:
-- compatible: "usbifVID,PID.configCN.IN", where VID is the vendor id, PID is
- the product id, CN is the configuration value and IN is the interface
- number. The textual representation of VID, PID, CN and IN shall be in lower
- case hexadecimal with leading zeroes suppressed. The other compatible
- strings from the above standard binding could also be used, but a device
- adhering to this binding may leave out all except for
- "usbifVID,PID.configCN.IN".
-- reg: the interface number and configuration value
-
-The configuration component is not included in the textual representation of
-an interface-node unit address for configuration 1.
-
-
-Required properties for combined nodes:
-- compatible: "usbVID,PID", where VID is the vendor id and PID the product id.
- The textual representation of VID and PID shall be in lower case hexadecimal
- with leading zeroes suppressed. The other compatible strings from the above
- standard binding could also be used, but a device adhering to this binding
- may leave out all except for "usbVID,PID".
-- reg: the number of the USB hub port or the USB host-controller port to which
- this device is attached. The range is 1-255.
-
-
-Required properties for hub nodes with device nodes:
-- #address-cells: shall be 1
-- #size-cells: shall be 0
-
-
-Required properties for host-controller nodes with device nodes:
-- #address-cells: shall be 1
-- #size-cells: shall be 0
-
-
-Example:
-
-&usb1 { /* host controller */
- #address-cells = <1>;
- #size-cells = <0>;
-
- hub@1 { /* hub connected to port 1 */
- compatible = "usb5e3,608";
- reg = <1>;
- };
-
- device@2 { /* device connected to port 2 */
- compatible = "usb123,4567";
- reg = <2>;
- };
-
- device@3 { /* device connected to port 3 */
- compatible = "usb123,abcd";
- reg = <3>;
-
- #address-cells = <2>;
- #size-cells = <0>;
-
- interface@0 { /* interface 0 of configuration 1 */
- compatible = "usbif123,abcd.config1.0";
- reg = <0 1>;
- };
-
- interface@0,2 { /* interface 0 of configuration 2 */
- compatible = "usbif123,abcd.config2.0";
- reg = <0 2>;
- };
- };
-};
diff --git a/Documentation/devicetree/bindings/usb/usb-device.yaml b/Documentation/devicetree/bindings/usb/usb-device.yaml
new file mode 100644
index 000000000000..f31d8a85d3e6
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/usb-device.yaml
@@ -0,0 +1,125 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/usb-device.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: The device tree bindings for the Generic USB Device
+
+maintainers:
+ - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+description: |
+ Usually, we only use device tree for hard wired USB device.
+ The reference binding doc is from:
+ http://www.devicetree.org/open-firmware/bindings/usb/usb-1_0.ps
+
+ Four types of device-tree nodes are defined: "host-controller nodes"
+ representing USB host controllers, "device nodes" representing USB devices,
+ "interface nodes" representing USB interfaces and "combined nodes"
+ representing simple USB devices.
+
+ A combined node shall be used instead of a device node and an interface node
+ for devices of class 0 or 9 (hub) with a single configuration and a single
+ interface.
+
+ A "hub node" is a combined node or an interface node that represents a USB
+ hub.
+
+properties:
+ compatible:
+ pattern: "^usb[0-9a-f]+,[0-9a-f]+$"
+ description: Device nodes or combined nodes.
+ "usbVID,PID", where VID is the vendor id and PID the product id.
+ The textual representation of VID and PID shall be in lower case
+ hexadecimal with leading zeroes suppressed. The other compatible
+ strings from the above standard binding could also be used,
+ but a device adhering to this binding may leave out all except
+ for "usbVID,PID".
+
+ reg:
+ description: the number of the USB hub port or the USB host-controller
+ port to which this device is attached. The range is 1-255.
+ maxItems: 1
+
+ "#address-cells":
+ description: should be 1 for hub nodes with device nodes,
+ should be 2 for device nodes with interface nodes.
+ enum: [1, 2]
+
+ "#size-cells":
+ const: 0
+
+patternProperties:
+ "^interface@[0-9]+(,[0-9]+)$":
+ type: object
+ description: USB interface nodes.
+ The configuration component is not included in the textual
+ representation of an interface-node unit address for configuration 1.
+
+ properties:
+ compatible:
+ pattern: "^usbif[0-9a-f]+,[0-9a-f]+.config[0-9a-f]+.[0-9a-f]+$"
+ description: Interface nodes.
+ "usbifVID,PID.configCN.IN", where VID is the vendor id, PID is
+ the product id, CN is the configuration value and IN is the interface
+ number. The textual representation of VID, PID, CN and IN shall be
+ in lower case hexadecimal with leading zeroes suppressed.
+ The other compatible strings from the above standard binding could
+ also be used, but a device adhering to this binding may leave out
+ all except for "usbifVID,PID.configCN.IN".
+
+ reg:
+ description: should be 2 cells long, the first cell represents
+ the interface number and the second cell represents the
+ configuration value.
+ maxItems: 1
+
+required:
+ - compatile
+ - reg
+
+additionalProperties: true
+
+examples:
+ #hub connected to port 1
+ #device connected to port 2
+ #device connected to port 3
+ # interface 0 of configuration 1
+ # interface 0 of configuration 2
+ - |
+ usb@11270000 {
+ compatible = "generic-xhci";
+ reg = <0x11270000 0x1000>;
+ interrupts = <0x0 0x4e 0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hub@1 {
+ compatible = "usb5e3,608";
+ reg = <1>;
+ };
+
+ device@2 {
+ compatible = "usb123,4567";
+ reg = <2>;
+ };
+
+ device@3 {
+ compatible = "usb123,abcd";
+ reg = <3>;
+
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ interface@0 {
+ compatible = "usbif123,abcd.config1.0";
+ reg = <0 1>;
+ };
+
+ interface@0,2 {
+ compatible = "usbif123,abcd.config2.0";
+ reg = <0 2>;
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/usb/usb-hcd.yaml b/Documentation/devicetree/bindings/usb/usb-hcd.yaml
index 9881ac10380d..5d0c6b5500d6 100755
--- a/Documentation/devicetree/bindings/usb/usb-hcd.yaml
+++ b/Documentation/devicetree/bindings/usb/usb-hcd.yaml
@@ -23,6 +23,32 @@ properties:
targeted hosts (non-PC hosts).
type: boolean
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+patternProperties:
+ "@[0-9a-f]+$":
+ type: object
+ description: The hard wired USB devices
+
+ properties:
+ compatible:
+ pattern: "^usb[0-9a-f]+,[0-9a-f]+$"
+ $ref: /usb/usb-device.yaml
+ description: the string is 'usbVID,PID', where VID is the vendor id
+ and PID is the product id
+
+ reg:
+ $ref: /usb/usb-device.yaml
+ maxItems: 1
+
+ required:
+ - compatible
+ - reg
+
additionalProperties: true
examples:
@@ -30,4 +56,11 @@ examples:
usb {
phys = <&usb2_phy1>, <&usb3_phy1>;
phy-names = "usb";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hub@1 {
+ compatible = "usb5e3,610";
+ reg = <1>;
+ };
};
--
2.18.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 02/11] dt-bindings: net: btusb: change reference file name
2020-11-18 8:21 [PATCH v3 01/11] dt-bindings: usb: convert usb-device.txt to YAML schema Chunfeng Yun
@ 2020-11-18 8:21 ` Chunfeng Yun
2020-11-18 8:21 ` [PATCH v3 03/11] dt-bindings: phy: convert phy-mtk-xsphy.txt to YAML schema Chunfeng Yun
` (9 subsequent siblings)
10 siblings, 0 replies; 25+ messages in thread
From: Chunfeng Yun @ 2020-11-18 8:21 UTC (permalink / raw)
To: Rob Herring
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Matthias Brugger,
Vinod Koul, linux-mediatek, netdev, Chunfeng Yun, Jakub Kicinski,
Stanley Chu, David S . Miller, linux-arm-kernel
Due to usb-device.txt is converted into usb-device.yaml,
so modify reference file names at the same time.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
v2~v3: no changes
---
Documentation/devicetree/bindings/net/btusb.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/net/btusb.txt b/Documentation/devicetree/bindings/net/btusb.txt
index b1ad6ee68e90..a9c3f4277f69 100644
--- a/Documentation/devicetree/bindings/net/btusb.txt
+++ b/Documentation/devicetree/bindings/net/btusb.txt
@@ -4,7 +4,7 @@ Generic Bluetooth controller over USB (btusb driver)
Required properties:
- compatible : should comply with the format "usbVID,PID" specified in
- Documentation/devicetree/bindings/usb/usb-device.txt
+ Documentation/devicetree/bindings/usb/usb-device.yaml
At the time of writing, the only OF supported devices
(more may be added later) are:
--
2.18.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 03/11] dt-bindings: phy: convert phy-mtk-xsphy.txt to YAML schema
2020-11-18 8:21 [PATCH v3 01/11] dt-bindings: usb: convert usb-device.txt to YAML schema Chunfeng Yun
2020-11-18 8:21 ` [PATCH v3 02/11] dt-bindings: net: btusb: change reference file name Chunfeng Yun
@ 2020-11-18 8:21 ` Chunfeng Yun
2020-12-07 21:15 ` Rob Herring
2020-11-18 8:21 ` [PATCH v3 04/11] dt-bindings: phy: convert phy-mtk-tphy.txt " Chunfeng Yun
` (8 subsequent siblings)
10 siblings, 1 reply; 25+ messages in thread
From: Chunfeng Yun @ 2020-11-18 8:21 UTC (permalink / raw)
To: Rob Herring
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Matthias Brugger,
Vinod Koul, linux-mediatek, netdev, Chunfeng Yun, Jakub Kicinski,
Stanley Chu, David S . Miller, linux-arm-kernel
Convert phy-mtk-xsphy.txt to YAML schema mediatek,xsphy.yaml
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
v3:
1. remove type for property with standard unit suffix suggested by Rob
2. remove '|' for descritpion
3. fix yamllint warning
v2:
1. modify description and compatible definition suggested by Rob
---
.../bindings/phy/mediatek,xsphy.yaml | 199 ++++++++++++++++++
.../devicetree/bindings/phy/phy-mtk-xsphy.txt | 109 ----------
2 files changed, 199 insertions(+), 109 deletions(-)
create mode 100644 Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml
delete mode 100644 Documentation/devicetree/bindings/phy/phy-mtk-xsphy.txt
diff --git a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml
new file mode 100644
index 000000000000..598fd2b95c29
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml
@@ -0,0 +1,199 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2020 MediaTek
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/mediatek,xsphy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek XS-PHY Controller Device Tree Bindings
+
+maintainers:
+ - Chunfeng Yun <chunfeng.yun@mediatek.com>
+
+description: |
+ The XS-PHY controller supports physical layer functionality for USB3.1
+ GEN2 controller on MediaTek SoCs.
+
+ Banks layout of xsphy
+ ----------------------------------
+ port offset bank
+ u2 port0 0x0000 MISC
+ 0x0100 FMREG
+ 0x0300 U2PHY_COM
+ u2 port1 0x1000 MISC
+ 0x1100 FMREG
+ 0x1300 U2PHY_COM
+ u2 port2 0x2000 MISC
+ ...
+ u31 common 0x3000 DIG_GLB
+ 0x3100 PHYA_GLB
+ u31 port0 0x3400 DIG_LN_TOP
+ 0x3500 DIG_LN_TX0
+ 0x3600 DIG_LN_RX0
+ 0x3700 DIG_LN_DAIF
+ 0x3800 PHYA_LN
+ u31 port1 0x3a00 DIG_LN_TOP
+ 0x3b00 DIG_LN_TX0
+ 0x3c00 DIG_LN_RX0
+ 0x3d00 DIG_LN_DAIF
+ 0x3e00 PHYA_LN
+ ...
+ DIG_GLB & PHYA_GLB are shared by U31 ports.
+
+properties:
+ $nodename:
+ pattern: "^xs-phy@[0-9a-f]+$"
+
+ compatible:
+ items:
+ - enum:
+ - mediatek,mt3611-xsphy
+ - mediatek,mt3612-xsphy
+ - const: mediatek,xsphy
+
+ reg:
+ description:
+ Register shared by multiple U3 ports, exclude port's private register,
+ if only U2 ports provided, shouldn't use the property.
+ maxItems: 1
+
+ "#address-cells":
+ enum: [1, 2]
+
+ "#size-cells":
+ enum: [1, 2]
+
+ ranges: true
+
+ mediatek,src-ref-clk-mhz:
+ description:
+ Frequency of reference clock for slew rate calibrate
+ default: 26
+
+ mediatek,src-coef:
+ description:
+ Coefficient for slew rate calibrate, depends on SoC process
+ $ref: /schemas/types.yaml#/definitions/uint32
+ default: 17
+
+# Required child node:
+patternProperties:
+ "^usb-phy@[0-9a-f]+$":
+ type: object
+ description:
+ A sub-node is required for each port the controller provides.
+ Address range information including the usual 'reg' property
+ is used inside these nodes to describe the controller's topology.
+
+ properties:
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Reference clock, (HS is 48Mhz, SS/P is 24~27Mhz)
+
+ clock-names:
+ items:
+ - const: ref
+
+ "#phy-cells":
+ const: 1
+ description: |
+ The cells contain the following arguments.
+
+ - description: The PHY type
+ enum:
+ - PHY_TYPE_USB2
+ - PHY_TYPE_USB3
+
+ # The following optional vendor properties are only for debug or HQA test
+ mediatek,eye-src:
+ description:
+ The value of slew rate calibrate (U2 phy)
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ maximum: 7
+
+ mediatek,eye-vrt:
+ description:
+ The selection of VRT reference voltage (U2 phy)
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ maximum: 7
+
+ mediatek,eye-term:
+ description:
+ The selection of HS_TX TERM reference voltage (U2 phy)
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ maximum: 7
+
+ mediatek,efuse-intr:
+ description:
+ The selection of Internal Resistor (U2/U3 phy)
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ maximum: 63
+
+ mediatek,efuse-tx-imp:
+ description:
+ The selection of TX Impedance (U3 phy)
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ maximum: 31
+
+ mediatek,efuse-rx-imp:
+ description:
+ The selection of RX Impedance (U3 phy)
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ maximum: 31
+
+ required:
+ - reg
+ - clocks
+ - clock-names
+ - "#phy-cells"
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/phy/phy.h>
+
+ u3phy: xs-phy@11c40000 {
+ compatible = "mediatek,mt3611-xsphy", "mediatek,xsphy";
+ reg = <0x11c43000 0x0200>;
+ mediatek,src-ref-clk-mhz = <26>;
+ mediatek,src-coef = <17>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ u2port0: usb-phy@11c40000 {
+ reg = <0x11c40000 0x0400>;
+ clocks = <&clk48m>;
+ clock-names = "ref";
+ mediatek,eye-src = <4>;
+ #phy-cells = <1>;
+ };
+
+ u3port0: usb-phy@11c43000 {
+ reg = <0x11c43400 0x0500>;
+ clocks = <&clk26m>;
+ clock-names = "ref";
+ mediatek,efuse-intr = <28>;
+ #phy-cells = <1>;
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-xsphy.txt b/Documentation/devicetree/bindings/phy/phy-mtk-xsphy.txt
deleted file mode 100644
index e7caefa0b9c2..000000000000
--- a/Documentation/devicetree/bindings/phy/phy-mtk-xsphy.txt
+++ /dev/null
@@ -1,109 +0,0 @@
-MediaTek XS-PHY binding
---------------------------
-
-The XS-PHY controller supports physical layer functionality for USB3.1
-GEN2 controller on MediaTek SoCs.
-
-Required properties (controller (parent) node):
- - compatible : should be "mediatek,<soc-model>-xsphy", "mediatek,xsphy",
- soc-model is the name of SoC, such as mt3611 etc;
- when using "mediatek,xsphy" compatible string, you need SoC specific
- ones in addition, one of:
- - "mediatek,mt3611-xsphy"
-
- - #address-cells, #size-cells : should use the same values as the root node
- - ranges: must be present
-
-Optional properties (controller (parent) node):
- - reg : offset and length of register shared by multiple U3 ports,
- exclude port's private register, if only U2 ports provided,
- shouldn't use the property.
- - mediatek,src-ref-clk-mhz : u32, frequency of reference clock for slew rate
- calibrate
- - mediatek,src-coef : u32, coefficient for slew rate calibrate, depends on
- SoC process
-
-Required nodes : a sub-node is required for each port the controller
- provides. Address range information including the usual
- 'reg' property is used inside these nodes to describe
- the controller's topology.
-
-Required properties (port (child) node):
-- reg : address and length of the register set for the port.
-- clocks : a list of phandle + clock-specifier pairs, one for each
- entry in clock-names
-- clock-names : must contain
- "ref": 48M reference clock for HighSpeed analog phy; and 26M
- reference clock for SuperSpeedPlus analog phy, sometimes is
- 24M, 25M or 27M, depended on platform.
-- #phy-cells : should be 1
- cell after port phandle is phy type from:
- - PHY_TYPE_USB2
- - PHY_TYPE_USB3
-
-The following optional properties are only for debug or HQA test
-Optional properties (PHY_TYPE_USB2 port (child) node):
-- mediatek,eye-src : u32, the value of slew rate calibrate
-- mediatek,eye-vrt : u32, the selection of VRT reference voltage
-- mediatek,eye-term : u32, the selection of HS_TX TERM reference voltage
-- mediatek,efuse-intr : u32, the selection of Internal Resistor
-
-Optional properties (PHY_TYPE_USB3 port (child) node):
-- mediatek,efuse-intr : u32, the selection of Internal Resistor
-- mediatek,efuse-tx-imp : u32, the selection of TX Impedance
-- mediatek,efuse-rx-imp : u32, the selection of RX Impedance
-
-Banks layout of xsphy
--------------------------------------------------------------
-port offset bank
-u2 port0 0x0000 MISC
- 0x0100 FMREG
- 0x0300 U2PHY_COM
-u2 port1 0x1000 MISC
- 0x1100 FMREG
- 0x1300 U2PHY_COM
-u2 port2 0x2000 MISC
- ...
-u31 common 0x3000 DIG_GLB
- 0x3100 PHYA_GLB
-u31 port0 0x3400 DIG_LN_TOP
- 0x3500 DIG_LN_TX0
- 0x3600 DIG_LN_RX0
- 0x3700 DIG_LN_DAIF
- 0x3800 PHYA_LN
-u31 port1 0x3a00 DIG_LN_TOP
- 0x3b00 DIG_LN_TX0
- 0x3c00 DIG_LN_RX0
- 0x3d00 DIG_LN_DAIF
- 0x3e00 PHYA_LN
- ...
-
-DIG_GLB & PHYA_GLB are shared by U31 ports.
-
-Example:
-
-u3phy: usb-phy@11c40000 {
- compatible = "mediatek,mt3611-xsphy", "mediatek,xsphy";
- reg = <0 0x11c43000 0 0x0200>;
- mediatek,src-ref-clk-mhz = <26>;
- mediatek,src-coef = <17>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- u2port0: usb-phy@11c40000 {
- reg = <0 0x11c40000 0 0x0400>;
- clocks = <&clk48m>;
- clock-names = "ref";
- mediatek,eye-src = <4>;
- #phy-cells = <1>;
- };
-
- u3port0: usb-phy@11c43000 {
- reg = <0 0x11c43400 0 0x0500>;
- clocks = <&clk26m>;
- clock-names = "ref";
- mediatek,efuse-intr = <28>;
- #phy-cells = <1>;
- };
-};
--
2.18.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 04/11] dt-bindings: phy: convert phy-mtk-tphy.txt to YAML schema
2020-11-18 8:21 [PATCH v3 01/11] dt-bindings: usb: convert usb-device.txt to YAML schema Chunfeng Yun
2020-11-18 8:21 ` [PATCH v3 02/11] dt-bindings: net: btusb: change reference file name Chunfeng Yun
2020-11-18 8:21 ` [PATCH v3 03/11] dt-bindings: phy: convert phy-mtk-xsphy.txt to YAML schema Chunfeng Yun
@ 2020-11-18 8:21 ` Chunfeng Yun
2020-12-07 21:17 ` Rob Herring
2020-11-18 8:21 ` [PATCH v3 05/11] dt-bindings: phy: convert phy-mtk-ufs.txt " Chunfeng Yun
` (7 subsequent siblings)
10 siblings, 1 reply; 25+ messages in thread
From: Chunfeng Yun @ 2020-11-18 8:21 UTC (permalink / raw)
To: Rob Herring
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Matthias Brugger,
Vinod Koul, linux-mediatek, netdev, Chunfeng Yun, Jakub Kicinski,
Stanley Chu, David S . Miller, linux-arm-kernel
Convert phy-mtk-tphy.txt to YAML schema mediatek,tphy.yaml
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
v3:
1. fix dt_binding_check error in example after add mtu3.yaml
Changes suggested by Rob:
2. fix wrong indentation
3. remove '|' due to no formatting to preserve
4. add a space after '#'
5. drop unused labels and status in examples
6. modify file mode
v2:
1. modify description and compatible
---
.../bindings/phy/mediatek,tphy.yaml | 260 ++++++++++++++++++
.../devicetree/bindings/phy/phy-mtk-tphy.txt | 162 -----------
2 files changed, 260 insertions(+), 162 deletions(-)
create mode 100644 Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
delete mode 100644 Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
new file mode 100644
index 000000000000..602e6ff45785
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
@@ -0,0 +1,260 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2020 MediaTek
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/mediatek,tphy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek T-PHY Controller Device Tree Bindings
+
+maintainers:
+ - Chunfeng Yun <chunfeng.yun@mediatek.com>
+
+description: |
+ The T-PHY controller supports physical layer functionality for a number of
+ controllers on MediaTek SoCs, includes USB2.0, USB3.0, PCIe and SATA.
+
+ Layout differences of banks between T-PHY V1 (mt8173/mt2701) and
+ T-PHY V2 (mt2712) when works on USB mode:
+ -----------------------------------
+ Version 1:
+ port offset bank
+ shared 0x0000 SPLLC
+ 0x0100 FMREG
+ u2 port0 0x0800 U2PHY_COM
+ u3 port0 0x0900 U3PHYD
+ 0x0a00 U3PHYD_BANK2
+ 0x0b00 U3PHYA
+ 0x0c00 U3PHYA_DA
+ u2 port1 0x1000 U2PHY_COM
+ u3 port1 0x1100 U3PHYD
+ 0x1200 U3PHYD_BANK2
+ 0x1300 U3PHYA
+ 0x1400 U3PHYA_DA
+ u2 port2 0x1800 U2PHY_COM
+ ...
+
+ Version 2:
+ port offset bank
+ u2 port0 0x0000 MISC
+ 0x0100 FMREG
+ 0x0300 U2PHY_COM
+ u3 port0 0x0700 SPLLC
+ 0x0800 CHIP
+ 0x0900 U3PHYD
+ 0x0a00 U3PHYD_BANK2
+ 0x0b00 U3PHYA
+ 0x0c00 U3PHYA_DA
+ u2 port1 0x1000 MISC
+ 0x1100 FMREG
+ 0x1300 U2PHY_COM
+ u3 port1 0x1700 SPLLC
+ 0x1800 CHIP
+ 0x1900 U3PHYD
+ 0x1a00 U3PHYD_BANK2
+ 0x1b00 U3PHYA
+ 0x1c00 U3PHYA_DA
+ u2 port2 0x2000 MISC
+ ...
+
+ SPLLC shared by u3 ports and FMREG shared by u2 ports on V1 are put back
+ into each port; a new bank MISC for u2 ports and CHIP for u3 ports are
+ added on V2.
+
+properties:
+ $nodename:
+ pattern: "^t-phy@[0-9a-f]+$"
+
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - mediatek,mt2701-tphy
+ - mediatek,mt7623-tphy
+ - mediatek,mt7622-tphy
+ - mediatek,mt8516-tphy
+ - const: mediatek,generic-tphy-v1
+ - items:
+ - enum:
+ - mediatek,mt2712-tphy
+ - mediatek,mt7629-tphy
+ - mediatek,mt8183-tphy
+ - const: mediatek,generic-tphy-v2
+ - const: mediatek,mt2701-u3phy
+ deprecated: true
+ - const: mediatek,mt2712-u3phy
+ deprecated: true
+ - const: mediatek,mt8173-u3phy
+
+ reg:
+ description:
+ Register shared by multiple ports, exclude port's private register.
+ It is needed for T-PHY V1, such as mt2701 and mt8173, but not for
+ T-PHY V2, such as mt2712.
+ maxItems: 1
+
+ "#address-cells":
+ enum: [1, 2]
+
+ "#size-cells":
+ enum: [1, 2]
+
+ # Used with non-empty value if optional 'reg' is not provided.
+ # The format of the value is an arbitrary number of triplets of
+ # (child-bus-address, parent-bus-address, length).
+ ranges: true
+
+ mediatek,src-ref-clk-mhz:
+ description:
+ Frequency of reference clock for slew rate calibrate
+ default: 26
+
+ mediatek,src-coef:
+ description:
+ Coefficient for slew rate calibrate, depends on SoC process
+ $ref: /schemas/types.yaml#/definitions/uint32
+ default: 28
+
+# Required child node:
+patternProperties:
+ "^usb-phy@[0-9a-f]+$":
+ type: object
+ description:
+ A sub-node is required for each port the controller provides.
+ Address range information including the usual 'reg' property
+ is used inside these nodes to describe the controller's topology.
+
+ properties:
+ reg:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ maxItems: 2
+ items:
+ - description: Reference clock, (HS is 48Mhz, SS/P is 24~27Mhz)
+ - description: Reference clock of analog phy
+ description:
+ Uses both clocks if the clock of analog and digital phys are
+ separated, otherwise uses "ref" clock only if needed.
+
+ clock-names:
+ minItems: 1
+ maxItems: 2
+ items:
+ - const: ref
+ - const: da_ref
+
+ "#phy-cells":
+ const: 1
+ description: |
+ The cells contain the following arguments.
+
+ - description: The PHY type
+ enum:
+ - PHY_TYPE_USB2
+ - PHY_TYPE_USB3
+ - PHY_TYPE_PCIE
+ - PHY_TYPE_SATA
+
+ # The following optional vendor properties are only for debug or HQA test
+ mediatek,eye-src:
+ description:
+ The value of slew rate calibrate (U2 phy)
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ maximum: 7
+
+ mediatek,eye-vrt:
+ description:
+ The selection of VRT reference voltage (U2 phy)
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ maximum: 7
+
+ mediatek,eye-term:
+ description:
+ The selection of HS_TX TERM reference voltage (U2 phy)
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ maximum: 7
+
+ mediatek,intr:
+ description:
+ The selection of internal resistor (U2 phy)
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ maximum: 31
+
+ mediatek,discth:
+ description:
+ The selection of disconnect threshold (U2 phy)
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ maximum: 15
+
+ mediatek,bc12:
+ description:
+ Specify the flag to enable BC1.2 if support it
+ type: boolean
+
+ required:
+ - reg
+ - "#phy-cells"
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8173-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/phy/phy.h>
+ usb@11271000 {
+ compatible = "mediatek,mt8173-mtu3", "mediatek,mtu3";
+ reg = <0x11271000 0x3000>, <0x11280700 0x0100>;
+ reg-names = "mac", "ippc";
+ phys = <&u2port0 PHY_TYPE_USB2>,
+ <&u3port0 PHY_TYPE_USB3>,
+ <&u2port1 PHY_TYPE_USB2>;
+ interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&topckgen CLK_TOP_USB30_SEL>;
+ clock-names = "sys_ck";
+ };
+
+ t-phy@11290000 {
+ compatible = "mediatek,mt8173-u3phy";
+ reg = <0x11290000 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ u2port0: usb-phy@11290800 {
+ reg = <0x11290800 0x100>;
+ clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>, <&clk48m>;
+ clock-names = "ref", "da_ref";
+ #phy-cells = <1>;
+ };
+
+ u3port0: usb-phy@11290900 {
+ reg = <0x11290900 0x700>;
+ clocks = <&clk26m>;
+ clock-names = "ref";
+ #phy-cells = <1>;
+ };
+
+ u2port1: usb-phy@11291000 {
+ reg = <0x11291000 0x100>;
+ #phy-cells = <1>;
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
deleted file mode 100644
index dd75b676b71d..000000000000
--- a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
+++ /dev/null
@@ -1,162 +0,0 @@
-MediaTek T-PHY binding
---------------------------
-
-T-phy controller supports physical layer functionality for a number of
-controllers on MediaTek SoCs, such as, USB2.0, USB3.0, PCIe, and SATA.
-
-Required properties (controller (parent) node):
- - compatible : should be one of
- "mediatek,generic-tphy-v1"
- "mediatek,generic-tphy-v2"
- "mediatek,mt2701-u3phy" (deprecated)
- "mediatek,mt2712-u3phy" (deprecated)
- "mediatek,mt8173-u3phy";
- make use of "mediatek,generic-tphy-v1" on mt2701 instead and
- "mediatek,generic-tphy-v2" on mt2712 instead.
-
-- #address-cells: the number of cells used to represent physical
- base addresses.
-- #size-cells: the number of cells used to represent the size of an address.
-- ranges: the address mapping relationship to the parent, defined with
- - empty value: if optional 'reg' is used.
- - non-empty value: if optional 'reg' is not used. should set
- the child's base address to 0, the physical address
- within parent's address space, and the length of
- the address map.
-
-Required nodes : a sub-node is required for each port the controller
- provides. Address range information including the usual
- 'reg' property is used inside these nodes to describe
- the controller's topology.
-
-Optional properties (controller (parent) node):
- - reg : offset and length of register shared by multiple ports,
- exclude port's private register. It is needed on mt2701
- and mt8173, but not on mt2712.
- - mediatek,src-ref-clk-mhz : frequency of reference clock for slew rate
- calibrate
- - mediatek,src-coef : coefficient for slew rate calibrate, depends on
- SoC process
-
-Required properties (port (child) node):
-- reg : address and length of the register set for the port.
-- #phy-cells : should be 1 (See second example)
- cell after port phandle is phy type from:
- - PHY_TYPE_USB2
- - PHY_TYPE_USB3
- - PHY_TYPE_PCIE
- - PHY_TYPE_SATA
-
-Optional properties (PHY_TYPE_USB2 port (child) node):
-- clocks : a list of phandle + clock-specifier pairs, one for each
- entry in clock-names
-- clock-names : may contain
- "ref": 48M reference clock for HighSpeed (digital) phy; and 26M
- reference clock for SuperSpeed (digital) phy, sometimes is
- 24M, 25M or 27M, depended on platform.
- "da_ref": the reference clock of analog phy, used if the clocks
- of analog and digital phys are separated, otherwise uses
- "ref" clock only if needed.
-
-- mediatek,eye-src : u32, the value of slew rate calibrate
-- mediatek,eye-vrt : u32, the selection of VRT reference voltage
-- mediatek,eye-term : u32, the selection of HS_TX TERM reference voltage
-- mediatek,bc12 : bool, enable BC12 of u2phy if support it
-- mediatek,discth : u32, the selection of disconnect threshold
-- mediatek,intr : u32, the selection of internal R (resistance)
-
-Example:
-
-u3phy: usb-phy@11290000 {
- compatible = "mediatek,mt8173-u3phy";
- reg = <0 0x11290000 0 0x800>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- u2port0: usb-phy@11290800 {
- reg = <0 0x11290800 0 0x100>;
- clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>;
- clock-names = "ref";
- #phy-cells = <1>;
- };
-
- u3port0: usb-phy@11290900 {
- reg = <0 0x11290800 0 0x700>;
- clocks = <&clk26m>;
- clock-names = "ref";
- #phy-cells = <1>;
- };
-
- u2port1: usb-phy@11291000 {
- reg = <0 0x11291000 0 0x100>;
- clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>;
- clock-names = "ref";
- #phy-cells = <1>;
- };
-};
-
-Specifying phy control of devices
----------------------------------
-
-Device nodes should specify the configuration required in their "phys"
-property, containing a phandle to the phy port node and a device type;
-phy-names for each port are optional.
-
-Example:
-
-#include <dt-bindings/phy/phy.h>
-
-usb30: usb@11270000 {
- ...
- phys = <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>;
- phy-names = "usb2-0", "usb3-0";
- ...
-};
-
-
-Layout differences of banks between mt8173/mt2701 and mt2712
--------------------------------------------------------------
-mt8173 and mt2701:
-port offset bank
-shared 0x0000 SPLLC
- 0x0100 FMREG
-u2 port0 0x0800 U2PHY_COM
-u3 port0 0x0900 U3PHYD
- 0x0a00 U3PHYD_BANK2
- 0x0b00 U3PHYA
- 0x0c00 U3PHYA_DA
-u2 port1 0x1000 U2PHY_COM
-u3 port1 0x1100 U3PHYD
- 0x1200 U3PHYD_BANK2
- 0x1300 U3PHYA
- 0x1400 U3PHYA_DA
-u2 port2 0x1800 U2PHY_COM
- ...
-
-mt2712:
-port offset bank
-u2 port0 0x0000 MISC
- 0x0100 FMREG
- 0x0300 U2PHY_COM
-u3 port0 0x0700 SPLLC
- 0x0800 CHIP
- 0x0900 U3PHYD
- 0x0a00 U3PHYD_BANK2
- 0x0b00 U3PHYA
- 0x0c00 U3PHYA_DA
-u2 port1 0x1000 MISC
- 0x1100 FMREG
- 0x1300 U2PHY_COM
-u3 port1 0x1700 SPLLC
- 0x1800 CHIP
- 0x1900 U3PHYD
- 0x1a00 U3PHYD_BANK2
- 0x1b00 U3PHYA
- 0x1c00 U3PHYA_DA
-u2 port2 0x2000 MISC
- ...
-
- SPLLC shared by u3 ports and FMREG shared by u2 ports on
-mt8173/mt2701 are put back into each port; a new bank MISC for
-u2 ports and CHIP for u3 ports are added on mt2712.
--
2.18.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 05/11] dt-bindings: phy: convert phy-mtk-ufs.txt to YAML schema
2020-11-18 8:21 [PATCH v3 01/11] dt-bindings: usb: convert usb-device.txt to YAML schema Chunfeng Yun
` (2 preceding siblings ...)
2020-11-18 8:21 ` [PATCH v3 04/11] dt-bindings: phy: convert phy-mtk-tphy.txt " Chunfeng Yun
@ 2020-11-18 8:21 ` Chunfeng Yun
2020-11-18 9:18 ` Stanley Chu
2020-11-18 8:21 ` [PATCH v3 06/11] dt-bindings: phy: convert HDMI PHY binding " Chunfeng Yun
` (6 subsequent siblings)
10 siblings, 1 reply; 25+ messages in thread
From: Chunfeng Yun @ 2020-11-18 8:21 UTC (permalink / raw)
To: Rob Herring
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Matthias Brugger,
Vinod Koul, linux-mediatek, netdev, Chunfeng Yun, Jakub Kicinski,
Stanley Chu, David S . Miller, linux-arm-kernel
Convert phy-mtk-ufs.txt to YAML schema mediatek,ufs-phy.yaml
Cc: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
v3: add Reviewed-by Rob
v2: fix binding check warning of reg in example
---
.../bindings/phy/mediatek,ufs-phy.yaml | 64 +++++++++++++++++++
.../devicetree/bindings/phy/phy-mtk-ufs.txt | 38 -----------
2 files changed, 64 insertions(+), 38 deletions(-)
create mode 100644 Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
delete mode 100644 Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt
diff --git a/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
new file mode 100644
index 000000000000..3a9be82e7f13
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2020 MediaTek
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/mediatek,ufs-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek Universal Flash Storage (UFS) M-PHY binding
+
+maintainers:
+ - Stanley Chu <stanley.chu@mediatek.com>
+ - Chunfeng Yun <chunfeng.yun@mediatek.com>
+
+description: |
+ UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro.
+ Each UFS M-PHY node should have its own node.
+ To bind UFS M-PHY with UFS host controller, the controller node should
+ contain a phandle reference to UFS M-PHY node.
+
+properties:
+ $nodename:
+ pattern: "^ufs-phy@[0-9a-f]+$"
+
+ compatible:
+ const: mediatek,mt8183-ufsphy
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Unipro core control clock.
+ - description: M-PHY core control clock.
+
+ clock-names:
+ items:
+ - const: unipro
+ - const: mp
+
+ "#phy-cells":
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - "#phy-cells"
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8183-clk.h>
+ ufsphy: ufs-phy@11fa0000 {
+ compatible = "mediatek,mt8183-ufsphy";
+ reg = <0x11fa0000 0xc000>;
+ clocks = <&infracfg CLK_INFRA_UNIPRO_SCK>,
+ <&infracfg CLK_INFRA_UFS_MP_SAP_BCLK>;
+ clock-names = "unipro", "mp";
+ #phy-cells = <0>;
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt
deleted file mode 100644
index 5789029a1d42..000000000000
--- a/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt
+++ /dev/null
@@ -1,38 +0,0 @@
-MediaTek Universal Flash Storage (UFS) M-PHY binding
---------------------------------------------------------
-
-UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro.
-Each UFS M-PHY node should have its own node.
-
-To bind UFS M-PHY with UFS host controller, the controller node should
-contain a phandle reference to UFS M-PHY node.
-
-Required properties for UFS M-PHY nodes:
-- compatible : Compatible list, contains the following controller:
- "mediatek,mt8183-ufsphy" for ufs phy
- persent on MT81xx chipsets.
-- reg : Address and length of the UFS M-PHY register set.
-- #phy-cells : This property shall be set to 0.
-- clocks : List of phandle and clock specifier pairs.
-- clock-names : List of clock input name strings sorted in the same
- order as the clocks property. Following clocks are
- mandatory.
- "unipro": Unipro core control clock.
- "mp": M-PHY core control clock.
-
-Example:
-
- ufsphy: phy@11fa0000 {
- compatible = "mediatek,mt8183-ufsphy";
- reg = <0 0x11fa0000 0 0xc000>;
- #phy-cells = <0>;
-
- clocks = <&infracfg_ao INFRACFG_AO_UNIPRO_SCK_CG>,
- <&infracfg_ao INFRACFG_AO_UFS_MP_SAP_BCLK_CG>;
- clock-names = "unipro", "mp";
- };
-
- ufshci@11270000 {
- ...
- phys = <&ufsphy>;
- };
--
2.18.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 06/11] dt-bindings: phy: convert HDMI PHY binding to YAML schema
2020-11-18 8:21 [PATCH v3 01/11] dt-bindings: usb: convert usb-device.txt to YAML schema Chunfeng Yun
` (3 preceding siblings ...)
2020-11-18 8:21 ` [PATCH v3 05/11] dt-bindings: phy: convert phy-mtk-ufs.txt " Chunfeng Yun
@ 2020-11-18 8:21 ` Chunfeng Yun
2020-11-19 23:42 ` Chun-Kuang Hu
2020-11-18 8:21 ` [PATCH v3 07/11] dt-bindings: phy: convert MIP DSI " Chunfeng Yun
` (5 subsequent siblings)
10 siblings, 1 reply; 25+ messages in thread
From: Chunfeng Yun @ 2020-11-18 8:21 UTC (permalink / raw)
To: Rob Herring
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Matthias Brugger,
Vinod Koul, linux-mediatek, netdev, Chunfeng Yun, Jakub Kicinski,
Stanley Chu, David S . Miller, linux-arm-kernel
Convert HDMI PHY binding to YAML schema mediatek,hdmi-phy.yaml
Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
v3: add Reviewed-by Rob
v2: fix binding check warning of reg in example
---
.../display/mediatek/mediatek,hdmi.txt | 18 +---
.../bindings/phy/mediatek,hdmi-phy.yaml | 91 +++++++++++++++++++
2 files changed, 92 insertions(+), 17 deletions(-)
create mode 100644 Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
index 6b1c586403e4..b284ca51b913 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
@@ -53,23 +53,7 @@ Required properties:
HDMI PHY
========
-
-The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel
-output and drives the HDMI pads.
-
-Required properties:
-- compatible: "mediatek,<chip>-hdmi-phy"
-- the supported chips are mt2701, mt7623 and mt8173
-- reg: Physical base address and length of the module's registers
-- clocks: PLL reference clock
-- clock-names: must contain "pll_ref"
-- clock-output-names: must be "hdmitx_dig_cts" on mt8173
-- #phy-cells: must be <0>
-- #clock-cells: must be <0>
-
-Optional properties:
-- mediatek,ibias: TX DRV bias current for <1.65Gbps, defaults to 0xa
-- mediatek,ibias_up: TX DRV bias current for >1.65Gbps, defaults to 0x1c
+See phy/mediatek,hdmi-phy.yaml
Example:
diff --git a/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml
new file mode 100644
index 000000000000..96700bb8bc00
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml
@@ -0,0 +1,91 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2020 MediaTek
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/mediatek,hdmi-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek High Definition Multimedia Interface (HDMI) PHY binding
+
+maintainers:
+ - Chun-Kuang Hu <chunkuang.hu@kernel.org>
+ - Chunfeng Yun <chunfeng.yun@mediatek.com>
+
+description: |
+ The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel
+ output and drives the HDMI pads.
+
+properties:
+ $nodename:
+ pattern: "^hdmi-phy@[0-9a-f]+$"
+
+ compatible:
+ enum:
+ - mediatek,mt2701-hdmi-phy
+ - mediatek,mt7623-hdmi-phy
+ - mediatek,mt8173-hdmi-phy
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: PLL reference clock
+
+ clock-names:
+ items:
+ - const: pll_ref
+
+ clock-output-names:
+ items:
+ - const: hdmitx_dig_cts
+
+ "#phy-cells":
+ const: 0
+
+ "#clock-cells":
+ const: 0
+
+ mediatek,ibias:
+ description:
+ TX DRV bias current for < 1.65Gbps
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 63
+ default: 0xa
+
+ mediatek,ibias_up:
+ description:
+ TX DRV bias current for >= 1.65Gbps
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 63
+ default: 0x1c
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - clock-output-names
+ - "#phy-cells"
+ - "#clock-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8173-clk.h>
+ hdmi_phy: hdmi-phy@10209100 {
+ compatible = "mediatek,mt8173-hdmi-phy";
+ reg = <0x10209100 0x24>;
+ clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>;
+ clock-names = "pll_ref";
+ clock-output-names = "hdmitx_dig_cts";
+ mediatek,ibias = <0xa>;
+ mediatek,ibias_up = <0x1c>;
+ #clock-cells = <0>;
+ #phy-cells = <0>;
+ };
+
+...
--
2.18.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 07/11] dt-bindings: phy: convert MIP DSI PHY binding to YAML schema
2020-11-18 8:21 [PATCH v3 01/11] dt-bindings: usb: convert usb-device.txt to YAML schema Chunfeng Yun
` (4 preceding siblings ...)
2020-11-18 8:21 ` [PATCH v3 06/11] dt-bindings: phy: convert HDMI PHY binding " Chunfeng Yun
@ 2020-11-18 8:21 ` Chunfeng Yun
2020-11-19 23:38 ` Chun-Kuang Hu
2020-12-07 21:19 ` Rob Herring
2020-11-18 8:21 ` [PATCH v3 08/11] dt-bindings: usb: convert mediatek, musb.txt " Chunfeng Yun
` (4 subsequent siblings)
10 siblings, 2 replies; 25+ messages in thread
From: Chunfeng Yun @ 2020-11-18 8:21 UTC (permalink / raw)
To: Rob Herring
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Matthias Brugger,
Vinod Koul, linux-mediatek, netdev, Chunfeng Yun, Jakub Kicinski,
Stanley Chu, David S . Miller, linux-arm-kernel
Convert MIPI DSI PHY binding to YAML schema mediatek,dsi-phy.yaml
Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
v3: new patch
---
.../display/mediatek/mediatek,dsi.txt | 18 +---
.../bindings/phy/mediatek,dsi-phy.yaml | 83 +++++++++++++++++++
2 files changed, 84 insertions(+), 17 deletions(-)
create mode 100644 Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
index f06f24d405a5..8238a86686be 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
@@ -22,23 +22,7 @@ Required properties:
MIPI TX Configuration Module
============================
-The MIPI TX configuration module controls the MIPI D-PHY.
-
-Required properties:
-- compatible: "mediatek,<chip>-mipi-tx"
-- the supported chips are mt2701, 7623, mt8173 and mt8183.
-- reg: Physical base address and length of the controller's registers
-- clocks: PLL reference clock
-- clock-output-names: name of the output clock line to the DSI encoder
-- #clock-cells: must be <0>;
-- #phy-cells: must be <0>.
-
-Optional properties:
-- drive-strength-microamp: adjust driving current, should be 3000 ~ 6000. And
- the step is 200.
-- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
- unspecified default values shall be used.
-- nvmem-cell-names: Should be "calibration-data"
+See phy/mediatek,dsi-phy.yaml
Example:
diff --git a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
new file mode 100644
index 000000000000..87f8df251ab0
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2020 MediaTek
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/mediatek,dsi-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek MIPI Display Serial Interface (DSI) PHY binding
+
+maintainers:
+ - Chun-Kuang Hu <chunkuang.hu@kernel.org>
+ - Chunfeng Yun <chunfeng.yun@mediatek.com>
+
+description: The MIPI DSI PHY supports up to 4-lane output.
+
+properties:
+ $nodename:
+ pattern: "^dsi-phy@[0-9a-f]+$"
+
+ compatible:
+ enum:
+ - mediatek,mt2701-mipi-tx
+ - mediatek,mt7623-mipi-tx
+ - mediatek,mt8173-mipi-tx
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: PLL reference clock
+
+ clock-output-names:
+ maxItems: 1
+
+ "#phy-cells":
+ const: 0
+
+ "#clock-cells":
+ const: 0
+
+ nvmem-cells:
+ maxItems: 1
+ description: A phandle to the calibration data provided by a nvmem device,
+ if unspecified, default values shall be used.
+
+ nvmem-cell-names:
+ items:
+ - const: calibration-data
+
+ drive-strength-microamp:
+ description: adjust driving current, the step is 200.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 2000
+ maximum: 6000
+ default: 4600
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-output-names
+ - "#phy-cells"
+ - "#clock-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8173-clk.h>
+ dsi-phy@10215000 {
+ compatible = "mediatek,mt8173-mipi-tx";
+ reg = <0x10215000 0x1000>;
+ clocks = <&clk26m>;
+ clock-output-names = "mipi_tx0_pll";
+ drive-strength-microamp = <4000>;
+ nvmem-cells= <&mipi_tx_calibration>;
+ nvmem-cell-names = "calibration-data";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
+ };
+
+...
--
2.18.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 08/11] dt-bindings: usb: convert mediatek, musb.txt to YAML schema
2020-11-18 8:21 [PATCH v3 01/11] dt-bindings: usb: convert usb-device.txt to YAML schema Chunfeng Yun
` (5 preceding siblings ...)
2020-11-18 8:21 ` [PATCH v3 07/11] dt-bindings: phy: convert MIP DSI " Chunfeng Yun
@ 2020-11-18 8:21 ` Chunfeng Yun
2020-11-18 8:21 ` [PATCH v3 09/11] dt-bindings: usb: convert mediatek, mtk-xhci.txt " Chunfeng Yun
` (3 subsequent siblings)
10 siblings, 0 replies; 25+ messages in thread
From: Chunfeng Yun @ 2020-11-18 8:21 UTC (permalink / raw)
To: Rob Herring
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Matthias Brugger,
Vinod Koul, linux-mediatek, netdev, Chunfeng Yun, Jakub Kicinski,
Stanley Chu, David S . Miller, linux-arm-kernel
Convert mediatek,musb.txt to YAML schema mediatek,musb.yaml
Cc: Min Guo <min.guo@mediatek.com>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
v3: add Reviewed-by Rob
v2: new patch
---
.../devicetree/bindings/usb/mediatek,musb.txt | 57 ---------
.../bindings/usb/mediatek,musb.yaml | 113 ++++++++++++++++++
2 files changed, 113 insertions(+), 57 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/usb/mediatek,musb.txt
create mode 100644 Documentation/devicetree/bindings/usb/mediatek,musb.yaml
diff --git a/Documentation/devicetree/bindings/usb/mediatek,musb.txt b/Documentation/devicetree/bindings/usb/mediatek,musb.txt
deleted file mode 100644
index 5eedb0296562..000000000000
--- a/Documentation/devicetree/bindings/usb/mediatek,musb.txt
+++ /dev/null
@@ -1,57 +0,0 @@
-MediaTek musb DRD/OTG controller
--------------------------------------------
-
-Required properties:
- - compatible : should be one of:
- "mediatek,mt2701-musb"
- ...
- followed by "mediatek,mtk-musb"
- - reg : specifies physical base address and size of
- the registers
- - interrupts : interrupt used by musb controller
- - interrupt-names : must be "mc"
- - phys : PHY specifier for the OTG phy
- - dr_mode : should be one of "host", "peripheral" or "otg",
- refer to usb/generic.txt
- - clocks : a list of phandle + clock-specifier pairs, one for
- each entry in clock-names
- - clock-names : must contain "main", "mcu", "univpll"
- for clocks of controller
-
-Optional properties:
- - power-domains : a phandle to USB power domain node to control USB's
- MTCMOS
-
-Required child nodes:
- usb connector node as defined in bindings/connector/usb-connector.yaml
-Optional properties:
- - id-gpios : input GPIO for USB ID pin.
- - vbus-gpios : input GPIO for USB VBUS pin.
- - vbus-supply : reference to the VBUS regulator, needed when supports
- dual-role mode
- - usb-role-switch : use USB Role Switch to support dual-role switch, see
- usb/generic.txt.
-
-Example:
-
-usb2: usb@11200000 {
- compatible = "mediatek,mt2701-musb",
- "mediatek,mtk-musb";
- reg = <0 0x11200000 0 0x1000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
- interrupt-names = "mc";
- phys = <&u2port2 PHY_TYPE_USB2>;
- dr_mode = "otg";
- clocks = <&pericfg CLK_PERI_USB0>,
- <&pericfg CLK_PERI_USB0_MCU>,
- <&pericfg CLK_PERI_USB_SLV>;
- clock-names = "main","mcu","univpll";
- power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
- usb-role-switch;
- connector{
- compatible = "gpio-usb-b-connector", "usb-b-connector";
- type = "micro";
- id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
- vbus-supply = <&usb_vbus>;
- };
-};
diff --git a/Documentation/devicetree/bindings/usb/mediatek,musb.yaml b/Documentation/devicetree/bindings/usb/mediatek,musb.yaml
new file mode 100644
index 000000000000..3e60df4b91bb
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/mediatek,musb.yaml
@@ -0,0 +1,113 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2020 MediaTek
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/mediatek,musb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek MUSB DRD/OTG Controller Device Tree Bindings
+
+maintainers:
+ - Min Guo <min.guo@mediatek.com>
+
+properties:
+ $nodename:
+ pattern: '^usb@[0-9a-f]+$'
+
+ compatible:
+ items:
+ - enum:
+ - mediatek,mt2701-musb
+ - const: mediatek,mtk-musb
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ items:
+ - const: mc
+
+ clocks:
+ items:
+ - description: The main/core clock
+ - description: The system bus clock
+ - description: The 48Mhz clock
+
+ clock-names:
+ items:
+ - const: main
+ - const: mcu
+ - const: univpll
+
+ phys:
+ maxItems: 1
+
+ usb-role-switch:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: Support role switch. See usb/generic.txt
+ type: boolean
+
+ dr_mode:
+ enum:
+ - host
+ - otg
+ - peripheral
+
+ power-domains:
+ description: A phandle to USB power domain node to control USB's MTCMOS
+ maxItems: 1
+
+ connector:
+ $ref: /connector/usb-connector.yaml#
+ description: Connector for dual role switch
+ type: object
+
+dependencies:
+ usb-role-switch: [ 'connector' ]
+ connector: [ 'usb-role-switch' ]
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - phys
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt2701-clk.h>
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/phy/phy.h>
+ #include <dt-bindings/power/mt2701-power.h>
+
+ usb@11200000 {
+ compatible = "mediatek,mt2701-musb", "mediatek,mtk-musb";
+ reg = <0x11200000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "mc";
+ phys = <&u2port2 PHY_TYPE_USB2>;
+ dr_mode = "otg";
+ clocks = <&pericfg CLK_PERI_USB0>,
+ <&pericfg CLK_PERI_USB0_MCU>,
+ <&pericfg CLK_PERI_USB_SLV>;
+ clock-names = "main","mcu","univpll";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
+ usb-role-switch;
+
+ connector{
+ compatible = "gpio-usb-b-connector", "usb-b-connector";
+ type = "micro";
+ id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
+ vbus-supply = <&usb_vbus>;
+ };
+ };
+...
--
2.18.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 09/11] dt-bindings: usb: convert mediatek, mtk-xhci.txt to YAML schema
2020-11-18 8:21 [PATCH v3 01/11] dt-bindings: usb: convert usb-device.txt to YAML schema Chunfeng Yun
` (6 preceding siblings ...)
2020-11-18 8:21 ` [PATCH v3 08/11] dt-bindings: usb: convert mediatek, musb.txt " Chunfeng Yun
@ 2020-11-18 8:21 ` Chunfeng Yun
2020-12-07 21:24 ` Rob Herring
2020-11-18 8:21 ` [PATCH v3 10/11] dt-bindings: usb: convert mediatek, mtu3.txt " Chunfeng Yun
` (2 subsequent siblings)
10 siblings, 1 reply; 25+ messages in thread
From: Chunfeng Yun @ 2020-11-18 8:21 UTC (permalink / raw)
To: Rob Herring
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Matthias Brugger,
Vinod Koul, linux-mediatek, netdev, Chunfeng Yun, Jakub Kicinski,
Stanley Chu, David S . Miller, linux-arm-kernel
Convert mediatek,mtk-xhci.txt to YAML schema mediatek,mtk-xhci.yaml
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
v3:
1. fix yamllint warning
2. remove pinctrl* properties supported by default suggested by Rob
3. drop unused labels
4. modify description of mediatek,syscon-wakeup
5. remove type of imod-interval-ns
v2: new patch
---
.../bindings/usb/mediatek,mtk-xhci.txt | 121 -------------
.../bindings/usb/mediatek,mtk-xhci.yaml | 171 ++++++++++++++++++
2 files changed, 171 insertions(+), 121 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
create mode 100644 Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
deleted file mode 100644
index 42d8814f903a..000000000000
--- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
+++ /dev/null
@@ -1,121 +0,0 @@
-MT8173 xHCI
-
-The device node for Mediatek SOC USB3.0 host controller
-
-There are two scenarios: the first one only supports xHCI driver;
-the second one supports dual-role mode, and the host is based on xHCI
-driver. Take account of backward compatibility, we divide bindings
-into two parts.
-
-1st: only supports xHCI driver
-------------------------------------------------------------------------
-
-Required properties:
- - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci",
- soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
- "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
- addition, one of:
- - "mediatek,mt8173-xhci"
- - reg : specifies physical base address and size of the registers
- - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
- - interrupts : interrupt used by the controller
- - power-domains : a phandle to USB power domain node to control USB's
- mtcmos
- - vusb33-supply : regulator of USB avdd3.3v
-
- - clocks : a list of phandle + clock-specifier pairs, one for each
- entry in clock-names
- - clock-names : must contain
- "sys_ck": controller clock used by normal mode,
- the following ones are optional:
- "ref_ck": reference clock used by low power mode etc,
- "mcu_ck": mcu_bus clock for register access,
- "dma_ck": dma_bus clock for data transfer by DMA,
- "xhci_ck": controller clock
-
- - phys : see usb-hcd.yaml in the current directory
-
-Optional properties:
- - wakeup-source : enable USB remote wakeup;
- - mediatek,syscon-wakeup : phandle to syscon used to access the register
- of the USB wakeup glue layer between xHCI and SPM; it depends on
- "wakeup-source", and has two arguments:
- - the first one : register base address of the glue layer in syscon;
- - the second one : hardware version of the glue layer
- - 1 : used by mt8173 etc
- - 2 : used by mt2712 etc
- - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
- bit1 for u3port1, ... etc;
- - vbus-supply : reference to the VBUS regulator;
- - usb3-lpm-capable : supports USB3.0 LPM
- - pinctrl-names : a pinctrl state named "default" must be defined
- - pinctrl-0 : pin control group
- See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
- - imod-interval-ns: default interrupt moderation interval is 5000ns
-
-additionally the properties from usb-hcd.yaml (in the current directory) are
-supported.
-
-Example:
-usb30: usb@11270000 {
- compatible = "mediatek,mt8173-xhci";
- reg = <0 0x11270000 0 0x1000>,
- <0 0x11280700 0 0x0100>;
- reg-names = "mac", "ippc";
- interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
- power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
- clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>,
- <&pericfg CLK_PERI_USB0>,
- <&pericfg CLK_PERI_USB1>;
- clock-names = "sys_ck", "ref_ck";
- phys = <&phy_port0 PHY_TYPE_USB3>,
- <&phy_port1 PHY_TYPE_USB2>;
- vusb33-supply = <&mt6397_vusb_reg>;
- vbus-supply = <&usb_p1_vbus>;
- usb3-lpm-capable;
- mediatek,syscon-wakeup = <&pericfg 0x400 1>;
- wakeup-source;
- imod-interval-ns = <10000>;
-};
-
-2nd: dual-role mode with xHCI driver
-------------------------------------------------------------------------
-
-In the case, xhci is added as subnode to mtu3. An example and the DT binding
-details of mtu3 can be found in:
-Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
-
-Required properties:
- - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci",
- soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
- "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
- addition, one of:
- - "mediatek,mt8173-xhci"
- - reg : specifies physical base address and size of the registers
- - reg-names: should be "mac" for xHCI MAC
- - interrupts : interrupt used by the host controller
- - power-domains : a phandle to USB power domain node to control USB's
- mtcmos
- - vusb33-supply : regulator of USB avdd3.3v
-
- - clocks : a list of phandle + clock-specifier pairs, one for each
- entry in clock-names
- - clock-names : must contain "sys_ck", and the following ones are optional:
- "ref_ck", "mcu_ck" and "dma_ck", "xhci_ck"
-
-Optional properties:
- - vbus-supply : reference to the VBUS regulator;
- - usb3-lpm-capable : supports USB3.0 LPM
-
-Example:
-usb30: usb@11270000 {
- compatible = "mediatek,mt8173-xhci";
- reg = <0 0x11270000 0 0x1000>;
- reg-names = "mac";
- interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
- power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
- clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
- clock-names = "sys_ck", "ref_ck";
- vusb33-supply = <&mt6397_vusb_reg>;
- usb3-lpm-capable;
-};
diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
new file mode 100644
index 000000000000..4a36ad5c4d25
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
@@ -0,0 +1,171 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2020 MediaTek
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek USB3 xHCI Device Tree Bindings
+
+maintainers:
+ - Chunfeng Yun <chunfeng.yun@mediatek.com>
+
+allOf:
+ - $ref: "usb-hcd.yaml"
+
+description: |
+ There are two scenarios:
+ case 1: only supports xHCI driver;
+ case 2: supports dual-role mode, and the host is based on xHCI driver.
+
+properties:
+ # common properties for both case 1 and case 2
+ compatible:
+ items:
+ - enum:
+ - mediatek,mt2712-xhci
+ - mediatek,mt7622-xhci
+ - mediatek,mt7629-xhci
+ - mediatek,mt8173-xhci
+ - mediatek,mt8183-xhci
+ - const: mediatek,mtk-xhci
+
+ reg:
+ minItems: 1
+ maxItems: 2
+ items:
+ - description: the registers of xHCI MAC
+ - description: the registers of IP Port Control
+
+ reg-names:
+ minItems: 1
+ maxItems: 2
+ items:
+ - const: mac
+ - const: ippc # optional, only needed for case 1.
+
+ interrupts:
+ maxItems: 1
+
+ power-domains:
+ description: A phandle to USB power domain node to control USB's MTCMOS
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ maxItems: 5
+ items:
+ - description: Controller clock used by normal mode
+ - description: Reference clock used by low power mode etc
+ - description: Mcu bus clock for register access
+ - description: DMA bus clock for data transfer
+ - description: controller clock
+
+ clock-names:
+ minItems: 1
+ maxItems: 5
+ items:
+ - const: sys_ck # required, the following ones are optional
+ - const: ref_ck
+ - const: mcu_ck
+ - const: dma_ck
+ - const: xhci_ck
+
+ phys:
+ $ref: /usb/usb-hcd.yaml#
+ description: List of all the USB PHYs on this HCD
+
+ vusb33-supply:
+ description: Regulator of USB AVDD3.3v
+
+ vbus-supply:
+ description: Regulator of USB VBUS5v
+
+ usb3-lpm-capable:
+ description: supports USB3.0 LPM
+ type: boolean
+
+ imod-interval-ns:
+ description:
+ Interrupt moderation interval value, it is 8 times as much as that
+ defined in the xHCI spec on MTK's controller.
+ default: 5000
+
+ # the following properties are only used for case 1
+ wakeup-source:
+ description: enable USB remote wakeup, see power/wakeup-source.txt
+ type: boolean
+
+ mediatek,syscon-wakeup:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ maxItems: 1
+ description: |
+ A phandle to syscon used to access the register of the USB wakeup glue
+ layer between xHCI and SPM, the field should always be 3 cells long.
+
+ items:
+ - description:
+ The first cell represents a phandle to syscon
+ - description:
+ The second cell represents the register base address of the glue
+ layer in syscon
+ - description:
+ The third cell represents the hardware version of the glue layer,
+ 1 is used by mt8173 etc, 2 is used by mt2712 etc
+ enum: [1, 2]
+
+ mediatek,u3p-dis-msk:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: The mask to disable u3ports, bit0 for u3port0,
+ bit1 for u3port1, ... etc
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+patternProperties:
+ "^[a-f]+@[0-9a-f]+$":
+ $ref: /usb/usb-hcd.yaml#
+ type: object
+ description: The hard wired USB devices.
+
+dependencies:
+ wakeup-source: [ 'mediatek,syscon-wakeup' ]
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8173-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/phy/phy.h>
+ #include <dt-bindings/power/mt8173-power.h>
+
+ usb@11270000 {
+ compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
+ reg = <0x11270000 0x1000>, <0x11280700 0x0100>;
+ reg-names = "mac", "ippc";
+ interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
+ power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
+ clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
+ clock-names = "sys_ck", "ref_ck";
+ phys = <&u3port0 PHY_TYPE_USB3>, <&u2port1 PHY_TYPE_USB2>;
+ vusb33-supply = <&mt6397_vusb_reg>;
+ vbus-supply = <&usb_p1_vbus>;
+ imod-interval-ns = <10000>;
+ mediatek,syscon-wakeup = <&pericfg 0x400 1>;
+ wakeup-source;
+ usb3-lpm-capable;
+ };
+...
--
2.18.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 10/11] dt-bindings: usb: convert mediatek, mtu3.txt to YAML schema
2020-11-18 8:21 [PATCH v3 01/11] dt-bindings: usb: convert usb-device.txt to YAML schema Chunfeng Yun
` (7 preceding siblings ...)
2020-11-18 8:21 ` [PATCH v3 09/11] dt-bindings: usb: convert mediatek, mtk-xhci.txt " Chunfeng Yun
@ 2020-11-18 8:21 ` Chunfeng Yun
2020-12-07 21:30 ` [PATCH v3 10/11] dt-bindings: usb: convert mediatek,mtu3.txt " Rob Herring
2020-11-18 8:21 ` [PATCH v3 11/11] MAINTAINERS: update MediaTek PHY/USB entry Chunfeng Yun
2020-11-18 21:23 ` [PATCH v3 01/11] dt-bindings: usb: convert usb-device.txt to YAML schema Rob Herring
10 siblings, 1 reply; 25+ messages in thread
From: Chunfeng Yun @ 2020-11-18 8:21 UTC (permalink / raw)
To: Rob Herring
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Matthias Brugger,
Vinod Koul, linux-mediatek, netdev, Chunfeng Yun, Jakub Kicinski,
Stanley Chu, David S . Miller, linux-arm-kernel
Convert mediatek,mtu3.txt to YAML schema mediatek,mtu3.yaml
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
v3:
1. fix yamllint warning
2. remove pinctrl* properties
3. remove unnecessary '|'
4. drop unused labels in example
v2: new patch
---
.../devicetree/bindings/usb/mediatek,mtu3.txt | 108 ---------
.../bindings/usb/mediatek,mtu3.yaml | 218 ++++++++++++++++++
2 files changed, 218 insertions(+), 108 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
create mode 100644 Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml
diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
deleted file mode 100644
index a82ca438aec1..000000000000
--- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
+++ /dev/null
@@ -1,108 +0,0 @@
-The device node for Mediatek USB3.0 DRD controller
-
-Required properties:
- - compatible : should be "mediatek,<soc-model>-mtu3", "mediatek,mtu3",
- soc-model is the name of SoC, such as mt8173, mt2712 etc,
- when using "mediatek,mtu3" compatible string, you need SoC specific
- ones in addition, one of:
- - "mediatek,mt8173-mtu3"
- - reg : specifies physical base address and size of the registers
- - reg-names: should be "mac" for device IP and "ippc" for IP port control
- - interrupts : interrupt used by the device IP
- - power-domains : a phandle to USB power domain node to control USB's
- mtcmos
- - vusb33-supply : regulator of USB avdd3.3v
- - clocks : a list of phandle + clock-specifier pairs, one for each
- entry in clock-names
- - clock-names : must contain "sys_ck" for clock of controller,
- the following clocks are optional:
- "ref_ck", "mcu_ck" and "dma_ck";
- - phys : see usb-hcd.yaml in the current directory
- - dr_mode : should be one of "host", "peripheral" or "otg",
- refer to usb/generic.txt
-
-Optional properties:
- - #address-cells, #size-cells : should be '2' if the device has sub-nodes
- with 'reg' property
- - ranges : allows valid 1:1 translation between child's address space and
- parent's address space
- - extcon : external connector for vbus and idpin changes detection, needed
- when supports dual-role mode.
- it's considered valid for compatibility reasons, not allowed for
- new bindings, and use "usb-role-switch" property instead.
- - vbus-supply : reference to the VBUS regulator, needed when supports
- dual-role mode.
- it's considered valid for compatibility reasons, not allowed for
- new bindings, and put into a usb-connector node.
- see connector/usb-connector.yaml.
- - pinctrl-names : a pinctrl state named "default" is optional, and need be
- defined if auto drd switch is enabled, that means the property dr_mode
- is set as "otg", and meanwhile the property "mediatek,enable-manual-drd"
- is not set.
- - pinctrl-0 : pin control group
- See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
-
- - maximum-speed : valid arguments are "super-speed", "high-speed" and
- "full-speed"; refer to usb/generic.txt
- - usb-role-switch : use USB Role Switch to support dual-role switch, but
- not extcon; see usb/generic.txt.
- - enable-manual-drd : supports manual dual-role switch via debugfs; usually
- used when receptacle is TYPE-A and also wants to support dual-role
- mode.
- - wakeup-source: enable USB remote wakeup of host mode.
- - mediatek,syscon-wakeup : phandle to syscon used to access the register
- of the USB wakeup glue layer between SSUSB and SPM; it depends on
- "wakeup-source", and has two arguments:
- - the first one : register base address of the glue layer in syscon;
- - the second one : hardware version of the glue layer
- - 1 : used by mt8173 etc
- - 2 : used by mt2712 etc
- - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
- bit1 for u3port1, ... etc;
-
-additionally the properties from usb-hcd.yaml (in the current directory) are
-supported.
-
-Sub-nodes:
-The xhci should be added as subnode to mtu3 as shown in the following example
-if host mode is enabled. The DT binding details of xhci can be found in:
-Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
-
-The port would be added as subnode if use "usb-role-switch" property.
- see graph.txt
-
-Example:
-ssusb: usb@11271000 {
- compatible = "mediatek,mt8173-mtu3";
- reg = <0 0x11271000 0 0x3000>,
- <0 0x11280700 0 0x0100>;
- reg-names = "mac", "ippc";
- interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
- phys = <&phy_port0 PHY_TYPE_USB3>,
- <&phy_port1 PHY_TYPE_USB2>;
- power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
- clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>,
- <&pericfg CLK_PERI_USB0>,
- <&pericfg CLK_PERI_USB1>;
- clock-names = "sys_ck", "ref_ck";
- vusb33-supply = <&mt6397_vusb_reg>;
- vbus-supply = <&usb_p0_vbus>;
- extcon = <&extcon_usb>;
- dr_mode = "otg";
- wakeup-source;
- mediatek,syscon-wakeup = <&pericfg 0x400 1>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- usb_host: xhci@11270000 {
- compatible = "mediatek,mt8173-xhci";
- reg = <0 0x11270000 0 0x1000>;
- reg-names = "mac";
- interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
- power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
- clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
- clock-names = "sys_ck", "ref_ck";
- vusb33-supply = <&mt6397_vusb_reg>;
- };
-};
diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml
new file mode 100644
index 000000000000..290e97a06f2a
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml
@@ -0,0 +1,218 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2020 MediaTek
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek USB3 DRD Controller Device Tree Bindings
+
+maintainers:
+ - Chunfeng Yun <chunfeng.yun@mediatek.com>
+
+description: |
+ The DRD controller has a glue layer IPPC (IP Port Control), and its host is
+ based on xHCI.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - mediatek,mt2712-mtu3
+ - mediatek,mt8173-mtu3
+ - mediatek,mt8183-mtu3
+ - const: mediatek,mtu3
+
+ reg:
+ items:
+ - description: the registers of device MAC
+ - description: the registers of IP Port Control
+
+ reg-names:
+ items:
+ - const: mac
+ - const: ippc
+
+ interrupts:
+ maxItems: 1
+
+ power-domains:
+ description: A phandle to USB power domain node to control USB's MTCMOS
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ maxItems: 4
+ items:
+ - description: Controller clock used by normal mode
+ - description: Reference clock used by low power mode etc
+ - description: Mcu bus clock for register access
+ - description: DMA bus clock for data transfer
+
+ clock-names:
+ minItems: 1
+ maxItems: 4
+ items:
+ - const: sys_ck # required, the following ones are optional
+ - const: ref_ck
+ - const: mcu_ck
+ - const: dma_ck
+
+ phys:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: List of all the USB PHYs used
+
+ vusb33-supply:
+ description: Regulator of USB AVDD3.3v
+
+ vbus-supply:
+ $ref: /connector/usb-connector.yaml#
+ deprecated: true
+ description: |
+ Regulator of USB VBUS5v, needed when supports dual-role mode.
+ Particularly, if use an output GPIO to control a VBUS regulator, should
+ model it as a regulator. See bindings/regulator/fixed-regulator.yaml
+ It's considered valid for compatibility reasons, not allowed for
+ new bindings, and put into a usb-connector node.
+
+ dr_mode:
+ description: See usb/generic.txt
+ enum: [host, peripheral, otg]
+ default: otg
+
+ maximum-speed:
+ description: See usb/generic.txt
+ enum: [super-speed-plus, super-speed, high-speed, full-speed]
+
+ "#address-cells":
+ enum: [1, 2]
+
+ "#size-cells":
+ enum: [1, 2]
+
+ ranges: true
+
+ extcon:
+ deprecated: true
+ description: |
+ Phandle to the extcon device detecting the IDDIG/VBUS state, neede
+ when supports dual-role mode.
+ It's considered valid for compatibility reasons, not allowed for
+ new bindings, and use "usb-role-switch" property instead.
+
+ usb-role-switch:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: Support role switch. See usb/generic.txt
+ type: boolean
+
+ connector:
+ $ref: /connector/usb-connector.yaml#
+ description:
+ Connector for dual role switch, especially for "gpio-usb-b-connector"
+ type: object
+
+ port:
+ description:
+ Any connector to the data bus of this controller should be modelled
+ using the OF graph bindings specified, if the "usb-role-switch"
+ property is used. See graph.txt
+ type: object
+
+ enable-manual-drd:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ supports manual dual-role switch via debugfs; usually used when
+ receptacle is TYPE-A and also wants to support dual-role mode.
+ type: boolean
+
+ wakeup-source:
+ description: enable USB remote wakeup, see power/wakeup-source.txt
+ type: boolean
+
+ mediatek,syscon-wakeup:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ maxItems: 1
+ description: |
+ A phandle to syscon used to access the register of the USB wakeup glue
+ layer between xHCI and SPM, the field should always be 3 cells long.
+
+ items:
+ - description:
+ The first cell represents a phandle to syscon
+ - description:
+ The second cell represents the register base address of the glue
+ layer in syscon
+ - description:
+ The third cell represents the hardware version of the glue layer,
+ 1 is used by mt8173 etc, 2 is used by mt2712 etc
+ enum: [1, 2]
+
+ mediatek,u3p-dis-msk:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: The mask to disable u3ports, bit0 for u3port0,
+ bit1 for u3port1, ... etc
+
+# Required child node when support dual-role
+patternProperties:
+ "^usb@[0-9a-f]+$":
+ type: object
+ $ref: /usb/mediatek,mtk-xhci.yaml#
+ description:
+ The xhci should be added as subnode to mtu3 as shown in the following
+ example if the host mode is enabled.
+
+dependencies:
+ connector: [ 'usb-role-switch' ]
+ port: [ 'usb-role-switch' ]
+ wakeup-source: [ 'mediatek,syscon-wakeup' ]
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - clocks
+ - clock-names
+ - phys
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8173-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/phy/phy.h>
+ #include <dt-bindings/power/mt8173-power.h>
+
+ usb@11271000 {
+ compatible = "mediatek,mt8173-mtu3", "mediatek,mtu3";
+ reg = <0x11271000 0x3000>, <0x11280700 0x0100>;
+ reg-names = "mac", "ippc";
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
+ phys = <&phy_port0 PHY_TYPE_USB3>, <&phy_port1 PHY_TYPE_USB2>;
+ power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
+ clocks = <&topckgen CLK_TOP_USB30_SEL>;
+ clock-names = "sys_ck";
+ vusb33-supply = <&mt6397_vusb_reg>;
+ vbus-supply = <&usb_p0_vbus>;
+ extcon = <&extcon_usb>;
+ dr_mode = "otg";
+ wakeup-source;
+ mediatek,syscon-wakeup = <&pericfg 0x400 1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ xhci: usb@11270000 {
+ compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
+ reg = <0x11270000 0x1000>;
+ reg-names = "mac";
+ interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
+ power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
+ clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
+ clock-names = "sys_ck", "ref_ck";
+ vusb33-supply = <&mt6397_vusb_reg>;
+ };
+ };
+...
--
2.18.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 11/11] MAINTAINERS: update MediaTek PHY/USB entry
2020-11-18 8:21 [PATCH v3 01/11] dt-bindings: usb: convert usb-device.txt to YAML schema Chunfeng Yun
` (8 preceding siblings ...)
2020-11-18 8:21 ` [PATCH v3 10/11] dt-bindings: usb: convert mediatek, mtu3.txt " Chunfeng Yun
@ 2020-11-18 8:21 ` Chunfeng Yun
2020-11-18 21:23 ` [PATCH v3 01/11] dt-bindings: usb: convert usb-device.txt to YAML schema Rob Herring
10 siblings, 0 replies; 25+ messages in thread
From: Chunfeng Yun @ 2020-11-18 8:21 UTC (permalink / raw)
To: Rob Herring
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Matthias Brugger,
Vinod Koul, linux-mediatek, netdev, Chunfeng Yun, Jakub Kicinski,
Stanley Chu, David S . Miller, linux-arm-kernel
Due to the phy/usb bindings are converted into YAML schema and
also renamed, update entries.
Meanwhile add drivers/usb/host/mtk-xhci* files.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
v3: no changes
v2: new patch
---
MAINTAINERS | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index e73636b75f29..360c6131b866 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2084,7 +2084,7 @@ M: Chunfeng Yun <chunfeng.yun@mediatek.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: linux-mediatek@lists.infradead.org (moderated for non-subscribers)
S: Maintained
-F: Documentation/devicetree/bindings/phy/phy-mtk-*
+F: Documentation/devicetree/bindings/phy/mediatek,*
F: drivers/phy/mediatek/
ARM/Microchip (AT91) SoC support
@@ -11139,6 +11139,8 @@ L: linux-usb@vger.kernel.org
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: linux-mediatek@lists.infradead.org (moderated for non-subscribers)
S: Maintained
+F: Documentation/devicetree/bindings/usb/mediatek,*
+F: drivers/usb/host/xhci-mtk*
F: drivers/usb/mtu3/
MEGACHIPS STDPXXXX-GE-B850V3-FW LVDS/DP++ BRIDGES
--
2.18.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 25+ messages in thread
* Re: [PATCH v3 05/11] dt-bindings: phy: convert phy-mtk-ufs.txt to YAML schema
2020-11-18 8:21 ` [PATCH v3 05/11] dt-bindings: phy: convert phy-mtk-ufs.txt " Chunfeng Yun
@ 2020-11-18 9:18 ` Stanley Chu
0 siblings, 0 replies; 25+ messages in thread
From: Stanley Chu @ 2020-11-18 9:18 UTC (permalink / raw)
To: Chunfeng Yun
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Vinod Koul, Rob Herring,
linux-mediatek, netdev, Matthias Brugger, Jakub Kicinski,
David S . Miller, linux-arm-kernel
On Wed, 2020-11-18 at 16:21 +0800, Chunfeng Yun wrote:
> Convert phy-mtk-ufs.txt to YAML schema mediatek,ufs-phy.yaml
>
> Cc: Stanley Chu <stanley.chu@mediatek.com>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stanley Chu <stanley.chu@mediatek.com>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 01/11] dt-bindings: usb: convert usb-device.txt to YAML schema
2020-11-18 8:21 [PATCH v3 01/11] dt-bindings: usb: convert usb-device.txt to YAML schema Chunfeng Yun
` (9 preceding siblings ...)
2020-11-18 8:21 ` [PATCH v3 11/11] MAINTAINERS: update MediaTek PHY/USB entry Chunfeng Yun
@ 2020-11-18 21:23 ` Rob Herring
10 siblings, 0 replies; 25+ messages in thread
From: Rob Herring @ 2020-11-18 21:23 UTC (permalink / raw)
To: Chunfeng Yun
Cc: devicetree, Min Guo, Chun-Kuang Hu, David Airlie, netdev,
linux-usb, linux-kernel, dri-devel, Kishon Vijay Abraham I,
Serge Semin, Vinod Koul, Rob Herring, linux-mediatek,
Greg Kroah-Hartman, Matthias Brugger, Jakub Kicinski,
Stanley Chu, David S . Miller, linux-arm-kernel
On Wed, 18 Nov 2020 16:21:16 +0800, Chunfeng Yun wrote:
> Convert usb-device.txt to YAML schema usb-device.yaml
>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> ---
> v3:
> 1. remove $nodenmae and items key word for compatilbe;
> 2. add additionalProperties;
>
> The followings are suggested by Rob:
> 3. merge the following patch
> [v2,1/4] dt-bindings: usb: convert usb-device.txt to YAML schema
> [v2,2/4] dt-bindings: usb: add properties for hard wired devices
> 4. define the unit-address for hard-wired device in usb-hcd.yaml,
> also define its 'reg' and 'compatible';
> 5. This series is base on Serge's series:
> https://patchwork.kernel.org/project/linux-usb/cover/20201111090853.14112-1-Sergey.Semin@baikalelectronics.ru/
> [v4,00/18] dt-bindings: usb: Add generic USB HCD, xHCI, DWC USB3 DT schema
>
> v2 changes suggested by Rob:
> 1. modify pattern to support any USB class
> 2. convert usb-device.txt into usb-device.yaml
> ---
> .../devicetree/bindings/usb/usb-device.txt | 102 --------------
> .../devicetree/bindings/usb/usb-device.yaml | 125 ++++++++++++++++++
> .../devicetree/bindings/usb/usb-hcd.yaml | 33 +++++
> 3 files changed, 158 insertions(+), 102 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/usb/usb-device.txt
> create mode 100644 Documentation/devicetree/bindings/usb/usb-device.yaml
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/intel,keembay-dwc3.example.dt.yaml: usb: #size-cells:0:0: 0 was expected
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/usb-hcd.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/intel,keembay-dwc3.example.dt.yaml: usb: dwc3@34000000:compatible:0: 'snps,dwc3' does not match '^usb[0-9a-f]+,[0-9a-f]+$'
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/usb-hcd.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/qcom,dwc3.example.dt.yaml: usb@a6f8800: #address-cells:0:0: 1 was expected
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/usb-hcd.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/qcom,dwc3.example.dt.yaml: usb@a6f8800: #size-cells:0:0: 0 was expected
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/usb-hcd.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/qcom,dwc3.example.dt.yaml: usb@a6f8800: dwc3@a600000:compatible:0: 'snps,dwc3' does not match '^usb[0-9a-f]+,[0-9a-f]+$'
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/usb-hcd.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.example.dt.yaml: usb@ffe09000: #size-cells:0:0: 0 was expected
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/usb-hcd.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.example.dt.yaml: usb@ffe09000: usb@ff400000:compatible:0: 'amlogic,meson-g12a-usb' does not match '^usb[0-9a-f]+,[0-9a-f]+$'
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/usb-hcd.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.example.dt.yaml: usb@ffe09000: usb@ff400000:compatible: ['amlogic,meson-g12a-usb', 'snps,dwc2'] is too long
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/usb-hcd.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.example.dt.yaml: usb@ffe09000: usb@ff400000:compatible: Additional items are not allowed ('snps,dwc2' was unexpected)
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/usb-hcd.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.example.dt.yaml: usb@ffe09000: usb@ff500000:compatible:0: 'snps,dwc3' does not match '^usb[0-9a-f]+,[0-9a-f]+$'
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/usb-hcd.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.example.dt.yaml: usb-controller: phy@0: 'compatible' is a required property
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/usb-hcd.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.example.dt.yaml: usb-controller: phy@1: 'compatible' is a required property
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/usb-hcd.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.example.dt.yaml: usb-controller: phy@2: 'compatible' is a required property
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/usb-hcd.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.example.dt.yaml: usb-glue@65b00000: #size-cells:0:0: 0 was expected
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/usb-hcd.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.example.dt.yaml: usb-glue@65b00000: ss-phy@300:compatible:0: 'socionext,uniphier-ld20-usb3-ssphy' does not match '^usb[0-9a-f]+,[0-9a-f]+$'
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/usb-hcd.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.example.dt.yaml: usb-glue@65b00000: #size-cells:0:0: 0 was expected
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/usb-hcd.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.example.dt.yaml: usb-glue@65b00000: hs-phy@200:compatible:0: 'socionext,uniphier-ld20-usb3-hsphy' does not match '^usb[0-9a-f]+,[0-9a-f]+$'
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/usb-hcd.yaml
See https://patchwork.ozlabs.org/patch/1402017
The base for the patch is generally the last rc1. Any dependencies
should be noted.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 07/11] dt-bindings: phy: convert MIP DSI PHY binding to YAML schema
2020-11-18 8:21 ` [PATCH v3 07/11] dt-bindings: phy: convert MIP DSI " Chunfeng Yun
@ 2020-11-19 23:38 ` Chun-Kuang Hu
2020-11-20 2:22 ` Chunfeng Yun
2020-12-07 21:19 ` Rob Herring
1 sibling, 1 reply; 25+ messages in thread
From: Chun-Kuang Hu @ 2020-11-19 23:38 UTC (permalink / raw)
To: Chunfeng Yun
Cc: Chun-Kuang Hu, Min Guo, DTML, David Airlie, Greg Kroah-Hartman,
linux-usb, linux-kernel, DRI Development, Kishon Vijay Abraham I,
Serge Semin, Vinod Koul, Rob Herring,
moderated list:ARM/Mediatek SoC support, netdev,
Matthias Brugger, Jakub Kicinski, Stanley Chu, David S . Miller,
Linux ARM
Hi, Chunfeng:
Chunfeng Yun <chunfeng.yun@mediatek.com> 於 2020年11月18日 週三 下午4:21寫道:
>
> Convert MIPI DSI PHY binding to YAML schema mediatek,dsi-phy.yaml
>
> Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> ---
> v3: new patch
> ---
> .../display/mediatek/mediatek,dsi.txt | 18 +---
> .../bindings/phy/mediatek,dsi-phy.yaml | 83 +++++++++++++++++++
> 2 files changed, 84 insertions(+), 17 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> index f06f24d405a5..8238a86686be 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> @@ -22,23 +22,7 @@ Required properties:
> MIPI TX Configuration Module
> ============================
>
> -The MIPI TX configuration module controls the MIPI D-PHY.
> -
> -Required properties:
> -- compatible: "mediatek,<chip>-mipi-tx"
> -- the supported chips are mt2701, 7623, mt8173 and mt8183.
> -- reg: Physical base address and length of the controller's registers
> -- clocks: PLL reference clock
> -- clock-output-names: name of the output clock line to the DSI encoder
> -- #clock-cells: must be <0>;
> -- #phy-cells: must be <0>.
> -
> -Optional properties:
> -- drive-strength-microamp: adjust driving current, should be 3000 ~ 6000. And
> - the step is 200.
> -- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
> - unspecified default values shall be used.
> -- nvmem-cell-names: Should be "calibration-data"
> +See phy/mediatek,dsi-phy.yaml
>
> Example:
>
> diff --git a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
> new file mode 100644
> index 000000000000..87f8df251ab0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
> @@ -0,0 +1,83 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2020 MediaTek
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/mediatek,dsi-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek MIPI Display Serial Interface (DSI) PHY binding
> +
> +maintainers:
> + - Chun-Kuang Hu <chunkuang.hu@kernel.org>
> + - Chunfeng Yun <chunfeng.yun@mediatek.com>
Please add Philipp Zabel because he is Mediatek DRM driver maintainer.
DRM DRIVERS FOR MEDIATEK
M: Chun-Kuang Hu <chunkuang.hu@kernel.org>
M: Philipp Zabel <p.zabel@pengutronix.de>
L: dri-devel@lists.freedesktop.org
S: Supported
F: Documentation/devicetree/bindings/display/mediatek/
> +
> +description: The MIPI DSI PHY supports up to 4-lane output.
> +
> +properties:
> + $nodename:
> + pattern: "^dsi-phy@[0-9a-f]+$"
> +
> + compatible:
> + enum:
> + - mediatek,mt2701-mipi-tx
> + - mediatek,mt7623-mipi-tx
> + - mediatek,mt8173-mipi-tx
Add mediatek,mt8183-mipi-tx
Regards,
Chun-Kuang.
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: PLL reference clock
> +
> + clock-output-names:
> + maxItems: 1
> +
> + "#phy-cells":
> + const: 0
> +
> + "#clock-cells":
> + const: 0
> +
> + nvmem-cells:
> + maxItems: 1
> + description: A phandle to the calibration data provided by a nvmem device,
> + if unspecified, default values shall be used.
> +
> + nvmem-cell-names:
> + items:
> + - const: calibration-data
> +
> + drive-strength-microamp:
> + description: adjust driving current, the step is 200.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 2000
> + maximum: 6000
> + default: 4600
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-output-names
> + - "#phy-cells"
> + - "#clock-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/mt8173-clk.h>
> + dsi-phy@10215000 {
> + compatible = "mediatek,mt8173-mipi-tx";
> + reg = <0x10215000 0x1000>;
> + clocks = <&clk26m>;
> + clock-output-names = "mipi_tx0_pll";
> + drive-strength-microamp = <4000>;
> + nvmem-cells= <&mipi_tx_calibration>;
> + nvmem-cell-names = "calibration-data";
> + #clock-cells = <0>;
> + #phy-cells = <0>;
> + };
> +
> +...
> --
> 2.18.0
>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 06/11] dt-bindings: phy: convert HDMI PHY binding to YAML schema
2020-11-18 8:21 ` [PATCH v3 06/11] dt-bindings: phy: convert HDMI PHY binding " Chunfeng Yun
@ 2020-11-19 23:42 ` Chun-Kuang Hu
2020-11-20 2:25 ` Chunfeng Yun
0 siblings, 1 reply; 25+ messages in thread
From: Chun-Kuang Hu @ 2020-11-19 23:42 UTC (permalink / raw)
To: Chunfeng Yun
Cc: Chun-Kuang Hu, Min Guo, DTML, David Airlie, Greg Kroah-Hartman,
linux-usb, linux-kernel, DRI Development, Kishon Vijay Abraham I,
Serge Semin, Vinod Koul, Rob Herring,
moderated list:ARM/Mediatek SoC support, netdev,
Matthias Brugger, Jakub Kicinski, Stanley Chu, David S . Miller,
Linux ARM
Hi, Chunfeng:
Chunfeng Yun <chunfeng.yun@mediatek.com> 於 2020年11月18日 週三 下午4:21寫道:
>
> Convert HDMI PHY binding to YAML schema mediatek,hdmi-phy.yaml
>
> Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
> v3: add Reviewed-by Rob
> v2: fix binding check warning of reg in example
> ---
> .../display/mediatek/mediatek,hdmi.txt | 18 +---
> .../bindings/phy/mediatek,hdmi-phy.yaml | 91 +++++++++++++++++++
> 2 files changed, 92 insertions(+), 17 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
> index 6b1c586403e4..b284ca51b913 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
> @@ -53,23 +53,7 @@ Required properties:
>
> HDMI PHY
> ========
> -
> -The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel
> -output and drives the HDMI pads.
> -
> -Required properties:
> -- compatible: "mediatek,<chip>-hdmi-phy"
> -- the supported chips are mt2701, mt7623 and mt8173
> -- reg: Physical base address and length of the module's registers
> -- clocks: PLL reference clock
> -- clock-names: must contain "pll_ref"
> -- clock-output-names: must be "hdmitx_dig_cts" on mt8173
> -- #phy-cells: must be <0>
> -- #clock-cells: must be <0>
> -
> -Optional properties:
> -- mediatek,ibias: TX DRV bias current for <1.65Gbps, defaults to 0xa
> -- mediatek,ibias_up: TX DRV bias current for >1.65Gbps, defaults to 0x1c
> +See phy/mediatek,hdmi-phy.yaml
>
> Example:
>
> diff --git a/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml
> new file mode 100644
> index 000000000000..96700bb8bc00
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml
> @@ -0,0 +1,91 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2020 MediaTek
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/mediatek,hdmi-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek High Definition Multimedia Interface (HDMI) PHY binding
> +
> +maintainers:
> + - Chun-Kuang Hu <chunkuang.hu@kernel.org>
> + - Chunfeng Yun <chunfeng.yun@mediatek.com>
Please add Philipp Zabel because he is Mediatek DRM driver maintainer.
DRM DRIVERS FOR MEDIATEK
M: Chun-Kuang Hu <chunkuang.hu at kernel.org>
M: Philipp Zabel <p.zabel at pengutronix.de>
L: dri-devel at lists.freedesktop.org
S: Supported
F: Documentation/devicetree/bindings/display/mediatek/
Regards,
Chun-Kuang.
> +
> +description: |
> + The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel
> + output and drives the HDMI pads.
> +
> +properties:
> + $nodename:
> + pattern: "^hdmi-phy@[0-9a-f]+$"
> +
> + compatible:
> + enum:
> + - mediatek,mt2701-hdmi-phy
> + - mediatek,mt7623-hdmi-phy
> + - mediatek,mt8173-hdmi-phy
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: PLL reference clock
> +
> + clock-names:
> + items:
> + - const: pll_ref
> +
> + clock-output-names:
> + items:
> + - const: hdmitx_dig_cts
> +
> + "#phy-cells":
> + const: 0
> +
> + "#clock-cells":
> + const: 0
> +
> + mediatek,ibias:
> + description:
> + TX DRV bias current for < 1.65Gbps
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 63
> + default: 0xa
> +
> + mediatek,ibias_up:
> + description:
> + TX DRV bias current for >= 1.65Gbps
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 63
> + default: 0x1c
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - clock-output-names
> + - "#phy-cells"
> + - "#clock-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/mt8173-clk.h>
> + hdmi_phy: hdmi-phy@10209100 {
> + compatible = "mediatek,mt8173-hdmi-phy";
> + reg = <0x10209100 0x24>;
> + clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>;
> + clock-names = "pll_ref";
> + clock-output-names = "hdmitx_dig_cts";
> + mediatek,ibias = <0xa>;
> + mediatek,ibias_up = <0x1c>;
> + #clock-cells = <0>;
> + #phy-cells = <0>;
> + };
> +
> +...
> --
> 2.18.0
>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 07/11] dt-bindings: phy: convert MIP DSI PHY binding to YAML schema
2020-11-19 23:38 ` Chun-Kuang Hu
@ 2020-11-20 2:22 ` Chunfeng Yun
0 siblings, 0 replies; 25+ messages in thread
From: Chunfeng Yun @ 2020-11-20 2:22 UTC (permalink / raw)
To: Chun-Kuang Hu
Cc: DTML, Min Guo, David Airlie, Greg Kroah-Hartman, linux-usb,
linux-kernel, DRI Development, Kishon Vijay Abraham I,
Serge Semin, Vinod Koul, Rob Herring,
moderated list:ARM/Mediatek SoC support, netdev,
Matthias Brugger, Jakub Kicinski, Stanley Chu, David S . Miller,
Linux ARM
On Fri, 2020-11-20 at 07:38 +0800, Chun-Kuang Hu wrote:
> Hi, Chunfeng:
>
> Chunfeng Yun <chunfeng.yun@mediatek.com> 於 2020年11月18日 週三 下午4:21寫道:
> >
> > Convert MIPI DSI PHY binding to YAML schema mediatek,dsi-phy.yaml
> >
> > Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org>
> > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> > ---
> > v3: new patch
> > ---
> > .../display/mediatek/mediatek,dsi.txt | 18 +---
> > .../bindings/phy/mediatek,dsi-phy.yaml | 83 +++++++++++++++++++
> > 2 files changed, 84 insertions(+), 17 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> > index f06f24d405a5..8238a86686be 100644
> > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> > @@ -22,23 +22,7 @@ Required properties:
> > MIPI TX Configuration Module
> > ============================
> >
> > -The MIPI TX configuration module controls the MIPI D-PHY.
> > -
> > -Required properties:
> > -- compatible: "mediatek,<chip>-mipi-tx"
> > -- the supported chips are mt2701, 7623, mt8173 and mt8183.
> > -- reg: Physical base address and length of the controller's registers
> > -- clocks: PLL reference clock
> > -- clock-output-names: name of the output clock line to the DSI encoder
> > -- #clock-cells: must be <0>;
> > -- #phy-cells: must be <0>.
> > -
> > -Optional properties:
> > -- drive-strength-microamp: adjust driving current, should be 3000 ~ 6000. And
> > - the step is 200.
> > -- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
> > - unspecified default values shall be used.
> > -- nvmem-cell-names: Should be "calibration-data"
> > +See phy/mediatek,dsi-phy.yaml
> >
> > Example:
> >
> > diff --git a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
> > new file mode 100644
> > index 000000000000..87f8df251ab0
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
> > @@ -0,0 +1,83 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +# Copyright (c) 2020 MediaTek
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/phy/mediatek,dsi-phy.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek MIPI Display Serial Interface (DSI) PHY binding
> > +
> > +maintainers:
> > + - Chun-Kuang Hu <chunkuang.hu@kernel.org>
> > + - Chunfeng Yun <chunfeng.yun@mediatek.com>
>
> Please add Philipp Zabel because he is Mediatek DRM driver maintainer.
Ok
>
> DRM DRIVERS FOR MEDIATEK
> M: Chun-Kuang Hu <chunkuang.hu@kernel.org>
> M: Philipp Zabel <p.zabel@pengutronix.de>
> L: dri-devel@lists.freedesktop.org
> S: Supported
> F: Documentation/devicetree/bindings/display/mediatek/
>
> > +
> > +description: The MIPI DSI PHY supports up to 4-lane output.
> > +
> > +properties:
> > + $nodename:
> > + pattern: "^dsi-phy@[0-9a-f]+$"
> > +
> > + compatible:
> > + enum:
> > + - mediatek,mt2701-mipi-tx
> > + - mediatek,mt7623-mipi-tx
> > + - mediatek,mt8173-mipi-tx
>
> Add mediatek,mt8183-mipi-tx
Ok, will add it
Thanks
>
> Regards,
> Chun-Kuang.
>
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + clocks:
> > + items:
> > + - description: PLL reference clock
> > +
> > + clock-output-names:
> > + maxItems: 1
> > +
> > + "#phy-cells":
> > + const: 0
> > +
> > + "#clock-cells":
> > + const: 0
> > +
> > + nvmem-cells:
> > + maxItems: 1
> > + description: A phandle to the calibration data provided by a nvmem device,
> > + if unspecified, default values shall be used.
> > +
> > + nvmem-cell-names:
> > + items:
> > + - const: calibration-data
> > +
> > + drive-strength-microamp:
> > + description: adjust driving current, the step is 200.
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + minimum: 2000
> > + maximum: 6000
> > + default: 4600
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - clocks
> > + - clock-output-names
> > + - "#phy-cells"
> > + - "#clock-cells"
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/mt8173-clk.h>
> > + dsi-phy@10215000 {
> > + compatible = "mediatek,mt8173-mipi-tx";
> > + reg = <0x10215000 0x1000>;
> > + clocks = <&clk26m>;
> > + clock-output-names = "mipi_tx0_pll";
> > + drive-strength-microamp = <4000>;
> > + nvmem-cells= <&mipi_tx_calibration>;
> > + nvmem-cell-names = "calibration-data";
> > + #clock-cells = <0>;
> > + #phy-cells = <0>;
> > + };
> > +
> > +...
> > --
> > 2.18.0
> >
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 06/11] dt-bindings: phy: convert HDMI PHY binding to YAML schema
2020-11-19 23:42 ` Chun-Kuang Hu
@ 2020-11-20 2:25 ` Chunfeng Yun
0 siblings, 0 replies; 25+ messages in thread
From: Chunfeng Yun @ 2020-11-20 2:25 UTC (permalink / raw)
To: Chun-Kuang Hu
Cc: DTML, Min Guo, David Airlie, Greg Kroah-Hartman, linux-usb,
linux-kernel, DRI Development, Kishon Vijay Abraham I,
Serge Semin, Vinod Koul, Rob Herring,
moderated list:ARM/Mediatek SoC support, netdev,
Matthias Brugger, Jakub Kicinski, Stanley Chu, David S . Miller,
Linux ARM
On Fri, 2020-11-20 at 07:42 +0800, Chun-Kuang Hu wrote:
> Hi, Chunfeng:
>
> Chunfeng Yun <chunfeng.yun@mediatek.com> 於 2020年11月18日 週三 下午4:21寫道:
> >
> > Convert HDMI PHY binding to YAML schema mediatek,hdmi-phy.yaml
> >
> > Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org>
> > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> > Reviewed-by: Rob Herring <robh@kernel.org>
> > ---
> > v3: add Reviewed-by Rob
> > v2: fix binding check warning of reg in example
> > ---
> > .../display/mediatek/mediatek,hdmi.txt | 18 +---
> > .../bindings/phy/mediatek,hdmi-phy.yaml | 91 +++++++++++++++++++
> > 2 files changed, 92 insertions(+), 17 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
> > index 6b1c586403e4..b284ca51b913 100644
> > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
> > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
> > @@ -53,23 +53,7 @@ Required properties:
> >
> > HDMI PHY
> > ========
> > -
> > -The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel
> > -output and drives the HDMI pads.
> > -
> > -Required properties:
> > -- compatible: "mediatek,<chip>-hdmi-phy"
> > -- the supported chips are mt2701, mt7623 and mt8173
> > -- reg: Physical base address and length of the module's registers
> > -- clocks: PLL reference clock
> > -- clock-names: must contain "pll_ref"
> > -- clock-output-names: must be "hdmitx_dig_cts" on mt8173
> > -- #phy-cells: must be <0>
> > -- #clock-cells: must be <0>
> > -
> > -Optional properties:
> > -- mediatek,ibias: TX DRV bias current for <1.65Gbps, defaults to 0xa
> > -- mediatek,ibias_up: TX DRV bias current for >1.65Gbps, defaults to 0x1c
> > +See phy/mediatek,hdmi-phy.yaml
> >
> > Example:
> >
> > diff --git a/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml
> > new file mode 100644
> > index 000000000000..96700bb8bc00
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml
> > @@ -0,0 +1,91 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +# Copyright (c) 2020 MediaTek
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/phy/mediatek,hdmi-phy.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek High Definition Multimedia Interface (HDMI) PHY binding
> > +
> > +maintainers:
> > + - Chun-Kuang Hu <chunkuang.hu@kernel.org>
> > + - Chunfeng Yun <chunfeng.yun@mediatek.com>
>
> Please add Philipp Zabel because he is Mediatek DRM driver maintainer.
Ok, will do it
Thanks a lot
>
> DRM DRIVERS FOR MEDIATEK
> M: Chun-Kuang Hu <chunkuang.hu at kernel.org>
> M: Philipp Zabel <p.zabel at pengutronix.de>
> L: dri-devel at lists.freedesktop.org
> S: Supported
> F: Documentation/devicetree/bindings/display/mediatek/
>
> Regards,
> Chun-Kuang.
>
> > +
> > +description: |
> > + The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel
> > + output and drives the HDMI pads.
> > +
> > +properties:
> > + $nodename:
> > + pattern: "^hdmi-phy@[0-9a-f]+$"
> > +
> > + compatible:
> > + enum:
> > + - mediatek,mt2701-hdmi-phy
> > + - mediatek,mt7623-hdmi-phy
> > + - mediatek,mt8173-hdmi-phy
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + clocks:
> > + items:
> > + - description: PLL reference clock
> > +
> > + clock-names:
> > + items:
> > + - const: pll_ref
> > +
> > + clock-output-names:
> > + items:
> > + - const: hdmitx_dig_cts
> > +
> > + "#phy-cells":
> > + const: 0
> > +
> > + "#clock-cells":
> > + const: 0
> > +
> > + mediatek,ibias:
> > + description:
> > + TX DRV bias current for < 1.65Gbps
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + minimum: 0
> > + maximum: 63
> > + default: 0xa
> > +
> > + mediatek,ibias_up:
> > + description:
> > + TX DRV bias current for >= 1.65Gbps
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + minimum: 0
> > + maximum: 63
> > + default: 0x1c
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - clocks
> > + - clock-names
> > + - clock-output-names
> > + - "#phy-cells"
> > + - "#clock-cells"
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/mt8173-clk.h>
> > + hdmi_phy: hdmi-phy@10209100 {
> > + compatible = "mediatek,mt8173-hdmi-phy";
> > + reg = <0x10209100 0x24>;
> > + clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>;
> > + clock-names = "pll_ref";
> > + clock-output-names = "hdmitx_dig_cts";
> > + mediatek,ibias = <0xa>;
> > + mediatek,ibias_up = <0x1c>;
> > + #clock-cells = <0>;
> > + #phy-cells = <0>;
> > + };
> > +
> > +...
> > --
> > 2.18.0
> >
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 03/11] dt-bindings: phy: convert phy-mtk-xsphy.txt to YAML schema
2020-11-18 8:21 ` [PATCH v3 03/11] dt-bindings: phy: convert phy-mtk-xsphy.txt to YAML schema Chunfeng Yun
@ 2020-12-07 21:15 ` Rob Herring
0 siblings, 0 replies; 25+ messages in thread
From: Rob Herring @ 2020-12-07 21:15 UTC (permalink / raw)
To: Chunfeng Yun
Cc: Chun-Kuang Hu, devicetree, David Airlie, netdev, linux-usb,
linux-kernel, dri-devel, Kishon Vijay Abraham I, Serge Semin,
Vinod Koul, Rob Herring, linux-mediatek, Min Guo,
Greg Kroah-Hartman, Matthias Brugger, Jakub Kicinski,
Stanley Chu, David S . Miller, linux-arm-kernel
On Wed, 18 Nov 2020 16:21:18 +0800, Chunfeng Yun wrote:
> Convert phy-mtk-xsphy.txt to YAML schema mediatek,xsphy.yaml
>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> ---
> v3:
> 1. remove type for property with standard unit suffix suggested by Rob
> 2. remove '|' for descritpion
> 3. fix yamllint warning
>
> v2:
> 1. modify description and compatible definition suggested by Rob
> ---
> .../bindings/phy/mediatek,xsphy.yaml | 199 ++++++++++++++++++
> .../devicetree/bindings/phy/phy-mtk-xsphy.txt | 109 ----------
> 2 files changed, 199 insertions(+), 109 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml
> delete mode 100644 Documentation/devicetree/bindings/phy/phy-mtk-xsphy.txt
>
Reviewed-by: Rob Herring <robh@kernel.org>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 04/11] dt-bindings: phy: convert phy-mtk-tphy.txt to YAML schema
2020-11-18 8:21 ` [PATCH v3 04/11] dt-bindings: phy: convert phy-mtk-tphy.txt " Chunfeng Yun
@ 2020-12-07 21:17 ` Rob Herring
0 siblings, 0 replies; 25+ messages in thread
From: Rob Herring @ 2020-12-07 21:17 UTC (permalink / raw)
To: Chunfeng Yun
Cc: Chun-Kuang Hu, devicetree, David Airlie, netdev, linux-usb,
linux-kernel, dri-devel, Kishon Vijay Abraham I, Serge Semin,
Vinod Koul, Rob Herring, linux-mediatek, Min Guo,
Greg Kroah-Hartman, Matthias Brugger, Jakub Kicinski,
Stanley Chu, David S . Miller, linux-arm-kernel
On Wed, 18 Nov 2020 16:21:19 +0800, Chunfeng Yun wrote:
> Convert phy-mtk-tphy.txt to YAML schema mediatek,tphy.yaml
>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> ---
> v3:
> 1. fix dt_binding_check error in example after add mtu3.yaml
> Changes suggested by Rob:
> 2. fix wrong indentation
> 3. remove '|' due to no formatting to preserve
> 4. add a space after '#'
> 5. drop unused labels and status in examples
> 6. modify file mode
>
> v2:
> 1. modify description and compatible
> ---
> .../bindings/phy/mediatek,tphy.yaml | 260 ++++++++++++++++++
> .../devicetree/bindings/phy/phy-mtk-tphy.txt | 162 -----------
> 2 files changed, 260 insertions(+), 162 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
> delete mode 100644 Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
>
Reviewed-by: Rob Herring <robh@kernel.org>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 07/11] dt-bindings: phy: convert MIP DSI PHY binding to YAML schema
2020-11-18 8:21 ` [PATCH v3 07/11] dt-bindings: phy: convert MIP DSI " Chunfeng Yun
2020-11-19 23:38 ` Chun-Kuang Hu
@ 2020-12-07 21:19 ` Rob Herring
2020-12-08 2:00 ` Chunfeng Yun
1 sibling, 1 reply; 25+ messages in thread
From: Rob Herring @ 2020-12-07 21:19 UTC (permalink / raw)
To: Chunfeng Yun
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Vinod Koul, linux-mediatek,
netdev, Matthias Brugger, Jakub Kicinski, Stanley Chu,
David S . Miller, linux-arm-kernel
On Wed, Nov 18, 2020 at 04:21:22PM +0800, Chunfeng Yun wrote:
> Convert MIPI DSI PHY binding to YAML schema mediatek,dsi-phy.yaml
>
> Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> ---
> v3: new patch
> ---
> .../display/mediatek/mediatek,dsi.txt | 18 +---
> .../bindings/phy/mediatek,dsi-phy.yaml | 83 +++++++++++++++++++
> 2 files changed, 84 insertions(+), 17 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> index f06f24d405a5..8238a86686be 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> @@ -22,23 +22,7 @@ Required properties:
> MIPI TX Configuration Module
> ============================
>
> -The MIPI TX configuration module controls the MIPI D-PHY.
> -
> -Required properties:
> -- compatible: "mediatek,<chip>-mipi-tx"
> -- the supported chips are mt2701, 7623, mt8173 and mt8183.
> -- reg: Physical base address and length of the controller's registers
> -- clocks: PLL reference clock
> -- clock-output-names: name of the output clock line to the DSI encoder
> -- #clock-cells: must be <0>;
> -- #phy-cells: must be <0>.
> -
> -Optional properties:
> -- drive-strength-microamp: adjust driving current, should be 3000 ~ 6000. And
> - the step is 200.
> -- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
> - unspecified default values shall be used.
> -- nvmem-cell-names: Should be "calibration-data"
> +See phy/mediatek,dsi-phy.yaml
>
> Example:
>
> diff --git a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
> new file mode 100644
> index 000000000000..87f8df251ab0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
> @@ -0,0 +1,83 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2020 MediaTek
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/mediatek,dsi-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek MIPI Display Serial Interface (DSI) PHY binding
> +
> +maintainers:
> + - Chun-Kuang Hu <chunkuang.hu@kernel.org>
> + - Chunfeng Yun <chunfeng.yun@mediatek.com>
> +
> +description: The MIPI DSI PHY supports up to 4-lane output.
> +
> +properties:
> + $nodename:
> + pattern: "^dsi-phy@[0-9a-f]+$"
> +
> + compatible:
> + enum:
> + - mediatek,mt2701-mipi-tx
> + - mediatek,mt7623-mipi-tx
> + - mediatek,mt8173-mipi-tx
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: PLL reference clock
> +
> + clock-output-names:
> + maxItems: 1
> +
> + "#phy-cells":
> + const: 0
> +
> + "#clock-cells":
> + const: 0
> +
> + nvmem-cells:
> + maxItems: 1
> + description: A phandle to the calibration data provided by a nvmem device,
> + if unspecified, default values shall be used.
> +
> + nvmem-cell-names:
> + items:
> + - const: calibration-data
> +
> + drive-strength-microamp:
> + description: adjust driving current, the step is 200.
multipleOf: 200
> + $ref: /schemas/types.yaml#/definitions/uint32
Can drop. Standard unit suffixes have a type already.
> + minimum: 2000
> + maximum: 6000
> + default: 4600
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-output-names
> + - "#phy-cells"
> + - "#clock-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/mt8173-clk.h>
> + dsi-phy@10215000 {
> + compatible = "mediatek,mt8173-mipi-tx";
> + reg = <0x10215000 0x1000>;
> + clocks = <&clk26m>;
> + clock-output-names = "mipi_tx0_pll";
> + drive-strength-microamp = <4000>;
> + nvmem-cells= <&mipi_tx_calibration>;
> + nvmem-cell-names = "calibration-data";
> + #clock-cells = <0>;
> + #phy-cells = <0>;
> + };
> +
> +...
> --
> 2.18.0
>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 09/11] dt-bindings: usb: convert mediatek, mtk-xhci.txt to YAML schema
2020-11-18 8:21 ` [PATCH v3 09/11] dt-bindings: usb: convert mediatek, mtk-xhci.txt " Chunfeng Yun
@ 2020-12-07 21:24 ` Rob Herring
2020-12-08 9:11 ` [PATCH v3 09/11] dt-bindings: usb: convert mediatek,mtk-xhci.txt " Chunfeng Yun
0 siblings, 1 reply; 25+ messages in thread
From: Rob Herring @ 2020-12-07 21:24 UTC (permalink / raw)
To: Chunfeng Yun
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Vinod Koul, linux-mediatek,
netdev, Matthias Brugger, Jakub Kicinski, Stanley Chu,
David S . Miller, linux-arm-kernel
On Wed, Nov 18, 2020 at 04:21:24PM +0800, Chunfeng Yun wrote:
> Convert mediatek,mtk-xhci.txt to YAML schema mediatek,mtk-xhci.yaml
>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> ---
> v3:
> 1. fix yamllint warning
> 2. remove pinctrl* properties supported by default suggested by Rob
> 3. drop unused labels
> 4. modify description of mediatek,syscon-wakeup
> 5. remove type of imod-interval-ns
>
> v2: new patch
> ---
> .../bindings/usb/mediatek,mtk-xhci.txt | 121 -------------
> .../bindings/usb/mediatek,mtk-xhci.yaml | 171 ++++++++++++++++++
> 2 files changed, 171 insertions(+), 121 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
> create mode 100644 Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
>
> diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
> deleted file mode 100644
> index 42d8814f903a..000000000000
> --- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
> +++ /dev/null
> @@ -1,121 +0,0 @@
> -MT8173 xHCI
> -
> -The device node for Mediatek SOC USB3.0 host controller
> -
> -There are two scenarios: the first one only supports xHCI driver;
> -the second one supports dual-role mode, and the host is based on xHCI
> -driver. Take account of backward compatibility, we divide bindings
> -into two parts.
> -
> -1st: only supports xHCI driver
> -------------------------------------------------------------------------
> -
> -Required properties:
> - - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci",
> - soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
> - "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
> - addition, one of:
> - - "mediatek,mt8173-xhci"
> - - reg : specifies physical base address and size of the registers
> - - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
> - - interrupts : interrupt used by the controller
> - - power-domains : a phandle to USB power domain node to control USB's
> - mtcmos
> - - vusb33-supply : regulator of USB avdd3.3v
> -
> - - clocks : a list of phandle + clock-specifier pairs, one for each
> - entry in clock-names
> - - clock-names : must contain
> - "sys_ck": controller clock used by normal mode,
> - the following ones are optional:
> - "ref_ck": reference clock used by low power mode etc,
> - "mcu_ck": mcu_bus clock for register access,
> - "dma_ck": dma_bus clock for data transfer by DMA,
> - "xhci_ck": controller clock
> -
> - - phys : see usb-hcd.yaml in the current directory
> -
> -Optional properties:
> - - wakeup-source : enable USB remote wakeup;
> - - mediatek,syscon-wakeup : phandle to syscon used to access the register
> - of the USB wakeup glue layer between xHCI and SPM; it depends on
> - "wakeup-source", and has two arguments:
> - - the first one : register base address of the glue layer in syscon;
> - - the second one : hardware version of the glue layer
> - - 1 : used by mt8173 etc
> - - 2 : used by mt2712 etc
> - - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
> - bit1 for u3port1, ... etc;
> - - vbus-supply : reference to the VBUS regulator;
> - - usb3-lpm-capable : supports USB3.0 LPM
> - - pinctrl-names : a pinctrl state named "default" must be defined
> - - pinctrl-0 : pin control group
> - See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
> - - imod-interval-ns: default interrupt moderation interval is 5000ns
> -
> -additionally the properties from usb-hcd.yaml (in the current directory) are
> -supported.
> -
> -Example:
> -usb30: usb@11270000 {
> - compatible = "mediatek,mt8173-xhci";
> - reg = <0 0x11270000 0 0x1000>,
> - <0 0x11280700 0 0x0100>;
> - reg-names = "mac", "ippc";
> - interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
> - power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
> - clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>,
> - <&pericfg CLK_PERI_USB0>,
> - <&pericfg CLK_PERI_USB1>;
> - clock-names = "sys_ck", "ref_ck";
> - phys = <&phy_port0 PHY_TYPE_USB3>,
> - <&phy_port1 PHY_TYPE_USB2>;
> - vusb33-supply = <&mt6397_vusb_reg>;
> - vbus-supply = <&usb_p1_vbus>;
> - usb3-lpm-capable;
> - mediatek,syscon-wakeup = <&pericfg 0x400 1>;
> - wakeup-source;
> - imod-interval-ns = <10000>;
> -};
> -
> -2nd: dual-role mode with xHCI driver
> -------------------------------------------------------------------------
> -
> -In the case, xhci is added as subnode to mtu3. An example and the DT binding
> -details of mtu3 can be found in:
> -Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
> -
> -Required properties:
> - - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci",
> - soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
> - "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
> - addition, one of:
> - - "mediatek,mt8173-xhci"
> - - reg : specifies physical base address and size of the registers
> - - reg-names: should be "mac" for xHCI MAC
> - - interrupts : interrupt used by the host controller
> - - power-domains : a phandle to USB power domain node to control USB's
> - mtcmos
> - - vusb33-supply : regulator of USB avdd3.3v
> -
> - - clocks : a list of phandle + clock-specifier pairs, one for each
> - entry in clock-names
> - - clock-names : must contain "sys_ck", and the following ones are optional:
> - "ref_ck", "mcu_ck" and "dma_ck", "xhci_ck"
> -
> -Optional properties:
> - - vbus-supply : reference to the VBUS regulator;
> - - usb3-lpm-capable : supports USB3.0 LPM
> -
> -Example:
> -usb30: usb@11270000 {
> - compatible = "mediatek,mt8173-xhci";
> - reg = <0 0x11270000 0 0x1000>;
> - reg-names = "mac";
> - interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
> - power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
> - clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
> - clock-names = "sys_ck", "ref_ck";
> - vusb33-supply = <&mt6397_vusb_reg>;
> - usb3-lpm-capable;
> -};
> diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
> new file mode 100644
> index 000000000000..4a36ad5c4d25
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
> @@ -0,0 +1,171 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2020 MediaTek
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek USB3 xHCI Device Tree Bindings
> +
> +maintainers:
> + - Chunfeng Yun <chunfeng.yun@mediatek.com>
> +
> +allOf:
> + - $ref: "usb-hcd.yaml"
> +
> +description: |
> + There are two scenarios:
> + case 1: only supports xHCI driver;
> + case 2: supports dual-role mode, and the host is based on xHCI driver.
> +
> +properties:
> + # common properties for both case 1 and case 2
> + compatible:
> + items:
> + - enum:
> + - mediatek,mt2712-xhci
> + - mediatek,mt7622-xhci
> + - mediatek,mt7629-xhci
> + - mediatek,mt8173-xhci
> + - mediatek,mt8183-xhci
> + - const: mediatek,mtk-xhci
> +
> + reg:
> + minItems: 1
> + maxItems: 2
> + items:
> + - description: the registers of xHCI MAC
> + - description: the registers of IP Port Control
> +
> + reg-names:
> + minItems: 1
> + maxItems: 2
> + items:
> + - const: mac
> + - const: ippc # optional, only needed for case 1.
> +
> + interrupts:
> + maxItems: 1
> +
> + power-domains:
> + description: A phandle to USB power domain node to control USB's MTCMOS
> + maxItems: 1
> +
> + clocks:
> + minItems: 1
> + maxItems: 5
> + items:
> + - description: Controller clock used by normal mode
> + - description: Reference clock used by low power mode etc
> + - description: Mcu bus clock for register access
> + - description: DMA bus clock for data transfer
> + - description: controller clock
> +
> + clock-names:
> + minItems: 1
> + maxItems: 5
> + items:
> + - const: sys_ck # required, the following ones are optional
> + - const: ref_ck
> + - const: mcu_ck
> + - const: dma_ck
> + - const: xhci_ck
> +
> + phys:
> + $ref: /usb/usb-hcd.yaml#
That's not right.
You need 'items' and list each entry.
> + description: List of all the USB PHYs on this HCD
> +
> + vusb33-supply:
> + description: Regulator of USB AVDD3.3v
> +
> + vbus-supply:
> + description: Regulator of USB VBUS5v
> +
> + usb3-lpm-capable:
> + description: supports USB3.0 LPM
> + type: boolean
> +
> + imod-interval-ns:
> + description:
> + Interrupt moderation interval value, it is 8 times as much as that
> + defined in the xHCI spec on MTK's controller.
> + default: 5000
> +
> + # the following properties are only used for case 1
> + wakeup-source:
> + description: enable USB remote wakeup, see power/wakeup-source.txt
> + type: boolean
> +
> + mediatek,syscon-wakeup:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + maxItems: 1
> + description: |
> + A phandle to syscon used to access the register of the USB wakeup glue
> + layer between xHCI and SPM, the field should always be 3 cells long.
> +
> + items:
Indentation is wrong here. Should be 2 fewer spaces.
> + - description:
> + The first cell represents a phandle to syscon
> + - description:
> + The second cell represents the register base address of the glue
> + layer in syscon
> + - description:
> + The third cell represents the hardware version of the glue layer,
> + 1 is used by mt8173 etc, 2 is used by mt2712 etc
> + enum: [1, 2]
> +
> + mediatek,u3p-dis-msk:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: The mask to disable u3ports, bit0 for u3port0,
> + bit1 for u3port1, ... etc
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> +patternProperties:
> + "^[a-f]+@[0-9a-f]+$":
> + $ref: /usb/usb-hcd.yaml#
This $ref isn't right. You already referenced it at the top.
> + type: object
> + description: The hard wired USB devices.
> +
> +dependencies:
> + wakeup-source: [ 'mediatek,syscon-wakeup' ]
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - interrupts
> + - clocks
> + - clock-names
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/mt8173-clk.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/phy/phy.h>
> + #include <dt-bindings/power/mt8173-power.h>
> +
> + usb@11270000 {
> + compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
> + reg = <0x11270000 0x1000>, <0x11280700 0x0100>;
> + reg-names = "mac", "ippc";
> + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
> + power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
> + clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
> + clock-names = "sys_ck", "ref_ck";
> + phys = <&u3port0 PHY_TYPE_USB3>, <&u2port1 PHY_TYPE_USB2>;
> + vusb33-supply = <&mt6397_vusb_reg>;
> + vbus-supply = <&usb_p1_vbus>;
> + imod-interval-ns = <10000>;
> + mediatek,syscon-wakeup = <&pericfg 0x400 1>;
> + wakeup-source;
> + usb3-lpm-capable;
> + };
> +...
> --
> 2.18.0
>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 10/11] dt-bindings: usb: convert mediatek,mtu3.txt to YAML schema
2020-11-18 8:21 ` [PATCH v3 10/11] dt-bindings: usb: convert mediatek, mtu3.txt " Chunfeng Yun
@ 2020-12-07 21:30 ` Rob Herring
2020-12-08 9:18 ` Chunfeng Yun
0 siblings, 1 reply; 25+ messages in thread
From: Rob Herring @ 2020-12-07 21:30 UTC (permalink / raw)
To: Chunfeng Yun
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Vinod Koul, linux-mediatek,
netdev, Matthias Brugger, Jakub Kicinski, Stanley Chu,
David S . Miller, linux-arm-kernel
On Wed, Nov 18, 2020 at 04:21:25PM +0800, Chunfeng Yun wrote:
> Convert mediatek,mtu3.txt to YAML schema mediatek,mtu3.yaml
>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> ---
> v3:
> 1. fix yamllint warning
> 2. remove pinctrl* properties
> 3. remove unnecessary '|'
> 4. drop unused labels in example
>
> v2: new patch
> ---
> .../devicetree/bindings/usb/mediatek,mtu3.txt | 108 ---------
> .../bindings/usb/mediatek,mtu3.yaml | 218 ++++++++++++++++++
> 2 files changed, 218 insertions(+), 108 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
> create mode 100644 Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml
>
> diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
> deleted file mode 100644
> index a82ca438aec1..000000000000
> --- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
> +++ /dev/null
> @@ -1,108 +0,0 @@
> -The device node for Mediatek USB3.0 DRD controller
> -
> -Required properties:
> - - compatible : should be "mediatek,<soc-model>-mtu3", "mediatek,mtu3",
> - soc-model is the name of SoC, such as mt8173, mt2712 etc,
> - when using "mediatek,mtu3" compatible string, you need SoC specific
> - ones in addition, one of:
> - - "mediatek,mt8173-mtu3"
> - - reg : specifies physical base address and size of the registers
> - - reg-names: should be "mac" for device IP and "ippc" for IP port control
> - - interrupts : interrupt used by the device IP
> - - power-domains : a phandle to USB power domain node to control USB's
> - mtcmos
> - - vusb33-supply : regulator of USB avdd3.3v
> - - clocks : a list of phandle + clock-specifier pairs, one for each
> - entry in clock-names
> - - clock-names : must contain "sys_ck" for clock of controller,
> - the following clocks are optional:
> - "ref_ck", "mcu_ck" and "dma_ck";
> - - phys : see usb-hcd.yaml in the current directory
> - - dr_mode : should be one of "host", "peripheral" or "otg",
> - refer to usb/generic.txt
> -
> -Optional properties:
> - - #address-cells, #size-cells : should be '2' if the device has sub-nodes
> - with 'reg' property
> - - ranges : allows valid 1:1 translation between child's address space and
> - parent's address space
> - - extcon : external connector for vbus and idpin changes detection, needed
> - when supports dual-role mode.
> - it's considered valid for compatibility reasons, not allowed for
> - new bindings, and use "usb-role-switch" property instead.
> - - vbus-supply : reference to the VBUS regulator, needed when supports
> - dual-role mode.
> - it's considered valid for compatibility reasons, not allowed for
> - new bindings, and put into a usb-connector node.
> - see connector/usb-connector.yaml.
> - - pinctrl-names : a pinctrl state named "default" is optional, and need be
> - defined if auto drd switch is enabled, that means the property dr_mode
> - is set as "otg", and meanwhile the property "mediatek,enable-manual-drd"
> - is not set.
> - - pinctrl-0 : pin control group
> - See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
> -
> - - maximum-speed : valid arguments are "super-speed", "high-speed" and
> - "full-speed"; refer to usb/generic.txt
> - - usb-role-switch : use USB Role Switch to support dual-role switch, but
> - not extcon; see usb/generic.txt.
> - - enable-manual-drd : supports manual dual-role switch via debugfs; usually
> - used when receptacle is TYPE-A and also wants to support dual-role
> - mode.
> - - wakeup-source: enable USB remote wakeup of host mode.
> - - mediatek,syscon-wakeup : phandle to syscon used to access the register
> - of the USB wakeup glue layer between SSUSB and SPM; it depends on
> - "wakeup-source", and has two arguments:
> - - the first one : register base address of the glue layer in syscon;
> - - the second one : hardware version of the glue layer
> - - 1 : used by mt8173 etc
> - - 2 : used by mt2712 etc
> - - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
> - bit1 for u3port1, ... etc;
> -
> -additionally the properties from usb-hcd.yaml (in the current directory) are
> -supported.
> -
> -Sub-nodes:
> -The xhci should be added as subnode to mtu3 as shown in the following example
> -if host mode is enabled. The DT binding details of xhci can be found in:
> -Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
> -
> -The port would be added as subnode if use "usb-role-switch" property.
> - see graph.txt
> -
> -Example:
> -ssusb: usb@11271000 {
> - compatible = "mediatek,mt8173-mtu3";
> - reg = <0 0x11271000 0 0x3000>,
> - <0 0x11280700 0 0x0100>;
> - reg-names = "mac", "ippc";
> - interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
> - phys = <&phy_port0 PHY_TYPE_USB3>,
> - <&phy_port1 PHY_TYPE_USB2>;
> - power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
> - clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>,
> - <&pericfg CLK_PERI_USB0>,
> - <&pericfg CLK_PERI_USB1>;
> - clock-names = "sys_ck", "ref_ck";
> - vusb33-supply = <&mt6397_vusb_reg>;
> - vbus-supply = <&usb_p0_vbus>;
> - extcon = <&extcon_usb>;
> - dr_mode = "otg";
> - wakeup-source;
> - mediatek,syscon-wakeup = <&pericfg 0x400 1>;
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> -
> - usb_host: xhci@11270000 {
> - compatible = "mediatek,mt8173-xhci";
> - reg = <0 0x11270000 0 0x1000>;
> - reg-names = "mac";
> - interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
> - power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
> - clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
> - clock-names = "sys_ck", "ref_ck";
> - vusb33-supply = <&mt6397_vusb_reg>;
> - };
> -};
> diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml
> new file mode 100644
> index 000000000000..290e97a06f2a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml
> @@ -0,0 +1,218 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2020 MediaTek
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek USB3 DRD Controller Device Tree Bindings
> +
> +maintainers:
> + - Chunfeng Yun <chunfeng.yun@mediatek.com>
> +
> +description: |
> + The DRD controller has a glue layer IPPC (IP Port Control), and its host is
> + based on xHCI.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - mediatek,mt2712-mtu3
> + - mediatek,mt8173-mtu3
> + - mediatek,mt8183-mtu3
> + - const: mediatek,mtu3
> +
> + reg:
> + items:
> + - description: the registers of device MAC
> + - description: the registers of IP Port Control
> +
> + reg-names:
> + items:
> + - const: mac
> + - const: ippc
> +
> + interrupts:
> + maxItems: 1
> +
> + power-domains:
> + description: A phandle to USB power domain node to control USB's MTCMOS
> + maxItems: 1
> +
> + clocks:
> + minItems: 1
> + maxItems: 4
> + items:
> + - description: Controller clock used by normal mode
> + - description: Reference clock used by low power mode etc
> + - description: Mcu bus clock for register access
> + - description: DMA bus clock for data transfer
> +
> + clock-names:
> + minItems: 1
> + maxItems: 4
> + items:
> + - const: sys_ck # required, the following ones are optional
> + - const: ref_ck
> + - const: mcu_ck
> + - const: dma_ck
> +
> + phys:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
Drop. Need to say how many entries and what each one is if more than 1.
> + description: List of all the USB PHYs used
> +
> + vusb33-supply:
> + description: Regulator of USB AVDD3.3v
> +
> + vbus-supply:
> + $ref: /connector/usb-connector.yaml#
Nope.
> + deprecated: true
> + description: |
> + Regulator of USB VBUS5v, needed when supports dual-role mode.
> + Particularly, if use an output GPIO to control a VBUS regulator, should
> + model it as a regulator. See bindings/regulator/fixed-regulator.yaml
> + It's considered valid for compatibility reasons, not allowed for
> + new bindings, and put into a usb-connector node.
> +
> + dr_mode:
> + description: See usb/generic.txt
> + enum: [host, peripheral, otg]
> + default: otg
> +
> + maximum-speed:
> + description: See usb/generic.txt
> + enum: [super-speed-plus, super-speed, high-speed, full-speed]
> +
> + "#address-cells":
> + enum: [1, 2]
> +
> + "#size-cells":
> + enum: [1, 2]
> +
> + ranges: true
> +
> + extcon:
> + deprecated: true
> + description: |
> + Phandle to the extcon device detecting the IDDIG/VBUS state, neede
> + when supports dual-role mode.
> + It's considered valid for compatibility reasons, not allowed for
> + new bindings, and use "usb-role-switch" property instead.
> +
> + usb-role-switch:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: Support role switch. See usb/generic.txt
> + type: boolean
> +
> + connector:
> + $ref: /connector/usb-connector.yaml#
> + description:
> + Connector for dual role switch, especially for "gpio-usb-b-connector"
> + type: object
> +
> + port:
> + description:
> + Any connector to the data bus of this controller should be modelled
> + using the OF graph bindings specified, if the "usb-role-switch"
> + property is used. See graph.txt
> + type: object
Please include port and connector in the example.
> +
> + enable-manual-drd:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description:
> + supports manual dual-role switch via debugfs; usually used when
> + receptacle is TYPE-A and also wants to support dual-role mode.
> + type: boolean
> +
> + wakeup-source:
> + description: enable USB remote wakeup, see power/wakeup-source.txt
> + type: boolean
> +
> + mediatek,syscon-wakeup:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + maxItems: 1
> + description: |
> + A phandle to syscon used to access the register of the USB wakeup glue
> + layer between xHCI and SPM, the field should always be 3 cells long.
> +
> + items:
> + - description:
> + The first cell represents a phandle to syscon
> + - description:
> + The second cell represents the register base address of the glue
> + layer in syscon
> + - description:
> + The third cell represents the hardware version of the glue layer,
> + 1 is used by mt8173 etc, 2 is used by mt2712 etc
> + enum: [1, 2]
> +
> + mediatek,u3p-dis-msk:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: The mask to disable u3ports, bit0 for u3port0,
> + bit1 for u3port1, ... etc
> +
> +# Required child node when support dual-role
> +patternProperties:
> + "^usb@[0-9a-f]+$":
> + type: object
> + $ref: /usb/mediatek,mtk-xhci.yaml#
> + description:
> + The xhci should be added as subnode to mtu3 as shown in the following
> + example if the host mode is enabled.
> +
> +dependencies:
> + connector: [ 'usb-role-switch' ]
> + port: [ 'usb-role-switch' ]
> + wakeup-source: [ 'mediatek,syscon-wakeup' ]
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - interrupts
> + - clocks
> + - clock-names
> + - phys
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/mt8173-clk.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/phy/phy.h>
> + #include <dt-bindings/power/mt8173-power.h>
> +
> + usb@11271000 {
> + compatible = "mediatek,mt8173-mtu3", "mediatek,mtu3";
> + reg = <0x11271000 0x3000>, <0x11280700 0x0100>;
> + reg-names = "mac", "ippc";
> + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
> + phys = <&phy_port0 PHY_TYPE_USB3>, <&phy_port1 PHY_TYPE_USB2>;
> + power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
> + clocks = <&topckgen CLK_TOP_USB30_SEL>;
> + clock-names = "sys_ck";
> + vusb33-supply = <&mt6397_vusb_reg>;
> + vbus-supply = <&usb_p0_vbus>;
> + extcon = <&extcon_usb>;
> + dr_mode = "otg";
> + wakeup-source;
> + mediatek,syscon-wakeup = <&pericfg 0x400 1>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + xhci: usb@11270000 {
> + compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
> + reg = <0x11270000 0x1000>;
> + reg-names = "mac";
> + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
> + power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
> + clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
> + clock-names = "sys_ck", "ref_ck";
> + vusb33-supply = <&mt6397_vusb_reg>;
> + };
Please add
> + };
> +...
> --
> 2.18.0
>
_______________________________________________
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 07/11] dt-bindings: phy: convert MIP DSI PHY binding to YAML schema
2020-12-07 21:19 ` Rob Herring
@ 2020-12-08 2:00 ` Chunfeng Yun
0 siblings, 0 replies; 25+ messages in thread
From: Chunfeng Yun @ 2020-12-08 2:00 UTC (permalink / raw)
To: Rob Herring
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Vinod Koul, linux-mediatek,
netdev, Matthias Brugger, Jakub Kicinski, Stanley Chu,
David S . Miller, linux-arm-kernel
On Mon, 2020-12-07 at 15:19 -0600, Rob Herring wrote:
> On Wed, Nov 18, 2020 at 04:21:22PM +0800, Chunfeng Yun wrote:
> > Convert MIPI DSI PHY binding to YAML schema mediatek,dsi-phy.yaml
> >
> > Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org>
> > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> > ---
> > v3: new patch
> > ---
> > .../display/mediatek/mediatek,dsi.txt | 18 +---
> > .../bindings/phy/mediatek,dsi-phy.yaml | 83 +++++++++++++++++++
> > 2 files changed, 84 insertions(+), 17 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> > index f06f24d405a5..8238a86686be 100644
> > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> > @@ -22,23 +22,7 @@ Required properties:
> > MIPI TX Configuration Module
> > ============================
> >
> > -The MIPI TX configuration module controls the MIPI D-PHY.
> > -
> > -Required properties:
> > -- compatible: "mediatek,<chip>-mipi-tx"
> > -- the supported chips are mt2701, 7623, mt8173 and mt8183.
> > -- reg: Physical base address and length of the controller's registers
> > -- clocks: PLL reference clock
> > -- clock-output-names: name of the output clock line to the DSI encoder
> > -- #clock-cells: must be <0>;
> > -- #phy-cells: must be <0>.
> > -
> > -Optional properties:
> > -- drive-strength-microamp: adjust driving current, should be 3000 ~ 6000. And
> > - the step is 200.
> > -- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
> > - unspecified default values shall be used.
> > -- nvmem-cell-names: Should be "calibration-data"
> > +See phy/mediatek,dsi-phy.yaml
> >
> > Example:
> >
> > diff --git a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
> > new file mode 100644
> > index 000000000000..87f8df251ab0
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
> > @@ -0,0 +1,83 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +# Copyright (c) 2020 MediaTek
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/phy/mediatek,dsi-phy.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek MIPI Display Serial Interface (DSI) PHY binding
> > +
> > +maintainers:
> > + - Chun-Kuang Hu <chunkuang.hu@kernel.org>
> > + - Chunfeng Yun <chunfeng.yun@mediatek.com>
> > +
> > +description: The MIPI DSI PHY supports up to 4-lane output.
> > +
> > +properties:
> > + $nodename:
> > + pattern: "^dsi-phy@[0-9a-f]+$"
> > +
> > + compatible:
> > + enum:
> > + - mediatek,mt2701-mipi-tx
> > + - mediatek,mt7623-mipi-tx
> > + - mediatek,mt8173-mipi-tx
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + clocks:
> > + items:
> > + - description: PLL reference clock
> > +
> > + clock-output-names:
> > + maxItems: 1
> > +
> > + "#phy-cells":
> > + const: 0
> > +
> > + "#clock-cells":
> > + const: 0
> > +
> > + nvmem-cells:
> > + maxItems: 1
> > + description: A phandle to the calibration data provided by a nvmem device,
> > + if unspecified, default values shall be used.
> > +
> > + nvmem-cell-names:
> > + items:
> > + - const: calibration-data
> > +
> > + drive-strength-microamp:
> > + description: adjust driving current, the step is 200.
>
> multipleOf: 200
Got it.
>
> > + $ref: /schemas/types.yaml#/definitions/uint32
>
> Can drop. Standard unit suffixes have a type already.
Ok, thanks a lot
>
> > + minimum: 2000
> > + maximum: 6000
> > + default: 4600
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - clocks
> > + - clock-output-names
> > + - "#phy-cells"
> > + - "#clock-cells"
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/mt8173-clk.h>
> > + dsi-phy@10215000 {
> > + compatible = "mediatek,mt8173-mipi-tx";
> > + reg = <0x10215000 0x1000>;
> > + clocks = <&clk26m>;
> > + clock-output-names = "mipi_tx0_pll";
> > + drive-strength-microamp = <4000>;
> > + nvmem-cells= <&mipi_tx_calibration>;
> > + nvmem-cell-names = "calibration-data";
> > + #clock-cells = <0>;
> > + #phy-cells = <0>;
> > + };
> > +
> > +...
> > --
> > 2.18.0
> >
_______________________________________________
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 09/11] dt-bindings: usb: convert mediatek,mtk-xhci.txt to YAML schema
2020-12-07 21:24 ` Rob Herring
@ 2020-12-08 9:11 ` Chunfeng Yun
0 siblings, 0 replies; 25+ messages in thread
From: Chunfeng Yun @ 2020-12-08 9:11 UTC (permalink / raw)
To: Rob Herring
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Vinod Koul, linux-mediatek,
netdev, Matthias Brugger, Jakub Kicinski, Stanley Chu,
David S . Miller, linux-arm-kernel
On Mon, 2020-12-07 at 15:24 -0600, Rob Herring wrote:
> On Wed, Nov 18, 2020 at 04:21:24PM +0800, Chunfeng Yun wrote:
> > Convert mediatek,mtk-xhci.txt to YAML schema mediatek,mtk-xhci.yaml
> >
> > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> > ---
> > v3:
> > 1. fix yamllint warning
> > 2. remove pinctrl* properties supported by default suggested by Rob
> > 3. drop unused labels
> > 4. modify description of mediatek,syscon-wakeup
> > 5. remove type of imod-interval-ns
> >
> > v2: new patch
> > ---
> > .../bindings/usb/mediatek,mtk-xhci.txt | 121 -------------
> > .../bindings/usb/mediatek,mtk-xhci.yaml | 171 ++++++++++++++++++
> > 2 files changed, 171 insertions(+), 121 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
> > create mode 100644 Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
[...]
> > diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
> > new file mode 100644
> > index 000000000000..4a36ad5c4d25
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
> > @@ -0,0 +1,171 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +# Copyright (c) 2020 MediaTek
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek USB3 xHCI Device Tree Bindings
> > +
> > +maintainers:
> > + - Chunfeng Yun <chunfeng.yun@mediatek.com>
> > +
> > +allOf:
> > + - $ref: "usb-hcd.yaml"
> > +
> > +description: |
> > + There are two scenarios:
> > + case 1: only supports xHCI driver;
> > + case 2: supports dual-role mode, and the host is based on xHCI driver.
> > +
> > +properties:
> > + # common properties for both case 1 and case 2
> > + compatible:
> > + items:
> > + - enum:
> > + - mediatek,mt2712-xhci
> > + - mediatek,mt7622-xhci
> > + - mediatek,mt7629-xhci
> > + - mediatek,mt8173-xhci
> > + - mediatek,mt8183-xhci
> > + - const: mediatek,mtk-xhci
> > +
> > + reg:
> > + minItems: 1
> > + maxItems: 2
> > + items:
> > + - description: the registers of xHCI MAC
> > + - description: the registers of IP Port Control
> > +
> > + reg-names:
> > + minItems: 1
> > + maxItems: 2
> > + items:
> > + - const: mac
> > + - const: ippc # optional, only needed for case 1.
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + power-domains:
> > + description: A phandle to USB power domain node to control USB's MTCMOS
> > + maxItems: 1
> > +
> > + clocks:
> > + minItems: 1
> > + maxItems: 5
> > + items:
> > + - description: Controller clock used by normal mode
> > + - description: Reference clock used by low power mode etc
> > + - description: Mcu bus clock for register access
> > + - description: DMA bus clock for data transfer
> > + - description: controller clock
> > +
> > + clock-names:
> > + minItems: 1
> > + maxItems: 5
> > + items:
> > + - const: sys_ck # required, the following ones are optional
> > + - const: ref_ck
> > + - const: mcu_ck
> > + - const: dma_ck
> > + - const: xhci_ck
> > +
> > + phys:
> > + $ref: /usb/usb-hcd.yaml#
>
> That's not right.
>
> You need 'items' and list each entry.
Will add minItems/maxItems instead due to it's variable and phy-names is
not used
>
> > + description: List of all the USB PHYs on this HCD
> > +
> > + vusb33-supply:
> > + description: Regulator of USB AVDD3.3v
> > +
> > + vbus-supply:
> > + description: Regulator of USB VBUS5v
> > +
> > + usb3-lpm-capable:
> > + description: supports USB3.0 LPM
> > + type: boolean
> > +
> > + imod-interval-ns:
> > + description:
> > + Interrupt moderation interval value, it is 8 times as much as that
> > + defined in the xHCI spec on MTK's controller.
> > + default: 5000
> > +
> > + # the following properties are only used for case 1
> > + wakeup-source:
> > + description: enable USB remote wakeup, see power/wakeup-source.txt
> > + type: boolean
> > +
> > + mediatek,syscon-wakeup:
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > + maxItems: 1
> > + description: |
> > + A phandle to syscon used to access the register of the USB wakeup glue
> > + layer between xHCI and SPM, the field should always be 3 cells long.
> > +
> > + items:
>
> Indentation is wrong here. Should be 2 fewer spaces.
Will fix it
>
> > + - description:
> > + The first cell represents a phandle to syscon
> > + - description:
> > + The second cell represents the register base address of the glue
> > + layer in syscon
> > + - description:
> > + The third cell represents the hardware version of the glue layer,
> > + 1 is used by mt8173 etc, 2 is used by mt2712 etc
> > + enum: [1, 2]
> > +
> > + mediatek,u3p-dis-msk:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description: The mask to disable u3ports, bit0 for u3port0,
> > + bit1 for u3port1, ... etc
> > +
> > + "#address-cells":
> > + const: 1
> > +
> > + "#size-cells":
> > + const: 0
> > +
> > +patternProperties:
> > + "^[a-f]+@[0-9a-f]+$":
> > + $ref: /usb/usb-hcd.yaml#
>
> This $ref isn't right. You already referenced it at the top.
Will drop it
Thank you
>
> > + type: object
> > + description: The hard wired USB devices.
> > +
> > +dependencies:
> > + wakeup-source: [ 'mediatek,syscon-wakeup' ]
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - reg-names
> > + - interrupts
> > + - clocks
> > + - clock-names
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/mt8173-clk.h>
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > + #include <dt-bindings/interrupt-controller/irq.h>
> > + #include <dt-bindings/phy/phy.h>
> > + #include <dt-bindings/power/mt8173-power.h>
> > +
> > + usb@11270000 {
> > + compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
> > + reg = <0x11270000 0x1000>, <0x11280700 0x0100>;
> > + reg-names = "mac", "ippc";
> > + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
> > + power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
> > + clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
> > + clock-names = "sys_ck", "ref_ck";
> > + phys = <&u3port0 PHY_TYPE_USB3>, <&u2port1 PHY_TYPE_USB2>;
> > + vusb33-supply = <&mt6397_vusb_reg>;
> > + vbus-supply = <&usb_p1_vbus>;
> > + imod-interval-ns = <10000>;
> > + mediatek,syscon-wakeup = <&pericfg 0x400 1>;
> > + wakeup-source;
> > + usb3-lpm-capable;
> > + };
> > +...
> > --
> > 2.18.0
> >
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 10/11] dt-bindings: usb: convert mediatek,mtu3.txt to YAML schema
2020-12-07 21:30 ` [PATCH v3 10/11] dt-bindings: usb: convert mediatek,mtu3.txt " Rob Herring
@ 2020-12-08 9:18 ` Chunfeng Yun
0 siblings, 0 replies; 25+ messages in thread
From: Chunfeng Yun @ 2020-12-08 9:18 UTC (permalink / raw)
To: Rob Herring
Cc: Chun-Kuang Hu, Min Guo, devicetree, David Airlie,
Greg Kroah-Hartman, linux-usb, linux-kernel, dri-devel,
Kishon Vijay Abraham I, Serge Semin, Vinod Koul, linux-mediatek,
netdev, Matthias Brugger, Jakub Kicinski, Stanley Chu,
David S . Miller, linux-arm-kernel
On Mon, 2020-12-07 at 15:30 -0600, Rob Herring wrote:
> On Wed, Nov 18, 2020 at 04:21:25PM +0800, Chunfeng Yun wrote:
> > Convert mediatek,mtu3.txt to YAML schema mediatek,mtu3.yaml
> >
> > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> > ---
> > v3:
> > 1. fix yamllint warning
> > 2. remove pinctrl* properties
> > 3. remove unnecessary '|'
> > 4. drop unused labels in example
> >
> > v2: new patch
> > ---
> > .../devicetree/bindings/usb/mediatek,mtu3.txt | 108 ---------
> > .../bindings/usb/mediatek,mtu3.yaml | 218 ++++++++++++++++++
> > 2 files changed, 218 insertions(+), 108 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
> > create mode 100644 Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml
> >
[...]
> > diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml
> > new file mode 100644
> > index 000000000000..290e97a06f2a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml
> > @@ -0,0 +1,218 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +# Copyright (c) 2020 MediaTek
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek USB3 DRD Controller Device Tree Bindings
> > +
> > +maintainers:
> > + - Chunfeng Yun <chunfeng.yun@mediatek.com>
> > +
> > +description: |
> > + The DRD controller has a glue layer IPPC (IP Port Control), and its host is
> > + based on xHCI.
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - enum:
> > + - mediatek,mt2712-mtu3
> > + - mediatek,mt8173-mtu3
> > + - mediatek,mt8183-mtu3
> > + - const: mediatek,mtu3
> > +
> > + reg:
> > + items:
> > + - description: the registers of device MAC
> > + - description: the registers of IP Port Control
> > +
> > + reg-names:
> > + items:
> > + - const: mac
> > + - const: ippc
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + power-domains:
> > + description: A phandle to USB power domain node to control USB's MTCMOS
> > + maxItems: 1
> > +
> > + clocks:
> > + minItems: 1
> > + maxItems: 4
> > + items:
> > + - description: Controller clock used by normal mode
> > + - description: Reference clock used by low power mode etc
> > + - description: Mcu bus clock for register access
> > + - description: DMA bus clock for data transfer
> > +
> > + clock-names:
> > + minItems: 1
> > + maxItems: 4
> > + items:
> > + - const: sys_ck # required, the following ones are optional
> > + - const: ref_ck
> > + - const: mcu_ck
> > + - const: dma_ck
> > +
> > + phys:
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
>
> Drop. Need to say how many entries and what each one is if more than 1.
Ok
>
> > + description: List of all the USB PHYs used
> > +
> > + vusb33-supply:
> > + description: Regulator of USB AVDD3.3v
> > +
> > + vbus-supply:
> > + $ref: /connector/usb-connector.yaml#
>
> Nope.
Will remove it
>
> > + deprecated: true
> > + description: |
> > + Regulator of USB VBUS5v, needed when supports dual-role mode.
> > + Particularly, if use an output GPIO to control a VBUS regulator, should
> > + model it as a regulator. See bindings/regulator/fixed-regulator.yaml
> > + It's considered valid for compatibility reasons, not allowed for
> > + new bindings, and put into a usb-connector node.
> > +
> > + dr_mode:
> > + description: See usb/generic.txt
> > + enum: [host, peripheral, otg]
> > + default: otg
> > +
> > + maximum-speed:
> > + description: See usb/generic.txt
> > + enum: [super-speed-plus, super-speed, high-speed, full-speed]
> > +
> > + "#address-cells":
> > + enum: [1, 2]
> > +
> > + "#size-cells":
> > + enum: [1, 2]
> > +
> > + ranges: true
> > +
> > + extcon:
> > + deprecated: true
> > + description: |
> > + Phandle to the extcon device detecting the IDDIG/VBUS state, neede
> > + when supports dual-role mode.
> > + It's considered valid for compatibility reasons, not allowed for
> > + new bindings, and use "usb-role-switch" property instead.
> > +
> > + usb-role-switch:
> > + $ref: /schemas/types.yaml#/definitions/flag
> > + description: Support role switch. See usb/generic.txt
> > + type: boolean
> > +
> > + connector:
> > + $ref: /connector/usb-connector.yaml#
> > + description:
> > + Connector for dual role switch, especially for "gpio-usb-b-connector"
> > + type: object
> > +
> > + port:
> > + description:
> > + Any connector to the data bus of this controller should be modelled
> > + using the OF graph bindings specified, if the "usb-role-switch"
> > + property is used. See graph.txt
> > + type: object
>
> Please include port and connector in the example.
Ok, thanks
>
> > +
> > + enable-manual-drd:
> > + $ref: /schemas/types.yaml#/definitions/flag
> > + description:
> > + supports manual dual-role switch via debugfs; usually used when
> > + receptacle is TYPE-A and also wants to support dual-role mode.
> > + type: boolean
> > +
> > + wakeup-source:
> > + description: enable USB remote wakeup, see power/wakeup-source.txt
> > + type: boolean
> > +
> > + mediatek,syscon-wakeup:
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > + maxItems: 1
> > + description: |
> > + A phandle to syscon used to access the register of the USB wakeup glue
> > + layer between xHCI and SPM, the field should always be 3 cells long.
> > +
> > + items:
> > + - description:
> > + The first cell represents a phandle to syscon
> > + - description:
> > + The second cell represents the register base address of the glue
> > + layer in syscon
> > + - description:
> > + The third cell represents the hardware version of the glue layer,
> > + 1 is used by mt8173 etc, 2 is used by mt2712 etc
> > + enum: [1, 2]
> > +
> > + mediatek,u3p-dis-msk:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description: The mask to disable u3ports, bit0 for u3port0,
> > + bit1 for u3port1, ... etc
> > +
> > +# Required child node when support dual-role
> > +patternProperties:
> > + "^usb@[0-9a-f]+$":
> > + type: object
> > + $ref: /usb/mediatek,mtk-xhci.yaml#
> > + description:
> > + The xhci should be added as subnode to mtu3 as shown in the following
> > + example if the host mode is enabled.
> > +
> > +dependencies:
> > + connector: [ 'usb-role-switch' ]
> > + port: [ 'usb-role-switch' ]
> > + wakeup-source: [ 'mediatek,syscon-wakeup' ]
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - reg-names
> > + - interrupts
> > + - clocks
> > + - clock-names
> > + - phys
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/mt8173-clk.h>
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > + #include <dt-bindings/interrupt-controller/irq.h>
> > + #include <dt-bindings/phy/phy.h>
> > + #include <dt-bindings/power/mt8173-power.h>
> > +
> > + usb@11271000 {
> > + compatible = "mediatek,mt8173-mtu3", "mediatek,mtu3";
> > + reg = <0x11271000 0x3000>, <0x11280700 0x0100>;
> > + reg-names = "mac", "ippc";
> > + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
> > + phys = <&phy_port0 PHY_TYPE_USB3>, <&phy_port1 PHY_TYPE_USB2>;
> > + power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
> > + clocks = <&topckgen CLK_TOP_USB30_SEL>;
> > + clock-names = "sys_ck";
> > + vusb33-supply = <&mt6397_vusb_reg>;
> > + vbus-supply = <&usb_p0_vbus>;
> > + extcon = <&extcon_usb>;
> > + dr_mode = "otg";
> > + wakeup-source;
> > + mediatek,syscon-wakeup = <&pericfg 0x400 1>;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges;
> > +
> > + xhci: usb@11270000 {
> > + compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
> > + reg = <0x11270000 0x1000>;
> > + reg-names = "mac";
> > + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
> > + power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
> > + clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
> > + clock-names = "sys_ck", "ref_ck";
> > + vusb33-supply = <&mt6397_vusb_reg>;
> > + };
>
> Please add
> > + };
> > +...
> > --
> > 2.18.0
> >
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^ permalink raw reply [flat|nested] 25+ messages in thread
end of thread, other threads:[~2020-12-09 8:32 UTC | newest]
Thread overview: 25+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-11-18 8:21 [PATCH v3 01/11] dt-bindings: usb: convert usb-device.txt to YAML schema Chunfeng Yun
2020-11-18 8:21 ` [PATCH v3 02/11] dt-bindings: net: btusb: change reference file name Chunfeng Yun
2020-11-18 8:21 ` [PATCH v3 03/11] dt-bindings: phy: convert phy-mtk-xsphy.txt to YAML schema Chunfeng Yun
2020-12-07 21:15 ` Rob Herring
2020-11-18 8:21 ` [PATCH v3 04/11] dt-bindings: phy: convert phy-mtk-tphy.txt " Chunfeng Yun
2020-12-07 21:17 ` Rob Herring
2020-11-18 8:21 ` [PATCH v3 05/11] dt-bindings: phy: convert phy-mtk-ufs.txt " Chunfeng Yun
2020-11-18 9:18 ` Stanley Chu
2020-11-18 8:21 ` [PATCH v3 06/11] dt-bindings: phy: convert HDMI PHY binding " Chunfeng Yun
2020-11-19 23:42 ` Chun-Kuang Hu
2020-11-20 2:25 ` Chunfeng Yun
2020-11-18 8:21 ` [PATCH v3 07/11] dt-bindings: phy: convert MIP DSI " Chunfeng Yun
2020-11-19 23:38 ` Chun-Kuang Hu
2020-11-20 2:22 ` Chunfeng Yun
2020-12-07 21:19 ` Rob Herring
2020-12-08 2:00 ` Chunfeng Yun
2020-11-18 8:21 ` [PATCH v3 08/11] dt-bindings: usb: convert mediatek, musb.txt " Chunfeng Yun
2020-11-18 8:21 ` [PATCH v3 09/11] dt-bindings: usb: convert mediatek, mtk-xhci.txt " Chunfeng Yun
2020-12-07 21:24 ` Rob Herring
2020-12-08 9:11 ` [PATCH v3 09/11] dt-bindings: usb: convert mediatek,mtk-xhci.txt " Chunfeng Yun
2020-11-18 8:21 ` [PATCH v3 10/11] dt-bindings: usb: convert mediatek, mtu3.txt " Chunfeng Yun
2020-12-07 21:30 ` [PATCH v3 10/11] dt-bindings: usb: convert mediatek,mtu3.txt " Rob Herring
2020-12-08 9:18 ` Chunfeng Yun
2020-11-18 8:21 ` [PATCH v3 11/11] MAINTAINERS: update MediaTek PHY/USB entry Chunfeng Yun
2020-11-18 21:23 ` [PATCH v3 01/11] dt-bindings: usb: convert usb-device.txt to YAML schema Rob Herring
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