From: Vinod Polimera <quic_vpolimer@quicinc.com>
To: <dri-devel@lists.freedesktop.org>,
<linux-arm-msm@vger.kernel.org>,
<freedreno@lists.freedesktop.org>, <devicetree@vger.kernel.org>
Cc: quic_kalyant@quicinc.com, quic_sbillaka@quicinc.com,
quic_bjorande@quicinc.com, quic_abhinavk@quicinc.com,
quic_vproddut@quicinc.com, quic_khsieh@quicinc.com,
dianders@chromium.org, linux-kernel@vger.kernel.org,
dmitry.baryshkov@linaro.org, swboyd@chromium.org,
Vinod Polimera <quic_vpolimer@quicinc.com>
Subject: [PATCH v14 10/14] drm/msm/dp: use the eDP bridge ops to validate eDP modes
Date: Thu, 2 Mar 2023 22:03:13 +0530 [thread overview]
Message-ID: <1677774797-31063-11-git-send-email-quic_vpolimer@quicinc.com> (raw)
In-Reply-To: <1677774797-31063-1-git-send-email-quic_vpolimer@quicinc.com>
The eDP and DP interfaces shared the bridge operations and
the eDP specific changes were implemented under is_edp check.
To add psr support for eDP, we started using a new set of eDP
bridge ops. We are moving the eDP specific code in the
dp_bridge_mode_valid function to a new eDP function,
edp_bridge_mode_valid under the eDP bridge ops.
Signed-off-by: Sankeerth Billakanti <quic_sbillaka@quicinc.com>
Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/dp/dp_display.c | 8 --------
drivers/gpu/drm/msm/dp/dp_drm.c | 34 +++++++++++++++++++++++++++++++++-
2 files changed, 33 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
index 86ed80c..ffb21a6 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -996,14 +996,6 @@ enum drm_mode_status dp_bridge_mode_valid(struct drm_bridge *bridge,
return -EINVAL;
}
- /*
- * The eDP controller currently does not have a reliable way of
- * enabling panel power to read sink capabilities. So, we rely
- * on the panel driver to populate only supported modes for now.
- */
- if (dp->is_edp)
- return MODE_OK;
-
if (mode->clock > DP_MAX_PIXEL_CLK_KHZ)
return MODE_CLOCK_HIGH;
diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c b/drivers/gpu/drm/msm/dp/dp_drm.c
index 3b38bd9..029e08c 100644
--- a/drivers/gpu/drm/msm/dp/dp_drm.c
+++ b/drivers/gpu/drm/msm/dp/dp_drm.c
@@ -226,12 +226,44 @@ static void edp_bridge_atomic_post_disable(struct drm_bridge *drm_bridge,
dp_bridge_atomic_post_disable(drm_bridge, old_bridge_state);
}
+/**
+ * edp_bridge_mode_valid - callback to determine if specified mode is valid
+ * @bridge: Pointer to drm bridge structure
+ * @info: display info
+ * @mode: Pointer to drm mode structure
+ * Returns: Validity status for specified mode
+ */
+static enum drm_mode_status edp_bridge_mode_valid(struct drm_bridge *bridge,
+ const struct drm_display_info *info,
+ const struct drm_display_mode *mode)
+{
+ struct msm_dp *dp;
+ int mode_pclk_khz = mode->clock;
+
+ dp = to_dp_bridge(bridge)->dp_display;
+
+ if (!dp || !mode_pclk_khz || !dp->connector) {
+ DRM_ERROR("invalid params\n");
+ return -EINVAL;
+ }
+
+ if (mode->clock > DP_MAX_PIXEL_CLK_KHZ)
+ return MODE_CLOCK_HIGH;
+
+ /*
+ * The eDP controller currently does not have a reliable way of
+ * enabling panel power to read sink capabilities. So, we rely
+ * on the panel driver to populate only supported modes for now.
+ */
+ return MODE_OK;
+}
+
static const struct drm_bridge_funcs edp_bridge_ops = {
.atomic_enable = edp_bridge_atomic_enable,
.atomic_disable = edp_bridge_atomic_disable,
.atomic_post_disable = edp_bridge_atomic_post_disable,
.mode_set = dp_bridge_mode_set,
- .mode_valid = dp_bridge_mode_valid,
+ .mode_valid = edp_bridge_mode_valid,
.atomic_reset = drm_atomic_helper_bridge_reset,
.atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
--
2.7.4
next prev parent reply other threads:[~2023-03-02 16:34 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-02 16:33 [PATCH v14 00/14] Add PSR support for eDP Vinod Polimera
2023-03-02 16:33 ` [PATCH v14 01/14] drm: add helper functions to retrieve old and new crtc Vinod Polimera
2023-03-02 16:33 ` [PATCH v14 02/14] drm/bridge: use atomic enable/disable callbacks for panel bridge Vinod Polimera
2023-03-02 16:33 ` [PATCH v14 03/14] drm/bridge: add psr support for panel bridge callbacks Vinod Polimera
2023-03-02 16:33 ` [PATCH v14 04/14] drm/msm/disp/dpu: check for crtc enable rather than crtc active to release shared resources Vinod Polimera
2023-03-02 16:33 ` [PATCH v14 05/14] drm/msm/disp/dpu: get timing engine status from intf status register Vinod Polimera
2023-03-02 16:33 ` [PATCH v14 06/14] drm/msm/disp/dpu: wait for extra vsync till timing engine status is disabled Vinod Polimera
2023-03-02 16:33 ` [PATCH v14 07/14] drm/msm/disp/dpu: reset the datapath after timing engine disable Vinod Polimera
2023-03-02 16:33 ` [PATCH v14 08/14] drm/msm/dp: use atomic callbacks for DP bridge ops Vinod Polimera
2023-03-02 16:33 ` [PATCH v14 09/14] drm/msm/dp: Add basic PSR support for eDP Vinod Polimera
2023-03-02 16:33 ` Vinod Polimera [this message]
2023-03-02 16:33 ` [PATCH v14 11/14] drm/msm/disp/dpu: use atomic enable/disable callbacks for encoder functions Vinod Polimera
2023-03-02 16:33 ` [PATCH v14 12/14] drm/msm/disp/dpu: add PSR support for eDP interface in dpu driver Vinod Polimera
2023-03-02 16:33 ` [PATCH v14 13/14] drm/msm/disp/dpu: update dpu_enc crtc state on crtc enable/disable during self refresh Vinod Polimera
2023-03-14 10:32 ` Vinod Polimera
2023-03-02 16:33 ` [PATCH v14 14/14] drm/msm/dp: set self refresh aware based on PSR support Vinod Polimera
2023-03-02 16:40 ` Dmitry Baryshkov
2023-03-26 16:27 ` Bjorn Andersson
2023-03-26 16:35 ` Bjorn Andersson
2023-03-27 16:27 ` Stephen Boyd
2023-03-29 15:16 ` Vinod Polimera
2023-03-29 15:47 ` Doug Anderson
2023-03-30 14:23 ` Doug Anderson
2023-03-30 14:27 ` Vinod Polimera
2023-03-26 22:02 ` Dmitry Baryshkov
2023-03-06 17:35 ` [PATCH v14 00/14] Add PSR support for eDP Doug Anderson
2023-03-07 13:54 ` Dmitry Baryshkov
2023-03-16 0:44 ` Dmitry Baryshkov
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