* [PATCH v2] drm/msm/dpu: correct clk bit for WB2 block
@ 2023-12-03 0:24 Dmitry Baryshkov
2023-12-05 20:30 ` Abhinav Kumar
2023-12-06 9:37 ` Dmitry Baryshkov
0 siblings, 2 replies; 4+ messages in thread
From: Dmitry Baryshkov @ 2023-12-03 0:24 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar, Marijn Suijten
Cc: freedreno, linux-arm-msm, Bjorn Andersson, dri-devel, Stephen Boyd
On sc7280 there are two clk bits for WB2: vbif_cli and clk_ctrl. While
programming the VBIF params of WB, the driver should be toggling the
former bit, while the sc7180_mdp, sc7280_mdp and sm8250_mdp structs
list the latter one.
Correct that to ensure proper programming sequence for WB2 on these
platforms.
Fixes: 255f056181ac ("drm/msm/dpu: sc7180: add missing WB2 clock control")
Fixes: 3ce166380567 ("drm/msm/dpu: add writeback support for sc7280")
Fixes: 53324b99bd7b ("drm/msm/dpu: add writeback blocks to the sm8250 DPU catalog")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Changes since v1:
- Fixed the bits for all three platforms supporting WB (Abhinav)
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
index 94278a3e3483..9f8068fa0175 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
@@ -32,7 +32,7 @@ static const struct dpu_mdp_cfg sm8250_mdp = {
[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
[DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
[DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 },
- [DPU_CLK_CTRL_WB2] = { .reg_off = 0x3b8, .bit_off = 24 },
+ [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
},
};
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
index c0d88ddccb28..9bfa15e4e645 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
@@ -25,7 +25,7 @@ static const struct dpu_mdp_cfg sc7180_mdp = {
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
- [DPU_CLK_CTRL_WB2] = { .reg_off = 0x3b8, .bit_off = 24 },
+ [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
},
};
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
index 15942fa5a8e0..b9c296e51e36 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
@@ -25,7 +25,7 @@ static const struct dpu_mdp_cfg sc7280_mdp = {
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
- [DPU_CLK_CTRL_WB2] = { .reg_off = 0x3b8, .bit_off = 24 },
+ [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
},
};
--
2.39.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v2] drm/msm/dpu: correct clk bit for WB2 block
2023-12-03 0:24 [PATCH v2] drm/msm/dpu: correct clk bit for WB2 block Dmitry Baryshkov
@ 2023-12-05 20:30 ` Abhinav Kumar
2023-12-05 21:25 ` Paloma Arellano
2023-12-06 9:37 ` Dmitry Baryshkov
1 sibling, 1 reply; 4+ messages in thread
From: Abhinav Kumar @ 2023-12-05 20:30 UTC (permalink / raw)
To: Dmitry Baryshkov, Rob Clark, Sean Paul, Marijn Suijten
Cc: freedreno, linux-arm-msm, Bjorn Andersson, dri-devel, Stephen Boyd
On 12/2/2023 4:24 PM, Dmitry Baryshkov wrote:
> On sc7280 there are two clk bits for WB2: vbif_cli and clk_ctrl. While
> programming the VBIF params of WB, the driver should be toggling the
> former bit, while the sc7180_mdp, sc7280_mdp and sm8250_mdp structs
> list the latter one.
>
> Correct that to ensure proper programming sequence for WB2 on these
> platforms.
>
> Fixes: 255f056181ac ("drm/msm/dpu: sc7180: add missing WB2 clock control")
> Fixes: 3ce166380567 ("drm/msm/dpu: add writeback support for sc7280")
> Fixes: 53324b99bd7b ("drm/msm/dpu: add writeback blocks to the sm8250 DPU catalog")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>
> Changes since v1:
> - Fixed the bits for all three platforms supporting WB (Abhinav)
>
> ---
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
LGTM now.
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] drm/msm/dpu: correct clk bit for WB2 block
2023-12-05 20:30 ` Abhinav Kumar
@ 2023-12-05 21:25 ` Paloma Arellano
0 siblings, 0 replies; 4+ messages in thread
From: Paloma Arellano @ 2023-12-05 21:25 UTC (permalink / raw)
To: Abhinav Kumar, Dmitry Baryshkov, Rob Clark, Sean Paul, Marijn Suijten
Cc: linux-arm-msm, Bjorn Andersson, freedreno, dri-devel, Stephen Boyd
On 12/5/2023 12:30 PM, Abhinav Kumar wrote:
>
>
> On 12/2/2023 4:24 PM, Dmitry Baryshkov wrote:
>> On sc7280 there are two clk bits for WB2: vbif_cli and clk_ctrl. While
>> programming the VBIF params of WB, the driver should be toggling the
>> former bit, while the sc7180_mdp, sc7280_mdp and sm8250_mdp structs
>> list the latter one.
>>
>> Correct that to ensure proper programming sequence for WB2 on these
>> platforms.
>>
>> Fixes: 255f056181ac ("drm/msm/dpu: sc7180: add missing WB2 clock
>> control")
>> Fixes: 3ce166380567 ("drm/msm/dpu: add writeback support for sc7280")
>> Fixes: 53324b99bd7b ("drm/msm/dpu: add writeback blocks to the sm8250
>> DPU catalog")
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> ---
>>
>> Changes since v1:
>> - Fixed the bits for all three platforms supporting WB (Abhinav)
>>
>> ---
>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 2 +-
>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 2 +-
>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 2 +-
>> 3 files changed, 3 insertions(+), 3 deletions(-)
>>
>
> LGTM now.
>
> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Tested-by: Paloma Arellano <quic_parellan@quicinc.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] drm/msm/dpu: correct clk bit for WB2 block
2023-12-03 0:24 [PATCH v2] drm/msm/dpu: correct clk bit for WB2 block Dmitry Baryshkov
2023-12-05 20:30 ` Abhinav Kumar
@ 2023-12-06 9:37 ` Dmitry Baryshkov
1 sibling, 0 replies; 4+ messages in thread
From: Dmitry Baryshkov @ 2023-12-06 9:37 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar, Marijn Suijten, Dmitry Baryshkov
Cc: freedreno, linux-arm-msm, Bjorn Andersson, dri-devel, Stephen Boyd
On Sun, 03 Dec 2023 03:24:37 +0300, Dmitry Baryshkov wrote:
> On sc7280 there are two clk bits for WB2: vbif_cli and clk_ctrl. While
> programming the VBIF params of WB, the driver should be toggling the
> former bit, while the sc7180_mdp, sc7280_mdp and sm8250_mdp structs
> list the latter one.
>
> Correct that to ensure proper programming sequence for WB2 on these
> platforms.
>
> [...]
Applied, thanks!
[1/1] drm/msm/dpu: correct clk bit for WB2 block
https://gitlab.freedesktop.org/lumag/msm/-/commit/e843ca2f30e6
Best regards,
--
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
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2023-12-03 0:24 [PATCH v2] drm/msm/dpu: correct clk bit for WB2 block Dmitry Baryshkov
2023-12-05 20:30 ` Abhinav Kumar
2023-12-05 21:25 ` Paloma Arellano
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