From: Maxime Ripard <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
To: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
Cc: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>,
Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU@public.gmane.org>,
Vasily Khoruzhick
<anarsoul-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
David Airlie <airlied-cv59FeDIM0c@public.gmane.org>,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
Michael Turquette
<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
Stephen Boyd <sboyd-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Michael Trimarchi
<michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: Re: [PATCH v2 04/15] drm/sun4i: sun6i_mipi_dsi: Add Allwinner A64 MIPI DSI support
Date: Wed, 24 Oct 2018 19:06:32 +0100 [thread overview]
Message-ID: <20181024180632.zrb3lrqsznspmwbk@flea> (raw)
In-Reply-To: <20181023155035.9101-5-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 4768 bytes --]
On Tue, Oct 23, 2018 at 09:20:24PM +0530, Jagan Teki wrote:
> The MIPI DSI controller on Allwinner A64 is similar to
> Allwinner A31 without support of DSI mod clock(CLK_DSI_SCLK)
>
> So, alter has_mod_clk bool via driver data for respective
> SoC's compatible.
>
> Signed-off-by: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> ---
> Changes for v2:
> - none
>
> drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 47 ++++++++++++++++++++------
> drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h | 5 +++
> 2 files changed, 41 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> index e3b34a345546..8e9c76febca2 100644
> --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> @@ -10,6 +10,7 @@
> #include <linux/component.h>
> #include <linux/crc-ccitt.h>
> #include <linux/of_address.h>
> +#include <linux/of_device.h>
> #include <linux/pm_runtime.h>
> #include <linux/regmap.h>
> #include <linux/reset.h>
> @@ -981,6 +982,8 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
> dsi->host.ops = &sun6i_dsi_host_ops;
> dsi->host.dev = dev;
>
> + dsi->variant = of_device_get_match_data(dev);
> +
> res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> base = devm_ioremap_resource(dev, res);
> if (IS_ERR(base)) {
> @@ -1001,17 +1004,20 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
> return PTR_ERR(dsi->reset);
> }
>
> - dsi->mod_clk = devm_clk_get(dev, "mod");
> - if (IS_ERR(dsi->mod_clk)) {
> - dev_err(dev, "Couldn't get the DSI mod clock\n");
> - return PTR_ERR(dsi->mod_clk);
> + if (dsi->variant->has_mod_clk) {
> + dsi->mod_clk = devm_clk_get(dev, "mod");
> + if (IS_ERR(dsi->mod_clk)) {
> + dev_err(dev, "Couldn't get the DSI mod clock\n");
> + return PTR_ERR(dsi->mod_clk);
> + }
> }
>
> /*
> * In order to operate properly, that clock seems to be always
> * set to 297MHz.
> */
> - clk_set_rate_exclusive(dsi->mod_clk, 297000000);
> + if (dsi->variant->has_mod_clk)
> + clk_set_rate_exclusive(dsi->mod_clk, 297000000);
>
> dphy_node = of_parse_phandle(dev->of_node, "phys", 0);
> ret = sun6i_dphy_probe(dsi, dphy_node);
> @@ -1043,7 +1049,8 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
> pm_runtime_disable(dev);
> sun6i_dphy_remove(dsi);
> err_unprotect_clk:
> - clk_rate_exclusive_put(dsi->mod_clk);
> + if (dsi->variant->has_mod_clk)
> + clk_rate_exclusive_put(dsi->mod_clk);
> return ret;
> }
>
> @@ -1056,7 +1063,8 @@ static int sun6i_dsi_remove(struct platform_device *pdev)
> mipi_dsi_host_unregister(&dsi->host);
> pm_runtime_disable(dev);
> sun6i_dphy_remove(dsi);
> - clk_rate_exclusive_put(dsi->mod_clk);
> + if (dsi->variant->has_mod_clk)
> + clk_rate_exclusive_put(dsi->mod_clk);
>
> return 0;
> }
> @@ -1066,7 +1074,8 @@ static int __maybe_unused sun6i_dsi_runtime_resume(struct device *dev)
> struct sun6i_dsi *dsi = dev_get_drvdata(dev);
>
> reset_control_deassert(dsi->reset);
> - clk_prepare_enable(dsi->mod_clk);
> + if (dsi->variant->has_mod_clk)
> + clk_prepare_enable(dsi->mod_clk);
>
> /*
> * Enable the DSI block.
> @@ -1094,7 +1103,8 @@ static int __maybe_unused sun6i_dsi_runtime_suspend(struct device *dev)
> {
> struct sun6i_dsi *dsi = dev_get_drvdata(dev);
>
> - clk_disable_unprepare(dsi->mod_clk);
> + if (dsi->variant->has_mod_clk)
> + clk_disable_unprepare(dsi->mod_clk);
> reset_control_assert(dsi->reset);
>
> return 0;
> @@ -1106,9 +1116,24 @@ static const struct dev_pm_ops sun6i_dsi_pm_ops = {
> NULL)
> };
>
> +static const struct sun6i_dsi_variant sun6i_a31_dsi = {
> + .has_mod_clk = true,
> +};
> +
> +static const struct sun6i_dsi_variant sun50i_a64_dsi = {
> + .has_mod_clk = false,
This is the default already.
> +};
> +
> static const struct of_device_id sun6i_dsi_of_table[] = {
> - { .compatible = "allwinner,sun6i-a31-mipi-dsi" },
> - { }
> + {
> + .compatible = "allwinner,sun6i-a31-mipi-dsi",
> + .data = &sun6i_a31_dsi,
> + },
> + {
> + .compatible = "allwinner,sun50i-a64-mipi-dsi",
> + .data = &sun50i_a64_dsi,
> + },
> + { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, sun6i_dsi_of_table);
>
> diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h
> index dbbc5b3ecbda..597b62227019 100644
> --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h
> +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h
> @@ -20,6 +20,10 @@ struct sun6i_dphy {
> struct reset_control *reset;
> };
>
> +struct sun6i_dsi_variant {
> + bool has_mod_clk;
> +};
> +
This should be part of a separate patch.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2018-10-24 18:06 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-23 15:50 [PATCH v2 00/15] drm/sun4i: Allwinner A64 MIPI-DSI support Jagan Teki
2018-10-23 15:50 ` [PATCH v2 01/15] clk: sunxi-ng: a64: Fix gate bit of DSI DPHY Jagan Teki
2018-10-24 8:48 ` Stephen Boyd
2018-10-23 15:50 ` [PATCH v2 02/15] clk: sunxi-ng: Add check for minimal rate to NKM PLLs Jagan Teki
2018-10-24 8:48 ` Stephen Boyd
[not found] ` <20181023155035.9101-3-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2018-10-24 18:04 ` Maxime Ripard
2018-10-25 10:55 ` Jagan Teki
[not found] ` <CAMty3ZC2wn-DjR+93yc-n-bAmVCHaEqR_=4XPddoo+7LjebTEg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-29 8:58 ` Maxime Ripard
2018-10-29 12:40 ` Jagan Teki
[not found] ` <e7566001-8933-adbb-4c30-7a3f66ebae4e-oRp2ZoJdM/RWk0Htik3J/w@public.gmane.org>
2018-11-05 10:11 ` Maxime Ripard
[not found] ` <20181023155035.9101-1-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2018-10-23 15:50 ` [PATCH v2 03/15] clk: sunxi-ng: Add check for maximum " Jagan Teki
2018-10-23 17:10 ` Vasily Khoruzhick
2018-10-24 8:48 ` Stephen Boyd
2018-10-23 15:50 ` [PATCH v2 05/15] dt-bindings: sun6i-dsi: Add compatible for A64 MIPI DSI Jagan Teki
2018-10-23 15:50 ` [PATCH v2 06/15] drm/sun4i: sun6i_mipi_dsi: Add DSI Generic short write 2 param transfer Jagan Teki
2018-10-23 15:50 ` [PATCH v2 07/15] drm/sun4i: sun6i_mipi_dsi: Fix VBP size calculation Jagan Teki
2018-10-23 15:50 ` [PATCH v2 08/15] drm/sun4i: sun6i_mipi_dsi: Fix TCON DRQ set bits Jagan Teki
2018-10-23 15:50 ` [PATCH v2 10/15] dt-bindings: panel: Add Bananapi S070WV20-CT16 ICN6211 MIPI-DSI to RGB bridge Jagan Teki
[not found] ` <20181023155035.9101-11-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2018-10-24 18:07 ` Maxime Ripard
2018-10-24 20:36 ` Chen-Yu Tsai
2018-10-23 15:50 ` [PATCH v2 11/15] drm/panel: " Jagan Teki
2018-10-23 15:50 ` [PATCH v2 12/15] clk: sunxi-ng: a64: Add min and max rate for PLL_MIPI Jagan Teki
2018-10-24 8:49 ` Stephen Boyd
[not found] ` <20181023155035.9101-13-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2018-10-24 18:13 ` Maxime Ripard
2018-10-25 15:51 ` Jagan Teki
[not found] ` <CAMty3ZBJcH1fz5FyhT1rk9qiJ-aWoQYiH7P1ZyQPLKmVWOCkdA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-29 9:08 ` Maxime Ripard
2018-10-29 15:08 ` Jagan Teki
2018-11-05 12:42 ` Maxime Ripard
2018-10-23 15:50 ` [PATCH v2 15/15] arm64: dts: allwinner: bananapi-m64: Bananapi S070WV20-CT16 DSI panel Jagan Teki
[not found] ` <20181023155035.9101-16-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2018-10-24 18:11 ` Maxime Ripard
2018-10-24 20:36 ` Chen-Yu Tsai
2018-10-23 15:50 ` [PATCH v2 04/15] drm/sun4i: sun6i_mipi_dsi: Add Allwinner A64 MIPI DSI support Jagan Teki
[not found] ` <20181023155035.9101-5-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2018-10-24 18:06 ` Maxime Ripard [this message]
2018-10-25 11:02 ` Jagan Teki
2018-10-29 9:00 ` Maxime Ripard
2018-10-23 15:50 ` [PATCH v2 09/15] drm/sun4i: sun6i_mipi_dsi: Refactor vertical video start delay Jagan Teki
2018-10-23 15:50 ` [PATCH v2 13/15] dt-bindings: sun6i-dsi: Add compatible for A64 DPHY Jagan Teki
2018-10-24 18:09 ` Maxime Ripard
2018-10-25 12:52 ` Jagan Teki
[not found] ` <CAMty3ZC3jXKBVrrCSd0Un+ZNvNKPj4C0WpcpNOYJBK1=vehBQg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-29 9:01 ` Maxime Ripard
2018-10-23 15:50 ` [PATCH v2 14/15] arm64: dts: allwinner: a64: Add DSI pipeline Jagan Teki
[not found] ` <20181023155035.9101-15-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2018-10-24 18:10 ` Maxime Ripard
2018-10-25 13:21 ` Jagan Teki
[not found] ` <CAMty3ZC1jCfuP8tFKvgcdJ5R_Ou0ejAT_VYv=fV1Kh4UanLWcg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-29 9:01 ` Maxime Ripard
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