[PATCH v3 1/3] drm/dp: DRM DP helper for reading Ignore MSA from DPCD

[PATCH v3 1/3] drm/dp: DRM DP helper for reading Ignore MSA from DPCD

[Manasi Navare]

DP sink device sets the Ignore MSA bit in its
DP_DOWNSTREAM_PORT_COUNT register to indicate its ability to
ignore the MSA video timing parameters and its ability to support
seamless video timing change over a range of timing exposed by
DisplayID and EDID.
This is required for the sink to indicate that it is Adaptive sync
capable.

v3:
* Fi the typo in commit message (Manasi)
v2:
* Rename to describe what the function does (Jani Nikula)

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
---
 include/drm/drm_dp_helper.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 305533da13ad..2b41e8990531 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -1445,6 +1445,14 @@ drm_dp_alternate_scrambler_reset_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
 			DP_ALTERNATE_SCRAMBLER_RESET_CAP;
 }
 
+/* Ignore MSA timing for Adaptive Sync support on DP 1.4 */
+static inline bool
+drm_dp_sink_can_do_video_without_timing_msa(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+	return dpcd[DP_DOWN_STREAM_PORT_COUNT] &
+		DP_MSA_TIMING_PAR_IGNORED;
+}
+
 /*
  * DisplayPort AUX channel
  */
-- 
2.19.1

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[PATCH v3 2/3] drm/i915/dp: Attach and set drm connector VRR property

[Manasi Navare]

From: Aditya Swarup <aditya.swarup@intel.com>

This function sets the VRR property for connector based
on the platform support, EDID monitor range and DP sink
DPCD capability of outputing video without msa
timing information.

v3:
* intel_dp_is_vrr_capable can be used for debugfs, make it
non static (Manasi)
v2:
* Just set this in intel_dp_get_modes instead of new hook (Jani)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 24 ++++++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_dp.h |  2 ++
 2 files changed, 26 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 25f0baafd6d0..12a9a8ed6a90 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6182,6 +6182,23 @@ intel_dp_force(struct drm_connector *connector)
 	intel_display_power_put(dev_priv, aux_domain, wakeref);
 }
 
+bool intel_dp_is_vrr_capable(struct drm_connector *connector)
+{
+	struct intel_dp *intel_dp = intel_attached_dp(to_intel_connector(connector));
+	const struct drm_display_info *info = &connector->display_info;
+	struct drm_i915_private *dev_priv = to_i915(connector->dev);
+
+	/*
+	 * DP Sink is capable of Variable refresh video timings if
+	 * Ignore MSA bit is set in DPCD.
+	 * EDID monitor range also should be atleast 10 for reasonable
+	 * Adaptive sync/ VRR end user experience.
+	 */
+	return INTEL_GEN(dev_priv) >= 12 &&
+		drm_dp_sink_can_do_video_without_timing_msa(intel_dp->dpcd) &&
+		info->monitor_range.max_vfreq - info->monitor_range.min_vfreq > 10;
+}
+
 static int intel_dp_get_modes(struct drm_connector *connector)
 {
 	struct intel_connector *intel_connector = to_intel_connector(connector);
@@ -6192,6 +6209,10 @@ static int intel_dp_get_modes(struct drm_connector *connector)
 		int ret = intel_connector_update_modes(connector, edid);
 		if (ret)
 			return ret;
+
+		if (intel_dp_is_vrr_capable(connector))
+			drm_connector_set_vrr_capable_property(connector,
+							       true);
 	}
 
 	/* if eDP has no EDID, fall back to fixed mode */
@@ -7238,6 +7259,9 @@ intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connect
 		connector->state->scaling_mode = DRM_MODE_SCALE_ASPECT;
 
 	}
+
+	if (INTEL_GEN(dev_priv) >= 12)
+		drm_connector_attach_vrr_capable_property(connector);
 }
 
 static void intel_dp_init_panel_power_timestamps(struct intel_dp *intel_dp)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 9632978e8c24..aa4cfbbbe117 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -14,6 +14,7 @@ enum pipe;
 enum port;
 struct drm_connector_state;
 struct drm_encoder;
+struct drm_connector;
 struct drm_i915_private;
 struct drm_modeset_acquire_ctx;
 struct intel_connector;
@@ -118,6 +119,7 @@ void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable,
 			     const struct intel_crtc_state *crtc_state,
 			     const struct drm_connector_state *conn_state);
 bool intel_digital_port_connected(struct intel_encoder *encoder);
+bool intel_dp_is_vrr_capable(struct drm_connector *connector);
 
 static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
 {
-- 
2.19.1

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[PATCH v3 3/3] drm/i915/dp: Expose connector VRR info via debugfs

[Manasi Navare]

From: Bhanuprakash Modem <bhanuprakash.modem@intel.com>

[Why]
It's useful to know the min and max vrr range for IGT testing.

[How]
Expose the min and max vfreq for the connector via a debugfs file
on the connector, "i915_vrr_info".

Example usage: cat /sys/kernel/debug/dri/0/DP-1/i915_vrr_info

v2:
* Fix the typo in max_vfreq (Manasi)
* Change the name of node to i915_vrr_info so we can add
other vrr info for more debug info (Manasi)
* Change the VRR capable to display Yes or No (Manasi)
* Fix indentation checkpatch errors (Manasi)

Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Tested-by: Manasi Navare <manasi.d.navare@intel.com>
---
 .../drm/i915/display/intel_display_debugfs.c  | 22 ++++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_dp.c       |  4 +++-
 2 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 9f736420d83f..c10b97ac0482 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -2086,6 +2086,21 @@ static const struct file_operations i915_dsc_fec_support_fops = {
 	.write = i915_dsc_fec_support_write
 };
 
+static int i915_vrr_info_show(struct seq_file *m, void *data)
+{
+	struct drm_connector *connector = m->private;
+
+	if (connector->status != connector_status_connected)
+		return -ENODEV;
+
+	seq_printf(m, "Vrr_capable: %s\n", yesno(intel_dp_is_vrr_capable(connector)));
+	seq_printf(m, "Min: %u\n", (u8)connector->display_info.monitor_range.min_vfreq);
+	seq_printf(m, "Max: %u\n", (u8)connector->display_info.monitor_range.max_vfreq);
+
+	return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(i915_vrr_info);
+
 /**
  * intel_connector_debugfs_add - add i915 specific connector debugfs files
  * @connector: pointer to a registered drm_connector
@@ -2120,9 +2135,14 @@ int intel_connector_debugfs_add(struct drm_connector *connector)
 
 	if (INTEL_GEN(dev_priv) >= 10 &&
 	    (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
-	     connector->connector_type == DRM_MODE_CONNECTOR_eDP))
+	     connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
 		debugfs_create_file("i915_dsc_fec_support", S_IRUGO, root,
 				    connector, &i915_dsc_fec_support_fops);
 
+		if (INTEL_GEN(dev_priv) >= 12)
+			debugfs_create_file("i915_vrr_info", S_IRUGO,
+					    root, connector, &i915_vrr_info_fops);
+	}
+
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 12a9a8ed6a90..e579a2ff0b63 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6210,9 +6210,11 @@ static int intel_dp_get_modes(struct drm_connector *connector)
 		if (ret)
 			return ret;
 
-		if (intel_dp_is_vrr_capable(connector))
+		if (intel_dp_is_vrr_capable(connector)) {
 			drm_connector_set_vrr_capable_property(connector,
 							       true);
+			DRM_DEBUG_KMS("\n VRR Debug: Setting VRR prop to true");
+		}
 	}
 
 	/* if eDP has no EDID, fall back to fixed mode */
-- 
2.19.1

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