* [PATCH 0/6] drm/vmwgfx: SVGA v3 and arm64 support
@ 2021-05-05 3:57 Zack Rusin
2021-05-05 3:57 ` [PATCH 1/6] drm/vmwgfx: Fix incorrect enum usage Zack Rusin
` (5 more replies)
0 siblings, 6 replies; 12+ messages in thread
From: Zack Rusin @ 2021-05-05 3:57 UTC (permalink / raw)
To: dri-devel; +Cc: krastevm, sroland
This set includes some lost fixes and adds SVGA v3 and arm64 support
to the driver. SVGA v3 is the next version of our virtual device,
it's largely about making the device a little easier and cleaner
to use (e.g. MMIO for register accesses instead of ioports, adding
MSI-X support, deprecating the FIFO MMIO and removing a lot of the
old and legacy functionality). We'll be able to get rid of some
of the locking as well, which improves the performance.
Our ARM64 support is only available in svga v3. Currently guest
memory objects are not supported on arm so 3D is not yet available
there.
Thomas Hellstrom (2):
drm/vmwgfx: Mark a surface gpu-dirty after the SVGA3dCmdDXGenMips
command
drm/vmwgfx: Fix cpu updates of coherent multisample surfaces
Zack Rusin (4):
drm/vmwgfx: Fix incorrect enum usage
drm/vmwgfx: Remove the reservation semaphore
drm/vmwgfx: Add basic support for SVGA3
drm/vmwgfx: Port vmwgfx to arm64
drivers/gpu/drm/vmwgfx/Kconfig | 3 +-
drivers/gpu/drm/vmwgfx/Makefile | 2 +-
.../device_include/svga3d_surfacedefs.h | 8 +-
.../gpu/drm/vmwgfx/device_include/svga_reg.h | 55 ++++-
drivers/gpu/drm/vmwgfx/ttm_lock.c | 194 ----------------
drivers/gpu/drm/vmwgfx/ttm_lock.h | 218 -----------------
drivers/gpu/drm/vmwgfx/vmwgfx_bo.c | 31 ---
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c | 114 +++++----
drivers/gpu/drm/vmwgfx/vmwgfx_context.c | 13 +-
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 161 +++++++++----
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 128 +++++++---
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 27 ++-
drivers/gpu/drm/vmwgfx/vmwgfx_fb.c | 8 -
drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 16 +-
drivers/gpu/drm/vmwgfx/vmwgfx_fence.h | 2 -
drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c | 60 +----
drivers/gpu/drm/vmwgfx/vmwgfx_irq.c | 75 ++----
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 30 +--
drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c | 36 +--
drivers/gpu/drm/vmwgfx/vmwgfx_msg.c | 31 ++-
drivers/gpu/drm/vmwgfx/vmwgfx_msg.h | 214 -----------------
drivers/gpu/drm/vmwgfx/vmwgfx_msg_arm64.h | 130 +++++++++++
drivers/gpu/drm/vmwgfx/vmwgfx_msg_x86.h | 219 ++++++++++++++++++
drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_reg.h | 4 -
drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | 4 -
drivers/gpu/drm/vmwgfx/vmwgfx_shader.c | 6 -
.../gpu/drm/vmwgfx/vmwgfx_simple_resource.c | 5 -
drivers/gpu/drm/vmwgfx/vmwgfx_surface.c | 30 ++-
29 files changed, 783 insertions(+), 1043 deletions(-)
delete mode 100644 drivers/gpu/drm/vmwgfx/ttm_lock.c
delete mode 100644 drivers/gpu/drm/vmwgfx/ttm_lock.h
delete mode 100644 drivers/gpu/drm/vmwgfx/vmwgfx_msg.h
create mode 100755 drivers/gpu/drm/vmwgfx/vmwgfx_msg_arm64.h
create mode 100644 drivers/gpu/drm/vmwgfx/vmwgfx_msg_x86.h
--
2.27.0
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 1/6] drm/vmwgfx: Fix incorrect enum usage
2021-05-05 3:57 [PATCH 0/6] drm/vmwgfx: SVGA v3 and arm64 support Zack Rusin
@ 2021-05-05 3:57 ` Zack Rusin
2021-05-05 3:57 ` [PATCH 2/6] drm/vmwgfx: Mark a surface gpu-dirty after the SVGA3dCmdDXGenMips command Zack Rusin
` (4 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Zack Rusin @ 2021-05-05 3:57 UTC (permalink / raw)
To: dri-devel; +Cc: krastevm, sroland
SVGA_REG_ENABLE is a register name, and SVGA_REG_ENABLE_(ENABLE|
DISABLE|HIDE) are its valid values. We were incorrectly setting
the register value to itself. This happened to work because
the SVGA_REG_ENABLE is happens to to be the same value as
SVGA_REG_ENABLE_ENABLE, but is still semantically incorrect.
Lets use the correct enum when setting SVGA_REG_ENABLE.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
---
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index 7805ba0e1c49..1b27d7f7fcfa 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -1179,7 +1179,7 @@ static void __vmw_svga_enable(struct vmw_private *dev_priv)
struct ttm_resource_manager *man = ttm_manager_type(&dev_priv->bdev, TTM_PL_VRAM);
if (!ttm_resource_manager_used(man)) {
- vmw_write(dev_priv, SVGA_REG_ENABLE, SVGA_REG_ENABLE);
+ vmw_write(dev_priv, SVGA_REG_ENABLE, SVGA_REG_ENABLE_ENABLE);
ttm_resource_manager_set_used(man, true);
}
}
--
2.27.0
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https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/6] drm/vmwgfx: Mark a surface gpu-dirty after the SVGA3dCmdDXGenMips command
2021-05-05 3:57 [PATCH 0/6] drm/vmwgfx: SVGA v3 and arm64 support Zack Rusin
2021-05-05 3:57 ` [PATCH 1/6] drm/vmwgfx: Fix incorrect enum usage Zack Rusin
@ 2021-05-05 3:57 ` Zack Rusin
2021-05-05 3:57 ` [PATCH 3/6] drm/vmwgfx: Fix cpu updates of coherent multisample surfaces Zack Rusin
` (3 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Zack Rusin @ 2021-05-05 3:57 UTC (permalink / raw)
To: dri-devel; +Cc: krastevm, sroland
From: Thomas Hellstrom <thellstrom@vmware.com>
The SVGA3dCmdDXGenMips command uses a shader-resource view to access
the underlying surface. Normally accesses using that view-type are not
dirtying the underlying surface, but that particular command is an
exception.
Mark the surface gpu-dirty after a SVGA3dCmdDXGenMips command has been
submitted.
This fixes the piglit getteximage-formats test run with
SVGA_FORCE_COHERENT=1
Fixes: a9f58c456e9d ("drm/vmwgfx: Be more restrictive when dirtying resource")
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Zack Rusin <zackr@vmware.com>
---
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 20 ++++++++++++++++----
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
index ab752b102c9e..ca5360efa172 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
@@ -2763,12 +2763,24 @@ static int vmw_cmd_dx_genmips(struct vmw_private *dev_priv,
{
VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXGenMips) =
container_of(header, typeof(*cmd), header);
- struct vmw_resource *ret;
+ struct vmw_resource *view;
+ struct vmw_res_cache_entry *rcache;
- ret = vmw_view_id_val_add(sw_context, vmw_view_sr,
- cmd->body.shaderResourceViewId);
+ view = vmw_view_id_val_add(sw_context, vmw_view_sr,
+ cmd->body.shaderResourceViewId);
+ if (IS_ERR(view))
+ return PTR_ERR(view);
- return PTR_ERR_OR_ZERO(ret);
+ /*
+ * Normally the shader-resource view is not gpu-dirtying, but for
+ * this particular command it is...
+ * So mark the last looked-up surface, which is the surface
+ * the view points to, gpu-dirty.
+ */
+ rcache = &sw_context->res_cache[vmw_res_surface];
+ vmw_validation_res_set_dirty(sw_context->ctx, rcache->private,
+ VMW_RES_DIRTY_SET);
+ return 0;
}
/**
--
2.27.0
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https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 3/6] drm/vmwgfx: Fix cpu updates of coherent multisample surfaces
2021-05-05 3:57 [PATCH 0/6] drm/vmwgfx: SVGA v3 and arm64 support Zack Rusin
2021-05-05 3:57 ` [PATCH 1/6] drm/vmwgfx: Fix incorrect enum usage Zack Rusin
2021-05-05 3:57 ` [PATCH 2/6] drm/vmwgfx: Mark a surface gpu-dirty after the SVGA3dCmdDXGenMips command Zack Rusin
@ 2021-05-05 3:57 ` Zack Rusin
2021-05-05 3:57 ` [PATCH 4/6] drm/vmwgfx: Remove the reservation semaphore Zack Rusin
` (2 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Zack Rusin @ 2021-05-05 3:57 UTC (permalink / raw)
To: dri-devel; +Cc: krastevm, sroland
From: Thomas Hellstrom <thellstrom@vmware.com>
In cases where the dirty linear memory range spans multiple sample sheets
in a surface, the dirty surface region is incorrectly computed.
To do this correctly and in an optimized fashion we would have to compute
the dirty region of each sample sheet and compute the union of those
regions.
But assuming that cpu writing to a multisample surface is rather a corner
case than a common case, just set the dirty region to the full surface.
This fixes OpenGL piglit errors with SVGA_FORCE_COHERENT=1
and the piglit test:
fbo-depthstencil blit default_fb -samples=2 -auto
Fixes: 9ca7d19ff8ba ("drm/vmwgfx: Add surface dirty-tracking callbacks")
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Zack Rusin <zackr@vmware.com>
---
.../drm/vmwgfx/device_include/svga3d_surfacedefs.h | 8 ++++++--
drivers/gpu/drm/vmwgfx/vmwgfx_surface.c | 13 +++++++++++++
2 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/device_include/svga3d_surfacedefs.h b/drivers/gpu/drm/vmwgfx/device_include/svga3d_surfacedefs.h
index 4db25bd9fa22..127eaf0a0a58 100644
--- a/drivers/gpu/drm/vmwgfx/device_include/svga3d_surfacedefs.h
+++ b/drivers/gpu/drm/vmwgfx/device_include/svga3d_surfacedefs.h
@@ -1467,6 +1467,7 @@ struct svga3dsurface_cache {
/**
* struct svga3dsurface_loc - Surface location
+ * @sheet: The multisample sheet.
* @sub_resource: Surface subresource. Defined as layer * num_mip_levels +
* mip_level.
* @x: X coordinate.
@@ -1474,6 +1475,7 @@ struct svga3dsurface_cache {
* @z: Z coordinate.
*/
struct svga3dsurface_loc {
+ u32 sheet;
u32 sub_resource;
u32 x, y, z;
};
@@ -1566,8 +1568,8 @@ svga3dsurface_get_loc(const struct svga3dsurface_cache *cache,
u32 layer;
int i;
- if (offset >= cache->sheet_bytes)
- offset %= cache->sheet_bytes;
+ loc->sheet = offset / cache->sheet_bytes;
+ offset -= loc->sheet * cache->sheet_bytes;
layer = offset / cache->mip_chain_bytes;
offset -= layer * cache->mip_chain_bytes;
@@ -1631,6 +1633,7 @@ svga3dsurface_min_loc(const struct svga3dsurface_cache *cache,
u32 sub_resource,
struct svga3dsurface_loc *loc)
{
+ loc->sheet = 0;
loc->sub_resource = sub_resource;
loc->x = loc->y = loc->z = 0;
}
@@ -1652,6 +1655,7 @@ svga3dsurface_max_loc(const struct svga3dsurface_cache *cache,
const struct drm_vmw_size *size;
u32 mip;
+ loc->sheet = 0;
loc->sub_resource = sub_resource + 1;
mip = sub_resource % cache->num_mip_levels;
size = &cache->mip[mip].size;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
index c3e55c1376eb..beab3e19d8e2 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
@@ -1804,6 +1804,19 @@ static void vmw_surface_tex_dirty_range_add(struct vmw_resource *res,
svga3dsurface_get_loc(cache, &loc2, end - 1);
svga3dsurface_inc_loc(cache, &loc2);
+ if (loc1.sheet != loc2.sheet) {
+ u32 sub_res;
+
+ /*
+ * Multiple multisample sheets. To do this in an optimized
+ * fashion, compute the dirty region for each sheet and the
+ * resulting union. Since this is not a common case, just dirty
+ * the whole surface.
+ */
+ for (sub_res = 0; sub_res < dirty->num_subres; ++sub_res)
+ vmw_subres_dirty_full(dirty, sub_res);
+ return;
+ }
if (loc1.sub_resource + 1 == loc2.sub_resource) {
/* Dirty range covers a single sub-resource */
vmw_subres_dirty_add(dirty, &loc1, &loc2);
--
2.27.0
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 4/6] drm/vmwgfx: Remove the reservation semaphore
2021-05-05 3:57 [PATCH 0/6] drm/vmwgfx: SVGA v3 and arm64 support Zack Rusin
` (2 preceding siblings ...)
2021-05-05 3:57 ` [PATCH 3/6] drm/vmwgfx: Fix cpu updates of coherent multisample surfaces Zack Rusin
@ 2021-05-05 3:57 ` Zack Rusin
2021-05-05 3:57 ` [PATCH 5/6] drm/vmwgfx: Add basic support for SVGA3 Zack Rusin
2021-05-05 3:57 ` [PATCH 6/6] drm/vmwgfx: Port vmwgfx to arm64 Zack Rusin
5 siblings, 0 replies; 12+ messages in thread
From: Zack Rusin @ 2021-05-05 3:57 UTC (permalink / raw)
To: dri-devel; +Cc: krastevm, sroland
Now since Christian reworked TTM to always keep objects on the LRU
list unless they are pinned we shouldn't need the reservation
semaphore. It makes the driver code a lot cleaner, especially
because it was a little hard to reason when and where the
reservation semaphore needed to be held.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
---
drivers/gpu/drm/vmwgfx/Makefile | 2 +-
drivers/gpu/drm/vmwgfx/ttm_lock.c | 194 ----------------
drivers/gpu/drm/vmwgfx/ttm_lock.h | 218 ------------------
drivers/gpu/drm/vmwgfx/vmwgfx_bo.c | 31 ---
drivers/gpu/drm/vmwgfx/vmwgfx_context.c | 13 +-
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 14 +-
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 6 -
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 5 -
drivers/gpu/drm/vmwgfx/vmwgfx_fb.c | 8 -
drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c | 11 -
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 7 -
drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | 4 -
drivers/gpu/drm/vmwgfx/vmwgfx_shader.c | 6 -
.../gpu/drm/vmwgfx/vmwgfx_simple_resource.c | 5 -
drivers/gpu/drm/vmwgfx/vmwgfx_surface.c | 17 --
15 files changed, 6 insertions(+), 535 deletions(-)
delete mode 100644 drivers/gpu/drm/vmwgfx/ttm_lock.c
delete mode 100644 drivers/gpu/drm/vmwgfx/ttm_lock.h
diff --git a/drivers/gpu/drm/vmwgfx/Makefile b/drivers/gpu/drm/vmwgfx/Makefile
index 9f5743013cbb..09f6dcac768b 100644
--- a/drivers/gpu/drm/vmwgfx/Makefile
+++ b/drivers/gpu/drm/vmwgfx/Makefile
@@ -9,7 +9,7 @@ vmwgfx-y := vmwgfx_execbuf.o vmwgfx_gmr.o vmwgfx_kms.o vmwgfx_drv.o \
vmwgfx_cotable.o vmwgfx_so.o vmwgfx_binding.o vmwgfx_msg.o \
vmwgfx_simple_resource.o vmwgfx_va.o vmwgfx_blit.o \
vmwgfx_validation.o vmwgfx_page_dirty.o vmwgfx_streamoutput.o \
- ttm_object.o ttm_lock.o ttm_memory.o
+ ttm_object.o ttm_memory.o
vmwgfx-$(CONFIG_DRM_FBDEV_EMULATION) += vmwgfx_fb.o
vmwgfx-$(CONFIG_TRANSPARENT_HUGEPAGE) += vmwgfx_thp.o
diff --git a/drivers/gpu/drm/vmwgfx/ttm_lock.c b/drivers/gpu/drm/vmwgfx/ttm_lock.c
deleted file mode 100644
index 5971c72e6d10..000000000000
--- a/drivers/gpu/drm/vmwgfx/ttm_lock.c
+++ /dev/null
@@ -1,194 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 OR MIT */
-/**************************************************************************
- *
- * Copyright (c) 2007-2009 VMware, Inc., Palo Alto, CA., USA
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- **************************************************************************/
-/*
- * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
- */
-
-#include <linux/atomic.h>
-#include <linux/errno.h>
-#include <linux/wait.h>
-#include <linux/sched/signal.h>
-#include "ttm_lock.h"
-#include "ttm_object.h"
-
-#define TTM_WRITE_LOCK_PENDING (1 << 0)
-#define TTM_VT_LOCK_PENDING (1 << 1)
-#define TTM_SUSPEND_LOCK_PENDING (1 << 2)
-#define TTM_VT_LOCK (1 << 3)
-#define TTM_SUSPEND_LOCK (1 << 4)
-
-void ttm_lock_init(struct ttm_lock *lock)
-{
- spin_lock_init(&lock->lock);
- init_waitqueue_head(&lock->queue);
- lock->rw = 0;
- lock->flags = 0;
-}
-
-void ttm_read_unlock(struct ttm_lock *lock)
-{
- spin_lock(&lock->lock);
- if (--lock->rw == 0)
- wake_up_all(&lock->queue);
- spin_unlock(&lock->lock);
-}
-
-static bool __ttm_read_lock(struct ttm_lock *lock)
-{
- bool locked = false;
-
- spin_lock(&lock->lock);
- if (lock->rw >= 0 && lock->flags == 0) {
- ++lock->rw;
- locked = true;
- }
- spin_unlock(&lock->lock);
- return locked;
-}
-
-int ttm_read_lock(struct ttm_lock *lock, bool interruptible)
-{
- int ret = 0;
-
- if (interruptible)
- ret = wait_event_interruptible(lock->queue,
- __ttm_read_lock(lock));
- else
- wait_event(lock->queue, __ttm_read_lock(lock));
- return ret;
-}
-
-static bool __ttm_read_trylock(struct ttm_lock *lock, bool *locked)
-{
- bool block = true;
-
- *locked = false;
-
- spin_lock(&lock->lock);
- if (lock->rw >= 0 && lock->flags == 0) {
- ++lock->rw;
- block = false;
- *locked = true;
- } else if (lock->flags == 0) {
- block = false;
- }
- spin_unlock(&lock->lock);
-
- return !block;
-}
-
-int ttm_read_trylock(struct ttm_lock *lock, bool interruptible)
-{
- int ret = 0;
- bool locked;
-
- if (interruptible)
- ret = wait_event_interruptible
- (lock->queue, __ttm_read_trylock(lock, &locked));
- else
- wait_event(lock->queue, __ttm_read_trylock(lock, &locked));
-
- if (unlikely(ret != 0)) {
- BUG_ON(locked);
- return ret;
- }
-
- return (locked) ? 0 : -EBUSY;
-}
-
-void ttm_write_unlock(struct ttm_lock *lock)
-{
- spin_lock(&lock->lock);
- lock->rw = 0;
- wake_up_all(&lock->queue);
- spin_unlock(&lock->lock);
-}
-
-static bool __ttm_write_lock(struct ttm_lock *lock)
-{
- bool locked = false;
-
- spin_lock(&lock->lock);
- if (lock->rw == 0 && ((lock->flags & ~TTM_WRITE_LOCK_PENDING) == 0)) {
- lock->rw = -1;
- lock->flags &= ~TTM_WRITE_LOCK_PENDING;
- locked = true;
- } else {
- lock->flags |= TTM_WRITE_LOCK_PENDING;
- }
- spin_unlock(&lock->lock);
- return locked;
-}
-
-int ttm_write_lock(struct ttm_lock *lock, bool interruptible)
-{
- int ret = 0;
-
- if (interruptible) {
- ret = wait_event_interruptible(lock->queue,
- __ttm_write_lock(lock));
- if (unlikely(ret != 0)) {
- spin_lock(&lock->lock);
- lock->flags &= ~TTM_WRITE_LOCK_PENDING;
- wake_up_all(&lock->queue);
- spin_unlock(&lock->lock);
- }
- } else
- wait_event(lock->queue, __ttm_write_lock(lock));
-
- return ret;
-}
-
-void ttm_suspend_unlock(struct ttm_lock *lock)
-{
- spin_lock(&lock->lock);
- lock->flags &= ~TTM_SUSPEND_LOCK;
- wake_up_all(&lock->queue);
- spin_unlock(&lock->lock);
-}
-
-static bool __ttm_suspend_lock(struct ttm_lock *lock)
-{
- bool locked = false;
-
- spin_lock(&lock->lock);
- if (lock->rw == 0) {
- lock->flags &= ~TTM_SUSPEND_LOCK_PENDING;
- lock->flags |= TTM_SUSPEND_LOCK;
- locked = true;
- } else {
- lock->flags |= TTM_SUSPEND_LOCK_PENDING;
- }
- spin_unlock(&lock->lock);
- return locked;
-}
-
-void ttm_suspend_lock(struct ttm_lock *lock)
-{
- wait_event(lock->queue, __ttm_suspend_lock(lock));
-}
diff --git a/drivers/gpu/drm/vmwgfx/ttm_lock.h b/drivers/gpu/drm/vmwgfx/ttm_lock.h
deleted file mode 100644
index af8b28ca546f..000000000000
--- a/drivers/gpu/drm/vmwgfx/ttm_lock.h
+++ /dev/null
@@ -1,218 +0,0 @@
-/**************************************************************************
- *
- * Copyright (c) 2007-2009 VMware, Inc., Palo Alto, CA., USA
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- **************************************************************************/
-/*
- * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
- */
-
-/** @file ttm_lock.h
- * This file implements a simple replacement for the buffer manager use
- * of the DRM heavyweight hardware lock.
- * The lock is a read-write lock. Taking it in read mode and write mode
- * is relatively fast, and intended for in-kernel use only.
- *
- * The vt mode is used only when there is a need to block all
- * user-space processes from validating buffers.
- * It's allowed to leave kernel space with the vt lock held.
- * If a user-space process dies while having the vt-lock,
- * it will be released during the file descriptor release. The vt lock
- * excludes write lock and read lock.
- *
- * The suspend mode is used to lock out all TTM users when preparing for
- * and executing suspend operations.
- *
- */
-
-#ifndef _TTM_LOCK_H_
-#define _TTM_LOCK_H_
-
-#include <linux/atomic.h>
-#include <linux/wait.h>
-
-#include "ttm_object.h"
-
-/**
- * struct ttm_lock
- *
- * @base: ttm base object used solely to release the lock if the client
- * holding the lock dies.
- * @queue: Queue for processes waiting for lock change-of-status.
- * @lock: Spinlock protecting some lock members.
- * @rw: Read-write lock counter. Protected by @lock.
- * @flags: Lock state. Protected by @lock.
- */
-
-struct ttm_lock {
- struct ttm_base_object base;
- wait_queue_head_t queue;
- spinlock_t lock;
- int32_t rw;
- uint32_t flags;
-};
-
-
-/**
- * ttm_lock_init
- *
- * @lock: Pointer to a struct ttm_lock
- * Initializes the lock.
- */
-extern void ttm_lock_init(struct ttm_lock *lock);
-
-/**
- * ttm_read_unlock
- *
- * @lock: Pointer to a struct ttm_lock
- *
- * Releases a read lock.
- */
-extern void ttm_read_unlock(struct ttm_lock *lock);
-
-/**
- * ttm_read_lock
- *
- * @lock: Pointer to a struct ttm_lock
- * @interruptible: Interruptible sleeping while waiting for a lock.
- *
- * Takes the lock in read mode.
- * Returns:
- * -ERESTARTSYS If interrupted by a signal and interruptible is true.
- */
-extern int ttm_read_lock(struct ttm_lock *lock, bool interruptible);
-
-/**
- * ttm_read_trylock
- *
- * @lock: Pointer to a struct ttm_lock
- * @interruptible: Interruptible sleeping while waiting for a lock.
- *
- * Tries to take the lock in read mode. If the lock is already held
- * in write mode, the function will return -EBUSY. If the lock is held
- * in vt or suspend mode, the function will sleep until these modes
- * are unlocked.
- *
- * Returns:
- * -EBUSY The lock was already held in write mode.
- * -ERESTARTSYS If interrupted by a signal and interruptible is true.
- */
-extern int ttm_read_trylock(struct ttm_lock *lock, bool interruptible);
-
-/**
- * ttm_write_unlock
- *
- * @lock: Pointer to a struct ttm_lock
- *
- * Releases a write lock.
- */
-extern void ttm_write_unlock(struct ttm_lock *lock);
-
-/**
- * ttm_write_lock
- *
- * @lock: Pointer to a struct ttm_lock
- * @interruptible: Interruptible sleeping while waiting for a lock.
- *
- * Takes the lock in write mode.
- * Returns:
- * -ERESTARTSYS If interrupted by a signal and interruptible is true.
- */
-extern int ttm_write_lock(struct ttm_lock *lock, bool interruptible);
-
-/**
- * ttm_lock_downgrade
- *
- * @lock: Pointer to a struct ttm_lock
- *
- * Downgrades a write lock to a read lock.
- */
-extern void ttm_lock_downgrade(struct ttm_lock *lock);
-
-/**
- * ttm_suspend_lock
- *
- * @lock: Pointer to a struct ttm_lock
- *
- * Takes the lock in suspend mode. Excludes read and write mode.
- */
-extern void ttm_suspend_lock(struct ttm_lock *lock);
-
-/**
- * ttm_suspend_unlock
- *
- * @lock: Pointer to a struct ttm_lock
- *
- * Releases a suspend lock
- */
-extern void ttm_suspend_unlock(struct ttm_lock *lock);
-
-/**
- * ttm_vt_lock
- *
- * @lock: Pointer to a struct ttm_lock
- * @interruptible: Interruptible sleeping while waiting for a lock.
- * @tfile: Pointer to a struct ttm_object_file to register the lock with.
- *
- * Takes the lock in vt mode.
- * Returns:
- * -ERESTARTSYS If interrupted by a signal and interruptible is true.
- * -ENOMEM: Out of memory when locking.
- */
-extern int ttm_vt_lock(struct ttm_lock *lock, bool interruptible,
- struct ttm_object_file *tfile);
-
-/**
- * ttm_vt_unlock
- *
- * @lock: Pointer to a struct ttm_lock
- *
- * Releases a vt lock.
- * Returns:
- * -EINVAL If the lock was not held.
- */
-extern int ttm_vt_unlock(struct ttm_lock *lock);
-
-/**
- * ttm_write_unlock
- *
- * @lock: Pointer to a struct ttm_lock
- *
- * Releases a write lock.
- */
-extern void ttm_write_unlock(struct ttm_lock *lock);
-
-/**
- * ttm_write_lock
- *
- * @lock: Pointer to a struct ttm_lock
- * @interruptible: Interruptible sleeping while waiting for a lock.
- *
- * Takes the lock in write mode.
- * Returns:
- * -ERESTARTSYS If interrupted by a signal and interruptible is true.
- */
-extern int ttm_write_lock(struct ttm_lock *lock, bool interruptible);
-
-#endif
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c b/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
index 587314d57991..4aa97387d27d 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
@@ -96,10 +96,6 @@ int vmw_bo_pin_in_placement(struct vmw_private *dev_priv,
int ret;
uint32_t new_flags;
- ret = ttm_write_lock(&dev_priv->reservation_sem, interruptible);
- if (unlikely(ret != 0))
- return ret;
-
vmw_execbuf_release_pinned_bo(dev_priv);
ret = ttm_bo_reserve(bo, interruptible, false, NULL);
@@ -116,9 +112,7 @@ int vmw_bo_pin_in_placement(struct vmw_private *dev_priv,
vmw_bo_pin_reserved(buf, true);
ttm_bo_unreserve(bo);
-
err:
- ttm_write_unlock(&dev_priv->reservation_sem);
return ret;
}
@@ -144,10 +138,6 @@ int vmw_bo_pin_in_vram_or_gmr(struct vmw_private *dev_priv,
int ret;
uint32_t new_flags;
- ret = ttm_write_lock(&dev_priv->reservation_sem, interruptible);
- if (unlikely(ret != 0))
- return ret;
-
vmw_execbuf_release_pinned_bo(dev_priv);
ret = ttm_bo_reserve(bo, interruptible, false, NULL);
@@ -172,7 +162,6 @@ int vmw_bo_pin_in_vram_or_gmr(struct vmw_private *dev_priv,
ttm_bo_unreserve(bo);
err:
- ttm_write_unlock(&dev_priv->reservation_sem);
return ret;
}
@@ -228,10 +217,6 @@ int vmw_bo_pin_in_start_of_vram(struct vmw_private *dev_priv,
placement.num_busy_placement = 1;
placement.busy_placement = &place;
- ret = ttm_write_lock(&dev_priv->reservation_sem, interruptible);
- if (unlikely(ret != 0))
- return ret;
-
vmw_execbuf_release_pinned_bo(dev_priv);
ret = ttm_bo_reserve(bo, interruptible, false, NULL);
if (unlikely(ret != 0))
@@ -263,7 +248,6 @@ int vmw_bo_pin_in_start_of_vram(struct vmw_private *dev_priv,
ttm_bo_unreserve(bo);
err_unlock:
- ttm_write_unlock(&dev_priv->reservation_sem);
return ret;
}
@@ -287,10 +271,6 @@ int vmw_bo_unpin(struct vmw_private *dev_priv,
struct ttm_buffer_object *bo = &buf->base;
int ret;
- ret = ttm_read_lock(&dev_priv->reservation_sem, interruptible);
- if (unlikely(ret != 0))
- return ret;
-
ret = ttm_bo_reserve(bo, interruptible, false, NULL);
if (unlikely(ret != 0))
goto err;
@@ -300,7 +280,6 @@ int vmw_bo_unpin(struct vmw_private *dev_priv,
ttm_bo_unreserve(bo);
err:
- ttm_read_unlock(&dev_priv->reservation_sem);
return ret;
}
@@ -906,10 +885,6 @@ int vmw_bo_alloc_ioctl(struct drm_device *dev, void *data,
uint32_t handle;
int ret;
- ret = ttm_read_lock(&dev_priv->reservation_sem, true);
- if (unlikely(ret != 0))
- return ret;
-
ret = vmw_user_bo_alloc(dev_priv, vmw_fpriv(file_priv)->tfile,
req->size, false, &handle, &vbo,
NULL);
@@ -924,7 +899,6 @@ int vmw_bo_alloc_ioctl(struct drm_device *dev, void *data,
vmw_bo_unreference(&vbo);
out_no_bo:
- ttm_read_unlock(&dev_priv->reservation_sem);
return ret;
}
@@ -1119,10 +1093,6 @@ int vmw_dumb_create(struct drm_file *file_priv,
args->pitch = args->width * ((args->bpp + 7) / 8);
args->size = args->pitch * args->height;
- ret = ttm_read_lock(&dev_priv->reservation_sem, true);
- if (unlikely(ret != 0))
- return ret;
-
ret = vmw_user_bo_alloc(dev_priv, vmw_fpriv(file_priv)->tfile,
args->size, false, &args->handle,
&vbo, NULL);
@@ -1131,7 +1101,6 @@ int vmw_dumb_create(struct drm_file *file_priv,
vmw_bo_unreference(&vbo);
out_no_bo:
- ttm_read_unlock(&dev_priv->reservation_sem);
return ret;
}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_context.c b/drivers/gpu/drm/vmwgfx/vmwgfx_context.c
index 4a5a3e246216..3ed9914cb994 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_context.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_context.c
@@ -748,10 +748,6 @@ static int vmw_context_define(struct drm_device *dev, void *data,
((dev_priv->has_mob) ? vmw_cmdbuf_res_man_size() : 0) +
+ VMW_IDA_ACC_SIZE + TTM_OBJ_EXTRA_SIZE;
- ret = ttm_read_lock(&dev_priv->reservation_sem, true);
- if (unlikely(ret != 0))
- return ret;
-
ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
vmw_user_context_size,
&ttm_opt_ctx);
@@ -759,7 +755,7 @@ static int vmw_context_define(struct drm_device *dev, void *data,
if (ret != -ERESTARTSYS)
DRM_ERROR("Out of graphics memory for context"
" creation.\n");
- goto out_unlock;
+ goto out_ret;
}
ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
@@ -767,7 +763,7 @@ static int vmw_context_define(struct drm_device *dev, void *data,
ttm_mem_global_free(vmw_mem_glob(dev_priv),
vmw_user_context_size);
ret = -ENOMEM;
- goto out_unlock;
+ goto out_ret;
}
res = &ctx->res;
@@ -780,7 +776,7 @@ static int vmw_context_define(struct drm_device *dev, void *data,
ret = vmw_context_init(dev_priv, res, vmw_user_context_free, dx);
if (unlikely(ret != 0))
- goto out_unlock;
+ goto out_ret;
tmp = vmw_resource_reference(&ctx->res);
ret = ttm_base_object_init(tfile, &ctx->base, false, VMW_RES_CONTEXT,
@@ -794,8 +790,7 @@ static int vmw_context_define(struct drm_device *dev, void *data,
arg->cid = ctx->base.handle;
out_err:
vmw_resource_unreference(&res);
-out_unlock:
- ttm_read_unlock(&dev_priv->reservation_sem);
+out_ret:
return ret;
}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index 1b27d7f7fcfa..22a2874116c9 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -708,7 +708,6 @@ static int vmw_driver_load(struct vmw_private *dev_priv, u32 pci_id)
mutex_init(&dev_priv->cmdbuf_mutex);
mutex_init(&dev_priv->binding_mutex);
- ttm_lock_init(&dev_priv->reservation_sem);
spin_lock_init(&dev_priv->resource_lock);
spin_lock_init(&dev_priv->hw_lock);
spin_lock_init(&dev_priv->waiter_lock);
@@ -966,6 +965,7 @@ static int vmw_driver_load(struct vmw_private *dev_priv, u32 pci_id)
DRM_INFO("SM4_1 support available.\n");
if (dev_priv->sm_type == VMW_SM_4)
DRM_INFO("SM4 support available.\n");
+ DRM_INFO("Running without reservation semaphore\n");
snprintf(host_log, sizeof(host_log), "vmwgfx: Module Version: %d.%d.%d",
VMWGFX_DRIVER_MAJOR, VMWGFX_DRIVER_MINOR,
@@ -1191,9 +1191,7 @@ static void __vmw_svga_enable(struct vmw_private *dev_priv)
*/
void vmw_svga_enable(struct vmw_private *dev_priv)
{
- (void) ttm_read_lock(&dev_priv->reservation_sem, false);
__vmw_svga_enable(dev_priv);
- ttm_read_unlock(&dev_priv->reservation_sem);
}
/**
@@ -1238,7 +1236,6 @@ void vmw_svga_disable(struct vmw_private *dev_priv)
*
*/
vmw_kms_lost_device(&dev_priv->drm);
- ttm_write_lock(&dev_priv->reservation_sem, false);
if (ttm_resource_manager_used(man)) {
if (ttm_resource_manager_evict_all(&dev_priv->bdev, man))
DRM_ERROR("Failed evicting VRAM buffers.\n");
@@ -1247,7 +1244,6 @@ void vmw_svga_disable(struct vmw_private *dev_priv)
SVGA_REG_ENABLE_HIDE |
SVGA_REG_ENABLE_ENABLE);
}
- ttm_write_unlock(&dev_priv->reservation_sem);
}
static void vmw_remove(struct pci_dev *pdev)
@@ -1287,14 +1283,12 @@ static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
* Once user-space processes have been frozen, we can release
* the lock again.
*/
- ttm_suspend_lock(&dev_priv->reservation_sem);
dev_priv->suspend_locked = true;
break;
case PM_POST_HIBERNATION:
case PM_POST_RESTORE:
if (READ_ONCE(dev_priv->suspend_locked)) {
dev_priv->suspend_locked = false;
- ttm_suspend_unlock(&dev_priv->reservation_sem);
}
break;
default:
@@ -1353,20 +1347,16 @@ static int vmw_pm_freeze(struct device *kdev)
int ret;
/*
- * Unlock for vmw_kms_suspend.
* No user-space processes should be running now.
*/
- ttm_suspend_unlock(&dev_priv->reservation_sem);
ret = vmw_kms_suspend(&dev_priv->drm);
if (ret) {
- ttm_suspend_lock(&dev_priv->reservation_sem);
DRM_ERROR("Failed to freeze modesetting.\n");
return ret;
}
if (dev_priv->enable_fb)
vmw_fb_off(dev_priv);
- ttm_suspend_lock(&dev_priv->reservation_sem);
vmw_execbuf_release_pinned_bo(dev_priv);
vmw_resource_evict_all(dev_priv);
vmw_release_device_early(dev_priv);
@@ -1379,7 +1369,6 @@ static int vmw_pm_freeze(struct device *kdev)
vmw_fifo_resource_inc(dev_priv);
WARN_ON(vmw_request_device_late(dev_priv));
dev_priv->suspend_locked = false;
- ttm_suspend_unlock(&dev_priv->reservation_sem);
if (dev_priv->suspend_state)
vmw_kms_resume(dev);
if (dev_priv->enable_fb)
@@ -1416,7 +1405,6 @@ static int vmw_pm_restore(struct device *kdev)
vmw_fence_fifo_up(dev_priv->fman);
dev_priv->suspend_locked = false;
- ttm_suspend_unlock(&dev_priv->reservation_sem);
if (dev_priv->suspend_state)
vmw_kms_resume(&dev_priv->drm);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
index ffddccff867b..2fb6898ceca9 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
@@ -40,7 +40,6 @@
#include <drm/ttm/ttm_bo_driver.h>
#include <drm/ttm/ttm_execbuf_util.h>
-#include "ttm_lock.h"
#include "ttm_object.h"
#include "vmwgfx_fence.h"
@@ -593,11 +592,6 @@ struct vmw_private {
atomic_t num_fifo_resources;
- /*
- * Replace this with an rwsem as soon as we have down_xx_interruptible()
- */
- struct ttm_lock reservation_sem;
-
/*
* Query processing. These members
* are protected by the cmdbuf mutex.
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
index ca5360efa172..3ad07657b7d2 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
@@ -4443,10 +4443,6 @@ int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
goto out;
}
- ret = ttm_read_lock(&dev_priv->reservation_sem, true);
- if (unlikely(ret != 0))
- return ret;
-
ret = vmw_execbuf_process(file_priv, dev_priv,
(void __user *)(unsigned long)arg->commands,
NULL, arg->command_size, arg->throttle_us,
@@ -4454,7 +4450,6 @@ int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
(void __user *)(unsigned long)arg->fence_rep,
NULL, arg->flags);
- ttm_read_unlock(&dev_priv->reservation_sem);
if (unlikely(ret != 0))
goto out;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
index 33f07abfc3ae..d18c6a56e3dc 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
@@ -195,7 +195,6 @@ static void vmw_fb_dirty_flush(struct work_struct *work)
if (!cur_fb)
goto out_unlock;
- (void) ttm_read_lock(&vmw_priv->reservation_sem, false);
(void) ttm_bo_reserve(&vbo->base, false, false, NULL);
virtual = vmw_bo_map_and_cache(vbo);
if (!virtual)
@@ -254,7 +253,6 @@ static void vmw_fb_dirty_flush(struct work_struct *work)
out_unreserve:
ttm_bo_unreserve(&vbo->base);
- ttm_read_unlock(&vmw_priv->reservation_sem);
if (w && h) {
WARN_ON_ONCE(par->set_fb->funcs->dirty(cur_fb, NULL, 0, 0,
&clip, 1));
@@ -396,8 +394,6 @@ static int vmw_fb_create_bo(struct vmw_private *vmw_priv,
struct vmw_buffer_object *vmw_bo;
int ret;
- (void) ttm_write_lock(&vmw_priv->reservation_sem, false);
-
vmw_bo = kmalloc(sizeof(*vmw_bo), GFP_KERNEL);
if (!vmw_bo) {
ret = -ENOMEM;
@@ -412,12 +408,8 @@ static int vmw_fb_create_bo(struct vmw_private *vmw_priv,
goto err_unlock; /* init frees the buffer on failure */
*out = vmw_bo;
- ttm_write_unlock(&vmw_priv->reservation_sem);
-
- return 0;
err_unlock:
- ttm_write_unlock(&vmw_priv->reservation_sem);
return ret;
}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
index b36032964b2f..6763d0638450 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
@@ -302,10 +302,6 @@ int vmw_present_ioctl(struct drm_device *dev, void *data,
}
vfb = vmw_framebuffer_to_vfb(fb);
- ret = ttm_read_lock(&dev_priv->reservation_sem, true);
- if (unlikely(ret != 0))
- goto out_no_ttm_lock;
-
ret = vmw_user_resource_lookup_handle(dev_priv, tfile, arg->sid,
user_surface_converter,
&res);
@@ -322,8 +318,6 @@ int vmw_present_ioctl(struct drm_device *dev, void *data,
vmw_surface_unreference(&surface);
out_no_surface:
- ttm_read_unlock(&dev_priv->reservation_sem);
-out_no_ttm_lock:
drm_framebuffer_put(fb);
out_no_fb:
drm_modeset_unlock_all(dev);
@@ -391,15 +385,10 @@ int vmw_present_readback_ioctl(struct drm_device *dev, void *data,
goto out_no_ttm_lock;
}
- ret = ttm_read_lock(&dev_priv->reservation_sem, true);
- if (unlikely(ret != 0))
- goto out_no_ttm_lock;
-
ret = vmw_kms_readback(dev_priv, file_priv,
vfb, user_fence_rep,
clips, num_clips);
- ttm_read_unlock(&dev_priv->reservation_sem);
out_no_ttm_lock:
drm_framebuffer_put(fb);
out_no_fb:
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index abbca8b0b3c5..67f693acea5f 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -1008,12 +1008,6 @@ static int vmw_framebuffer_bo_dirty(struct drm_framebuffer *framebuffer,
drm_modeset_lock_all(&dev_priv->drm);
- ret = ttm_read_lock(&dev_priv->reservation_sem, true);
- if (unlikely(ret != 0)) {
- drm_modeset_unlock_all(&dev_priv->drm);
- return ret;
- }
-
if (!num_clips) {
num_clips = 1;
clips = &norect;
@@ -1037,7 +1031,6 @@ static int vmw_framebuffer_bo_dirty(struct drm_framebuffer *framebuffer,
}
vmw_cmd_flush(dev_priv, false);
- ttm_read_unlock(&dev_priv->reservation_sem);
drm_modeset_unlock_all(&dev_priv->drm);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
index 35f02958ee2c..d5da28be938a 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
@@ -990,7 +990,6 @@ int vmw_resource_pin(struct vmw_resource *res, bool interruptible)
struct vmw_private *dev_priv = res->dev_priv;
int ret;
- ttm_write_lock(&dev_priv->reservation_sem, interruptible);
mutex_lock(&dev_priv->cmdbuf_mutex);
ret = vmw_resource_reserve(res, interruptible, false);
if (ret)
@@ -1029,7 +1028,6 @@ int vmw_resource_pin(struct vmw_resource *res, bool interruptible)
vmw_resource_unreserve(res, false, false, false, NULL, 0UL);
out_no_reserve:
mutex_unlock(&dev_priv->cmdbuf_mutex);
- ttm_write_unlock(&dev_priv->reservation_sem);
return ret;
}
@@ -1047,7 +1045,6 @@ void vmw_resource_unpin(struct vmw_resource *res)
struct vmw_private *dev_priv = res->dev_priv;
int ret;
- (void) ttm_read_lock(&dev_priv->reservation_sem, false);
mutex_lock(&dev_priv->cmdbuf_mutex);
ret = vmw_resource_reserve(res, false, true);
@@ -1065,7 +1062,6 @@ void vmw_resource_unpin(struct vmw_resource *res)
vmw_resource_unreserve(res, false, false, false, NULL, 0UL);
mutex_unlock(&dev_priv->cmdbuf_mutex);
- ttm_read_unlock(&dev_priv->reservation_sem);
}
/**
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c b/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c
index a0db06564013..b391975871a5 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c
@@ -876,15 +876,9 @@ static int vmw_shader_define(struct drm_device *dev, struct drm_file *file_priv,
goto out_bad_arg;
}
- ret = ttm_read_lock(&dev_priv->reservation_sem, true);
- if (unlikely(ret != 0))
- goto out_bad_arg;
-
ret = vmw_user_shader_alloc(dev_priv, buffer, size, offset,
shader_type, num_input_sig,
num_output_sig, tfile, shader_handle);
-
- ttm_read_unlock(&dev_priv->reservation_sem);
out_bad_arg:
vmw_bo_unreference(&buffer);
return ret;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_simple_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_simple_resource.c
index 73e9a487e659..33b69a70cfe3 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_simple_resource.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_simple_resource.c
@@ -162,13 +162,8 @@ vmw_simple_resource_create_ioctl(struct drm_device *dev, void *data,
account_size = ttm_round_pot(alloc_size) + VMW_IDA_ACC_SIZE +
TTM_OBJ_EXTRA_SIZE;
- ret = ttm_read_lock(&dev_priv->reservation_sem, true);
- if (ret)
- return ret;
-
ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv), account_size,
&ctx);
- ttm_read_unlock(&dev_priv->reservation_sem);
if (ret) {
if (ret != -ERESTARTSYS)
DRM_ERROR("Out of graphics memory for %s"
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
index beab3e19d8e2..4e08cd7855e3 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
@@ -779,10 +779,6 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
return -EINVAL;
}
- ret = ttm_read_lock(&dev_priv->reservation_sem, true);
- if (unlikely(ret != 0))
- return ret;
-
ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
size, &ctx);
if (unlikely(ret != 0)) {
@@ -913,7 +909,6 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
rep->sid = user_srf->prime.base.handle;
vmw_resource_unreference(&res);
- ttm_read_unlock(&dev_priv->reservation_sem);
return 0;
out_no_copy:
kfree(srf->offsets);
@@ -924,7 +919,6 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
out_no_user_srf:
ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
out_unlock:
- ttm_read_unlock(&dev_priv->reservation_sem);
return ret;
}
@@ -1542,10 +1536,6 @@ vmw_gb_surface_define_internal(struct drm_device *dev,
if (drm_is_primary_client(file_priv))
user_srf->master = drm_master_get(file_priv->master);
- ret = ttm_read_lock(&dev_priv->reservation_sem, true);
- if (unlikely(ret != 0))
- return ret;
-
res = &user_srf->srf.res;
if (req->base.buffer_handle != SVGA3D_INVALID_ID) {
@@ -1627,7 +1617,6 @@ vmw_gb_surface_define_internal(struct drm_device *dev,
vmw_resource_unreference(&res);
out_unlock:
- ttm_read_unlock(&dev_priv->reservation_sem);
return ret;
}
@@ -2125,10 +2114,6 @@ int vmw_gb_surface_define(struct vmw_private *dev_priv,
if (req->sizes != NULL)
return -EINVAL;
- ret = ttm_read_lock(&dev_priv->reservation_sem, true);
- if (unlikely(ret != 0))
- return ret;
-
ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
user_accounting_size, &ctx);
if (ret != 0) {
@@ -2192,13 +2177,11 @@ int vmw_gb_surface_define(struct vmw_private *dev_priv,
*/
ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
- ttm_read_unlock(&dev_priv->reservation_sem);
return ret;
out_no_user_srf:
ttm_mem_global_free(vmw_mem_glob(dev_priv), user_accounting_size);
out_unlock:
- ttm_read_unlock(&dev_priv->reservation_sem);
return ret;
}
--
2.27.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 5/6] drm/vmwgfx: Add basic support for SVGA3
2021-05-05 3:57 [PATCH 0/6] drm/vmwgfx: SVGA v3 and arm64 support Zack Rusin
` (3 preceding siblings ...)
2021-05-05 3:57 ` [PATCH 4/6] drm/vmwgfx: Remove the reservation semaphore Zack Rusin
@ 2021-05-05 3:57 ` Zack Rusin
2021-05-05 7:46 ` kernel test robot
` (4 more replies)
2021-05-05 3:57 ` [PATCH 6/6] drm/vmwgfx: Port vmwgfx to arm64 Zack Rusin
5 siblings, 5 replies; 12+ messages in thread
From: Zack Rusin @ 2021-05-05 3:57 UTC (permalink / raw)
To: dri-devel; +Cc: krastevm, sroland
SVGA3 is the next version of our PCI device. Some of the changes
include using MMIO for register accesses instead of ioports,
deprecating the FIFO MMIO and removing a lot of the old and
legacy functionality. SVGA3 doesn't support guest backed
objects right now so everything except 3D is working.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Cc: Martin Krastev <krastevm@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
---
.../gpu/drm/vmwgfx/device_include/svga_reg.h | 55 ++++++-
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c | 114 +++++++--------
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 136 ++++++++++++++----
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 120 ++++++++++++----
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 16 +--
drivers/gpu/drm/vmwgfx/vmwgfx_fence.h | 2 -
drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c | 49 +------
drivers/gpu/drm/vmwgfx/vmwgfx_irq.c | 75 ++--------
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 23 ++-
drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c | 36 +++--
drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_reg.h | 4 -
13 files changed, 363 insertions(+), 271 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/device_include/svga_reg.h b/drivers/gpu/drm/vmwgfx/device_include/svga_reg.h
index 19fb9e3299e7..193a57f6aae5 100644
--- a/drivers/gpu/drm/vmwgfx/device_include/svga_reg.h
+++ b/drivers/gpu/drm/vmwgfx/device_include/svga_reg.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 OR MIT */
/**********************************************************
- * Copyright 1998-2015 VMware, Inc.
+ * Copyright 1998-2021 VMware, Inc.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
@@ -98,6 +98,10 @@ typedef uint32 SVGAMobId;
#define SVGA_MAGIC 0x900000UL
#define SVGA_MAKE_ID(ver) (SVGA_MAGIC << 8 | (ver))
+/* Version 3 has the control bar instead of the FIFO */
+#define SVGA_VERSION_3 3
+#define SVGA_ID_3 SVGA_MAKE_ID(SVGA_VERSION_3)
+
/* Version 2 let the address of the frame buffer be unsigned on Win32 */
#define SVGA_VERSION_2 2
#define SVGA_ID_2 SVGA_MAKE_ID(SVGA_VERSION_2)
@@ -129,11 +133,12 @@ typedef uint32 SVGAMobId;
* Interrupts are only supported when the
* SVGA_CAP_IRQMASK capability is present.
*/
-#define SVGA_IRQFLAG_ANY_FENCE 0x1 /* Any fence was passed */
-#define SVGA_IRQFLAG_FIFO_PROGRESS 0x2 /* Made forward progress in the FIFO */
-#define SVGA_IRQFLAG_FENCE_GOAL 0x4 /* SVGA_FIFO_FENCE_GOAL reached */
-#define SVGA_IRQFLAG_COMMAND_BUFFER 0x8 /* Command buffer completed */
-#define SVGA_IRQFLAG_ERROR 0x10 /* Error while processing commands */
+#define SVGA_IRQFLAG_ANY_FENCE (1 << 0) /* Any fence was passed */
+#define SVGA_IRQFLAG_FIFO_PROGRESS (1 << 1) /* Made forward progress in the FIFO */
+#define SVGA_IRQFLAG_FENCE_GOAL (1 << 2) /* SVGA_FIFO_FENCE_GOAL reached */
+#define SVGA_IRQFLAG_COMMAND_BUFFER (1 << 3) /* Command buffer completed */
+#define SVGA_IRQFLAG_ERROR (1 << 4) /* Error while processing commands */
+#define SVGA_IRQFLAG_MAX (1 << 5)
/*
* The byte-size is the size of the actual cursor data,
@@ -286,7 +291,32 @@ enum {
*/
SVGA_REG_GBOBJECT_MEM_SIZE_KB = 76,
- SVGA_REG_TOP = 77, /* Must be 1 more than the last register */
+ /*
+ + * These registers are for the addresses of the memory BARs for SVGA3
+ */
+ SVGA_REG_REGS_START_HIGH32 = 77,
+ SVGA_REG_REGS_START_LOW32 = 78,
+ SVGA_REG_FB_START_HIGH32 = 79,
+ SVGA_REG_FB_START_LOW32 = 80,
+
+ /*
+ * A hint register that recommends which quality level the guest should
+ * currently use to define multisample surfaces.
+ *
+ * If the register is SVGA_REG_MSHINT_DISABLED,
+ * the guest is only allowed to use SVGA3D_MS_QUALITY_FULL.
+ *
+ * Otherwise, this is a live value that can change while the VM is
+ * powered on with the hint suggestion for which quality level the guest
+ * should be using. Guests are free to ignore the hint and use either
+ * RESOLVE or FULL quality.
+ */
+ SVGA_REG_MSHINT = 81,
+
+ SVGA_REG_IRQ_STATUS = 82,
+ SVGA_REG_DIRTY_TRACKING = 83,
+
+ SVGA_REG_TOP = 84, /* Must be 1 more than the last register */
SVGA_PALETTE_BASE = 1024, /* Base of SVGA color map */
/* Next 768 (== 256*3) registers exist for colormap */
@@ -310,6 +340,17 @@ typedef enum SVGARegGuestDriverId {
SVGA_REG_GUEST_DRIVER_ID_SUBMIT = MAX_UINT32,
} SVGARegGuestDriverId;
+typedef enum SVGARegMSHint {
+ SVGA_REG_MSHINT_DISABLED = 0,
+ SVGA_REG_MSHINT_FULL = 1,
+ SVGA_REG_MSHINT_RESOLVED = 2,
+} SVGARegMSHint;
+
+typedef enum SVGARegDirtyTracking {
+ SVGA_REG_DIRTY_TRACKING_PER_IMAGE = 0,
+ SVGA_REG_DIRTY_TRACKING_PER_SURFACE = 1,
+} SVGARegDirtyTracking;
+
/*
* Guest memory regions (GMRs):
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c b/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c
index 20246a7c97c9..5dae8a7066b6 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c
@@ -31,15 +31,10 @@
#include "vmwgfx_drv.h"
-struct vmw_temp_set_context {
- SVGA3dCmdHeader header;
- SVGA3dCmdDXTempSetContext body;
-};
-
bool vmw_supports_3d(struct vmw_private *dev_priv)
{
uint32_t fifo_min, hwversion;
- const struct vmw_fifo_state *fifo = &dev_priv->fifo;
+ const struct vmw_fifo_state *fifo = dev_priv->fifo;
if (!(dev_priv->capabilities & SVGA_CAP_3D))
return false;
@@ -61,6 +56,8 @@ bool vmw_supports_3d(struct vmw_private *dev_priv)
if (!(dev_priv->capabilities & SVGA_CAP_EXTENDED_FIFO))
return false;
+ BUG_ON(vmw_is_svga_v3(dev_priv));
+
fifo_min = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_MIN);
if (fifo_min <= SVGA_FIFO_3D_HWVERSION * sizeof(unsigned int))
return false;
@@ -98,16 +95,20 @@ bool vmw_fifo_have_pitchlock(struct vmw_private *dev_priv)
return false;
}
-int vmw_fifo_init(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo)
+struct vmw_fifo_state *vmw_fifo_create(struct vmw_private *dev_priv)
{
+ struct vmw_fifo_state *fifo;
uint32_t max;
uint32_t min;
- fifo->dx = false;
+ if (!dev_priv->fifo_mem)
+ return 0;
+
+ fifo = kzalloc(sizeof(*fifo), GFP_KERNEL);
fifo->static_buffer_size = VMWGFX_FIFO_STATIC_SIZE;
fifo->static_buffer = vmalloc(fifo->static_buffer_size);
if (unlikely(fifo->static_buffer == NULL))
- return -ENOMEM;
+ return ERR_PTR(-ENOMEM);
fifo->dynamic_buffer = NULL;
fifo->reserved_size = 0;
@@ -115,20 +116,6 @@ int vmw_fifo_init(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo)
mutex_init(&fifo->fifo_mutex);
init_rwsem(&fifo->rwsem);
-
- DRM_INFO("width %d\n", vmw_read(dev_priv, SVGA_REG_WIDTH));
- DRM_INFO("height %d\n", vmw_read(dev_priv, SVGA_REG_HEIGHT));
- DRM_INFO("bpp %d\n", vmw_read(dev_priv, SVGA_REG_BITS_PER_PIXEL));
-
- dev_priv->enable_state = vmw_read(dev_priv, SVGA_REG_ENABLE);
- dev_priv->config_done_state = vmw_read(dev_priv, SVGA_REG_CONFIG_DONE);
- dev_priv->traces_state = vmw_read(dev_priv, SVGA_REG_TRACES);
-
- vmw_write(dev_priv, SVGA_REG_ENABLE, SVGA_REG_ENABLE_ENABLE |
- SVGA_REG_ENABLE_HIDE);
-
- vmw_write(dev_priv, SVGA_REG_TRACES, 0);
-
min = 4;
if (dev_priv->capabilities & SVGA_CAP_EXTENDED_FIFO)
min = vmw_read(dev_priv, SVGA_REG_MEM_REGS);
@@ -155,35 +142,23 @@ int vmw_fifo_init(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo)
(unsigned int) max,
(unsigned int) min,
(unsigned int) fifo->capabilities);
-
- atomic_set(&dev_priv->marker_seq, dev_priv->last_read_seqno);
- vmw_fifo_mem_write(dev_priv, SVGA_FIFO_FENCE, dev_priv->last_read_seqno);
-
- return 0;
+ return fifo;
}
void vmw_fifo_ping_host(struct vmw_private *dev_priv, uint32_t reason)
{
u32 *fifo_mem = dev_priv->fifo_mem;
-
- if (cmpxchg(fifo_mem + SVGA_FIFO_BUSY, 0, 1) == 0)
+ if (fifo_mem && cmpxchg(fifo_mem + SVGA_FIFO_BUSY, 0, 1) == 0)
vmw_write(dev_priv, SVGA_REG_SYNC, reason);
+
}
-void vmw_fifo_release(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo)
+void vmw_fifo_destroy(struct vmw_private *dev_priv)
{
- vmw_write(dev_priv, SVGA_REG_SYNC, SVGA_SYNC_GENERIC);
- while (vmw_read(dev_priv, SVGA_REG_BUSY) != 0)
- ;
+ struct vmw_fifo_state *fifo = dev_priv->fifo;
- dev_priv->last_read_seqno = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_FENCE);
-
- vmw_write(dev_priv, SVGA_REG_CONFIG_DONE,
- dev_priv->config_done_state);
- vmw_write(dev_priv, SVGA_REG_ENABLE,
- dev_priv->enable_state);
- vmw_write(dev_priv, SVGA_REG_TRACES,
- dev_priv->traces_state);
+ if (!fifo)
+ return;
if (likely(fifo->static_buffer != NULL)) {
vfree(fifo->static_buffer);
@@ -194,6 +169,8 @@ void vmw_fifo_release(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo)
vfree(fifo->dynamic_buffer);
fifo->dynamic_buffer = NULL;
}
+ kfree(fifo);
+ dev_priv->fifo = NULL;
}
static bool vmw_fifo_is_full(struct vmw_private *dev_priv, uint32_t bytes)
@@ -289,7 +266,7 @@ static int vmw_fifo_wait(struct vmw_private *dev_priv,
static void *vmw_local_fifo_reserve(struct vmw_private *dev_priv,
uint32_t bytes)
{
- struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
+ struct vmw_fifo_state *fifo_state = dev_priv->fifo;
u32 *fifo_mem = dev_priv->fifo_mem;
uint32_t max;
uint32_t min;
@@ -438,16 +415,12 @@ static void vmw_fifo_slow_copy(struct vmw_fifo_state *fifo_state,
static void vmw_local_fifo_commit(struct vmw_private *dev_priv, uint32_t bytes)
{
- struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
+ struct vmw_fifo_state *fifo_state = dev_priv->fifo;
uint32_t next_cmd = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_NEXT_CMD);
uint32_t max = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_MAX);
uint32_t min = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_MIN);
bool reserveable = fifo_state->capabilities & SVGA_FIFO_CAP_RESERVE;
- if (fifo_state->dx)
- bytes += sizeof(struct vmw_temp_set_context);
-
- fifo_state->dx = false;
BUG_ON((bytes & 3) != 0);
BUG_ON(bytes > fifo_state->reserved_size);
@@ -527,7 +500,6 @@ int vmw_cmd_flush(struct vmw_private *dev_priv, bool interruptible)
int vmw_cmd_send_fence(struct vmw_private *dev_priv, uint32_t *seqno)
{
- struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
struct svga_fifo_cmd_fence *cmd_fence;
u32 *fm;
int ret = 0;
@@ -546,7 +518,7 @@ int vmw_cmd_send_fence(struct vmw_private *dev_priv, uint32_t *seqno)
*seqno = atomic_add_return(1, &dev_priv->marker_seq);
} while (*seqno == 0);
- if (!(fifo_state->capabilities & SVGA_FIFO_CAP_FENCE)) {
+ if (!(vmw_fifo_caps(dev_priv) & SVGA_FIFO_CAP_FENCE)) {
/*
* Don't request hardware to send a fence. The
@@ -561,22 +533,22 @@ int vmw_cmd_send_fence(struct vmw_private *dev_priv, uint32_t *seqno)
cmd_fence = (struct svga_fifo_cmd_fence *) fm;
cmd_fence->fence = *seqno;
vmw_cmd_commit_flush(dev_priv, bytes);
- vmw_update_seqno(dev_priv, fifo_state);
+ vmw_update_seqno(dev_priv);
out_err:
return ret;
}
/**
- * vmw_fifo_emit_dummy_legacy_query - emits a dummy query to the fifo using
+ * vmw_cmd_emit_dummy_legacy_query - emits a dummy query to the fifo using
* legacy query commands.
*
* @dev_priv: The device private structure.
* @cid: The hardware context id used for the query.
*
- * See the vmw_fifo_emit_dummy_query documentation.
+ * See the vmw_cmd_emit_dummy_query documentation.
*/
-static int vmw_fifo_emit_dummy_legacy_query(struct vmw_private *dev_priv,
+static int vmw_cmd_emit_dummy_legacy_query(struct vmw_private *dev_priv,
uint32_t cid)
{
/*
@@ -614,16 +586,16 @@ static int vmw_fifo_emit_dummy_legacy_query(struct vmw_private *dev_priv,
}
/**
- * vmw_fifo_emit_dummy_gb_query - emits a dummy query to the fifo using
+ * vmw_cmd_emit_dummy_gb_query - emits a dummy query to the fifo using
* guest-backed resource query commands.
*
* @dev_priv: The device private structure.
* @cid: The hardware context id used for the query.
*
- * See the vmw_fifo_emit_dummy_query documentation.
+ * See the vmw_cmd_emit_dummy_query documentation.
*/
-static int vmw_fifo_emit_dummy_gb_query(struct vmw_private *dev_priv,
- uint32_t cid)
+static int vmw_cmd_emit_dummy_gb_query(struct vmw_private *dev_priv,
+ uint32_t cid)
{
/*
* A query wait without a preceding query end will
@@ -656,7 +628,7 @@ static int vmw_fifo_emit_dummy_gb_query(struct vmw_private *dev_priv,
/**
- * vmw_fifo_emit_dummy_gb_query - emits a dummy query to the fifo using
+ * vmw_cmd_emit_dummy_gb_query - emits a dummy query to the fifo using
* appropriate resource query commands.
*
* @dev_priv: The device private structure.
@@ -677,7 +649,27 @@ int vmw_cmd_emit_dummy_query(struct vmw_private *dev_priv,
uint32_t cid)
{
if (dev_priv->has_mob)
- return vmw_fifo_emit_dummy_gb_query(dev_priv, cid);
+ return vmw_cmd_emit_dummy_gb_query(dev_priv, cid);
+
+ return vmw_cmd_emit_dummy_legacy_query(dev_priv, cid);
+}
- return vmw_fifo_emit_dummy_legacy_query(dev_priv, cid);
+
+/**
+ * vmw_cmd_supported - returns true if the given device supports
+ * command queues.
+ *
+ * @dev_priv: The device private structure.
+ *
+ * Returns true if we can issue commands.
+ */
+bool vmw_cmd_supported(struct vmw_private *vmw)
+{
+ if ((vmw->capabilities & (SVGA_CAP_COMMAND_BUFFERS |
+ SVGA_CAP_CMD_BUFFERS_2)) != 0)
+ return true;
+ /*
+ * We have FIFO cmd's
+ */
+ return vmw->fifo_mem != 0;
}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index 22a2874116c9..3c44091ff44f 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -246,6 +246,7 @@ static const struct drm_ioctl_desc vmw_ioctls[] = {
static const struct pci_device_id vmw_pci_id_list[] = {
{ PCI_DEVICE(0x15ad, VMWGFX_PCI_ID_SVGA2) },
+ { PCI_DEVICE(0x15ad, VMWGFX_PCI_ID_SVGA3) },
{ }
};
MODULE_DEVICE_TABLE(pci, vmw_pci_id_list);
@@ -393,6 +394,60 @@ static int vmw_dummy_query_bo_create(struct vmw_private *dev_priv)
return ret;
}
+static int vmw_device_init(struct vmw_private *dev_priv)
+{
+ bool uses_fb_traces = false;
+
+ DRM_INFO("width %d\n", vmw_read(dev_priv, SVGA_REG_WIDTH));
+ DRM_INFO("height %d\n", vmw_read(dev_priv, SVGA_REG_HEIGHT));
+ DRM_INFO("bpp %d\n", vmw_read(dev_priv, SVGA_REG_BITS_PER_PIXEL));
+
+ dev_priv->enable_state = vmw_read(dev_priv, SVGA_REG_ENABLE);
+ dev_priv->config_done_state = vmw_read(dev_priv, SVGA_REG_CONFIG_DONE);
+ dev_priv->traces_state = vmw_read(dev_priv, SVGA_REG_TRACES);
+
+ vmw_write(dev_priv, SVGA_REG_ENABLE, SVGA_REG_ENABLE_ENABLE |
+ SVGA_REG_ENABLE_HIDE);
+
+ uses_fb_traces = !vmw_cmd_supported(dev_priv) &&
+ (dev_priv->capabilities & SVGA_CAP_TRACES) != 0;
+
+ vmw_write(dev_priv, SVGA_REG_TRACES, uses_fb_traces);
+ dev_priv->fifo = vmw_fifo_create(dev_priv);
+ if (IS_ERR(dev_priv->fifo)) {
+ int err = PTR_ERR(dev_priv->fifo);
+ dev_priv->fifo = NULL;
+ return err;
+ } else if (!dev_priv->fifo) {
+ vmw_write(dev_priv, SVGA_REG_CONFIG_DONE, 1);
+ }
+
+ dev_priv->last_read_seqno = vmw_fence_read(dev_priv);
+ atomic_set(&dev_priv->marker_seq, dev_priv->last_read_seqno);
+ return 0;
+}
+
+static void vmw_device_fini(struct vmw_private *vmw)
+{
+ /*
+ * Legacy sync
+ */
+ vmw_write(vmw, SVGA_REG_SYNC, SVGA_SYNC_GENERIC);
+ while (vmw_read(vmw, SVGA_REG_BUSY) != 0)
+ ;
+
+ vmw->last_read_seqno = vmw_fence_read(vmw);
+
+ vmw_write(vmw, SVGA_REG_CONFIG_DONE,
+ vmw->config_done_state);
+ vmw_write(vmw, SVGA_REG_ENABLE,
+ vmw->enable_state);
+ vmw_write(vmw, SVGA_REG_TRACES,
+ vmw->traces_state);
+
+ vmw_fifo_destroy(vmw);
+}
+
/**
* vmw_request_device_late - Perform late device setup
*
@@ -433,9 +488,9 @@ static int vmw_request_device(struct vmw_private *dev_priv)
{
int ret;
- ret = vmw_fifo_init(dev_priv, &dev_priv->fifo);
+ ret = vmw_device_init(dev_priv);
if (unlikely(ret != 0)) {
- DRM_ERROR("Unable to initialize FIFO.\n");
+ DRM_ERROR("Unable to initialize the device.\n");
return ret;
}
vmw_fence_fifo_up(dev_priv->fman);
@@ -469,7 +524,7 @@ static int vmw_request_device(struct vmw_private *dev_priv)
vmw_cmdbuf_man_destroy(dev_priv->cman);
out_no_mob:
vmw_fence_fifo_down(dev_priv->fman);
- vmw_fifo_release(dev_priv, &dev_priv->fifo);
+ vmw_device_fini(dev_priv);
return ret;
}
@@ -517,7 +572,7 @@ static void vmw_release_device_late(struct vmw_private *dev_priv)
if (dev_priv->cman)
vmw_cmdbuf_man_destroy(dev_priv->cman);
- vmw_fifo_release(dev_priv, &dev_priv->fifo);
+ vmw_device_fini(dev_priv);
}
/*
@@ -638,6 +693,8 @@ static void vmw_vram_manager_fini(struct vmw_private *dev_priv)
static int vmw_setup_pci_resources(struct vmw_private *dev,
unsigned long pci_id)
{
+ resource_size_t rmmio_start;
+ resource_size_t rmmio_size;
resource_size_t fifo_start;
resource_size_t fifo_size;
int ret;
@@ -649,23 +706,45 @@ static int vmw_setup_pci_resources(struct vmw_private *dev,
if (ret)
return ret;
- dev->io_start = pci_resource_start(pdev, 0);
- dev->vram_start = pci_resource_start(pdev, 1);
- dev->vram_size = pci_resource_len(pdev, 1);
- fifo_start = pci_resource_start(pdev, 2);
- fifo_size = pci_resource_len(pdev, 2);
-
- DRM_INFO("FIFO at %pa size is %llu kiB\n",
- &fifo_start, (uint64_t)fifo_size / 1024);
- dev->fifo_mem = devm_memremap(dev->drm.dev,
- fifo_start,
- fifo_size,
- MEMREMAP_WB);
-
- if (IS_ERR(dev->fifo_mem)) {
- DRM_ERROR("Failed mapping FIFO memory.\n");
+ dev->pci_id = pci_id;
+ if (pci_id == VMWGFX_PCI_ID_SVGA3) {
+ rmmio_start = pci_resource_start(pdev, 0);
+ rmmio_size = pci_resource_len(pdev, 0);
+ dev->vram_start = pci_resource_start(pdev, 2);
+ dev->vram_size = pci_resource_len(pdev, 2);
+
+ DRM_INFO("Register MMIO at 0x%pa size is %llu kiB\n",
+ &rmmio_start, (uint64_t)rmmio_size / 1024);
+ dev->rmmio = devm_ioremap(dev->drm.dev,
+ rmmio_start,
+ rmmio_size);
+ if (IS_ERR(dev->rmmio)) {
+ DRM_ERROR("Failed mapping registers mmio memory.\n");
+ pci_release_regions(pdev);
+ return PTR_ERR(dev->rmmio);
+ }
+ } else if (pci_id == VMWGFX_PCI_ID_SVGA2) {
+ dev->io_start = pci_resource_start(pdev, 0);
+ dev->vram_start = pci_resource_start(pdev, 1);
+ dev->vram_size = pci_resource_len(pdev, 1);
+ fifo_start = pci_resource_start(pdev, 2);
+ fifo_size = pci_resource_len(pdev, 2);
+
+ DRM_INFO("FIFO at %pa size is %llu kiB\n",
+ &fifo_start, (uint64_t)fifo_size / 1024);
+ dev->fifo_mem = devm_memremap(dev->drm.dev,
+ fifo_start,
+ fifo_size,
+ MEMREMAP_WB);
+
+ if (IS_ERR(dev->fifo_mem)) {
+ DRM_ERROR("Failed mapping FIFO memory.\n");
+ pci_release_regions(pdev);
+ return PTR_ERR(dev->fifo_mem);
+ }
+ } else {
pci_release_regions(pdev);
- return PTR_ERR(dev->fifo_mem);
+ return -EINVAL;
}
/*
@@ -684,13 +763,16 @@ static int vmw_detect_version(struct vmw_private *dev)
{
uint32_t svga_id;
- vmw_write(dev, SVGA_REG_ID, SVGA_ID_2);
+ vmw_write(dev, SVGA_REG_ID, vmw_is_svga_v3(dev) ?
+ SVGA_ID_3 : SVGA_ID_2);
svga_id = vmw_read(dev, SVGA_REG_ID);
- if (svga_id != SVGA_ID_2) {
+ if (svga_id != SVGA_ID_2 && svga_id != SVGA_ID_3) {
DRM_ERROR("Unsupported SVGA ID 0x%x on chipset 0x%x\n",
svga_id, dev->vmw_chipset);
return -ENOSYS;
}
+ BUG_ON(vmw_is_svga_v3(dev) && (svga_id != SVGA_ID_3));
+ DRM_INFO("Running on SVGA version %d.\n", (svga_id & 0xff));
return 0;
}
@@ -703,7 +785,6 @@ static int vmw_driver_load(struct vmw_private *dev_priv, u32 pci_id)
struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
dev_priv->vmw_chipset = pci_id;
- dev_priv->last_read_seqno = (uint32_t) -100;
dev_priv->drm.dev_private = dev_priv;
mutex_init(&dev_priv->cmdbuf_mutex);
@@ -824,6 +905,8 @@ static int vmw_driver_load(struct vmw_private *dev_priv, u32 pci_id)
vmw_print_capabilities(dev_priv->capabilities);
if (dev_priv->capabilities & SVGA_CAP_CAP2_REGISTER)
vmw_print_capabilities2(dev_priv->capabilities2);
+ DRM_INFO("Supports command queues = %d\n",
+ vmw_cmd_supported((dev_priv)));
ret = vmw_dma_masks(dev_priv);
if (unlikely(ret != 0))
@@ -1390,8 +1473,7 @@ static int vmw_pm_restore(struct device *kdev)
struct vmw_private *dev_priv = vmw_priv(dev);
int ret;
- vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2);
- (void) vmw_read(dev_priv, SVGA_REG_ID);
+ vmw_detect_version(dev_priv);
if (dev_priv->enable_fb)
vmw_fifo_resource_inc(dev_priv);
@@ -1428,8 +1510,8 @@ static const struct file_operations vmwgfx_driver_fops = {
.release = drm_release,
.unlocked_ioctl = vmw_unlocked_ioctl,
.mmap = vmw_mmap,
- .poll = vmw_fops_poll,
- .read = vmw_fops_read,
+ .poll = drm_poll,
+ .read = drm_read,
#if defined(CONFIG_COMPAT)
.compat_ioctl = vmw_compat_ioctl,
#endif
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
index 2fb6898ceca9..696ea7086140 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
@@ -66,6 +66,7 @@
#define VMWGFX_ENABLE_SCREEN_TARGET_OTABLE 1
#define VMWGFX_PCI_ID_SVGA2 0x0405
+#define VMWGFX_PCI_ID_SVGA3 0x0406
/*
* Perhaps we should have sysfs entries for these.
@@ -284,7 +285,6 @@ struct vmw_fifo_state {
uint32_t capabilities;
struct mutex fifo_mutex;
struct rw_semaphore rwsem;
- bool dx;
};
/**
@@ -485,14 +485,14 @@ struct vmw_private {
struct drm_device drm;
struct ttm_device bdev;
- struct vmw_fifo_state fifo;
-
struct drm_vma_offset_manager vma_manager;
+ unsigned long pci_id;
u32 vmw_chipset;
resource_size_t io_start;
resource_size_t vram_start;
resource_size_t vram_size;
resource_size_t prim_bb_mem;
+ u32 *rmmio;
u32 *fifo_mem;
resource_size_t fifo_mem_size;
uint32_t fb_max_width;
@@ -623,6 +623,7 @@ struct vmw_private {
*/
struct vmw_otable_batch otable_batch;
+ struct vmw_fifo_state *fifo;
struct vmw_cmdbuf_man *cman;
DECLARE_BITMAP(irqthread_pending, VMW_IRQTHREAD_MAX);
@@ -645,6 +646,14 @@ static inline struct vmw_fpriv *vmw_fpriv(struct drm_file *file_priv)
return (struct vmw_fpriv *)file_priv->driver_priv;
}
+/*
+ * SVGA v3 has mmio register access and lacks fifo cmds
+ */
+static inline bool vmw_is_svga_v3(const struct vmw_private *dev)
+{
+ return dev->pci_id == VMWGFX_PCI_ID_SVGA3;
+}
+
/*
* The locking here is fine-grained, so that it is performed once
* for every read- and write operation. This is of course costly, but we
@@ -655,10 +664,14 @@ static inline struct vmw_fpriv *vmw_fpriv(struct drm_file *file_priv)
static inline void vmw_write(struct vmw_private *dev_priv,
unsigned int offset, uint32_t value)
{
- spin_lock(&dev_priv->hw_lock);
- outl(offset, dev_priv->io_start + VMWGFX_INDEX_PORT);
- outl(value, dev_priv->io_start + VMWGFX_VALUE_PORT);
- spin_unlock(&dev_priv->hw_lock);
+ if (vmw_is_svga_v3(dev_priv)) {
+ iowrite32(value, dev_priv->rmmio + offset);
+ } else {
+ spin_lock(&dev_priv->hw_lock);
+ outl(offset, dev_priv->io_start + SVGA_INDEX_PORT);
+ outl(value, dev_priv->io_start + SVGA_VALUE_PORT);
+ spin_unlock(&dev_priv->hw_lock);
+ }
}
static inline uint32_t vmw_read(struct vmw_private *dev_priv,
@@ -666,10 +679,14 @@ static inline uint32_t vmw_read(struct vmw_private *dev_priv,
{
u32 val;
- spin_lock(&dev_priv->hw_lock);
- outl(offset, dev_priv->io_start + VMWGFX_INDEX_PORT);
- val = inl(dev_priv->io_start + VMWGFX_VALUE_PORT);
- spin_unlock(&dev_priv->hw_lock);
+ if (vmw_is_svga_v3(dev_priv)) {
+ val = ioread32(dev_priv->rmmio + offset);
+ } else {
+ spin_lock(&dev_priv->hw_lock);
+ outl(offset, dev_priv->io_start + SVGA_INDEX_PORT);
+ val = inl(dev_priv->io_start + SVGA_VALUE_PORT);
+ spin_unlock(&dev_priv->hw_lock);
+ }
return val;
}
@@ -932,19 +949,14 @@ extern int vmw_present_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
extern int vmw_present_readback_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
-extern __poll_t vmw_fops_poll(struct file *filp,
- struct poll_table_struct *wait);
-extern ssize_t vmw_fops_read(struct file *filp, char __user *buffer,
- size_t count, loff_t *offset);
/**
* Fifo utilities - vmwgfx_fifo.c
*/
-extern int vmw_fifo_init(struct vmw_private *dev_priv,
- struct vmw_fifo_state *fifo);
-extern void vmw_fifo_release(struct vmw_private *dev_priv,
- struct vmw_fifo_state *fifo);
+extern struct vmw_fifo_state *vmw_fifo_create(struct vmw_private *dev_priv);
+extern void vmw_fifo_destroy(struct vmw_private *dev_priv);
+extern bool vmw_cmd_supported(struct vmw_private *vmw);
extern void *
vmw_cmd_ctx_reserve(struct vmw_private *dev_priv, uint32_t bytes, int ctx_id);
extern void vmw_cmd_commit(struct vmw_private *dev_priv, uint32_t bytes);
@@ -970,6 +982,31 @@ extern int vmw_cmd_flush(struct vmw_private *dev_priv,
#define VMW_CMD_RESERVE(__priv, __bytes) \
VMW_CMD_CTX_RESERVE(__priv, __bytes, SVGA3D_INVALID_ID)
+
+/**
+ * vmw_fifo_caps - Returns the capabilities of the FIFO command
+ * queue or 0 if fifo memory isn't present.
+ * @dev_priv: The device private context
+ */
+static inline uint32_t vmw_fifo_caps(const struct vmw_private *dev_priv)
+{
+ if (!dev_priv->fifo_mem || !dev_priv->fifo)
+ return 0;
+ return dev_priv->fifo->capabilities;
+}
+
+
+/**
+ * vmw_is_cursor_bypass3_enabled - Returns TRUE iff Cursor Bypass 3
+ * is enabled in the FIFO.
+ * @dev_priv: The device private context
+ */
+static inline bool
+vmw_is_cursor_bypass3_enabled(const struct vmw_private *dev_priv)
+{
+ return (vmw_fifo_caps(dev_priv) & SVGA_FIFO_CAP_CURSOR_BYPASS_3) != 0;
+}
+
/**
* TTM glue - vmwgfx_ttm_glue.c
*/
@@ -1079,9 +1116,6 @@ bool vmw_cmd_describe(const void *buf, u32 *size, char const **cmd);
* IRQs and wating - vmwgfx_irq.c
*/
-extern int vmw_wait_seqno(struct vmw_private *dev_priv, bool lazy,
- uint32_t seqno, bool interruptible,
- unsigned long timeout);
extern int vmw_irq_install(struct drm_device *dev, int irq);
extern void vmw_irq_uninstall(struct drm_device *dev);
extern bool vmw_seqno_passed(struct vmw_private *dev_priv,
@@ -1092,8 +1126,7 @@ extern int vmw_fallback_wait(struct vmw_private *dev_priv,
uint32_t seqno,
bool interruptible,
unsigned long timeout);
-extern void vmw_update_seqno(struct vmw_private *dev_priv,
- struct vmw_fifo_state *fifo_state);
+extern void vmw_update_seqno(struct vmw_private *dev_priv);
extern void vmw_seqno_waiter_add(struct vmw_private *dev_priv);
extern void vmw_seqno_waiter_remove(struct vmw_private *dev_priv);
extern void vmw_goal_waiter_add(struct vmw_private *dev_priv);
@@ -1572,6 +1605,7 @@ static inline void vmw_fifo_resource_dec(struct vmw_private *dev_priv)
*/
static inline u32 vmw_fifo_mem_read(struct vmw_private *vmw, uint32 fifo_reg)
{
+ BUG_ON(vmw_is_svga_v3(vmw));
return READ_ONCE(*(vmw->fifo_mem + fifo_reg));
}
@@ -1586,6 +1620,44 @@ static inline u32 vmw_fifo_mem_read(struct vmw_private *vmw, uint32 fifo_reg)
static inline void vmw_fifo_mem_write(struct vmw_private *vmw, u32 fifo_reg,
u32 value)
{
+ BUG_ON(vmw_is_svga_v3(vmw));
WRITE_ONCE(*(vmw->fifo_mem + fifo_reg), value);
}
+
+static inline u32 vmw_fence_read(struct vmw_private *dev_priv)
+{
+ u32 fence;
+ if (vmw_is_svga_v3(dev_priv))
+ fence = vmw_read(dev_priv, SVGA_REG_FENCE);
+ else
+ fence = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_FENCE);
+ return fence;
+}
+
+static inline void vmw_fence_write(struct vmw_private *dev_priv,
+ u32 fence)
+{
+ BUG_ON(vmw_is_svga_v3(dev_priv));
+ vmw_fifo_mem_write(dev_priv, SVGA_FIFO_FENCE, fence);
+}
+
+static inline u32 vmw_irq_status_read(struct vmw_private *vmw)
+{
+ u32 status;
+ if (vmw_is_svga_v3(vmw))
+ status = vmw_read(vmw, SVGA_REG_IRQ_STATUS);
+ else
+ status = inl(vmw->io_start + SVGA_IRQSTATUS_PORT);
+ return status;
+}
+
+static inline void vmw_irq_status_write(struct vmw_private *vmw,
+ uint32 status)
+{
+ if (vmw_is_svga_v3(vmw))
+ vmw_write(vmw, SVGA_REG_IRQ_STATUS, status);
+ else
+ outl(status, vmw->io_start + SVGA_IRQSTATUS_PORT);
+}
+
#endif
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
index 3ad07657b7d2..b79a2ba68411 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
@@ -3841,7 +3841,7 @@ vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
fence_rep.handle = fence_handle;
fence_rep.seqno = fence->base.seqno;
- vmw_update_seqno(dev_priv, &dev_priv->fifo);
+ vmw_update_seqno(dev_priv);
fence_rep.passed_seqno = dev_priv->last_read_seqno;
}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
index 23523eb3cac2..7fe744da9919 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
@@ -139,12 +139,10 @@ static bool vmw_fence_enable_signaling(struct dma_fence *f)
struct vmw_fence_manager *fman = fman_from_fence(fence);
struct vmw_private *dev_priv = fman->dev_priv;
- u32 seqno = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_FENCE);
+ u32 seqno = vmw_fence_read(dev_priv);
if (seqno - fence->base.seqno < VMW_FENCE_WRAP)
return false;
- vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
-
return true;
}
@@ -177,7 +175,6 @@ static long vmw_fence_wait(struct dma_fence *f, bool intr, signed long timeout)
if (likely(vmw_fence_obj_signaled(fence)))
return timeout;
- vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
vmw_seqno_waiter_add(dev_priv);
spin_lock(f->lock);
@@ -464,7 +461,7 @@ static void __vmw_fences_update(struct vmw_fence_manager *fman)
bool needs_rerun;
uint32_t seqno, new_seqno;
- seqno = vmw_fifo_mem_read(fman->dev_priv, SVGA_FIFO_FENCE);
+ seqno = vmw_fence_read(fman->dev_priv);
rerun:
list_for_each_entry_safe(fence, next_fence, &fman->fence_list, head) {
if (seqno - fence->base.seqno < VMW_FENCE_WRAP) {
@@ -486,7 +483,7 @@ static void __vmw_fences_update(struct vmw_fence_manager *fman)
needs_rerun = vmw_fence_goal_new_locked(fman, seqno);
if (unlikely(needs_rerun)) {
- new_seqno = vmw_fifo_mem_read(fman->dev_priv, SVGA_FIFO_FENCE);
+ new_seqno = vmw_fence_read(fman->dev_priv);
if (new_seqno != seqno) {
seqno = new_seqno;
goto rerun;
@@ -529,13 +526,6 @@ int vmw_fence_obj_wait(struct vmw_fence_obj *fence, bool lazy,
return ret;
}
-void vmw_fence_obj_flush(struct vmw_fence_obj *fence)
-{
- struct vmw_private *dev_priv = fman_from_fence(fence)->dev_priv;
-
- vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
-}
-
static void vmw_fence_destroy(struct vmw_fence_obj *fence)
{
dma_fence_free(&fence->base);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h
index 50e9fdd7acf1..079ab4f3ba51 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h
@@ -94,8 +94,6 @@ extern int vmw_fence_obj_wait(struct vmw_fence_obj *fence,
bool lazy,
bool interruptible, unsigned long timeout);
-extern void vmw_fence_obj_flush(struct vmw_fence_obj *fence);
-
extern int vmw_fence_create(struct vmw_fence_manager *fman,
uint32_t seqno,
struct vmw_fence_obj **p_fence);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
index 6763d0638450..4fdacf9924e6 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
@@ -60,15 +60,13 @@ int vmw_getparam_ioctl(struct drm_device *dev, void *data,
param->value = dev_priv->capabilities2;
break;
case DRM_VMW_PARAM_FIFO_CAPS:
- param->value = dev_priv->fifo.capabilities;
+ param->value = vmw_fifo_caps(dev_priv);
break;
case DRM_VMW_PARAM_MAX_FB_SIZE:
param->value = dev_priv->prim_bb_mem;
break;
case DRM_VMW_PARAM_FIFO_HW_VERSION:
{
- const struct vmw_fifo_state *fifo = &dev_priv->fifo;
-
if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS)) {
param->value = SVGA3D_HWVERSION_WS8_B1;
break;
@@ -76,7 +74,7 @@ int vmw_getparam_ioctl(struct drm_device *dev, void *data,
param->value =
vmw_fifo_mem_read(dev_priv,
- ((fifo->capabilities &
+ ((vmw_fifo_caps(dev_priv) &
SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ?
SVGA_FIFO_3D_HWVERSION_REVISED :
SVGA_FIFO_3D_HWVERSION));
@@ -398,46 +396,3 @@ int vmw_present_readback_ioctl(struct drm_device *dev, void *data,
out_clips:
return ret;
}
-
-
-/**
- * vmw_fops_poll - wrapper around the drm_poll function
- *
- * @filp: See the linux fops poll documentation.
- * @wait: See the linux fops poll documentation.
- *
- * Wrapper around the drm_poll function that makes sure the device is
- * processing the fifo if drm_poll decides to wait.
- */
-__poll_t vmw_fops_poll(struct file *filp, struct poll_table_struct *wait)
-{
- struct drm_file *file_priv = filp->private_data;
- struct vmw_private *dev_priv =
- vmw_priv(file_priv->minor->dev);
-
- vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
- return drm_poll(filp, wait);
-}
-
-
-/**
- * vmw_fops_read - wrapper around the drm_read function
- *
- * @filp: See the linux fops read documentation.
- * @buffer: See the linux fops read documentation.
- * @count: See the linux fops read documentation.
- * @offset: See the linux fops read documentation.
- *
- * Wrapper around the drm_read function that makes sure the device is
- * processing the fifo if drm_read decides to wait.
- */
-ssize_t vmw_fops_read(struct file *filp, char __user *buffer,
- size_t count, loff_t *offset)
-{
- struct drm_file *file_priv = filp->private_data;
- struct vmw_private *dev_priv =
- vmw_priv(file_priv->minor->dev);
-
- vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
- return drm_read(filp, buffer, count, offset);
-}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c b/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c
index 6c2a569f1fcb..dafc5fa65bb2 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c
@@ -82,11 +82,11 @@ static irqreturn_t vmw_irq_handler(int irq, void *arg)
uint32_t status, masked_status;
irqreturn_t ret = IRQ_HANDLED;
- status = inl(dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+ status = vmw_irq_status_read(dev_priv);
masked_status = status & READ_ONCE(dev_priv->irq_mask);
if (likely(status))
- outl(status, dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+ vmw_irq_status_write(dev_priv, status);
if (!status)
return IRQ_NONE;
@@ -114,10 +114,9 @@ static bool vmw_fifo_idle(struct vmw_private *dev_priv, uint32_t seqno)
return (vmw_read(dev_priv, SVGA_REG_BUSY) == 0);
}
-void vmw_update_seqno(struct vmw_private *dev_priv,
- struct vmw_fifo_state *fifo_state)
+void vmw_update_seqno(struct vmw_private *dev_priv)
{
- uint32_t seqno = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_FENCE);
+ uint32_t seqno = vmw_fence_read(dev_priv);
if (dev_priv->last_read_seqno != seqno) {
dev_priv->last_read_seqno = seqno;
@@ -128,18 +127,16 @@ void vmw_update_seqno(struct vmw_private *dev_priv,
bool vmw_seqno_passed(struct vmw_private *dev_priv,
uint32_t seqno)
{
- struct vmw_fifo_state *fifo_state;
bool ret;
if (likely(dev_priv->last_read_seqno - seqno < VMW_FENCE_WRAP))
return true;
- fifo_state = &dev_priv->fifo;
- vmw_update_seqno(dev_priv, fifo_state);
+ vmw_update_seqno(dev_priv);
if (likely(dev_priv->last_read_seqno - seqno < VMW_FENCE_WRAP))
return true;
- if (!(fifo_state->capabilities & SVGA_FIFO_CAP_FENCE) &&
+ if (!(vmw_fifo_caps(dev_priv) & SVGA_FIFO_CAP_FENCE) &&
vmw_fifo_idle(dev_priv, seqno))
return true;
@@ -161,7 +158,7 @@ int vmw_fallback_wait(struct vmw_private *dev_priv,
bool interruptible,
unsigned long timeout)
{
- struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
+ struct vmw_fifo_state *fifo_state = dev_priv->fifo;
uint32_t count = 0;
uint32_t signal_seq;
@@ -221,7 +218,7 @@ int vmw_fallback_wait(struct vmw_private *dev_priv,
}
finish_wait(&dev_priv->fence_queue, &__wait);
if (ret == 0 && fifo_idle)
- vmw_fifo_mem_write(dev_priv, SVGA_FIFO_FENCE, signal_seq);
+ vmw_fence_write(dev_priv, signal_seq);
wake_up_all(&dev_priv->fence_queue);
out_err:
@@ -236,7 +233,7 @@ void vmw_generic_waiter_add(struct vmw_private *dev_priv,
{
spin_lock_bh(&dev_priv->waiter_lock);
if ((*waiter_count)++ == 0) {
- outl(flag, dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+ vmw_irq_status_write(dev_priv, flag);
dev_priv->irq_mask |= flag;
vmw_write(dev_priv, SVGA_REG_IRQMASK, dev_priv->irq_mask);
}
@@ -278,59 +275,13 @@ void vmw_goal_waiter_remove(struct vmw_private *dev_priv)
&dev_priv->goal_queue_waiters);
}
-int vmw_wait_seqno(struct vmw_private *dev_priv,
- bool lazy, uint32_t seqno,
- bool interruptible, unsigned long timeout)
-{
- long ret;
- struct vmw_fifo_state *fifo = &dev_priv->fifo;
-
- if (likely(dev_priv->last_read_seqno - seqno < VMW_FENCE_WRAP))
- return 0;
-
- if (likely(vmw_seqno_passed(dev_priv, seqno)))
- return 0;
-
- vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
-
- if (!(fifo->capabilities & SVGA_FIFO_CAP_FENCE))
- return vmw_fallback_wait(dev_priv, lazy, true, seqno,
- interruptible, timeout);
-
- if (!(dev_priv->capabilities & SVGA_CAP_IRQMASK))
- return vmw_fallback_wait(dev_priv, lazy, false, seqno,
- interruptible, timeout);
-
- vmw_seqno_waiter_add(dev_priv);
-
- if (interruptible)
- ret = wait_event_interruptible_timeout
- (dev_priv->fence_queue,
- vmw_seqno_passed(dev_priv, seqno),
- timeout);
- else
- ret = wait_event_timeout
- (dev_priv->fence_queue,
- vmw_seqno_passed(dev_priv, seqno),
- timeout);
-
- vmw_seqno_waiter_remove(dev_priv);
-
- if (unlikely(ret == 0))
- ret = -EBUSY;
- else if (likely(ret > 0))
- ret = 0;
-
- return ret;
-}
-
static void vmw_irq_preinstall(struct drm_device *dev)
{
struct vmw_private *dev_priv = vmw_priv(dev);
uint32_t status;
- status = inl(dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
- outl(status, dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+ status = vmw_irq_status_read(dev_priv);
+ vmw_irq_status_write(dev_priv, status);
}
void vmw_irq_uninstall(struct drm_device *dev)
@@ -346,8 +297,8 @@ void vmw_irq_uninstall(struct drm_device *dev)
vmw_write(dev_priv, SVGA_REG_IRQMASK, 0);
- status = inl(dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
- outl(status, dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+ status = vmw_irq_status_read(dev_priv);
+ vmw_irq_status_write(dev_priv, status);
dev->irq_enabled = false;
free_irq(dev->irq, dev);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 67f693acea5f..2768ab1f60a1 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -38,8 +38,10 @@
void vmw_du_cleanup(struct vmw_display_unit *du)
{
+ struct vmw_private *dev_priv = vmw_priv(du->primary.dev);
drm_plane_cleanup(&du->primary);
- drm_plane_cleanup(&du->cursor);
+ if (vmw_cmd_supported(dev_priv))
+ drm_plane_cleanup(&du->cursor);
drm_connector_unregister(&du->connector);
drm_crtc_cleanup(&du->crtc);
@@ -128,11 +130,17 @@ static void vmw_cursor_update_position(struct vmw_private *dev_priv,
uint32_t count;
spin_lock(&dev_priv->cursor_lock);
- vmw_fifo_mem_write(dev_priv, SVGA_FIFO_CURSOR_ON, show ? 1 : 0);
- vmw_fifo_mem_write(dev_priv, SVGA_FIFO_CURSOR_X, x);
- vmw_fifo_mem_write(dev_priv, SVGA_FIFO_CURSOR_Y, y);
- count = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_CURSOR_COUNT);
- vmw_fifo_mem_write(dev_priv, SVGA_FIFO_CURSOR_COUNT, ++count);
+ if (vmw_is_cursor_bypass3_enabled(dev_priv)) {
+ vmw_fifo_mem_write(dev_priv, SVGA_FIFO_CURSOR_ON, show ? 1 : 0);
+ vmw_fifo_mem_write(dev_priv, SVGA_FIFO_CURSOR_X, x);
+ vmw_fifo_mem_write(dev_priv, SVGA_FIFO_CURSOR_Y, y);
+ count = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_CURSOR_COUNT);
+ vmw_fifo_mem_write(dev_priv, SVGA_FIFO_CURSOR_COUNT, ++count);
+ } else {
+ vmw_write(dev_priv, SVGA_REG_CURSOR_X, x);
+ vmw_write(dev_priv, SVGA_REG_CURSOR_Y, y);
+ vmw_write(dev_priv, SVGA_REG_CURSOR_ON, show ? 1 : 0);
+ }
spin_unlock(&dev_priv->cursor_lock);
}
@@ -1045,7 +1053,8 @@ static int vmw_framebuffer_bo_dirty_ext(struct drm_framebuffer *framebuffer,
{
struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
- if (dev_priv->active_display_unit == vmw_du_legacy)
+ if (dev_priv->active_display_unit == vmw_du_legacy &&
+ vmw_cmd_supported(dev_priv))
return vmw_framebuffer_bo_dirty(framebuffer, file_priv, flags,
color, clips, num_clips);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
index 87e0b303d900..d85c7eab9469 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
@@ -404,19 +404,24 @@ static int vmw_ldu_init(struct vmw_private *dev_priv, unsigned unit)
drm_plane_helper_add(primary, &vmw_ldu_primary_plane_helper_funcs);
- /* Initialize cursor plane */
- ret = drm_universal_plane_init(dev, &ldu->base.cursor,
- 0, &vmw_ldu_cursor_funcs,
- vmw_cursor_plane_formats,
- ARRAY_SIZE(vmw_cursor_plane_formats),
- NULL, DRM_PLANE_TYPE_CURSOR, NULL);
- if (ret) {
- DRM_ERROR("Failed to initialize cursor plane");
- drm_plane_cleanup(&ldu->base.primary);
- goto err_free;
- }
+ /*
+ * We're going to be using traces and software cursors
+ */
+ if (vmw_cmd_supported(dev_priv)) {
+ /* Initialize cursor plane */
+ ret = drm_universal_plane_init(dev, &ldu->base.cursor,
+ 0, &vmw_ldu_cursor_funcs,
+ vmw_cursor_plane_formats,
+ ARRAY_SIZE(vmw_cursor_plane_formats),
+ NULL, DRM_PLANE_TYPE_CURSOR, NULL);
+ if (ret) {
+ DRM_ERROR("Failed to initialize cursor plane");
+ drm_plane_cleanup(&ldu->base.primary);
+ goto err_free;
+ }
- drm_plane_helper_add(cursor, &vmw_ldu_cursor_plane_helper_funcs);
+ drm_plane_helper_add(cursor, &vmw_ldu_cursor_plane_helper_funcs);
+ }
ret = drm_connector_init(dev, connector, &vmw_legacy_connector_funcs,
DRM_MODE_CONNECTOR_VIRTUAL);
@@ -445,9 +450,10 @@ static int vmw_ldu_init(struct vmw_private *dev_priv, unsigned unit)
goto err_free_encoder;
}
- ret = drm_crtc_init_with_planes(dev, crtc, &ldu->base.primary,
- &ldu->base.cursor,
- &vmw_legacy_crtc_funcs, NULL);
+ ret = drm_crtc_init_with_planes(
+ dev, crtc, &ldu->base.primary,
+ vmw_cmd_supported(dev_priv) ? &ldu->base.cursor : NULL,
+ &vmw_legacy_crtc_funcs, NULL);
if (ret) {
DRM_ERROR("Failed to initialize CRTC\n");
goto err_free_unregister;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c b/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c
index ac4a9b722279..54c5d16eb3b7 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c
@@ -421,7 +421,7 @@ int vmw_overlay_pause_all(struct vmw_private *dev_priv)
static bool vmw_overlay_available(const struct vmw_private *dev_priv)
{
return (dev_priv->overlay_priv != NULL &&
- ((dev_priv->fifo.capabilities & VMW_OVERLAY_CAP_MASK) ==
+ ((vmw_fifo_caps(dev_priv) & VMW_OVERLAY_CAP_MASK) ==
VMW_OVERLAY_CAP_MASK));
}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_reg.h b/drivers/gpu/drm/vmwgfx/vmwgfx_reg.h
index e99f6cdbb091..cf585dfe5669 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_reg.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_reg.h
@@ -34,10 +34,6 @@
#include <linux/types.h>
-#define VMWGFX_INDEX_PORT 0x0
-#define VMWGFX_VALUE_PORT 0x1
-#define VMWGFX_IRQSTATUS_PORT 0x8
-
struct svga_guest_mem_descriptor {
u32 ppn;
u32 num_pages;
--
2.27.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 6/6] drm/vmwgfx: Port vmwgfx to arm64
2021-05-05 3:57 [PATCH 0/6] drm/vmwgfx: SVGA v3 and arm64 support Zack Rusin
` (4 preceding siblings ...)
2021-05-05 3:57 ` [PATCH 5/6] drm/vmwgfx: Add basic support for SVGA3 Zack Rusin
@ 2021-05-05 3:57 ` Zack Rusin
5 siblings, 0 replies; 12+ messages in thread
From: Zack Rusin @ 2021-05-05 3:57 UTC (permalink / raw)
To: dri-devel; +Cc: krastevm, sroland
This change fixes all of the arm64 issues we've had in the driver.
ARM support is provided in svga version 3, for which support we've added
in previous changes. svga version 3 currently lacks many of the
advanced features (in particular 3D support is lacking) but
that will change in time.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
---
drivers/gpu/drm/vmwgfx/Kconfig | 3 +-
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 9 +-
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_msg.c | 31 ++-
drivers/gpu/drm/vmwgfx/vmwgfx_msg.h | 214 ---------------------
drivers/gpu/drm/vmwgfx/vmwgfx_msg_arm64.h | 130 +++++++++++++
drivers/gpu/drm/vmwgfx/vmwgfx_msg_x86.h | 219 ++++++++++++++++++++++
7 files changed, 378 insertions(+), 230 deletions(-)
delete mode 100644 drivers/gpu/drm/vmwgfx/vmwgfx_msg.h
create mode 100755 drivers/gpu/drm/vmwgfx/vmwgfx_msg_arm64.h
create mode 100644 drivers/gpu/drm/vmwgfx/vmwgfx_msg_x86.h
diff --git a/drivers/gpu/drm/vmwgfx/Kconfig b/drivers/gpu/drm/vmwgfx/Kconfig
index b3a34196935b..0060ef842b5a 100644
--- a/drivers/gpu/drm/vmwgfx/Kconfig
+++ b/drivers/gpu/drm/vmwgfx/Kconfig
@@ -1,7 +1,8 @@
# SPDX-License-Identifier: GPL-2.0
config DRM_VMWGFX
tristate "DRM driver for VMware Virtual GPU"
- depends on DRM && PCI && X86 && MMU
+ depends on DRM && PCI && MMU
+ depends on X86 || ARM64
select DRM_TTM
select MAPPING_DIRTY_HELPERS
# Only needed for the transitional use of drm_crtc_init - can be removed
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index 3c44091ff44f..385681d7df7c 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -37,6 +37,7 @@
#include <drm/drm_sysfs.h>
#include <drm/ttm/ttm_bo_driver.h>
#include <drm/ttm/ttm_placement.h>
+#include <generated/utsrelease.h>
#include "ttm_object.h"
#include "vmwgfx_binding.h"
@@ -781,7 +782,6 @@ static int vmw_driver_load(struct vmw_private *dev_priv, u32 pci_id)
int ret;
enum vmw_res_type i;
bool refuse_dma = false;
- char host_log[100] = {0};
struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
dev_priv->vmw_chipset = pci_id;
@@ -1050,10 +1050,9 @@ static int vmw_driver_load(struct vmw_private *dev_priv, u32 pci_id)
DRM_INFO("SM4 support available.\n");
DRM_INFO("Running without reservation semaphore\n");
- snprintf(host_log, sizeof(host_log), "vmwgfx: Module Version: %d.%d.%d",
- VMWGFX_DRIVER_MAJOR, VMWGFX_DRIVER_MINOR,
- VMWGFX_DRIVER_PATCHLEVEL);
- vmw_host_log(host_log);
+ vmw_host_printf("vmwgfx: Module Version: %d.%d.%d (kernel: %s)",
+ VMWGFX_DRIVER_MAJOR, VMWGFX_DRIVER_MINOR,
+ VMWGFX_DRIVER_PATCHLEVEL, UTS_RELEASE);
if (dev_priv->enable_fb) {
vmw_fifo_resource_inc(dev_priv);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
index 696ea7086140..c3391388971e 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
@@ -1498,7 +1498,7 @@ int vmw_bo_cpu_blit(struct ttm_buffer_object *dst,
/* Host messaging -vmwgfx_msg.c: */
int vmw_host_get_guestinfo(const char *guest_info_param,
char *buffer, size_t *length);
-int vmw_host_log(const char *log);
+__printf(1, 2) int vmw_host_printf(const char *fmt, ...);
int vmw_msg_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c b/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c
index 609269625468..3d08f5700bdb 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c
@@ -33,7 +33,8 @@
#include <asm/hypervisor.h>
#include "vmwgfx_drv.h"
-#include "vmwgfx_msg.h"
+#include "vmwgfx_msg_x86.h"
+#include "vmwgfx_msg_arm64.h"
#define MESSAGE_STATUS_SUCCESS 0x0001
#define MESSAGE_STATUS_DORECV 0x0002
@@ -473,30 +474,40 @@ int vmw_host_get_guestinfo(const char *guest_info_param,
}
-
/**
- * vmw_host_log: Sends a log message to the host
+ * vmw_host_printf: Sends a log message to the host
*
- * @log: NULL terminated string
+ * @fmt: Regular printf format string and arguments
*
* Returns: 0 on success
*/
-int vmw_host_log(const char *log)
+__printf(1, 2)
+int vmw_host_printf(const char *fmt, ...)
{
+ va_list ap;
struct rpc_channel channel;
char *msg;
+ char *log;
int ret = 0;
-
if (!vmw_msg_enabled)
return -ENODEV;
- if (!log)
+ if (!fmt)
return ret;
+ va_start(ap, fmt);
+ log = kvasprintf(GFP_KERNEL, fmt, ap);
+ va_end(ap);
+ if (!log) {
+ DRM_ERROR("Cannot allocate memory for the log message.\n");
+ return -ENOMEM;
+ }
+
msg = kasprintf(GFP_KERNEL, "log %s", log);
if (!msg) {
DRM_ERROR("Cannot allocate memory for host log message.\n");
+ kfree(log);
return -ENOMEM;
}
@@ -508,6 +519,7 @@ int vmw_host_log(const char *log)
vmw_close_channel(&channel);
kfree(msg);
+ kfree(log);
return 0;
@@ -515,6 +527,7 @@ int vmw_host_log(const char *log)
vmw_close_channel(&channel);
out_open:
kfree(msg);
+ kfree(log);
DRM_ERROR("Failed to send host log message.\n");
return -EINVAL;
@@ -537,7 +550,7 @@ int vmw_msg_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
struct drm_vmw_msg_arg *arg =
- (struct drm_vmw_msg_arg *) data;
+ (struct drm_vmw_msg_arg *)data;
struct rpc_channel channel;
char *msg;
int length;
@@ -577,7 +590,7 @@ int vmw_msg_ioctl(struct drm_device *dev, void *data,
}
if (reply && reply_len > 0) {
if (copy_to_user((void __user *)((unsigned long)arg->receive),
- reply, reply_len)) {
+ reply, reply_len)) {
DRM_ERROR("Failed to copy message to userspace.\n");
kfree(reply);
goto out_msg;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_msg.h b/drivers/gpu/drm/vmwgfx/vmwgfx_msg.h
deleted file mode 100644
index f685c7071dec..000000000000
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_msg.h
+++ /dev/null
@@ -1,214 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ OR MIT */
-/**************************************************************************
- *
- * Copyright 2016 VMware, Inc., Palo Alto, CA., USA
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- **************************************************************************
- *
- * Based on code from vmware.c and vmmouse.c.
- * Author:
- * Sinclair Yeh <syeh@vmware.com>
- */
-#ifndef _VMWGFX_MSG_H
-#define _VMWGFX_MSG_H
-
-#include <asm/vmware.h>
-
-/**
- * Hypervisor-specific bi-directional communication channel. Should never
- * execute on bare metal hardware. The caller must make sure to check for
- * supported hypervisor before using these macros.
- *
- * The last two parameters are both input and output and must be initialized.
- *
- * @cmd: [IN] Message Cmd
- * @in_ebx: [IN] Message Len, through EBX
- * @in_si: [IN] Input argument through SI, set to 0 if not used
- * @in_di: [IN] Input argument through DI, set ot 0 if not used
- * @flags: [IN] hypercall flags + [channel id]
- * @magic: [IN] hypervisor magic value
- * @eax: [OUT] value of EAX register
- * @ebx: [OUT] e.g. status from an HB message status command
- * @ecx: [OUT] e.g. status from a non-HB message status command
- * @edx: [OUT] e.g. channel id
- * @si: [OUT]
- * @di: [OUT]
- */
-#define VMW_PORT(cmd, in_ebx, in_si, in_di, \
- flags, magic, \
- eax, ebx, ecx, edx, si, di) \
-({ \
- asm volatile (VMWARE_HYPERCALL : \
- "=a"(eax), \
- "=b"(ebx), \
- "=c"(ecx), \
- "=d"(edx), \
- "=S"(si), \
- "=D"(di) : \
- "a"(magic), \
- "b"(in_ebx), \
- "c"(cmd), \
- "d"(flags), \
- "S"(in_si), \
- "D"(in_di) : \
- "memory"); \
-})
-
-
-/**
- * Hypervisor-specific bi-directional communication channel. Should never
- * execute on bare metal hardware. The caller must make sure to check for
- * supported hypervisor before using these macros.
- *
- * The last 3 parameters are both input and output and must be initialized.
- *
- * @cmd: [IN] Message Cmd
- * @in_ecx: [IN] Message Len, through ECX
- * @in_si: [IN] Input argument through SI, set to 0 if not used
- * @in_di: [IN] Input argument through DI, set to 0 if not used
- * @flags: [IN] hypercall flags + [channel id]
- * @magic: [IN] hypervisor magic value
- * @bp: [IN]
- * @eax: [OUT] value of EAX register
- * @ebx: [OUT] e.g. status from an HB message status command
- * @ecx: [OUT] e.g. status from a non-HB message status command
- * @edx: [OUT] e.g. channel id
- * @si: [OUT]
- * @di: [OUT]
- */
-#ifdef __x86_64__
-
-#define VMW_PORT_HB_OUT(cmd, in_ecx, in_si, in_di, \
- flags, magic, bp, \
- eax, ebx, ecx, edx, si, di) \
-({ \
- asm volatile ("push %%rbp;" \
- "mov %12, %%rbp;" \
- VMWARE_HYPERCALL_HB_OUT \
- "pop %%rbp;" : \
- "=a"(eax), \
- "=b"(ebx), \
- "=c"(ecx), \
- "=d"(edx), \
- "=S"(si), \
- "=D"(di) : \
- "a"(magic), \
- "b"(cmd), \
- "c"(in_ecx), \
- "d"(flags), \
- "S"(in_si), \
- "D"(in_di), \
- "r"(bp) : \
- "memory", "cc"); \
-})
-
-
-#define VMW_PORT_HB_IN(cmd, in_ecx, in_si, in_di, \
- flags, magic, bp, \
- eax, ebx, ecx, edx, si, di) \
-({ \
- asm volatile ("push %%rbp;" \
- "mov %12, %%rbp;" \
- VMWARE_HYPERCALL_HB_IN \
- "pop %%rbp" : \
- "=a"(eax), \
- "=b"(ebx), \
- "=c"(ecx), \
- "=d"(edx), \
- "=S"(si), \
- "=D"(di) : \
- "a"(magic), \
- "b"(cmd), \
- "c"(in_ecx), \
- "d"(flags), \
- "S"(in_si), \
- "D"(in_di), \
- "r"(bp) : \
- "memory", "cc"); \
-})
-
-#else
-
-/*
- * In the 32-bit version of this macro, we store bp in a memory location
- * because we've ran out of registers.
- * Now we can't reference that memory location while we've modified
- * %esp or %ebp, so we first push it on the stack, just before we push
- * %ebp, and then when we need it we read it from the stack where we
- * just pushed it.
- */
-#define VMW_PORT_HB_OUT(cmd, in_ecx, in_si, in_di, \
- flags, magic, bp, \
- eax, ebx, ecx, edx, si, di) \
-({ \
- asm volatile ("push %12;" \
- "push %%ebp;" \
- "mov 0x04(%%esp), %%ebp;" \
- VMWARE_HYPERCALL_HB_OUT \
- "pop %%ebp;" \
- "add $0x04, %%esp;" : \
- "=a"(eax), \
- "=b"(ebx), \
- "=c"(ecx), \
- "=d"(edx), \
- "=S"(si), \
- "=D"(di) : \
- "a"(magic), \
- "b"(cmd), \
- "c"(in_ecx), \
- "d"(flags), \
- "S"(in_si), \
- "D"(in_di), \
- "m"(bp) : \
- "memory", "cc"); \
-})
-
-
-#define VMW_PORT_HB_IN(cmd, in_ecx, in_si, in_di, \
- flags, magic, bp, \
- eax, ebx, ecx, edx, si, di) \
-({ \
- asm volatile ("push %12;" \
- "push %%ebp;" \
- "mov 0x04(%%esp), %%ebp;" \
- VMWARE_HYPERCALL_HB_IN \
- "pop %%ebp;" \
- "add $0x04, %%esp;" : \
- "=a"(eax), \
- "=b"(ebx), \
- "=c"(ecx), \
- "=d"(edx), \
- "=S"(si), \
- "=D"(di) : \
- "a"(magic), \
- "b"(cmd), \
- "c"(in_ecx), \
- "d"(flags), \
- "S"(in_si), \
- "D"(in_di), \
- "m"(bp) : \
- "memory", "cc"); \
-})
-#endif /* #if __x86_64__ */
-
-#endif
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_msg_arm64.h b/drivers/gpu/drm/vmwgfx/vmwgfx_msg_arm64.h
new file mode 100755
index 000000000000..4f40167ad61f
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_msg_arm64.h
@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright 2021 VMware, Inc., Palo Alto, CA., USA
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+#ifndef _VMWGFX_MSG_ARM64_H
+#define _VMWGFX_MSG_ARM64_H
+
+#if defined(__aarch64__)
+
+#define VMWARE_HYPERVISOR_PORT 0x5658
+#define VMWARE_HYPERVISOR_PORT_HB 0x5659
+
+#define VMWARE_HYPERVISOR_HB BIT(0)
+#define VMWARE_HYPERVISOR_OUT BIT(1)
+
+#define X86_IO_MAGIC 0x86
+
+#define X86_IO_W7_SIZE_SHIFT 0
+#define X86_IO_W7_SIZE_MASK (0x3 << X86_IO_W7_SIZE_SHIFT)
+#define X86_IO_W7_DIR (1 << 2)
+#define X86_IO_W7_WITH (1 << 3)
+#define X86_IO_W7_STR (1 << 4)
+#define X86_IO_W7_DF (1 << 5)
+#define X86_IO_W7_IMM_SHIFT 5
+#define X86_IO_W7_IMM_MASK (0xff << X86_IO_W7_IMM_SHIFT)
+
+static inline void vmw_port(unsigned long cmd, unsigned long in_ebx,
+ unsigned long in_si, unsigned long in_di,
+ unsigned long flags, unsigned long magic,
+ unsigned long *eax, unsigned long *ebx,
+ unsigned long *ecx, unsigned long *edx,
+ unsigned long *si, unsigned long *di)
+{
+ register u64 x0 asm("x0") = magic;
+ register u64 x1 asm("x1") = in_ebx;
+ register u64 x2 asm("x2") = cmd;
+ register u64 x3 asm("x3") = flags | VMWARE_HYPERVISOR_PORT;
+ register u64 x4 asm("x4") = in_si;
+ register u64 x5 asm("x5") = in_di;
+
+ register u64 x7 asm("x7") = ((u64)X86_IO_MAGIC << 32) |
+ X86_IO_W7_WITH |
+ X86_IO_W7_DIR |
+ (2 << X86_IO_W7_SIZE_SHIFT);
+
+ asm volatile("mrs xzr, mdccsr_el0 \n\t"
+ : "+r"(x0), "+r"(x1), "+r"(x2),
+ "+r"(x3), "+r"(x4), "+r"(x5)
+ : "r"(x7)
+ :);
+ *eax = x0;
+ *ebx = x1;
+ *ecx = x2;
+ *edx = x3;
+ *si = x4;
+ *di = x5;
+}
+
+static inline void vmw_port_hb(unsigned long cmd, unsigned long in_ecx,
+ unsigned long in_si, unsigned long in_di,
+ unsigned long flags, unsigned long magic,
+ unsigned long bp, u32 w7dir,
+ unsigned long *eax, unsigned long *ebx,
+ unsigned long *ecx, unsigned long *edx,
+ unsigned long *si, unsigned long *di)
+{
+ register u64 x0 asm("x0") = magic;
+ register u64 x1 asm("x1") = cmd;
+ register u64 x2 asm("x2") = in_ecx;
+ register u64 x3 asm("x3") = flags | VMWARE_HYPERVISOR_PORT_HB;
+ register u64 x4 asm("x4") = in_si;
+ register u64 x5 asm("x5") = in_di;
+ register u64 x6 asm("x6") = bp;
+ register u64 x7 asm("x7") = ((u64)X86_IO_MAGIC << 32) |
+ X86_IO_W7_STR |
+ X86_IO_W7_WITH |
+ w7dir;
+
+ asm volatile("mrs xzr, mdccsr_el0 \n\t"
+ : "+r"(x0), "+r"(x1), "+r"(x2),
+ "+r"(x3), "+r"(x4), "+r"(x5)
+ : "r"(x6), "r"(x7)
+ :);
+ *eax = x0;
+ *ebx = x1;
+ *ecx = x2;
+ *edx = x3;
+ *si = x4;
+ *di = x5;
+}
+
+#define VMW_PORT(cmd, in_ebx, in_si, in_di, flags, magic, eax, ebx, ecx, edx, \
+ si, di) \
+ vmw_port(cmd, in_ebx, in_si, in_di, flags, magic, &eax, &ebx, &ecx, \
+ &edx, &si, &di)
+
+#define VMW_PORT_HB_OUT(cmd, in_ecx, in_si, in_di, flags, magic, bp, eax, ebx, \
+ ecx, edx, si, di) \
+ vmw_port_hb(cmd, in_ecx, in_si, in_di, flags, magic, bp, \
+ 0, &eax, &ebx, &ecx, &edx, &si, &di)
+
+#define VMW_PORT_HB_IN(cmd, in_ecx, in_si, in_di, flags, magic, bp, eax, ebx, \
+ ecx, edx, si, di) \
+ vmw_port_hb(cmd, in_ecx, in_si, in_di, flags, magic, bp, \
+ X86_IO_W7_DIR, &eax, &ebx, &ecx, &edx, &si, &di)
+
+#endif
+
+#endif /* _VMWGFX_MSG_ARM64_H */
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_msg_x86.h b/drivers/gpu/drm/vmwgfx/vmwgfx_msg_x86.h
new file mode 100644
index 000000000000..0b74ca2dfb7b
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_msg_x86.h
@@ -0,0 +1,219 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR MIT */
+/**************************************************************************
+ *
+ * Copyright 2016-2021 VMware, Inc., Palo Alto, CA., USA
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************
+ *
+ * Based on code from vmware.c and vmmouse.c.
+ * Author:
+ * Sinclair Yeh <syeh@vmware.com>
+ */
+#ifndef _VMWGFX_MSG_X86_H
+#define _VMWGFX_MSG_X86_H
+
+
+#if defined(__i386__) || defined(__x86_64__)
+
+#include <asm/vmware.h>
+
+/**
+ * Hypervisor-specific bi-directional communication channel. Should never
+ * execute on bare metal hardware. The caller must make sure to check for
+ * supported hypervisor before using these macros.
+ *
+ * The last two parameters are both input and output and must be initialized.
+ *
+ * @cmd: [IN] Message Cmd
+ * @in_ebx: [IN] Message Len, through EBX
+ * @in_si: [IN] Input argument through SI, set to 0 if not used
+ * @in_di: [IN] Input argument through DI, set ot 0 if not used
+ * @flags: [IN] hypercall flags + [channel id]
+ * @magic: [IN] hypervisor magic value
+ * @eax: [OUT] value of EAX register
+ * @ebx: [OUT] e.g. status from an HB message status command
+ * @ecx: [OUT] e.g. status from a non-HB message status command
+ * @edx: [OUT] e.g. channel id
+ * @si: [OUT]
+ * @di: [OUT]
+ */
+#define VMW_PORT(cmd, in_ebx, in_si, in_di, \
+ flags, magic, \
+ eax, ebx, ecx, edx, si, di) \
+({ \
+ asm volatile (VMWARE_HYPERCALL : \
+ "=a"(eax), \
+ "=b"(ebx), \
+ "=c"(ecx), \
+ "=d"(edx), \
+ "=S"(si), \
+ "=D"(di) : \
+ "a"(magic), \
+ "b"(in_ebx), \
+ "c"(cmd), \
+ "d"(flags), \
+ "S"(in_si), \
+ "D"(in_di) : \
+ "memory"); \
+})
+
+
+/**
+ * Hypervisor-specific bi-directional communication channel. Should never
+ * execute on bare metal hardware. The caller must make sure to check for
+ * supported hypervisor before using these macros.
+ *
+ * The last 3 parameters are both input and output and must be initialized.
+ *
+ * @cmd: [IN] Message Cmd
+ * @in_ecx: [IN] Message Len, through ECX
+ * @in_si: [IN] Input argument through SI, set to 0 if not used
+ * @in_di: [IN] Input argument through DI, set to 0 if not used
+ * @flags: [IN] hypercall flags + [channel id]
+ * @magic: [IN] hypervisor magic value
+ * @bp: [IN]
+ * @eax: [OUT] value of EAX register
+ * @ebx: [OUT] e.g. status from an HB message status command
+ * @ecx: [OUT] e.g. status from a non-HB message status command
+ * @edx: [OUT] e.g. channel id
+ * @si: [OUT]
+ * @di: [OUT]
+ */
+#ifdef __x86_64__
+
+#define VMW_PORT_HB_OUT(cmd, in_ecx, in_si, in_di, \
+ flags, magic, bp, \
+ eax, ebx, ecx, edx, si, di) \
+({ \
+ asm volatile ("push %%rbp;" \
+ "mov %12, %%rbp;" \
+ VMWARE_HYPERCALL_HB_OUT \
+ "pop %%rbp;" : \
+ "=a"(eax), \
+ "=b"(ebx), \
+ "=c"(ecx), \
+ "=d"(edx), \
+ "=S"(si), \
+ "=D"(di) : \
+ "a"(magic), \
+ "b"(cmd), \
+ "c"(in_ecx), \
+ "d"(flags), \
+ "S"(in_si), \
+ "D"(in_di), \
+ "r"(bp) : \
+ "memory", "cc"); \
+})
+
+
+#define VMW_PORT_HB_IN(cmd, in_ecx, in_si, in_di, \
+ flags, magic, bp, \
+ eax, ebx, ecx, edx, si, di) \
+({ \
+ asm volatile ("push %%rbp;" \
+ "mov %12, %%rbp;" \
+ VMWARE_HYPERCALL_HB_IN \
+ "pop %%rbp" : \
+ "=a"(eax), \
+ "=b"(ebx), \
+ "=c"(ecx), \
+ "=d"(edx), \
+ "=S"(si), \
+ "=D"(di) : \
+ "a"(magic), \
+ "b"(cmd), \
+ "c"(in_ecx), \
+ "d"(flags), \
+ "S"(in_si), \
+ "D"(in_di), \
+ "r"(bp) : \
+ "memory", "cc"); \
+})
+
+#elif defined(__i386__)
+
+/*
+ * In the 32-bit version of this macro, we store bp in a memory location
+ * because we've ran out of registers.
+ * Now we can't reference that memory location while we've modified
+ * %esp or %ebp, so we first push it on the stack, just before we push
+ * %ebp, and then when we need it we read it from the stack where we
+ * just pushed it.
+ */
+#define VMW_PORT_HB_OUT(cmd, in_ecx, in_si, in_di, \
+ flags, magic, bp, \
+ eax, ebx, ecx, edx, si, di) \
+({ \
+ asm volatile ("push %12;" \
+ "push %%ebp;" \
+ "mov 0x04(%%esp), %%ebp;" \
+ VMWARE_HYPERCALL_HB_OUT \
+ "pop %%ebp;" \
+ "add $0x04, %%esp;" : \
+ "=a"(eax), \
+ "=b"(ebx), \
+ "=c"(ecx), \
+ "=d"(edx), \
+ "=S"(si), \
+ "=D"(di) : \
+ "a"(magic), \
+ "b"(cmd), \
+ "c"(in_ecx), \
+ "d"(flags), \
+ "S"(in_si), \
+ "D"(in_di), \
+ "m"(bp) : \
+ "memory", "cc"); \
+})
+
+
+#define VMW_PORT_HB_IN(cmd, in_ecx, in_si, in_di, \
+ flags, magic, bp, \
+ eax, ebx, ecx, edx, si, di) \
+({ \
+ asm volatile ("push %12;" \
+ "push %%ebp;" \
+ "mov 0x04(%%esp), %%ebp;" \
+ VMWARE_HYPERCALL_HB_IN \
+ "pop %%ebp;" \
+ "add $0x04, %%esp;" : \
+ "=a"(eax), \
+ "=b"(ebx), \
+ "=c"(ecx), \
+ "=d"(edx), \
+ "=S"(si), \
+ "=D"(di) : \
+ "a"(magic), \
+ "b"(cmd), \
+ "c"(in_ecx), \
+ "d"(flags), \
+ "S"(in_si), \
+ "D"(in_di), \
+ "m"(bp) : \
+ "memory", "cc"); \
+})
+#endif /* defined(__i386__) */
+
+#endif /* defined(__i386__) || defined(__x86_64__) */
+
+#endif /* _VMWGFX_MSG_X86_H */
--
2.27.0
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^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 5/6] drm/vmwgfx: Add basic support for SVGA3
2021-05-05 3:57 ` [PATCH 5/6] drm/vmwgfx: Add basic support for SVGA3 Zack Rusin
@ 2021-05-05 7:46 ` kernel test robot
2021-05-05 8:23 ` kernel test robot
` (3 subsequent siblings)
4 siblings, 0 replies; 12+ messages in thread
From: kernel test robot @ 2021-05-05 7:46 UTC (permalink / raw)
To: Zack Rusin, dri-devel; +Cc: sroland, clang-built-linux, kbuild-all, krastevm
[-- Attachment #1: Type: text/plain, Size: 6079 bytes --]
Hi Zack,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[also build test WARNING on linus/master next-20210505]
[cannot apply to drm-intel/for-linux-next drm-exynos/exynos-drm-next tegra-drm/drm/tegra/for-next drm/drm-next v5.12]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Zack-Rusin/drm-vmwgfx-SVGA-v3-and-arm64-support/20210505-120026
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-randconfig-a012-20210505 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 8f5a2a5836cc8e4c1def2bdeb022e7b496623439)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# https://github.com/0day-ci/linux/commit/4acf63c8eca79f6073ada0994b0e2a03c8fcfb71
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Zack-Rusin/drm-vmwgfx-SVGA-v3-and-arm64-support/20210505-120026
git checkout 4acf63c8eca79f6073ada0994b0e2a03c8fcfb71
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c:477: warning: expecting prototype for vmw_fifo_commit_flush(). Prototype was for vmw_cmd_commit_flush() instead
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c:492: warning: expecting prototype for vmw_fifo_flush(). Prototype was for vmw_cmd_flush() instead
>> drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c:650: warning: expecting prototype for vmw_cmd_emit_dummy_gb_query(). Prototype was for vmw_cmd_emit_dummy_query() instead
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c:667: warning: Function parameter or member 'vmw' not described in 'vmw_cmd_supported'
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c:667: warning: Excess function parameter 'dev_priv' description in 'vmw_cmd_supported'
vim +650 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 628
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 629
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 630 /**
4acf63c8eca79f6 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 631 * vmw_cmd_emit_dummy_gb_query - emits a dummy query to the fifo using
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 632 * appropriate resource query commands.
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 633 *
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 634 * @dev_priv: The device private structure.
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 635 * @cid: The hardware context id used for the query.
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 636 *
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 637 * This function is used to emit a dummy occlusion query with
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 638 * no primitives rendered between query begin and query end.
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 639 * It's used to provide a query barrier, in order to know that when
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 640 * this query is finished, all preceding queries are also finished.
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 641 *
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 642 * A Query results structure should have been initialized at the start
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 643 * of the dev_priv->dummy_query_bo buffer object. And that buffer object
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 644 * must also be either reserved or pinned when this function is called.
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 645 *
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 646 * Returns -ENOMEM on failure to reserve fifo space.
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 647 */
8426ed9c4b42f41 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2020-11-18 648 int vmw_cmd_emit_dummy_query(struct vmw_private *dev_priv,
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 649 uint32_t cid)
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 @650 {
ddcda24e3bec1d4 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 651 if (dev_priv->has_mob)
4acf63c8eca79f6 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 652 return vmw_cmd_emit_dummy_gb_query(dev_priv, cid);
4acf63c8eca79f6 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 653
4acf63c8eca79f6 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 654 return vmw_cmd_emit_dummy_legacy_query(dev_priv, cid);
4acf63c8eca79f6 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 655 }
4acf63c8eca79f6 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 656
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 5/6] drm/vmwgfx: Add basic support for SVGA3
2021-05-05 3:57 ` [PATCH 5/6] drm/vmwgfx: Add basic support for SVGA3 Zack Rusin
2021-05-05 7:46 ` kernel test robot
@ 2021-05-05 8:23 ` kernel test robot
2021-05-05 10:10 ` kernel test robot
` (2 subsequent siblings)
4 siblings, 0 replies; 12+ messages in thread
From: kernel test robot @ 2021-05-05 8:23 UTC (permalink / raw)
To: Zack Rusin, dri-devel; +Cc: sroland, krastevm, kbuild-all
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Hi Zack,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[also build test WARNING on linus/master next-20210505]
[cannot apply to drm-intel/for-linux-next drm-exynos/exynos-drm-next tegra-drm/drm/tegra/for-next drm/drm-next v5.12]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Zack-Rusin/drm-vmwgfx-SVGA-v3-and-arm64-support/20210505-120026
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-randconfig-s021-20210505 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.3-341-g8af24329-dirty
# https://github.com/0day-ci/linux/commit/4acf63c8eca79f6073ada0994b0e2a03c8fcfb71
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Zack-Rusin/drm-vmwgfx-SVGA-v3-and-arm64-support/20210505-120026
git checkout 4acf63c8eca79f6073ada0994b0e2a03c8fcfb71
# save the attached .config to linux build tree
make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' W=1 ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.c:718:28: sparse: sparse: incorrect type in assignment (different address spaces) @@ expected unsigned int [usertype] *rmmio @@ got void [noderef] __iomem * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c:718:28: sparse: expected unsigned int [usertype] *rmmio
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c:718:28: sparse: got void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c: note: in included file:
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
--
drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c: note: in included file:
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
--
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c: note: in included file (through drivers/gpu/drm/vmwgfx/vmwgfx_kms.h):
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
--
drivers/gpu/drm/vmwgfx/vmwgfx_irq.c: note: in included file:
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
--
>> drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c:105:24: sparse: sparse: Using plain integer as NULL pointer
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c:674:33: sparse: sparse: Using plain integer as NULL pointer
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c: note: in included file:
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
--
drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c: note: in included file (through drivers/gpu/drm/vmwgfx/vmwgfx_kms.h):
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
--
drivers/gpu/drm/vmwgfx/vmwgfx_fence.c: note: in included file:
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: expected void const [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:683:48: sparse: got unsigned int [usertype] *
--
drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c: note: in included file:
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void [noderef] __iomem * @@ got unsigned int [usertype] * @@
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: expected void [noderef] __iomem *
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h:668:50: sparse: got unsigned int [usertype] *
vim +718 drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
692
693 static int vmw_setup_pci_resources(struct vmw_private *dev,
694 unsigned long pci_id)
695 {
696 resource_size_t rmmio_start;
697 resource_size_t rmmio_size;
698 resource_size_t fifo_start;
699 resource_size_t fifo_size;
700 int ret;
701 struct pci_dev *pdev = to_pci_dev(dev->drm.dev);
702
703 pci_set_master(pdev);
704
705 ret = pci_request_regions(pdev, "vmwgfx probe");
706 if (ret)
707 return ret;
708
709 dev->pci_id = pci_id;
710 if (pci_id == VMWGFX_PCI_ID_SVGA3) {
711 rmmio_start = pci_resource_start(pdev, 0);
712 rmmio_size = pci_resource_len(pdev, 0);
713 dev->vram_start = pci_resource_start(pdev, 2);
714 dev->vram_size = pci_resource_len(pdev, 2);
715
716 DRM_INFO("Register MMIO at 0x%pa size is %llu kiB\n",
717 &rmmio_start, (uint64_t)rmmio_size / 1024);
> 718 dev->rmmio = devm_ioremap(dev->drm.dev,
719 rmmio_start,
720 rmmio_size);
721 if (IS_ERR(dev->rmmio)) {
722 DRM_ERROR("Failed mapping registers mmio memory.\n");
723 pci_release_regions(pdev);
724 return PTR_ERR(dev->rmmio);
725 }
726 } else if (pci_id == VMWGFX_PCI_ID_SVGA2) {
727 dev->io_start = pci_resource_start(pdev, 0);
728 dev->vram_start = pci_resource_start(pdev, 1);
729 dev->vram_size = pci_resource_len(pdev, 1);
730 fifo_start = pci_resource_start(pdev, 2);
731 fifo_size = pci_resource_len(pdev, 2);
732
733 DRM_INFO("FIFO at %pa size is %llu kiB\n",
734 &fifo_start, (uint64_t)fifo_size / 1024);
735 dev->fifo_mem = devm_memremap(dev->drm.dev,
736 fifo_start,
737 fifo_size,
738 MEMREMAP_WB);
739
740 if (IS_ERR(dev->fifo_mem)) {
741 DRM_ERROR("Failed mapping FIFO memory.\n");
742 pci_release_regions(pdev);
743 return PTR_ERR(dev->fifo_mem);
744 }
745 } else {
746 pci_release_regions(pdev);
747 return -EINVAL;
748 }
749
750 /*
751 * This is approximate size of the vram, the exact size will only
752 * be known after we read SVGA_REG_VRAM_SIZE. The PCI resource
753 * size will be equal to or bigger than the size reported by
754 * SVGA_REG_VRAM_SIZE.
755 */
756 DRM_INFO("VRAM at %pa size is %llu kiB\n",
757 &dev->vram_start, (uint64_t)dev->vram_size / 1024);
758
759 return 0;
760 }
761
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
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[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 5/6] drm/vmwgfx: Add basic support for SVGA3
2021-05-05 3:57 ` [PATCH 5/6] drm/vmwgfx: Add basic support for SVGA3 Zack Rusin
2021-05-05 7:46 ` kernel test robot
2021-05-05 8:23 ` kernel test robot
@ 2021-05-05 10:10 ` kernel test robot
2021-05-05 10:10 ` [PATCH] drm/vmwgfx: fix badzero.cocci warnings kernel test robot
2021-05-05 19:10 ` [PATCH 5/6] drm/vmwgfx: Add basic support for SVGA3 Zack Rusin
4 siblings, 0 replies; 12+ messages in thread
From: kernel test robot @ 2021-05-05 10:10 UTC (permalink / raw)
To: Zack Rusin, dri-devel; +Cc: sroland, krastevm, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 25786 bytes --]
Hi Zack,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[also build test WARNING on linus/master next-20210505]
[cannot apply to drm-intel/for-linux-next drm-exynos/exynos-drm-next tegra-drm/drm/tegra/for-next drm/drm-next v5.12]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Zack-Rusin/drm-vmwgfx-SVGA-v3-and-arm64-support/20210505-120026
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-randconfig-c003-20210505 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
# https://github.com/0day-ci/linux/commit/4acf63c8eca79f6073ada0994b0e2a03c8fcfb71
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Zack-Rusin/drm-vmwgfx-SVGA-v3-and-arm64-support/20210505-120026
git checkout 4acf63c8eca79f6073ada0994b0e2a03c8fcfb71
# save the attached .config to linux build tree
make W=1 W=1 ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c:477: warning: expecting prototype for vmw_fifo_commit_flush(). Prototype was for vmw_cmd_commit_flush() instead
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c:492: warning: expecting prototype for vmw_fifo_flush(). Prototype was for vmw_cmd_flush() instead
>> drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c:650: warning: expecting prototype for vmw_cmd_emit_dummy_gb_query(). Prototype was for vmw_cmd_emit_dummy_query() instead
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c:667: warning: Function parameter or member 'vmw' not described in 'vmw_cmd_supported'
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c:667: warning: Excess function parameter 'dev_priv' description in 'vmw_cmd_supported'
cocci warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c:674:25-26: WARNING comparing pointer to 0
Please review and possibly fold the followup patch.
vim +650 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 468
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 469
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 470 /**
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 471 * vmw_fifo_commit_flush - Commit fifo space and flush any buffered commands.
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 472 *
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 473 * @dev_priv: Pointer to device private structure.
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 474 * @bytes: Number of bytes to commit.
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 475 */
8426ed9c4b42f4 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2020-11-18 476 void vmw_cmd_commit_flush(struct vmw_private *dev_priv, uint32_t bytes)
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 @477 {
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 478 if (dev_priv->cman)
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 479 vmw_cmdbuf_commit(dev_priv->cman, bytes, NULL, true);
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 480 else
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 481 vmw_local_fifo_commit(dev_priv, bytes);
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 482 }
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 483
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 484 /**
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 485 * vmw_fifo_flush - Flush any buffered commands and make sure command processing
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 486 * starts.
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 487 *
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 488 * @dev_priv: Pointer to device private structure.
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 489 * @interruptible: Whether to wait interruptible if function needs to sleep.
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 490 */
8426ed9c4b42f4 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2020-11-18 491 int vmw_cmd_flush(struct vmw_private *dev_priv, bool interruptible)
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 492 {
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 493 might_sleep();
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 494
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 495 if (dev_priv->cman)
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 496 return vmw_cmdbuf_cur_flush(dev_priv->cman, interruptible);
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 497 else
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 498 return 0;
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 499 }
3eab3d9eef6504 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-25 500
8426ed9c4b42f4 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2020-11-18 501 int vmw_cmd_send_fence(struct vmw_private *dev_priv, uint32_t *seqno)
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 502 {
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 503 struct svga_fifo_cmd_fence *cmd_fence;
b9eb1a6174e58e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-04-02 504 u32 *fm;
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 505 int ret = 0;
b9eb1a6174e58e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-04-02 506 uint32_t bytes = sizeof(u32) + sizeof(*cmd_fence);
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 507
8426ed9c4b42f4 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2020-11-18 508 fm = VMW_CMD_RESERVE(dev_priv, bytes);
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 509 if (unlikely(fm == NULL)) {
6bcd8d3c782b7b drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-09-01 510 *seqno = atomic_read(&dev_priv->marker_seq);
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 511 ret = -ENOMEM;
6bcd8d3c782b7b drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-09-01 512 (void)vmw_fallback_wait(dev_priv, false, true, *seqno,
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 513 false, 3*HZ);
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 514 goto out_err;
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 515 }
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 516
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 517 do {
6bcd8d3c782b7b drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-09-01 518 *seqno = atomic_add_return(1, &dev_priv->marker_seq);
6bcd8d3c782b7b drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-09-01 519 } while (*seqno == 0);
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 520
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 521 if (!(vmw_fifo_caps(dev_priv) & SVGA_FIFO_CAP_FENCE)) {
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 522
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 523 /*
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 524 * Don't request hardware to send a fence. The
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 525 * waiting code in vmwgfx_irq.c will emulate this.
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 526 */
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 527
8426ed9c4b42f4 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2020-11-18 528 vmw_cmd_commit(dev_priv, 0);
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 529 return 0;
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 530 }
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 531
b9eb1a6174e58e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-04-02 532 *fm++ = SVGA_CMD_FENCE;
b9eb1a6174e58e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-04-02 533 cmd_fence = (struct svga_fifo_cmd_fence *) fm;
b9eb1a6174e58e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-04-02 534 cmd_fence->fence = *seqno;
8426ed9c4b42f4 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2020-11-18 535 vmw_cmd_commit_flush(dev_priv, bytes);
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 536 vmw_update_seqno(dev_priv);
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 537
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 538 out_err:
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 539 return ret;
fb1d9738ca053e drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Jakob Bornecrantz 2009-12-10 540 }
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 541
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 542 /**
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 543 * vmw_cmd_emit_dummy_legacy_query - emits a dummy query to the fifo using
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 544 * legacy query commands.
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 545 *
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 546 * @dev_priv: The device private structure.
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 547 * @cid: The hardware context id used for the query.
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 548 *
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 549 * See the vmw_cmd_emit_dummy_query documentation.
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 550 */
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 551 static int vmw_cmd_emit_dummy_legacy_query(struct vmw_private *dev_priv,
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 552 uint32_t cid)
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 553 {
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 554 /*
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 555 * A query wait without a preceding query end will
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 556 * actually finish all queries for this cid
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 557 * without writing to the query result structure.
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 558 */
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 559
459d0fa7359654 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-26 560 struct ttm_buffer_object *bo = &dev_priv->dummy_query_bo->base;
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 561 struct {
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 562 SVGA3dCmdHeader header;
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 563 SVGA3dCmdWaitForQuery body;
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 564 } *cmd;
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 565
8426ed9c4b42f4 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2020-11-18 566 cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
11c454196610ae drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Deepak Rawat 2019-02-14 567 if (unlikely(cmd == NULL))
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 568 return -ENOMEM;
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 569
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 570 cmd->header.id = SVGA_3D_CMD_WAIT_FOR_QUERY;
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 571 cmd->header.size = sizeof(cmd->body);
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 572 cmd->body.cid = cid;
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 573 cmd->body.type = SVGA3D_QUERYTYPE_OCCLUSION;
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 574
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 575 if (bo->mem.mem_type == TTM_PL_VRAM) {
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 576 cmd->body.guestResult.gmrId = SVGA_GMR_FRAMEBUFFER;
0b17fc08e396d0 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Nirmoy Das 2020-06-24 577 cmd->body.guestResult.offset = bo->mem.start << PAGE_SHIFT;
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 578 } else {
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 579 cmd->body.guestResult.gmrId = bo->mem.start;
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 580 cmd->body.guestResult.offset = 0;
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 581 }
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 582
8426ed9c4b42f4 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2020-11-18 583 vmw_cmd_commit(dev_priv, sizeof(*cmd));
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 584
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 585 return 0;
e2fa3a76839ada drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2011-10-04 586 }
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 587
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 588 /**
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 589 * vmw_cmd_emit_dummy_gb_query - emits a dummy query to the fifo using
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 590 * guest-backed resource query commands.
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 591 *
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 592 * @dev_priv: The device private structure.
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 593 * @cid: The hardware context id used for the query.
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 594 *
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 595 * See the vmw_cmd_emit_dummy_query documentation.
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 596 */
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 597 static int vmw_cmd_emit_dummy_gb_query(struct vmw_private *dev_priv,
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 598 uint32_t cid)
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 599 {
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 600 /*
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 601 * A query wait without a preceding query end will
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 602 * actually finish all queries for this cid
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 603 * without writing to the query result structure.
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 604 */
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 605
459d0fa7359654 drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2015-06-26 606 struct ttm_buffer_object *bo = &dev_priv->dummy_query_bo->base;
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 607 struct {
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 608 SVGA3dCmdHeader header;
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 609 SVGA3dCmdWaitForGBQuery body;
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 610 } *cmd;
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 611
8426ed9c4b42f4 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2020-11-18 612 cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
11c454196610ae drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Deepak Rawat 2019-02-14 613 if (unlikely(cmd == NULL))
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 614 return -ENOMEM;
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 615
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 616 cmd->header.id = SVGA_3D_CMD_WAIT_FOR_GB_QUERY;
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 617 cmd->header.size = sizeof(cmd->body);
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 618 cmd->body.cid = cid;
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 619 cmd->body.type = SVGA3D_QUERYTYPE_OCCLUSION;
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 620 BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 621 cmd->body.mobid = bo->mem.start;
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 622 cmd->body.offset = 0;
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 623
8426ed9c4b42f4 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2020-11-18 624 vmw_cmd_commit(dev_priv, sizeof(*cmd));
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 625
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 626 return 0;
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 627 }
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 628
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 629
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 630 /**
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 631 * vmw_cmd_emit_dummy_gb_query - emits a dummy query to the fifo using
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 632 * appropriate resource query commands.
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 633 *
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 634 * @dev_priv: The device private structure.
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 635 * @cid: The hardware context id used for the query.
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 636 *
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 637 * This function is used to emit a dummy occlusion query with
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 638 * no primitives rendered between query begin and query end.
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 639 * It's used to provide a query barrier, in order to know that when
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 640 * this query is finished, all preceding queries are also finished.
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 641 *
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 642 * A Query results structure should have been initialized at the start
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 643 * of the dev_priv->dummy_query_bo buffer object. And that buffer object
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 644 * must also be either reserved or pinned when this function is called.
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 645 *
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 646 * Returns -ENOMEM on failure to reserve fifo space.
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 647 */
8426ed9c4b42f4 drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2020-11-18 648 int vmw_cmd_emit_dummy_query(struct vmw_private *dev_priv,
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 649 uint32_t cid)
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 @650 {
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 651 if (dev_priv->has_mob)
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 652 return vmw_cmd_emit_dummy_gb_query(dev_priv, cid);
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 653
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 654 return vmw_cmd_emit_dummy_legacy_query(dev_priv, cid);
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 655 }
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 656
ddcda24e3bec1d drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c Thomas Hellstrom 2012-11-21 657
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 658 /**
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 659 * vmw_cmd_supported - returns true if the given device supports
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 660 * command queues.
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 661 *
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 662 * @dev_priv: The device private structure.
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 663 *
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 664 * Returns true if we can issue commands.
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 665 */
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 666 bool vmw_cmd_supported(struct vmw_private *vmw)
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 667 {
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 668 if ((vmw->capabilities & (SVGA_CAP_COMMAND_BUFFERS |
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 669 SVGA_CAP_CMD_BUFFERS_2)) != 0)
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 670 return true;
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 671 /*
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 672 * We have FIFO cmd's
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 673 */
4acf63c8eca79f drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c Zack Rusin 2021-05-04 @674 return vmw->fifo_mem != 0;
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 43080 bytes --]
[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH] drm/vmwgfx: fix badzero.cocci warnings
2021-05-05 3:57 ` [PATCH 5/6] drm/vmwgfx: Add basic support for SVGA3 Zack Rusin
` (2 preceding siblings ...)
2021-05-05 10:10 ` kernel test robot
@ 2021-05-05 10:10 ` kernel test robot
2021-05-05 19:10 ` [PATCH 5/6] drm/vmwgfx: Add basic support for SVGA3 Zack Rusin
4 siblings, 0 replies; 12+ messages in thread
From: kernel test robot @ 2021-05-05 10:10 UTC (permalink / raw)
To: Zack Rusin, dri-devel; +Cc: sroland, krastevm, kbuild-all
From: kernel test robot <lkp@intel.com>
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c:674:25-26: WARNING comparing pointer to 0
Compare pointer-typed values to NULL rather than 0
Semantic patch information:
This makes an effort to choose between !x and x == NULL. !x is used
if it has previously been used with the function used to initialize x.
This relies on type information. More type information can be obtained
using the option -all_includes and the option -I to specify an
include path.
Generated by: scripts/coccinelle/null/badzero.cocci
CC: Zack Rusin <zackr@vmware.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: kernel test robot <lkp@intel.com>
---
url: https://github.com/0day-ci/linux/commits/Zack-Rusin/drm-vmwgfx-SVGA-v3-and-arm64-support/20210505-120026
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
vmwgfx_cmd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c
@@ -671,5 +671,5 @@ bool vmw_cmd_supported(struct vmw_privat
/*
* We have FIFO cmd's
*/
- return vmw->fifo_mem != 0;
+ return vmw->fifo_mem != NULL;
}
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 5/6] drm/vmwgfx: Add basic support for SVGA3
2021-05-05 3:57 ` [PATCH 5/6] drm/vmwgfx: Add basic support for SVGA3 Zack Rusin
` (3 preceding siblings ...)
2021-05-05 10:10 ` [PATCH] drm/vmwgfx: fix badzero.cocci warnings kernel test robot
@ 2021-05-05 19:10 ` Zack Rusin
4 siblings, 0 replies; 12+ messages in thread
From: Zack Rusin @ 2021-05-05 19:10 UTC (permalink / raw)
To: dri-devel; +Cc: krastevm, sroland
SVGA3 is the next version of our PCI device. Some of the changes
include using MMIO for register accesses instead of ioports,
deprecating the FIFO MMIO and removing a lot of the old and
legacy functionality. SVGA3 doesn't support guest backed
objects right now so everything except 3D is working.
v2: Fixes all the static analyzer warnings
Signed-off-by: Zack Rusin <zackr@vmware.com>
Cc: Martin Krastev <krastevm@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
---
.../gpu/drm/vmwgfx/device_include/svga_reg.h | 55 ++++++-
drivers/gpu/drm/vmwgfx/vmwgfx_binding.c | 8 +-
drivers/gpu/drm/vmwgfx/vmwgfx_blit.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_bo.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c | 118 +++++++--------
drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c | 4 +-
drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 138 ++++++++++++++----
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 120 ++++++++++++---
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 14 +-
drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 18 +--
drivers/gpu/drm/vmwgfx/vmwgfx_fence.h | 2 -
drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c | 49 +------
drivers/gpu/drm/vmwgfx/vmwgfx_irq.c | 77 ++--------
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 29 ++--
drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c | 36 +++--
drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_reg.h | 4 -
drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | 4 +-
drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_so.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 6 +-
drivers/gpu/drm/vmwgfx/vmwgfx_surface.c | 10 +-
drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c | 9 +-
drivers/gpu/drm/vmwgfx/vmwgfx_validation.c | 2 +-
25 files changed, 405 insertions(+), 310 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/device_include/svga_reg.h b/drivers/gpu/drm/vmwgfx/device_include/svga_reg.h
index 19fb9e3299e7..193a57f6aae5 100644
--- a/drivers/gpu/drm/vmwgfx/device_include/svga_reg.h
+++ b/drivers/gpu/drm/vmwgfx/device_include/svga_reg.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 OR MIT */
/**********************************************************
- * Copyright 1998-2015 VMware, Inc.
+ * Copyright 1998-2021 VMware, Inc.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
@@ -98,6 +98,10 @@ typedef uint32 SVGAMobId;
#define SVGA_MAGIC 0x900000UL
#define SVGA_MAKE_ID(ver) (SVGA_MAGIC << 8 | (ver))
+/* Version 3 has the control bar instead of the FIFO */
+#define SVGA_VERSION_3 3
+#define SVGA_ID_3 SVGA_MAKE_ID(SVGA_VERSION_3)
+
/* Version 2 let the address of the frame buffer be unsigned on Win32 */
#define SVGA_VERSION_2 2
#define SVGA_ID_2 SVGA_MAKE_ID(SVGA_VERSION_2)
@@ -129,11 +133,12 @@ typedef uint32 SVGAMobId;
* Interrupts are only supported when the
* SVGA_CAP_IRQMASK capability is present.
*/
-#define SVGA_IRQFLAG_ANY_FENCE 0x1 /* Any fence was passed */
-#define SVGA_IRQFLAG_FIFO_PROGRESS 0x2 /* Made forward progress in the FIFO */
-#define SVGA_IRQFLAG_FENCE_GOAL 0x4 /* SVGA_FIFO_FENCE_GOAL reached */
-#define SVGA_IRQFLAG_COMMAND_BUFFER 0x8 /* Command buffer completed */
-#define SVGA_IRQFLAG_ERROR 0x10 /* Error while processing commands */
+#define SVGA_IRQFLAG_ANY_FENCE (1 << 0) /* Any fence was passed */
+#define SVGA_IRQFLAG_FIFO_PROGRESS (1 << 1) /* Made forward progress in the FIFO */
+#define SVGA_IRQFLAG_FENCE_GOAL (1 << 2) /* SVGA_FIFO_FENCE_GOAL reached */
+#define SVGA_IRQFLAG_COMMAND_BUFFER (1 << 3) /* Command buffer completed */
+#define SVGA_IRQFLAG_ERROR (1 << 4) /* Error while processing commands */
+#define SVGA_IRQFLAG_MAX (1 << 5)
/*
* The byte-size is the size of the actual cursor data,
@@ -286,7 +291,32 @@ enum {
*/
SVGA_REG_GBOBJECT_MEM_SIZE_KB = 76,
- SVGA_REG_TOP = 77, /* Must be 1 more than the last register */
+ /*
+ + * These registers are for the addresses of the memory BARs for SVGA3
+ */
+ SVGA_REG_REGS_START_HIGH32 = 77,
+ SVGA_REG_REGS_START_LOW32 = 78,
+ SVGA_REG_FB_START_HIGH32 = 79,
+ SVGA_REG_FB_START_LOW32 = 80,
+
+ /*
+ * A hint register that recommends which quality level the guest should
+ * currently use to define multisample surfaces.
+ *
+ * If the register is SVGA_REG_MSHINT_DISABLED,
+ * the guest is only allowed to use SVGA3D_MS_QUALITY_FULL.
+ *
+ * Otherwise, this is a live value that can change while the VM is
+ * powered on with the hint suggestion for which quality level the guest
+ * should be using. Guests are free to ignore the hint and use either
+ * RESOLVE or FULL quality.
+ */
+ SVGA_REG_MSHINT = 81,
+
+ SVGA_REG_IRQ_STATUS = 82,
+ SVGA_REG_DIRTY_TRACKING = 83,
+
+ SVGA_REG_TOP = 84, /* Must be 1 more than the last register */
SVGA_PALETTE_BASE = 1024, /* Base of SVGA color map */
/* Next 768 (== 256*3) registers exist for colormap */
@@ -310,6 +340,17 @@ typedef enum SVGARegGuestDriverId {
SVGA_REG_GUEST_DRIVER_ID_SUBMIT = MAX_UINT32,
} SVGARegGuestDriverId;
+typedef enum SVGARegMSHint {
+ SVGA_REG_MSHINT_DISABLED = 0,
+ SVGA_REG_MSHINT_FULL = 1,
+ SVGA_REG_MSHINT_RESOLVED = 2,
+} SVGARegMSHint;
+
+typedef enum SVGARegDirtyTracking {
+ SVGA_REG_DIRTY_TRACKING_PER_IMAGE = 0,
+ SVGA_REG_DIRTY_TRACKING_PER_SURFACE = 1,
+} SVGARegDirtyTracking;
+
/*
* Guest memory regions (GMRs):
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_binding.c b/drivers/gpu/drm/vmwgfx/vmwgfx_binding.c
index 81f525a82b77..05b324825900 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_binding.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_binding.c
@@ -788,7 +788,7 @@ static void vmw_collect_dirty_view_ids(struct vmw_ctx_binding_state *cbs,
}
/**
- * vmw_binding_emit_set_sr - Issue delayed DX shader resource binding commands
+ * vmw_emit_set_sr - Issue delayed DX shader resource binding commands
*
* @cbs: Pointer to the context's struct vmw_ctx_binding_state
* @shader_slot: The shader slot of the binding.
@@ -832,7 +832,7 @@ static int vmw_emit_set_sr(struct vmw_ctx_binding_state *cbs,
}
/**
- * vmw_binding_emit_set_rt - Issue delayed DX rendertarget binding commands
+ * vmw_emit_set_rt - Issue delayed DX rendertarget binding commands
*
* @cbs: Pointer to the context's struct vmw_ctx_binding_state
*/
@@ -1024,7 +1024,7 @@ static void vmw_collect_dirty_vbs(struct vmw_ctx_binding_state *cbs,
}
/**
- * vmw_binding_emit_set_vb - Issue delayed vertex buffer binding commands
+ * vmw_emit_set_vb - Issue delayed vertex buffer binding commands
*
* @cbs: Pointer to the context's struct vmw_ctx_binding_state
*
@@ -1394,7 +1394,7 @@ struct list_head *vmw_binding_state_list(struct vmw_ctx_binding_state *cbs)
}
/**
- * vmwgfx_binding_state_reset - clear a struct vmw_ctx_binding_state
+ * vmw_binding_state_reset - clear a struct vmw_ctx_binding_state
*
* @cbs: Pointer to the struct vmw_ctx_binding_state to be cleared
*
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_blit.c b/drivers/gpu/drm/vmwgfx/vmwgfx_blit.c
index 3a438ae4d3f4..cdbd5a870711 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_blit.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_blit.c
@@ -421,7 +421,7 @@ static int vmw_bo_cpu_blit_line(struct vmw_bo_blit_line_data *d,
}
/**
- * ttm_bo_cpu_blit - in-kernel cpu blit.
+ * vmw_bo_cpu_blit - in-kernel cpu blit.
*
* @dst: Destination buffer object.
* @dst_offset: Destination offset of blit start in bytes.
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c b/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
index 4aa97387d27d..04dd49c4c257 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
@@ -600,7 +600,7 @@ static void vmw_user_bo_release(struct ttm_base_object **p_base)
/**
- * vmw_user_bo_ref_obj-release - TTM synccpu reference object release callback
+ * vmw_user_bo_ref_obj_release - TTM synccpu reference object release callback
* for vmw user buffer objects
*
* @base: Pointer to the TTM base object
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c b/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c
index 20246a7c97c9..027d7d504e78 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c
@@ -31,15 +31,10 @@
#include "vmwgfx_drv.h"
-struct vmw_temp_set_context {
- SVGA3dCmdHeader header;
- SVGA3dCmdDXTempSetContext body;
-};
-
bool vmw_supports_3d(struct vmw_private *dev_priv)
{
uint32_t fifo_min, hwversion;
- const struct vmw_fifo_state *fifo = &dev_priv->fifo;
+ const struct vmw_fifo_state *fifo = dev_priv->fifo;
if (!(dev_priv->capabilities & SVGA_CAP_3D))
return false;
@@ -61,6 +56,8 @@ bool vmw_supports_3d(struct vmw_private *dev_priv)
if (!(dev_priv->capabilities & SVGA_CAP_EXTENDED_FIFO))
return false;
+ BUG_ON(vmw_is_svga_v3(dev_priv));
+
fifo_min = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_MIN);
if (fifo_min <= SVGA_FIFO_3D_HWVERSION * sizeof(unsigned int))
return false;
@@ -98,16 +95,20 @@ bool vmw_fifo_have_pitchlock(struct vmw_private *dev_priv)
return false;
}
-int vmw_fifo_init(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo)
+struct vmw_fifo_state *vmw_fifo_create(struct vmw_private *dev_priv)
{
+ struct vmw_fifo_state *fifo;
uint32_t max;
uint32_t min;
- fifo->dx = false;
+ if (!dev_priv->fifo_mem)
+ return NULL;
+
+ fifo = kzalloc(sizeof(*fifo), GFP_KERNEL);
fifo->static_buffer_size = VMWGFX_FIFO_STATIC_SIZE;
fifo->static_buffer = vmalloc(fifo->static_buffer_size);
if (unlikely(fifo->static_buffer == NULL))
- return -ENOMEM;
+ return ERR_PTR(-ENOMEM);
fifo->dynamic_buffer = NULL;
fifo->reserved_size = 0;
@@ -115,20 +116,6 @@ int vmw_fifo_init(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo)
mutex_init(&fifo->fifo_mutex);
init_rwsem(&fifo->rwsem);
-
- DRM_INFO("width %d\n", vmw_read(dev_priv, SVGA_REG_WIDTH));
- DRM_INFO("height %d\n", vmw_read(dev_priv, SVGA_REG_HEIGHT));
- DRM_INFO("bpp %d\n", vmw_read(dev_priv, SVGA_REG_BITS_PER_PIXEL));
-
- dev_priv->enable_state = vmw_read(dev_priv, SVGA_REG_ENABLE);
- dev_priv->config_done_state = vmw_read(dev_priv, SVGA_REG_CONFIG_DONE);
- dev_priv->traces_state = vmw_read(dev_priv, SVGA_REG_TRACES);
-
- vmw_write(dev_priv, SVGA_REG_ENABLE, SVGA_REG_ENABLE_ENABLE |
- SVGA_REG_ENABLE_HIDE);
-
- vmw_write(dev_priv, SVGA_REG_TRACES, 0);
-
min = 4;
if (dev_priv->capabilities & SVGA_CAP_EXTENDED_FIFO)
min = vmw_read(dev_priv, SVGA_REG_MEM_REGS);
@@ -155,35 +142,23 @@ int vmw_fifo_init(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo)
(unsigned int) max,
(unsigned int) min,
(unsigned int) fifo->capabilities);
-
- atomic_set(&dev_priv->marker_seq, dev_priv->last_read_seqno);
- vmw_fifo_mem_write(dev_priv, SVGA_FIFO_FENCE, dev_priv->last_read_seqno);
-
- return 0;
+ return fifo;
}
void vmw_fifo_ping_host(struct vmw_private *dev_priv, uint32_t reason)
{
u32 *fifo_mem = dev_priv->fifo_mem;
-
- if (cmpxchg(fifo_mem + SVGA_FIFO_BUSY, 0, 1) == 0)
+ if (fifo_mem && cmpxchg(fifo_mem + SVGA_FIFO_BUSY, 0, 1) == 0)
vmw_write(dev_priv, SVGA_REG_SYNC, reason);
+
}
-void vmw_fifo_release(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo)
+void vmw_fifo_destroy(struct vmw_private *dev_priv)
{
- vmw_write(dev_priv, SVGA_REG_SYNC, SVGA_SYNC_GENERIC);
- while (vmw_read(dev_priv, SVGA_REG_BUSY) != 0)
- ;
-
- dev_priv->last_read_seqno = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_FENCE);
+ struct vmw_fifo_state *fifo = dev_priv->fifo;
- vmw_write(dev_priv, SVGA_REG_CONFIG_DONE,
- dev_priv->config_done_state);
- vmw_write(dev_priv, SVGA_REG_ENABLE,
- dev_priv->enable_state);
- vmw_write(dev_priv, SVGA_REG_TRACES,
- dev_priv->traces_state);
+ if (!fifo)
+ return;
if (likely(fifo->static_buffer != NULL)) {
vfree(fifo->static_buffer);
@@ -194,6 +169,8 @@ void vmw_fifo_release(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo)
vfree(fifo->dynamic_buffer);
fifo->dynamic_buffer = NULL;
}
+ kfree(fifo);
+ dev_priv->fifo = NULL;
}
static bool vmw_fifo_is_full(struct vmw_private *dev_priv, uint32_t bytes)
@@ -289,7 +266,7 @@ static int vmw_fifo_wait(struct vmw_private *dev_priv,
static void *vmw_local_fifo_reserve(struct vmw_private *dev_priv,
uint32_t bytes)
{
- struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
+ struct vmw_fifo_state *fifo_state = dev_priv->fifo;
u32 *fifo_mem = dev_priv->fifo_mem;
uint32_t max;
uint32_t min;
@@ -438,16 +415,12 @@ static void vmw_fifo_slow_copy(struct vmw_fifo_state *fifo_state,
static void vmw_local_fifo_commit(struct vmw_private *dev_priv, uint32_t bytes)
{
- struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
+ struct vmw_fifo_state *fifo_state = dev_priv->fifo;
uint32_t next_cmd = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_NEXT_CMD);
uint32_t max = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_MAX);
uint32_t min = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_MIN);
bool reserveable = fifo_state->capabilities & SVGA_FIFO_CAP_RESERVE;
- if (fifo_state->dx)
- bytes += sizeof(struct vmw_temp_set_context);
-
- fifo_state->dx = false;
BUG_ON((bytes & 3) != 0);
BUG_ON(bytes > fifo_state->reserved_size);
@@ -495,7 +468,7 @@ void vmw_cmd_commit(struct vmw_private *dev_priv, uint32_t bytes)
/**
- * vmw_fifo_commit_flush - Commit fifo space and flush any buffered commands.
+ * vmw_cmd_commit_flush - Commit fifo space and flush any buffered commands.
*
* @dev_priv: Pointer to device private structure.
* @bytes: Number of bytes to commit.
@@ -509,7 +482,7 @@ void vmw_cmd_commit_flush(struct vmw_private *dev_priv, uint32_t bytes)
}
/**
- * vmw_fifo_flush - Flush any buffered commands and make sure command processing
+ * vmw_cmd_flush - Flush any buffered commands and make sure command processing
* starts.
*
* @dev_priv: Pointer to device private structure.
@@ -527,7 +500,6 @@ int vmw_cmd_flush(struct vmw_private *dev_priv, bool interruptible)
int vmw_cmd_send_fence(struct vmw_private *dev_priv, uint32_t *seqno)
{
- struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
struct svga_fifo_cmd_fence *cmd_fence;
u32 *fm;
int ret = 0;
@@ -546,7 +518,7 @@ int vmw_cmd_send_fence(struct vmw_private *dev_priv, uint32_t *seqno)
*seqno = atomic_add_return(1, &dev_priv->marker_seq);
} while (*seqno == 0);
- if (!(fifo_state->capabilities & SVGA_FIFO_CAP_FENCE)) {
+ if (!(vmw_fifo_caps(dev_priv) & SVGA_FIFO_CAP_FENCE)) {
/*
* Don't request hardware to send a fence. The
@@ -561,22 +533,22 @@ int vmw_cmd_send_fence(struct vmw_private *dev_priv, uint32_t *seqno)
cmd_fence = (struct svga_fifo_cmd_fence *) fm;
cmd_fence->fence = *seqno;
vmw_cmd_commit_flush(dev_priv, bytes);
- vmw_update_seqno(dev_priv, fifo_state);
+ vmw_update_seqno(dev_priv);
out_err:
return ret;
}
/**
- * vmw_fifo_emit_dummy_legacy_query - emits a dummy query to the fifo using
+ * vmw_cmd_emit_dummy_legacy_query - emits a dummy query to the fifo using
* legacy query commands.
*
* @dev_priv: The device private structure.
* @cid: The hardware context id used for the query.
*
- * See the vmw_fifo_emit_dummy_query documentation.
+ * See the vmw_cmd_emit_dummy_query documentation.
*/
-static int vmw_fifo_emit_dummy_legacy_query(struct vmw_private *dev_priv,
+static int vmw_cmd_emit_dummy_legacy_query(struct vmw_private *dev_priv,
uint32_t cid)
{
/*
@@ -614,16 +586,16 @@ static int vmw_fifo_emit_dummy_legacy_query(struct vmw_private *dev_priv,
}
/**
- * vmw_fifo_emit_dummy_gb_query - emits a dummy query to the fifo using
+ * vmw_cmd_emit_dummy_gb_query - emits a dummy query to the fifo using
* guest-backed resource query commands.
*
* @dev_priv: The device private structure.
* @cid: The hardware context id used for the query.
*
- * See the vmw_fifo_emit_dummy_query documentation.
+ * See the vmw_cmd_emit_dummy_query documentation.
*/
-static int vmw_fifo_emit_dummy_gb_query(struct vmw_private *dev_priv,
- uint32_t cid)
+static int vmw_cmd_emit_dummy_gb_query(struct vmw_private *dev_priv,
+ uint32_t cid)
{
/*
* A query wait without a preceding query end will
@@ -656,7 +628,7 @@ static int vmw_fifo_emit_dummy_gb_query(struct vmw_private *dev_priv,
/**
- * vmw_fifo_emit_dummy_gb_query - emits a dummy query to the fifo using
+ * vmw_cmd_emit_dummy_query - emits a dummy query to the fifo using
* appropriate resource query commands.
*
* @dev_priv: The device private structure.
@@ -677,7 +649,27 @@ int vmw_cmd_emit_dummy_query(struct vmw_private *dev_priv,
uint32_t cid)
{
if (dev_priv->has_mob)
- return vmw_fifo_emit_dummy_gb_query(dev_priv, cid);
+ return vmw_cmd_emit_dummy_gb_query(dev_priv, cid);
- return vmw_fifo_emit_dummy_legacy_query(dev_priv, cid);
+ return vmw_cmd_emit_dummy_legacy_query(dev_priv, cid);
+}
+
+
+/**
+ * vmw_cmd_supported - returns true if the given device supports
+ * command queues.
+ *
+ * @vmw: The device private structure.
+ *
+ * Returns true if we can issue commands.
+ */
+bool vmw_cmd_supported(struct vmw_private *vmw)
+{
+ if ((vmw->capabilities & (SVGA_CAP_COMMAND_BUFFERS |
+ SVGA_CAP_CMD_BUFFERS_2)) != 0)
+ return true;
+ /*
+ * We have FIFO cmd's
+ */
+ return vmw->fifo_mem != NULL;
}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c
index 2e23e537cdf5..05ca310ed61a 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c
@@ -295,7 +295,7 @@ void vmw_cmdbuf_header_free(struct vmw_cmdbuf_header *header)
/**
- * vmw_cmbuf_header_submit: Submit a command buffer to hardware.
+ * vmw_cmdbuf_header_submit: Submit a command buffer to hardware.
*
* @header: The header of the buffer to submit.
*/
@@ -620,7 +620,7 @@ static void vmw_cmdbuf_work_func(struct work_struct *work)
}
/**
- * vmw_cmdbuf_man idle - Check whether the command buffer manager is idle.
+ * vmw_cmdbuf_man_idle - Check whether the command buffer manager is idle.
*
* @man: The command buffer manager.
* @check_preempted: Check also the preempted queue for pending command buffers.
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c b/drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c
index d782b49c7236..b40aa002bf2b 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c
@@ -653,7 +653,7 @@ int vmw_cotable_notify(struct vmw_resource *res, int id)
}
/**
- * vmw_cotable_add_view - add a view to the cotable's list of active views.
+ * vmw_cotable_add_resource - add a view to the cotable's list of active views.
*
* @res: pointer struct vmw_resource representing the cotable.
* @head: pointer to the struct list_head member of the resource, dedicated
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index 22a2874116c9..4904100ef492 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -50,7 +50,7 @@
#define VMWGFX_VALIDATION_MEM_GRAN (16*PAGE_SIZE)
-/**
+/*
* Fully encoded drm commands. Might move to vmw_drm.h
*/
@@ -246,6 +246,7 @@ static const struct drm_ioctl_desc vmw_ioctls[] = {
static const struct pci_device_id vmw_pci_id_list[] = {
{ PCI_DEVICE(0x15ad, VMWGFX_PCI_ID_SVGA2) },
+ { PCI_DEVICE(0x15ad, VMWGFX_PCI_ID_SVGA3) },
{ }
};
MODULE_DEVICE_TABLE(pci, vmw_pci_id_list);
@@ -393,6 +394,60 @@ static int vmw_dummy_query_bo_create(struct vmw_private *dev_priv)
return ret;
}
+static int vmw_device_init(struct vmw_private *dev_priv)
+{
+ bool uses_fb_traces = false;
+
+ DRM_INFO("width %d\n", vmw_read(dev_priv, SVGA_REG_WIDTH));
+ DRM_INFO("height %d\n", vmw_read(dev_priv, SVGA_REG_HEIGHT));
+ DRM_INFO("bpp %d\n", vmw_read(dev_priv, SVGA_REG_BITS_PER_PIXEL));
+
+ dev_priv->enable_state = vmw_read(dev_priv, SVGA_REG_ENABLE);
+ dev_priv->config_done_state = vmw_read(dev_priv, SVGA_REG_CONFIG_DONE);
+ dev_priv->traces_state = vmw_read(dev_priv, SVGA_REG_TRACES);
+
+ vmw_write(dev_priv, SVGA_REG_ENABLE, SVGA_REG_ENABLE_ENABLE |
+ SVGA_REG_ENABLE_HIDE);
+
+ uses_fb_traces = !vmw_cmd_supported(dev_priv) &&
+ (dev_priv->capabilities & SVGA_CAP_TRACES) != 0;
+
+ vmw_write(dev_priv, SVGA_REG_TRACES, uses_fb_traces);
+ dev_priv->fifo = vmw_fifo_create(dev_priv);
+ if (IS_ERR(dev_priv->fifo)) {
+ int err = PTR_ERR(dev_priv->fifo);
+ dev_priv->fifo = NULL;
+ return err;
+ } else if (!dev_priv->fifo) {
+ vmw_write(dev_priv, SVGA_REG_CONFIG_DONE, 1);
+ }
+
+ dev_priv->last_read_seqno = vmw_fence_read(dev_priv);
+ atomic_set(&dev_priv->marker_seq, dev_priv->last_read_seqno);
+ return 0;
+}
+
+static void vmw_device_fini(struct vmw_private *vmw)
+{
+ /*
+ * Legacy sync
+ */
+ vmw_write(vmw, SVGA_REG_SYNC, SVGA_SYNC_GENERIC);
+ while (vmw_read(vmw, SVGA_REG_BUSY) != 0)
+ ;
+
+ vmw->last_read_seqno = vmw_fence_read(vmw);
+
+ vmw_write(vmw, SVGA_REG_CONFIG_DONE,
+ vmw->config_done_state);
+ vmw_write(vmw, SVGA_REG_ENABLE,
+ vmw->enable_state);
+ vmw_write(vmw, SVGA_REG_TRACES,
+ vmw->traces_state);
+
+ vmw_fifo_destroy(vmw);
+}
+
/**
* vmw_request_device_late - Perform late device setup
*
@@ -433,9 +488,9 @@ static int vmw_request_device(struct vmw_private *dev_priv)
{
int ret;
- ret = vmw_fifo_init(dev_priv, &dev_priv->fifo);
+ ret = vmw_device_init(dev_priv);
if (unlikely(ret != 0)) {
- DRM_ERROR("Unable to initialize FIFO.\n");
+ DRM_ERROR("Unable to initialize the device.\n");
return ret;
}
vmw_fence_fifo_up(dev_priv->fman);
@@ -469,7 +524,7 @@ static int vmw_request_device(struct vmw_private *dev_priv)
vmw_cmdbuf_man_destroy(dev_priv->cman);
out_no_mob:
vmw_fence_fifo_down(dev_priv->fman);
- vmw_fifo_release(dev_priv, &dev_priv->fifo);
+ vmw_device_fini(dev_priv);
return ret;
}
@@ -517,7 +572,7 @@ static void vmw_release_device_late(struct vmw_private *dev_priv)
if (dev_priv->cman)
vmw_cmdbuf_man_destroy(dev_priv->cman);
- vmw_fifo_release(dev_priv, &dev_priv->fifo);
+ vmw_device_fini(dev_priv);
}
/*
@@ -638,6 +693,8 @@ static void vmw_vram_manager_fini(struct vmw_private *dev_priv)
static int vmw_setup_pci_resources(struct vmw_private *dev,
unsigned long pci_id)
{
+ resource_size_t rmmio_start;
+ resource_size_t rmmio_size;
resource_size_t fifo_start;
resource_size_t fifo_size;
int ret;
@@ -649,23 +706,45 @@ static int vmw_setup_pci_resources(struct vmw_private *dev,
if (ret)
return ret;
- dev->io_start = pci_resource_start(pdev, 0);
- dev->vram_start = pci_resource_start(pdev, 1);
- dev->vram_size = pci_resource_len(pdev, 1);
- fifo_start = pci_resource_start(pdev, 2);
- fifo_size = pci_resource_len(pdev, 2);
-
- DRM_INFO("FIFO at %pa size is %llu kiB\n",
- &fifo_start, (uint64_t)fifo_size / 1024);
- dev->fifo_mem = devm_memremap(dev->drm.dev,
- fifo_start,
- fifo_size,
- MEMREMAP_WB);
-
- if (IS_ERR(dev->fifo_mem)) {
- DRM_ERROR("Failed mapping FIFO memory.\n");
+ dev->pci_id = pci_id;
+ if (pci_id == VMWGFX_PCI_ID_SVGA3) {
+ rmmio_start = pci_resource_start(pdev, 0);
+ rmmio_size = pci_resource_len(pdev, 0);
+ dev->vram_start = pci_resource_start(pdev, 2);
+ dev->vram_size = pci_resource_len(pdev, 2);
+
+ DRM_INFO("Register MMIO at 0x%pa size is %llu kiB\n",
+ &rmmio_start, (uint64_t)rmmio_size / 1024);
+ dev->rmmio = devm_ioremap(dev->drm.dev,
+ rmmio_start,
+ rmmio_size);
+ if (IS_ERR(dev->rmmio)) {
+ DRM_ERROR("Failed mapping registers mmio memory.\n");
+ pci_release_regions(pdev);
+ return PTR_ERR(dev->rmmio);
+ }
+ } else if (pci_id == VMWGFX_PCI_ID_SVGA2) {
+ dev->io_start = pci_resource_start(pdev, 0);
+ dev->vram_start = pci_resource_start(pdev, 1);
+ dev->vram_size = pci_resource_len(pdev, 1);
+ fifo_start = pci_resource_start(pdev, 2);
+ fifo_size = pci_resource_len(pdev, 2);
+
+ DRM_INFO("FIFO at %pa size is %llu kiB\n",
+ &fifo_start, (uint64_t)fifo_size / 1024);
+ dev->fifo_mem = devm_memremap(dev->drm.dev,
+ fifo_start,
+ fifo_size,
+ MEMREMAP_WB);
+
+ if (IS_ERR(dev->fifo_mem)) {
+ DRM_ERROR("Failed mapping FIFO memory.\n");
+ pci_release_regions(pdev);
+ return PTR_ERR(dev->fifo_mem);
+ }
+ } else {
pci_release_regions(pdev);
- return PTR_ERR(dev->fifo_mem);
+ return -EINVAL;
}
/*
@@ -684,13 +763,16 @@ static int vmw_detect_version(struct vmw_private *dev)
{
uint32_t svga_id;
- vmw_write(dev, SVGA_REG_ID, SVGA_ID_2);
+ vmw_write(dev, SVGA_REG_ID, vmw_is_svga_v3(dev) ?
+ SVGA_ID_3 : SVGA_ID_2);
svga_id = vmw_read(dev, SVGA_REG_ID);
- if (svga_id != SVGA_ID_2) {
+ if (svga_id != SVGA_ID_2 && svga_id != SVGA_ID_3) {
DRM_ERROR("Unsupported SVGA ID 0x%x on chipset 0x%x\n",
svga_id, dev->vmw_chipset);
return -ENOSYS;
}
+ BUG_ON(vmw_is_svga_v3(dev) && (svga_id != SVGA_ID_3));
+ DRM_INFO("Running on SVGA version %d.\n", (svga_id & 0xff));
return 0;
}
@@ -703,7 +785,6 @@ static int vmw_driver_load(struct vmw_private *dev_priv, u32 pci_id)
struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
dev_priv->vmw_chipset = pci_id;
- dev_priv->last_read_seqno = (uint32_t) -100;
dev_priv->drm.dev_private = dev_priv;
mutex_init(&dev_priv->cmdbuf_mutex);
@@ -824,6 +905,8 @@ static int vmw_driver_load(struct vmw_private *dev_priv, u32 pci_id)
vmw_print_capabilities(dev_priv->capabilities);
if (dev_priv->capabilities & SVGA_CAP_CAP2_REGISTER)
vmw_print_capabilities2(dev_priv->capabilities2);
+ DRM_INFO("Supports command queues = %d\n",
+ vmw_cmd_supported((dev_priv)));
ret = vmw_dma_masks(dev_priv);
if (unlikely(ret != 0))
@@ -1390,8 +1473,7 @@ static int vmw_pm_restore(struct device *kdev)
struct vmw_private *dev_priv = vmw_priv(dev);
int ret;
- vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2);
- (void) vmw_read(dev_priv, SVGA_REG_ID);
+ vmw_detect_version(dev_priv);
if (dev_priv->enable_fb)
vmw_fifo_resource_inc(dev_priv);
@@ -1428,8 +1510,8 @@ static const struct file_operations vmwgfx_driver_fops = {
.release = drm_release,
.unlocked_ioctl = vmw_unlocked_ioctl,
.mmap = vmw_mmap,
- .poll = vmw_fops_poll,
- .read = vmw_fops_read,
+ .poll = drm_poll,
+ .read = drm_read,
#if defined(CONFIG_COMPAT)
.compat_ioctl = vmw_compat_ioctl,
#endif
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
index 2fb6898ceca9..dcdbc59c2b5f 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
@@ -66,6 +66,7 @@
#define VMWGFX_ENABLE_SCREEN_TARGET_OTABLE 1
#define VMWGFX_PCI_ID_SVGA2 0x0405
+#define VMWGFX_PCI_ID_SVGA3 0x0406
/*
* Perhaps we should have sysfs entries for these.
@@ -284,7 +285,6 @@ struct vmw_fifo_state {
uint32_t capabilities;
struct mutex fifo_mutex;
struct rw_semaphore rwsem;
- bool dx;
};
/**
@@ -485,14 +485,14 @@ struct vmw_private {
struct drm_device drm;
struct ttm_device bdev;
- struct vmw_fifo_state fifo;
-
struct drm_vma_offset_manager vma_manager;
+ unsigned long pci_id;
u32 vmw_chipset;
resource_size_t io_start;
resource_size_t vram_start;
resource_size_t vram_size;
resource_size_t prim_bb_mem;
+ void __iomem *rmmio;
u32 *fifo_mem;
resource_size_t fifo_mem_size;
uint32_t fb_max_width;
@@ -623,6 +623,7 @@ struct vmw_private {
*/
struct vmw_otable_batch otable_batch;
+ struct vmw_fifo_state *fifo;
struct vmw_cmdbuf_man *cman;
DECLARE_BITMAP(irqthread_pending, VMW_IRQTHREAD_MAX);
@@ -645,6 +646,14 @@ static inline struct vmw_fpriv *vmw_fpriv(struct drm_file *file_priv)
return (struct vmw_fpriv *)file_priv->driver_priv;
}
+/*
+ * SVGA v3 has mmio register access and lacks fifo cmds
+ */
+static inline bool vmw_is_svga_v3(const struct vmw_private *dev)
+{
+ return dev->pci_id == VMWGFX_PCI_ID_SVGA3;
+}
+
/*
* The locking here is fine-grained, so that it is performed once
* for every read- and write operation. This is of course costly, but we
@@ -655,10 +664,14 @@ static inline struct vmw_fpriv *vmw_fpriv(struct drm_file *file_priv)
static inline void vmw_write(struct vmw_private *dev_priv,
unsigned int offset, uint32_t value)
{
- spin_lock(&dev_priv->hw_lock);
- outl(offset, dev_priv->io_start + VMWGFX_INDEX_PORT);
- outl(value, dev_priv->io_start + VMWGFX_VALUE_PORT);
- spin_unlock(&dev_priv->hw_lock);
+ if (vmw_is_svga_v3(dev_priv)) {
+ iowrite32(value, dev_priv->rmmio + offset);
+ } else {
+ spin_lock(&dev_priv->hw_lock);
+ outl(offset, dev_priv->io_start + SVGA_INDEX_PORT);
+ outl(value, dev_priv->io_start + SVGA_VALUE_PORT);
+ spin_unlock(&dev_priv->hw_lock);
+ }
}
static inline uint32_t vmw_read(struct vmw_private *dev_priv,
@@ -666,10 +679,14 @@ static inline uint32_t vmw_read(struct vmw_private *dev_priv,
{
u32 val;
- spin_lock(&dev_priv->hw_lock);
- outl(offset, dev_priv->io_start + VMWGFX_INDEX_PORT);
- val = inl(dev_priv->io_start + VMWGFX_VALUE_PORT);
- spin_unlock(&dev_priv->hw_lock);
+ if (vmw_is_svga_v3(dev_priv)) {
+ val = ioread32(dev_priv->rmmio + offset);
+ } else {
+ spin_lock(&dev_priv->hw_lock);
+ outl(offset, dev_priv->io_start + SVGA_INDEX_PORT);
+ val = inl(dev_priv->io_start + SVGA_VALUE_PORT);
+ spin_unlock(&dev_priv->hw_lock);
+ }
return val;
}
@@ -932,19 +949,14 @@ extern int vmw_present_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
extern int vmw_present_readback_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
-extern __poll_t vmw_fops_poll(struct file *filp,
- struct poll_table_struct *wait);
-extern ssize_t vmw_fops_read(struct file *filp, char __user *buffer,
- size_t count, loff_t *offset);
/**
* Fifo utilities - vmwgfx_fifo.c
*/
-extern int vmw_fifo_init(struct vmw_private *dev_priv,
- struct vmw_fifo_state *fifo);
-extern void vmw_fifo_release(struct vmw_private *dev_priv,
- struct vmw_fifo_state *fifo);
+extern struct vmw_fifo_state *vmw_fifo_create(struct vmw_private *dev_priv);
+extern void vmw_fifo_destroy(struct vmw_private *dev_priv);
+extern bool vmw_cmd_supported(struct vmw_private *vmw);
extern void *
vmw_cmd_ctx_reserve(struct vmw_private *dev_priv, uint32_t bytes, int ctx_id);
extern void vmw_cmd_commit(struct vmw_private *dev_priv, uint32_t bytes);
@@ -970,6 +982,31 @@ extern int vmw_cmd_flush(struct vmw_private *dev_priv,
#define VMW_CMD_RESERVE(__priv, __bytes) \
VMW_CMD_CTX_RESERVE(__priv, __bytes, SVGA3D_INVALID_ID)
+
+/**
+ * vmw_fifo_caps - Returns the capabilities of the FIFO command
+ * queue or 0 if fifo memory isn't present.
+ * @dev_priv: The device private context
+ */
+static inline uint32_t vmw_fifo_caps(const struct vmw_private *dev_priv)
+{
+ if (!dev_priv->fifo_mem || !dev_priv->fifo)
+ return 0;
+ return dev_priv->fifo->capabilities;
+}
+
+
+/**
+ * vmw_is_cursor_bypass3_enabled - Returns TRUE iff Cursor Bypass 3
+ * is enabled in the FIFO.
+ * @dev_priv: The device private context
+ */
+static inline bool
+vmw_is_cursor_bypass3_enabled(const struct vmw_private *dev_priv)
+{
+ return (vmw_fifo_caps(dev_priv) & SVGA_FIFO_CAP_CURSOR_BYPASS_3) != 0;
+}
+
/**
* TTM glue - vmwgfx_ttm_glue.c
*/
@@ -1079,9 +1116,6 @@ bool vmw_cmd_describe(const void *buf, u32 *size, char const **cmd);
* IRQs and wating - vmwgfx_irq.c
*/
-extern int vmw_wait_seqno(struct vmw_private *dev_priv, bool lazy,
- uint32_t seqno, bool interruptible,
- unsigned long timeout);
extern int vmw_irq_install(struct drm_device *dev, int irq);
extern void vmw_irq_uninstall(struct drm_device *dev);
extern bool vmw_seqno_passed(struct vmw_private *dev_priv,
@@ -1092,8 +1126,7 @@ extern int vmw_fallback_wait(struct vmw_private *dev_priv,
uint32_t seqno,
bool interruptible,
unsigned long timeout);
-extern void vmw_update_seqno(struct vmw_private *dev_priv,
- struct vmw_fifo_state *fifo_state);
+extern void vmw_update_seqno(struct vmw_private *dev_priv);
extern void vmw_seqno_waiter_add(struct vmw_private *dev_priv);
extern void vmw_seqno_waiter_remove(struct vmw_private *dev_priv);
extern void vmw_goal_waiter_add(struct vmw_private *dev_priv);
@@ -1572,6 +1605,7 @@ static inline void vmw_fifo_resource_dec(struct vmw_private *dev_priv)
*/
static inline u32 vmw_fifo_mem_read(struct vmw_private *vmw, uint32 fifo_reg)
{
+ BUG_ON(vmw_is_svga_v3(vmw));
return READ_ONCE(*(vmw->fifo_mem + fifo_reg));
}
@@ -1586,6 +1620,44 @@ static inline u32 vmw_fifo_mem_read(struct vmw_private *vmw, uint32 fifo_reg)
static inline void vmw_fifo_mem_write(struct vmw_private *vmw, u32 fifo_reg,
u32 value)
{
+ BUG_ON(vmw_is_svga_v3(vmw));
WRITE_ONCE(*(vmw->fifo_mem + fifo_reg), value);
}
+
+static inline u32 vmw_fence_read(struct vmw_private *dev_priv)
+{
+ u32 fence;
+ if (vmw_is_svga_v3(dev_priv))
+ fence = vmw_read(dev_priv, SVGA_REG_FENCE);
+ else
+ fence = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_FENCE);
+ return fence;
+}
+
+static inline void vmw_fence_write(struct vmw_private *dev_priv,
+ u32 fence)
+{
+ BUG_ON(vmw_is_svga_v3(dev_priv));
+ vmw_fifo_mem_write(dev_priv, SVGA_FIFO_FENCE, fence);
+}
+
+static inline u32 vmw_irq_status_read(struct vmw_private *vmw)
+{
+ u32 status;
+ if (vmw_is_svga_v3(vmw))
+ status = vmw_read(vmw, SVGA_REG_IRQ_STATUS);
+ else
+ status = inl(vmw->io_start + SVGA_IRQSTATUS_PORT);
+ return status;
+}
+
+static inline void vmw_irq_status_write(struct vmw_private *vmw,
+ uint32 status)
+{
+ if (vmw_is_svga_v3(vmw))
+ vmw_write(vmw, SVGA_REG_IRQ_STATUS, status);
+ else
+ outl(status, vmw->io_start + SVGA_IRQSTATUS_PORT);
+}
+
#endif
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
index 3ad07657b7d2..32a84dff3fbf 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
@@ -711,7 +711,7 @@ vmw_cmd_res_check(struct vmw_private *dev_priv,
}
/**
- * vmw_rebind_dx_query - Rebind DX query associated with the context
+ * vmw_rebind_all_dx_query - Rebind DX query associated with the context
*
* @ctx_res: context the query belongs to
*
@@ -1140,7 +1140,7 @@ static void vmw_query_bo_switch_commit(struct vmw_private *dev_priv,
}
/**
- * vmw_translate_mob_pointer - Prepare to translate a user-space buffer handle
+ * vmw_translate_mob_ptr - Prepare to translate a user-space buffer handle
* to a MOB id.
*
* @dev_priv: Pointer to a device private structure.
@@ -1195,7 +1195,7 @@ static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
}
/**
- * vmw_translate_guest_pointer - Prepare to translate a user-space buffer handle
+ * vmw_translate_guest_ptr - Prepare to translate a user-space buffer handle
* to a valid SVGAGuestPtr
*
* @dev_priv: Pointer to a device private structure.
@@ -2308,7 +2308,7 @@ static int vmw_cmd_dx_set_vertex_buffers(struct vmw_private *dev_priv,
}
/**
- * vmw_cmd_dx_ia_set_vertex_buffers - Validate
+ * vmw_cmd_dx_set_index_buffer - Validate
* SVGA_3D_CMD_DX_IA_SET_INDEX_BUFFER command.
*
* @dev_priv: Pointer to a device private struct.
@@ -2347,7 +2347,7 @@ static int vmw_cmd_dx_set_index_buffer(struct vmw_private *dev_priv,
}
/**
- * vmw_cmd_dx_set_rendertarget - Validate SVGA_3D_CMD_DX_SET_RENDERTARGETS
+ * vmw_cmd_dx_set_rendertargets - Validate SVGA_3D_CMD_DX_SET_RENDERTARGETS
* command
*
* @dev_priv: Pointer to a device private struct.
@@ -2402,7 +2402,7 @@ static int vmw_cmd_dx_clear_rendertarget_view(struct vmw_private *dev_priv,
}
/**
- * vmw_cmd_dx_clear_rendertarget_view - Validate
+ * vmw_cmd_dx_clear_depthstencil_view - Validate
* SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW command
*
* @dev_priv: Pointer to a device private struct.
@@ -3841,7 +3841,7 @@ vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
fence_rep.handle = fence_handle;
fence_rep.seqno = fence->base.seqno;
- vmw_update_seqno(dev_priv, &dev_priv->fifo);
+ vmw_update_seqno(dev_priv);
fence_rep.passed_seqno = dev_priv->last_read_seqno;
}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
index 23523eb3cac2..9fe12329a4d5 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
@@ -139,12 +139,10 @@ static bool vmw_fence_enable_signaling(struct dma_fence *f)
struct vmw_fence_manager *fman = fman_from_fence(fence);
struct vmw_private *dev_priv = fman->dev_priv;
- u32 seqno = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_FENCE);
+ u32 seqno = vmw_fence_read(dev_priv);
if (seqno - fence->base.seqno < VMW_FENCE_WRAP)
return false;
- vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
-
return true;
}
@@ -177,7 +175,6 @@ static long vmw_fence_wait(struct dma_fence *f, bool intr, signed long timeout)
if (likely(vmw_fence_obj_signaled(fence)))
return timeout;
- vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
vmw_seqno_waiter_add(dev_priv);
spin_lock(f->lock);
@@ -464,7 +461,7 @@ static void __vmw_fences_update(struct vmw_fence_manager *fman)
bool needs_rerun;
uint32_t seqno, new_seqno;
- seqno = vmw_fifo_mem_read(fman->dev_priv, SVGA_FIFO_FENCE);
+ seqno = vmw_fence_read(fman->dev_priv);
rerun:
list_for_each_entry_safe(fence, next_fence, &fman->fence_list, head) {
if (seqno - fence->base.seqno < VMW_FENCE_WRAP) {
@@ -486,7 +483,7 @@ static void __vmw_fences_update(struct vmw_fence_manager *fman)
needs_rerun = vmw_fence_goal_new_locked(fman, seqno);
if (unlikely(needs_rerun)) {
- new_seqno = vmw_fifo_mem_read(fman->dev_priv, SVGA_FIFO_FENCE);
+ new_seqno = vmw_fence_read(fman->dev_priv);
if (new_seqno != seqno) {
seqno = new_seqno;
goto rerun;
@@ -529,13 +526,6 @@ int vmw_fence_obj_wait(struct vmw_fence_obj *fence, bool lazy,
return ret;
}
-void vmw_fence_obj_flush(struct vmw_fence_obj *fence)
-{
- struct vmw_private *dev_priv = fman_from_fence(fence)->dev_priv;
-
- vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
-}
-
static void vmw_fence_destroy(struct vmw_fence_obj *fence)
{
dma_fence_free(&fence->base);
@@ -992,7 +982,7 @@ static void vmw_fence_obj_add_action(struct vmw_fence_obj *fence,
}
/**
- * vmw_event_fence_action_create - Post an event for sending when a fence
+ * vmw_event_fence_action_queue - Post an event for sending when a fence
* object seqno has passed.
*
* @file_priv: The file connection on which the event should be posted.
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h
index 50e9fdd7acf1..079ab4f3ba51 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h
@@ -94,8 +94,6 @@ extern int vmw_fence_obj_wait(struct vmw_fence_obj *fence,
bool lazy,
bool interruptible, unsigned long timeout);
-extern void vmw_fence_obj_flush(struct vmw_fence_obj *fence);
-
extern int vmw_fence_create(struct vmw_fence_manager *fman,
uint32_t seqno,
struct vmw_fence_obj **p_fence);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
index 6763d0638450..4fdacf9924e6 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
@@ -60,15 +60,13 @@ int vmw_getparam_ioctl(struct drm_device *dev, void *data,
param->value = dev_priv->capabilities2;
break;
case DRM_VMW_PARAM_FIFO_CAPS:
- param->value = dev_priv->fifo.capabilities;
+ param->value = vmw_fifo_caps(dev_priv);
break;
case DRM_VMW_PARAM_MAX_FB_SIZE:
param->value = dev_priv->prim_bb_mem;
break;
case DRM_VMW_PARAM_FIFO_HW_VERSION:
{
- const struct vmw_fifo_state *fifo = &dev_priv->fifo;
-
if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS)) {
param->value = SVGA3D_HWVERSION_WS8_B1;
break;
@@ -76,7 +74,7 @@ int vmw_getparam_ioctl(struct drm_device *dev, void *data,
param->value =
vmw_fifo_mem_read(dev_priv,
- ((fifo->capabilities &
+ ((vmw_fifo_caps(dev_priv) &
SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ?
SVGA_FIFO_3D_HWVERSION_REVISED :
SVGA_FIFO_3D_HWVERSION));
@@ -398,46 +396,3 @@ int vmw_present_readback_ioctl(struct drm_device *dev, void *data,
out_clips:
return ret;
}
-
-
-/**
- * vmw_fops_poll - wrapper around the drm_poll function
- *
- * @filp: See the linux fops poll documentation.
- * @wait: See the linux fops poll documentation.
- *
- * Wrapper around the drm_poll function that makes sure the device is
- * processing the fifo if drm_poll decides to wait.
- */
-__poll_t vmw_fops_poll(struct file *filp, struct poll_table_struct *wait)
-{
- struct drm_file *file_priv = filp->private_data;
- struct vmw_private *dev_priv =
- vmw_priv(file_priv->minor->dev);
-
- vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
- return drm_poll(filp, wait);
-}
-
-
-/**
- * vmw_fops_read - wrapper around the drm_read function
- *
- * @filp: See the linux fops read documentation.
- * @buffer: See the linux fops read documentation.
- * @count: See the linux fops read documentation.
- * @offset: See the linux fops read documentation.
- *
- * Wrapper around the drm_read function that makes sure the device is
- * processing the fifo if drm_read decides to wait.
- */
-ssize_t vmw_fops_read(struct file *filp, char __user *buffer,
- size_t count, loff_t *offset)
-{
- struct drm_file *file_priv = filp->private_data;
- struct vmw_private *dev_priv =
- vmw_priv(file_priv->minor->dev);
-
- vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
- return drm_read(filp, buffer, count, offset);
-}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c b/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c
index 6c2a569f1fcb..b9a9b7ddadbd 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c
@@ -65,7 +65,7 @@ static irqreturn_t vmw_thread_fn(int irq, void *arg)
}
/**
- * vmw_irq_handler irq handler
+ * vmw_irq_handler: irq handler
*
* @irq: irq number
* @arg: Closure argument. Pointer to a struct drm_device cast to void *
@@ -82,11 +82,11 @@ static irqreturn_t vmw_irq_handler(int irq, void *arg)
uint32_t status, masked_status;
irqreturn_t ret = IRQ_HANDLED;
- status = inl(dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+ status = vmw_irq_status_read(dev_priv);
masked_status = status & READ_ONCE(dev_priv->irq_mask);
if (likely(status))
- outl(status, dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+ vmw_irq_status_write(dev_priv, status);
if (!status)
return IRQ_NONE;
@@ -114,10 +114,9 @@ static bool vmw_fifo_idle(struct vmw_private *dev_priv, uint32_t seqno)
return (vmw_read(dev_priv, SVGA_REG_BUSY) == 0);
}
-void vmw_update_seqno(struct vmw_private *dev_priv,
- struct vmw_fifo_state *fifo_state)
+void vmw_update_seqno(struct vmw_private *dev_priv)
{
- uint32_t seqno = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_FENCE);
+ uint32_t seqno = vmw_fence_read(dev_priv);
if (dev_priv->last_read_seqno != seqno) {
dev_priv->last_read_seqno = seqno;
@@ -128,18 +127,16 @@ void vmw_update_seqno(struct vmw_private *dev_priv,
bool vmw_seqno_passed(struct vmw_private *dev_priv,
uint32_t seqno)
{
- struct vmw_fifo_state *fifo_state;
bool ret;
if (likely(dev_priv->last_read_seqno - seqno < VMW_FENCE_WRAP))
return true;
- fifo_state = &dev_priv->fifo;
- vmw_update_seqno(dev_priv, fifo_state);
+ vmw_update_seqno(dev_priv);
if (likely(dev_priv->last_read_seqno - seqno < VMW_FENCE_WRAP))
return true;
- if (!(fifo_state->capabilities & SVGA_FIFO_CAP_FENCE) &&
+ if (!(vmw_fifo_caps(dev_priv) & SVGA_FIFO_CAP_FENCE) &&
vmw_fifo_idle(dev_priv, seqno))
return true;
@@ -161,7 +158,7 @@ int vmw_fallback_wait(struct vmw_private *dev_priv,
bool interruptible,
unsigned long timeout)
{
- struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
+ struct vmw_fifo_state *fifo_state = dev_priv->fifo;
uint32_t count = 0;
uint32_t signal_seq;
@@ -221,7 +218,7 @@ int vmw_fallback_wait(struct vmw_private *dev_priv,
}
finish_wait(&dev_priv->fence_queue, &__wait);
if (ret == 0 && fifo_idle)
- vmw_fifo_mem_write(dev_priv, SVGA_FIFO_FENCE, signal_seq);
+ vmw_fence_write(dev_priv, signal_seq);
wake_up_all(&dev_priv->fence_queue);
out_err:
@@ -236,7 +233,7 @@ void vmw_generic_waiter_add(struct vmw_private *dev_priv,
{
spin_lock_bh(&dev_priv->waiter_lock);
if ((*waiter_count)++ == 0) {
- outl(flag, dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+ vmw_irq_status_write(dev_priv, flag);
dev_priv->irq_mask |= flag;
vmw_write(dev_priv, SVGA_REG_IRQMASK, dev_priv->irq_mask);
}
@@ -278,59 +275,13 @@ void vmw_goal_waiter_remove(struct vmw_private *dev_priv)
&dev_priv->goal_queue_waiters);
}
-int vmw_wait_seqno(struct vmw_private *dev_priv,
- bool lazy, uint32_t seqno,
- bool interruptible, unsigned long timeout)
-{
- long ret;
- struct vmw_fifo_state *fifo = &dev_priv->fifo;
-
- if (likely(dev_priv->last_read_seqno - seqno < VMW_FENCE_WRAP))
- return 0;
-
- if (likely(vmw_seqno_passed(dev_priv, seqno)))
- return 0;
-
- vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
-
- if (!(fifo->capabilities & SVGA_FIFO_CAP_FENCE))
- return vmw_fallback_wait(dev_priv, lazy, true, seqno,
- interruptible, timeout);
-
- if (!(dev_priv->capabilities & SVGA_CAP_IRQMASK))
- return vmw_fallback_wait(dev_priv, lazy, false, seqno,
- interruptible, timeout);
-
- vmw_seqno_waiter_add(dev_priv);
-
- if (interruptible)
- ret = wait_event_interruptible_timeout
- (dev_priv->fence_queue,
- vmw_seqno_passed(dev_priv, seqno),
- timeout);
- else
- ret = wait_event_timeout
- (dev_priv->fence_queue,
- vmw_seqno_passed(dev_priv, seqno),
- timeout);
-
- vmw_seqno_waiter_remove(dev_priv);
-
- if (unlikely(ret == 0))
- ret = -EBUSY;
- else if (likely(ret > 0))
- ret = 0;
-
- return ret;
-}
-
static void vmw_irq_preinstall(struct drm_device *dev)
{
struct vmw_private *dev_priv = vmw_priv(dev);
uint32_t status;
- status = inl(dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
- outl(status, dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+ status = vmw_irq_status_read(dev_priv);
+ vmw_irq_status_write(dev_priv, status);
}
void vmw_irq_uninstall(struct drm_device *dev)
@@ -346,8 +297,8 @@ void vmw_irq_uninstall(struct drm_device *dev)
vmw_write(dev_priv, SVGA_REG_IRQMASK, 0);
- status = inl(dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
- outl(status, dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+ status = vmw_irq_status_read(dev_priv);
+ vmw_irq_status_write(dev_priv, status);
dev->irq_enabled = false;
free_irq(dev->irq, dev);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 67f693acea5f..220f9fd0d420 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -38,8 +38,10 @@
void vmw_du_cleanup(struct vmw_display_unit *du)
{
+ struct vmw_private *dev_priv = vmw_priv(du->primary.dev);
drm_plane_cleanup(&du->primary);
- drm_plane_cleanup(&du->cursor);
+ if (vmw_cmd_supported(dev_priv))
+ drm_plane_cleanup(&du->cursor);
drm_connector_unregister(&du->connector);
drm_crtc_cleanup(&du->crtc);
@@ -128,11 +130,17 @@ static void vmw_cursor_update_position(struct vmw_private *dev_priv,
uint32_t count;
spin_lock(&dev_priv->cursor_lock);
- vmw_fifo_mem_write(dev_priv, SVGA_FIFO_CURSOR_ON, show ? 1 : 0);
- vmw_fifo_mem_write(dev_priv, SVGA_FIFO_CURSOR_X, x);
- vmw_fifo_mem_write(dev_priv, SVGA_FIFO_CURSOR_Y, y);
- count = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_CURSOR_COUNT);
- vmw_fifo_mem_write(dev_priv, SVGA_FIFO_CURSOR_COUNT, ++count);
+ if (vmw_is_cursor_bypass3_enabled(dev_priv)) {
+ vmw_fifo_mem_write(dev_priv, SVGA_FIFO_CURSOR_ON, show ? 1 : 0);
+ vmw_fifo_mem_write(dev_priv, SVGA_FIFO_CURSOR_X, x);
+ vmw_fifo_mem_write(dev_priv, SVGA_FIFO_CURSOR_Y, y);
+ count = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_CURSOR_COUNT);
+ vmw_fifo_mem_write(dev_priv, SVGA_FIFO_CURSOR_COUNT, ++count);
+ } else {
+ vmw_write(dev_priv, SVGA_REG_CURSOR_X, x);
+ vmw_write(dev_priv, SVGA_REG_CURSOR_Y, y);
+ vmw_write(dev_priv, SVGA_REG_CURSOR_ON, show ? 1 : 0);
+ }
spin_unlock(&dev_priv->cursor_lock);
}
@@ -289,7 +297,7 @@ void vmw_du_primary_plane_destroy(struct drm_plane *plane)
/**
- * vmw_du_vps_unpin_surf - unpins resource associated with a framebuffer surface
+ * vmw_du_plane_unpin_surf - unpins resource associated with a framebuffer surface
*
* @vps: plane state associated with the display surface
* @unreference: true if we also want to unreference the display.
@@ -474,7 +482,7 @@ int vmw_du_primary_plane_atomic_check(struct drm_plane *plane,
* vmw_du_cursor_plane_atomic_check - check if the new state is okay
*
* @plane: cursor plane
- * @new_state: info on the new plane state
+ * @state: info on the new plane state
*
* This is a chance to fail if the new cursor state does not fit
* our requirements.
@@ -1045,7 +1053,8 @@ static int vmw_framebuffer_bo_dirty_ext(struct drm_framebuffer *framebuffer,
{
struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
- if (dev_priv->active_display_unit == vmw_du_legacy)
+ if (dev_priv->active_display_unit == vmw_du_legacy &&
+ vmw_cmd_supported(dev_priv))
return vmw_framebuffer_bo_dirty(framebuffer, file_priv, flags,
color, clips, num_clips);
@@ -2633,7 +2642,7 @@ int vmw_kms_fbdev_init_data(struct vmw_private *dev_priv,
}
/**
- * vmw_kms_create_implicit_placement_proparty - Set up the implicit placement
+ * vmw_kms_create_implicit_placement_property - Set up the implicit placement
* property.
*
* @dev_priv: Pointer to a device private struct.
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
index 87e0b303d900..d85c7eab9469 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
@@ -404,19 +404,24 @@ static int vmw_ldu_init(struct vmw_private *dev_priv, unsigned unit)
drm_plane_helper_add(primary, &vmw_ldu_primary_plane_helper_funcs);
- /* Initialize cursor plane */
- ret = drm_universal_plane_init(dev, &ldu->base.cursor,
- 0, &vmw_ldu_cursor_funcs,
- vmw_cursor_plane_formats,
- ARRAY_SIZE(vmw_cursor_plane_formats),
- NULL, DRM_PLANE_TYPE_CURSOR, NULL);
- if (ret) {
- DRM_ERROR("Failed to initialize cursor plane");
- drm_plane_cleanup(&ldu->base.primary);
- goto err_free;
- }
+ /*
+ * We're going to be using traces and software cursors
+ */
+ if (vmw_cmd_supported(dev_priv)) {
+ /* Initialize cursor plane */
+ ret = drm_universal_plane_init(dev, &ldu->base.cursor,
+ 0, &vmw_ldu_cursor_funcs,
+ vmw_cursor_plane_formats,
+ ARRAY_SIZE(vmw_cursor_plane_formats),
+ NULL, DRM_PLANE_TYPE_CURSOR, NULL);
+ if (ret) {
+ DRM_ERROR("Failed to initialize cursor plane");
+ drm_plane_cleanup(&ldu->base.primary);
+ goto err_free;
+ }
- drm_plane_helper_add(cursor, &vmw_ldu_cursor_plane_helper_funcs);
+ drm_plane_helper_add(cursor, &vmw_ldu_cursor_plane_helper_funcs);
+ }
ret = drm_connector_init(dev, connector, &vmw_legacy_connector_funcs,
DRM_MODE_CONNECTOR_VIRTUAL);
@@ -445,9 +450,10 @@ static int vmw_ldu_init(struct vmw_private *dev_priv, unsigned unit)
goto err_free_encoder;
}
- ret = drm_crtc_init_with_planes(dev, crtc, &ldu->base.primary,
- &ldu->base.cursor,
- &vmw_legacy_crtc_funcs, NULL);
+ ret = drm_crtc_init_with_planes(
+ dev, crtc, &ldu->base.primary,
+ vmw_cmd_supported(dev_priv) ? &ldu->base.cursor : NULL,
+ &vmw_legacy_crtc_funcs, NULL);
if (ret) {
DRM_ERROR("Failed to initialize CRTC\n");
goto err_free_unregister;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c b/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c
index ac4a9b722279..54c5d16eb3b7 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c
@@ -421,7 +421,7 @@ int vmw_overlay_pause_all(struct vmw_private *dev_priv)
static bool vmw_overlay_available(const struct vmw_private *dev_priv)
{
return (dev_priv->overlay_priv != NULL &&
- ((dev_priv->fifo.capabilities & VMW_OVERLAY_CAP_MASK) ==
+ ((vmw_fifo_caps(dev_priv) & VMW_OVERLAY_CAP_MASK) ==
VMW_OVERLAY_CAP_MASK));
}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_reg.h b/drivers/gpu/drm/vmwgfx/vmwgfx_reg.h
index e99f6cdbb091..cf585dfe5669 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_reg.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_reg.h
@@ -34,10 +34,6 @@
#include <linux/types.h>
-#define VMWGFX_INDEX_PORT 0x0
-#define VMWGFX_VALUE_PORT 0x1
-#define VMWGFX_IRQSTATUS_PORT 0x8
-
struct svga_guest_mem_descriptor {
u32 ppn;
u32 num_pages;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
index d5da28be938a..62ea920addc3 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
@@ -280,7 +280,7 @@ int vmw_user_resource_lookup_handle(struct vmw_private *dev_priv,
}
/**
- * vmw_user_resource_lookup_handle - lookup a struct resource from a
+ * vmw_user_resource_noref_lookup_handle - lookup a struct resource from a
* TTM user-space handle and perform basic type checks
*
* @dev_priv: Pointer to a device private struct
@@ -1075,7 +1075,7 @@ enum vmw_res_type vmw_res_type(const struct vmw_resource *res)
}
/**
- * vmw_resource_update_dirty - Update a resource's dirty tracker with a
+ * vmw_resource_dirty_update - Update a resource's dirty tracker with a
* sequential range of touched backing store memory.
* @res: The resource.
* @start: The first page touched.
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
index 9bc9a0714664..145430d14219 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
@@ -1222,7 +1222,7 @@ static void vmw_sou_bo_clip(struct vmw_kms_dirty *dirty)
}
/**
- * vmw_kms_do_bo_dirty - Dirty part of a buffer-object backed framebuffer
+ * vmw_kms_sou_do_bo_dirty - Dirty part of a buffer-object backed framebuffer
*
* @dev_priv: Pointer to the device private structure.
* @framebuffer: Pointer to the buffer-object backed framebuffer.
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_so.c b/drivers/gpu/drm/vmwgfx/vmwgfx_so.c
index a0e49dcd5c44..c3a8d6e8380e 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_so.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_so.c
@@ -90,7 +90,7 @@ static const struct vmw_res_func vmw_view_func = {
};
/**
- * struct vmw_view - view define command body stub
+ * struct vmw_view_define - view define command body stub
*
* @view_id: The device id of the view being defined
* @sid: The surface id of the view being defined
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
index 7b11f0285786..9e236f9f8a8a 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
@@ -742,7 +742,7 @@ int vmw_kms_stdu_dma(struct vmw_private *dev_priv,
}
/**
- * vmw_stdu_surface_clip - Callback to encode a surface copy command cliprect
+ * vmw_kms_stdu_surface_clip - Callback to encode a surface copy command cliprect
*
* @dirty: The closure structure.
*
@@ -780,7 +780,7 @@ static void vmw_kms_stdu_surface_clip(struct vmw_kms_dirty *dirty)
}
/**
- * vmw_stdu_surface_fifo_commit - Callback to fill in and submit a surface
+ * vmw_kms_stdu_surface_fifo_commit - Callback to fill in and submit a surface
* copy command.
*
* @dirty: The closure structure.
@@ -1571,7 +1571,7 @@ static int vmw_stdu_plane_update_surface(struct vmw_private *dev_priv,
/**
* vmw_stdu_primary_plane_atomic_update - formally switches STDU to new plane
* @plane: display plane
- * @old_state: Only used to get crtc info
+ * @state: Only used to get crtc info
*
* Formally update stdu->display_srf to the new plane, and bind the new
* plane STDU. This function is called during the commit phase when
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
index 4e08cd7855e3..8ead06574850 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
@@ -680,7 +680,7 @@ static void vmw_user_surface_free(struct vmw_resource *res)
}
/**
- * vmw_user_surface_free - User visible surface TTM base object destructor
+ * vmw_user_surface_base_release - User visible surface TTM base object destructor
*
* @p_base: Pointer to a pointer to a TTM base object
* embedded in a struct vmw_user_surface.
@@ -702,7 +702,7 @@ static void vmw_user_surface_base_release(struct ttm_base_object **p_base)
}
/**
- * vmw_user_surface_destroy_ioctl - Ioctl function implementing
+ * vmw_surface_destroy_ioctl - Ioctl function implementing
* the user surface destroy functionality.
*
* @dev: Pointer to a struct drm_device.
@@ -719,7 +719,7 @@ int vmw_surface_destroy_ioctl(struct drm_device *dev, void *data,
}
/**
- * vmw_user_surface_define_ioctl - Ioctl function implementing
+ * vmw_surface_define_ioctl - Ioctl function implementing
* the user surface define functionality.
*
* @dev: Pointer to a struct drm_device.
@@ -1001,7 +1001,7 @@ vmw_surface_handle_reference(struct vmw_private *dev_priv,
}
/**
- * vmw_user_surface_define_ioctl - Ioctl function implementing
+ * vmw_surface_reference_ioctl - Ioctl function implementing
* the user surface reference functionality.
*
* @dev: Pointer to a struct drm_device.
@@ -1055,7 +1055,7 @@ int vmw_surface_reference_ioctl(struct drm_device *dev, void *data,
}
/**
- * vmw_surface_define_encode - Encode a surface_define command.
+ * vmw_gb_surface_create - Encode a surface_define command.
*
* @res: Pointer to a struct vmw_resource embedded in a struct
* vmw_surface.
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
index 2dc031fe4a90..7bfe83c936ff 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
@@ -200,7 +200,8 @@ struct vmw_ttm_tt {
const size_t vmw_tt_size = sizeof(struct vmw_ttm_tt);
/**
- * Helper functions to advance a struct vmw_piter iterator.
+ * __vmw_piter_non_sg_next: Helper functions to advance
+ * a struct vmw_piter iterator.
*
* @viter: Pointer to the iterator.
*
@@ -222,7 +223,8 @@ static bool __vmw_piter_sg_next(struct vmw_piter *viter)
/**
- * Helper functions to return a pointer to the current page.
+ * __vmw_piter_non_sg_page: Helper functions to return a pointer
+ * to the current page.
*
* @viter: Pointer to the iterator
*
@@ -236,7 +238,8 @@ static struct page *__vmw_piter_non_sg_page(struct vmw_piter *viter)
}
/**
- * Helper functions to return the DMA address of the current page.
+ * __vmw_piter_phys_addr: Helper functions to return the DMA
+ * address of the current page.
*
* @viter: Pointer to the iterator
*
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_validation.c b/drivers/gpu/drm/vmwgfx/vmwgfx_validation.c
index f4837130d67b..8338b1d20f2a 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_validation.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_validation.c
@@ -809,7 +809,7 @@ void vmw_validation_revert(struct vmw_validation_context *ctx)
}
/**
- * vmw_validation_cone - Commit validation actions after command submission
+ * vmw_validation_done - Commit validation actions after command submission
* success.
* @ctx: The validation context.
* @fence: Fence with which to fence all buffer objects taking part in the
--
2.27.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
end of thread, other threads:[~2021-05-05 19:10 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-05-05 3:57 [PATCH 0/6] drm/vmwgfx: SVGA v3 and arm64 support Zack Rusin
2021-05-05 3:57 ` [PATCH 1/6] drm/vmwgfx: Fix incorrect enum usage Zack Rusin
2021-05-05 3:57 ` [PATCH 2/6] drm/vmwgfx: Mark a surface gpu-dirty after the SVGA3dCmdDXGenMips command Zack Rusin
2021-05-05 3:57 ` [PATCH 3/6] drm/vmwgfx: Fix cpu updates of coherent multisample surfaces Zack Rusin
2021-05-05 3:57 ` [PATCH 4/6] drm/vmwgfx: Remove the reservation semaphore Zack Rusin
2021-05-05 3:57 ` [PATCH 5/6] drm/vmwgfx: Add basic support for SVGA3 Zack Rusin
2021-05-05 7:46 ` kernel test robot
2021-05-05 8:23 ` kernel test robot
2021-05-05 10:10 ` kernel test robot
2021-05-05 10:10 ` [PATCH] drm/vmwgfx: fix badzero.cocci warnings kernel test robot
2021-05-05 19:10 ` [PATCH 5/6] drm/vmwgfx: Add basic support for SVGA3 Zack Rusin
2021-05-05 3:57 ` [PATCH 6/6] drm/vmwgfx: Port vmwgfx to arm64 Zack Rusin
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