* [PATCH 1/4] drm/msm: unify MDSS drivers
2022-01-06 0:42 [PATCH 0/4] drm/msm: rework MDSS drivers Dmitry Baryshkov
@ 2022-01-06 0:42 ` Dmitry Baryshkov
2022-01-06 0:42 ` [PATCH 2/4] drm/msm: remove extra indirection for msm_mdss Dmitry Baryshkov
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Dmitry Baryshkov @ 2022-01-06 0:42 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: David Airlie, linux-arm-msm, dri-devel, Stephen Boyd, freedreno
MDP5 and DPU1 both provide the driver handling the MDSS region, which
handles the irq domain and (incase of DPU1) adds some init for the UBWC
controller. Unify those two pieces of code into a common driver.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/Makefile | 3 +-
drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c | 252 ------------------
drivers/gpu/drm/msm/msm_drv.c | 4 +-
drivers/gpu/drm/msm/msm_kms.h | 3 +-
.../msm/{disp/dpu1/dpu_mdss.c => msm_mdss.c} | 162 ++++++-----
5 files changed, 99 insertions(+), 325 deletions(-)
delete mode 100644 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
rename drivers/gpu/drm/msm/{disp/dpu1/dpu_mdss.c => msm_mdss.c} (57%)
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index a44abf0a7660..5ad831834dd1 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -42,7 +42,6 @@ msm-y := \
disp/mdp5/mdp5_crtc.o \
disp/mdp5/mdp5_encoder.o \
disp/mdp5/mdp5_irq.o \
- disp/mdp5/mdp5_mdss.o \
disp/mdp5/mdp5_kms.o \
disp/mdp5/mdp5_pipe.o \
disp/mdp5/mdp5_mixer.o \
@@ -67,7 +66,6 @@ msm-y := \
disp/dpu1/dpu_hw_util.o \
disp/dpu1/dpu_hw_vbif.o \
disp/dpu1/dpu_kms.o \
- disp/dpu1/dpu_mdss.o \
disp/dpu1/dpu_plane.o \
disp/dpu1/dpu_rm.o \
disp/dpu1/dpu_vbif.o \
@@ -87,6 +85,7 @@ msm-y := \
msm_gpu.o \
msm_gpu_devfreq.o \
msm_iommu.o \
+ msm_mdss.o \
msm_perf.o \
msm_rd.o \
msm_ringbuffer.o \
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
deleted file mode 100644
index b3f79c2277e9..000000000000
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
+++ /dev/null
@@ -1,252 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (c) 2016, The Linux Foundation. All rights reserved.
- */
-
-#include <linux/irqdomain.h>
-#include <linux/irq.h>
-
-#include "msm_drv.h"
-#include "mdp5_kms.h"
-
-#define to_mdp5_mdss(x) container_of(x, struct mdp5_mdss, base)
-
-struct mdp5_mdss {
- struct msm_mdss base;
-
- void __iomem *mmio, *vbif;
-
- struct clk *ahb_clk;
- struct clk *axi_clk;
- struct clk *vsync_clk;
-
- struct {
- volatile unsigned long enabled_mask;
- struct irq_domain *domain;
- } irqcontroller;
-};
-
-static inline void mdss_write(struct mdp5_mdss *mdp5_mdss, u32 reg, u32 data)
-{
- msm_writel(data, mdp5_mdss->mmio + reg);
-}
-
-static inline u32 mdss_read(struct mdp5_mdss *mdp5_mdss, u32 reg)
-{
- return msm_readl(mdp5_mdss->mmio + reg);
-}
-
-static irqreturn_t mdss_irq(int irq, void *arg)
-{
- struct mdp5_mdss *mdp5_mdss = arg;
- u32 intr;
-
- intr = mdss_read(mdp5_mdss, REG_MDSS_HW_INTR_STATUS);
-
- VERB("intr=%08x", intr);
-
- while (intr) {
- irq_hw_number_t hwirq = fls(intr) - 1;
-
- generic_handle_domain_irq(mdp5_mdss->irqcontroller.domain, hwirq);
- intr &= ~(1 << hwirq);
- }
-
- return IRQ_HANDLED;
-}
-
-/*
- * interrupt-controller implementation, so sub-blocks (MDP/HDMI/eDP/DSI/etc)
- * can register to get their irq's delivered
- */
-
-#define VALID_IRQS (MDSS_HW_INTR_STATUS_INTR_MDP | \
- MDSS_HW_INTR_STATUS_INTR_DSI0 | \
- MDSS_HW_INTR_STATUS_INTR_DSI1 | \
- MDSS_HW_INTR_STATUS_INTR_HDMI | \
- MDSS_HW_INTR_STATUS_INTR_EDP)
-
-static void mdss_hw_mask_irq(struct irq_data *irqd)
-{
- struct mdp5_mdss *mdp5_mdss = irq_data_get_irq_chip_data(irqd);
-
- smp_mb__before_atomic();
- clear_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask);
- smp_mb__after_atomic();
-}
-
-static void mdss_hw_unmask_irq(struct irq_data *irqd)
-{
- struct mdp5_mdss *mdp5_mdss = irq_data_get_irq_chip_data(irqd);
-
- smp_mb__before_atomic();
- set_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask);
- smp_mb__after_atomic();
-}
-
-static struct irq_chip mdss_hw_irq_chip = {
- .name = "mdss",
- .irq_mask = mdss_hw_mask_irq,
- .irq_unmask = mdss_hw_unmask_irq,
-};
-
-static int mdss_hw_irqdomain_map(struct irq_domain *d, unsigned int irq,
- irq_hw_number_t hwirq)
-{
- struct mdp5_mdss *mdp5_mdss = d->host_data;
-
- if (!(VALID_IRQS & (1 << hwirq)))
- return -EPERM;
-
- irq_set_chip_and_handler(irq, &mdss_hw_irq_chip, handle_level_irq);
- irq_set_chip_data(irq, mdp5_mdss);
-
- return 0;
-}
-
-static const struct irq_domain_ops mdss_hw_irqdomain_ops = {
- .map = mdss_hw_irqdomain_map,
- .xlate = irq_domain_xlate_onecell,
-};
-
-
-static int mdss_irq_domain_init(struct mdp5_mdss *mdp5_mdss)
-{
- struct device *dev = mdp5_mdss->base.dev;
- struct irq_domain *d;
-
- d = irq_domain_add_linear(dev->of_node, 32, &mdss_hw_irqdomain_ops,
- mdp5_mdss);
- if (!d) {
- DRM_DEV_ERROR(dev, "mdss irq domain add failed\n");
- return -ENXIO;
- }
-
- mdp5_mdss->irqcontroller.enabled_mask = 0;
- mdp5_mdss->irqcontroller.domain = d;
-
- return 0;
-}
-
-static int mdp5_mdss_enable(struct msm_mdss *mdss)
-{
- struct mdp5_mdss *mdp5_mdss = to_mdp5_mdss(mdss);
- DBG("");
-
- clk_prepare_enable(mdp5_mdss->ahb_clk);
- clk_prepare_enable(mdp5_mdss->axi_clk);
- clk_prepare_enable(mdp5_mdss->vsync_clk);
-
- return 0;
-}
-
-static int mdp5_mdss_disable(struct msm_mdss *mdss)
-{
- struct mdp5_mdss *mdp5_mdss = to_mdp5_mdss(mdss);
- DBG("");
-
- clk_disable_unprepare(mdp5_mdss->vsync_clk);
- clk_disable_unprepare(mdp5_mdss->axi_clk);
- clk_disable_unprepare(mdp5_mdss->ahb_clk);
-
- return 0;
-}
-
-static int msm_mdss_get_clocks(struct mdp5_mdss *mdp5_mdss)
-{
- struct platform_device *pdev =
- to_platform_device(mdp5_mdss->base.dev);
-
- mdp5_mdss->ahb_clk = msm_clk_get(pdev, "iface");
- if (IS_ERR(mdp5_mdss->ahb_clk))
- mdp5_mdss->ahb_clk = NULL;
-
- mdp5_mdss->axi_clk = msm_clk_get(pdev, "bus");
- if (IS_ERR(mdp5_mdss->axi_clk))
- mdp5_mdss->axi_clk = NULL;
-
- mdp5_mdss->vsync_clk = msm_clk_get(pdev, "vsync");
- if (IS_ERR(mdp5_mdss->vsync_clk))
- mdp5_mdss->vsync_clk = NULL;
-
- return 0;
-}
-
-static void mdp5_mdss_destroy(struct msm_mdss *mdss)
-{
- struct mdp5_mdss *mdp5_mdss = to_mdp5_mdss(mdss);
-
- if (!mdp5_mdss)
- return;
-
- irq_domain_remove(mdp5_mdss->irqcontroller.domain);
- mdp5_mdss->irqcontroller.domain = NULL;
-
- pm_runtime_disable(mdss->dev);
-}
-
-static const struct msm_mdss_funcs mdss_funcs = {
- .enable = mdp5_mdss_enable,
- .disable = mdp5_mdss_disable,
- .destroy = mdp5_mdss_destroy,
-};
-
-int mdp5_mdss_init(struct platform_device *pdev)
-{
- struct msm_drm_private *priv = platform_get_drvdata(pdev);
- struct mdp5_mdss *mdp5_mdss;
- int ret;
-
- DBG("");
-
- if (!of_device_is_compatible(pdev->dev.of_node, "qcom,mdss"))
- return 0;
-
- mdp5_mdss = devm_kzalloc(&pdev->dev, sizeof(*mdp5_mdss), GFP_KERNEL);
- if (!mdp5_mdss) {
- ret = -ENOMEM;
- goto fail;
- }
-
- mdp5_mdss->base.dev = &pdev->dev;
-
- mdp5_mdss->mmio = msm_ioremap(pdev, "mdss_phys", "MDSS");
- if (IS_ERR(mdp5_mdss->mmio)) {
- ret = PTR_ERR(mdp5_mdss->mmio);
- goto fail;
- }
-
- mdp5_mdss->vbif = msm_ioremap(pdev, "vbif_phys", "VBIF");
- if (IS_ERR(mdp5_mdss->vbif)) {
- ret = PTR_ERR(mdp5_mdss->vbif);
- goto fail;
- }
-
- ret = msm_mdss_get_clocks(mdp5_mdss);
- if (ret) {
- DRM_DEV_ERROR(&pdev->dev, "failed to get clocks: %d\n", ret);
- goto fail;
- }
-
- ret = devm_request_irq(&pdev->dev, platform_get_irq(pdev, 0),
- mdss_irq, 0, "mdss_isr", mdp5_mdss);
- if (ret) {
- DRM_DEV_ERROR(&pdev->dev, "failed to init irq: %d\n", ret);
- goto fail;
- }
-
- ret = mdss_irq_domain_init(mdp5_mdss);
- if (ret) {
- DRM_DEV_ERROR(&pdev->dev, "failed to init sub-block irqs: %d\n", ret);
- goto fail;
- }
-
- mdp5_mdss->base.funcs = &mdss_funcs;
- priv->mdss = &mdp5_mdss->base;
-
- pm_runtime_enable(&pdev->dev);
-
- return 0;
-fail:
- return ret;
-}
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 1ba3f29a874e..f2a0dc46b1f4 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -1413,10 +1413,10 @@ static int msm_pdev_probe(struct platform_device *pdev)
switch (get_mdp_ver(pdev)) {
case KMS_MDP5:
- ret = mdp5_mdss_init(pdev);
+ ret = msm_mdss_init(pdev, true);
break;
case KMS_DPU:
- ret = dpu_mdss_init(pdev);
+ ret = msm_mdss_init(pdev, false);
break;
default:
ret = 0;
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index 2a4f0526cb98..2459ba479caf 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -212,8 +212,7 @@ struct msm_mdss {
const struct msm_mdss_funcs *funcs;
};
-int mdp5_mdss_init(struct platform_device *dev);
-int dpu_mdss_init(struct platform_device *dev);
+int msm_mdss_init(struct platform_device *pdev, bool mdp5);
#define for_each_crtc_mask(dev, crtc, crtc_mask) \
drm_for_each_crtc(crtc, dev) \
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
similarity index 57%
rename from drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
rename to drivers/gpu/drm/msm/msm_mdss.c
index 31d898ef1866..e8e7db49b7b1 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -7,7 +7,12 @@
#include <linux/irqchip.h>
#include <linux/irqdesc.h>
#include <linux/irqchip/chained_irq.h>
-#include "dpu_kms.h"
+
+#include "msm_drv.h"
+#include "msm_kms.h"
+
+/* for DPU_HW_* defines */
+#include "disp/dpu1/dpu_hw_catalog.h"
#define to_dpu_mdss(x) container_of(x, struct dpu_mdss, base)
@@ -18,23 +23,18 @@
#define UBWC_CTRL_2 0x150
#define UBWC_PREDICTION_MODE 0x154
-/* Max BW defined in KBps */
-#define MAX_BW 6800000
-
-struct dpu_irq_controller {
- unsigned long enabled_mask;
- struct irq_domain *domain;
-};
-
struct dpu_mdss {
struct msm_mdss base;
void __iomem *mmio;
struct clk_bulk_data *clocks;
int num_clocks;
- struct dpu_irq_controller irq_controller;
+ struct {
+ unsigned long enabled_mask;
+ struct irq_domain *domain;
+ } irq_controller;
};
-static void dpu_mdss_irq(struct irq_desc *desc)
+static void msm_mdss_irq(struct irq_desc *desc)
{
struct dpu_mdss *dpu_mdss = irq_desc_get_handler_data(desc);
struct irq_chip *chip = irq_desc_get_chip(desc);
@@ -62,7 +62,7 @@ static void dpu_mdss_irq(struct irq_desc *desc)
chained_irq_exit(chip, desc);
}
-static void dpu_mdss_irq_mask(struct irq_data *irqd)
+static void msm_mdss_irq_mask(struct irq_data *irqd)
{
struct dpu_mdss *dpu_mdss = irq_data_get_irq_chip_data(irqd);
@@ -73,7 +73,7 @@ static void dpu_mdss_irq_mask(struct irq_data *irqd)
smp_mb__after_atomic();
}
-static void dpu_mdss_irq_unmask(struct irq_data *irqd)
+static void msm_mdss_irq_unmask(struct irq_data *irqd)
{
struct dpu_mdss *dpu_mdss = irq_data_get_irq_chip_data(irqd);
@@ -84,30 +84,31 @@ static void dpu_mdss_irq_unmask(struct irq_data *irqd)
smp_mb__after_atomic();
}
-static struct irq_chip dpu_mdss_irq_chip = {
+static struct irq_chip msm_mdss_irq_chip = {
.name = "dpu_mdss",
- .irq_mask = dpu_mdss_irq_mask,
- .irq_unmask = dpu_mdss_irq_unmask,
+ .irq_mask = msm_mdss_irq_mask,
+ .irq_unmask = msm_mdss_irq_unmask,
};
-static struct lock_class_key dpu_mdss_lock_key, dpu_mdss_request_key;
+static struct lock_class_key msm_mdss_lock_key, msm_mdss_request_key;
-static int dpu_mdss_irqdomain_map(struct irq_domain *domain,
+static int msm_mdss_irqdomain_map(struct irq_domain *domain,
unsigned int irq, irq_hw_number_t hwirq)
{
struct dpu_mdss *dpu_mdss = domain->host_data;
- irq_set_lockdep_class(irq, &dpu_mdss_lock_key, &dpu_mdss_request_key);
- irq_set_chip_and_handler(irq, &dpu_mdss_irq_chip, handle_level_irq);
+ irq_set_lockdep_class(irq, &msm_mdss_lock_key, &msm_mdss_request_key);
+ irq_set_chip_and_handler(irq, &msm_mdss_irq_chip, handle_level_irq);
+
return irq_set_chip_data(irq, dpu_mdss);
}
-static const struct irq_domain_ops dpu_mdss_irqdomain_ops = {
- .map = dpu_mdss_irqdomain_map,
+static const struct irq_domain_ops msm_mdss_irqdomain_ops = {
+ .map = msm_mdss_irqdomain_map,
.xlate = irq_domain_xlate_onecell,
};
-static int _dpu_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
+static int _msm_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
{
struct device *dev;
struct irq_domain *domain;
@@ -115,9 +116,9 @@ static int _dpu_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
dev = dpu_mdss->base.dev;
domain = irq_domain_add_linear(dev->of_node, 32,
- &dpu_mdss_irqdomain_ops, dpu_mdss);
+ &msm_mdss_irqdomain_ops, dpu_mdss);
if (!domain) {
- DPU_ERROR("failed to add irq_domain\n");
+ DRM_ERROR("failed to add irq_domain\n");
return -EINVAL;
}
@@ -127,21 +128,14 @@ static int _dpu_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
return 0;
}
-static void _dpu_mdss_irq_domain_fini(struct dpu_mdss *dpu_mdss)
-{
- if (dpu_mdss->irq_controller.domain) {
- irq_domain_remove(dpu_mdss->irq_controller.domain);
- dpu_mdss->irq_controller.domain = NULL;
- }
-}
-static int dpu_mdss_enable(struct msm_mdss *mdss)
+static int msm_mdss_enable(struct msm_mdss *mdss)
{
struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
int ret;
ret = clk_bulk_prepare_enable(dpu_mdss->num_clocks, dpu_mdss->clocks);
if (ret) {
- DPU_ERROR("clock enable failed, ret:%d\n", ret);
+ DRM_ERROR("clock enable failed, ret:%d\n", ret);
return ret;
}
@@ -171,7 +165,7 @@ static int dpu_mdss_enable(struct msm_mdss *mdss)
return ret;
}
-static int dpu_mdss_disable(struct msm_mdss *mdss)
+static int msm_mdss_disable(struct msm_mdss *mdss)
{
struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
@@ -180,7 +174,7 @@ static int dpu_mdss_disable(struct msm_mdss *mdss)
return 0;
}
-static void dpu_mdss_destroy(struct msm_mdss *mdss)
+static void msm_mdss_destroy(struct msm_mdss *mdss)
{
struct platform_device *pdev = to_platform_device(mdss->dev);
struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
@@ -188,22 +182,64 @@ static void dpu_mdss_destroy(struct msm_mdss *mdss)
pm_runtime_suspend(mdss->dev);
pm_runtime_disable(mdss->dev);
- _dpu_mdss_irq_domain_fini(dpu_mdss);
+ irq_domain_remove(dpu_mdss->irq_controller.domain);
+ dpu_mdss->irq_controller.domain = NULL;
irq = platform_get_irq(pdev, 0);
irq_set_chained_handler_and_data(irq, NULL, NULL);
-
- if (dpu_mdss->mmio)
- devm_iounmap(&pdev->dev, dpu_mdss->mmio);
- dpu_mdss->mmio = NULL;
}
static const struct msm_mdss_funcs mdss_funcs = {
- .enable = dpu_mdss_enable,
- .disable = dpu_mdss_disable,
- .destroy = dpu_mdss_destroy,
+ .enable = msm_mdss_enable,
+ .disable = msm_mdss_disable,
+ .destroy = msm_mdss_destroy,
};
-int dpu_mdss_init(struct platform_device *pdev)
+/*
+ * MDP5 MDSS uses at most three specified clocks.
+ */
+#define MDP5_MDSS_NUM_CLOCKS 3
+int mdp5_mdss_parse_clock(struct platform_device *pdev, struct clk_bulk_data **clocks)
+{
+ struct clk_bulk_data *bulk;
+ struct clk *clk;
+ int num_clocks = 0;
+
+ if (!pdev)
+ return -EINVAL;
+
+ bulk = devm_kcalloc(&pdev->dev, MDP5_MDSS_NUM_CLOCKS, sizeof(struct clk_bulk_data), GFP_KERNEL);
+ if (!bulk)
+ return -ENOMEM;
+
+ /* We ignore all the errors except deferral: typically they mean that the clock is not provided in the dts. */
+ clk = msm_clk_get(pdev, "iface");
+ if (!IS_ERR(clk)) {
+ bulk[num_clocks].id = "iface";
+ bulk[num_clocks].clk = clk;
+ num_clocks++;
+ } else if (clk == ERR_PTR(-EPROBE_DEFER))
+ return -EPROBE_DEFER;
+
+ clk = msm_clk_get(pdev, "bus");
+ if (!IS_ERR(clk)) {
+ bulk[num_clocks].id = "bus";
+ bulk[num_clocks].clk = clk;
+ num_clocks++;
+ } else if (clk == ERR_PTR(-EPROBE_DEFER))
+ return -EPROBE_DEFER;
+
+ clk = msm_clk_get(pdev, "vsync");
+ if (!IS_ERR(clk)) {
+ bulk[num_clocks].id = "vsync";
+ bulk[num_clocks].clk = clk;
+ num_clocks++;
+ } else if (clk == ERR_PTR(-EPROBE_DEFER))
+ return -EPROBE_DEFER;
+
+ return num_clocks;
+}
+
+int msm_mdss_init(struct platform_device *pdev, bool mdp5)
{
struct msm_drm_private *priv = platform_get_drvdata(pdev);
struct dpu_mdss *dpu_mdss;
@@ -214,33 +250,34 @@ int dpu_mdss_init(struct platform_device *pdev)
if (!dpu_mdss)
return -ENOMEM;
- dpu_mdss->mmio = msm_ioremap(pdev, "mdss", "mdss");
+ dpu_mdss->mmio = msm_ioremap(pdev, mdp5 ? "mdss_phys" : "mdss", "mdss");
if (IS_ERR(dpu_mdss->mmio))
return PTR_ERR(dpu_mdss->mmio);
DRM_DEBUG("mapped mdss address space @%pK\n", dpu_mdss->mmio);
- ret = msm_parse_clock(pdev, &dpu_mdss->clocks);
+ if (mdp5)
+ ret = mdp5_mdss_parse_clock(pdev, &dpu_mdss->clocks);
+ else
+ ret = msm_parse_clock(pdev, &dpu_mdss->clocks);
if (ret < 0) {
- DPU_ERROR("failed to parse clocks, ret=%d\n", ret);
- goto clk_parse_err;
+ DRM_ERROR("failed to parse clocks, ret=%d\n", ret);
+ return ret;
}
dpu_mdss->num_clocks = ret;
dpu_mdss->base.dev = &pdev->dev;
dpu_mdss->base.funcs = &mdss_funcs;
- ret = _dpu_mdss_irq_domain_add(dpu_mdss);
- if (ret)
- goto irq_domain_error;
-
irq = platform_get_irq(pdev, 0);
- if (irq < 0) {
- ret = irq;
- goto irq_error;
- }
+ if (irq < 0)
+ return irq;
- irq_set_chained_handler_and_data(irq, dpu_mdss_irq,
+ ret = _msm_mdss_irq_domain_add(dpu_mdss);
+ if (ret)
+ return ret;
+
+ irq_set_chained_handler_and_data(irq, msm_mdss_irq,
dpu_mdss);
priv->mdss = &dpu_mdss->base;
@@ -248,13 +285,4 @@ int dpu_mdss_init(struct platform_device *pdev)
pm_runtime_enable(&pdev->dev);
return 0;
-
-irq_error:
- _dpu_mdss_irq_domain_fini(dpu_mdss);
-irq_domain_error:
-clk_parse_err:
- if (dpu_mdss->mmio)
- devm_iounmap(&pdev->dev, dpu_mdss->mmio);
- dpu_mdss->mmio = NULL;
- return ret;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 2/4] drm/msm: remove extra indirection for msm_mdss
2022-01-06 0:42 [PATCH 0/4] drm/msm: rework MDSS drivers Dmitry Baryshkov
2022-01-06 0:42 ` [PATCH 1/4] drm/msm: unify " Dmitry Baryshkov
@ 2022-01-06 0:42 ` Dmitry Baryshkov
2022-01-06 0:42 ` [PATCH 3/4] drm/msm: split the main platform driver Dmitry Baryshkov
2022-01-06 0:42 ` [PATCH 4/4] drm/msm: stop using device's match data pointer Dmitry Baryshkov
3 siblings, 0 replies; 5+ messages in thread
From: Dmitry Baryshkov @ 2022-01-06 0:42 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: David Airlie, linux-arm-msm, dri-devel, Stephen Boyd, freedreno
Since now there is just one mdss subdriver, drop all the indirection,
make msm_mdss struct completely opaque (and defined inside msm_mdss.c)
and call mdss functions directly.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/msm_drv.c | 44 ++++++++----
drivers/gpu/drm/msm/msm_kms.h | 16 ++---
drivers/gpu/drm/msm/msm_mdss.c | 125 ++++++++++++++-------------------
3 files changed, 88 insertions(+), 97 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index f2a0dc46b1f4..e978c29dc61a 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -1153,8 +1153,8 @@ static int __maybe_unused msm_runtime_suspend(struct device *dev)
DBG("");
- if (mdss && mdss->funcs)
- return mdss->funcs->disable(mdss);
+ if (mdss)
+ return msm_mdss_disable(mdss);
return 0;
}
@@ -1166,8 +1166,8 @@ static int __maybe_unused msm_runtime_resume(struct device *dev)
DBG("");
- if (mdss && mdss->funcs)
- return mdss->funcs->enable(mdss);
+ if (mdss)
+ return msm_mdss_enable(mdss);
return 0;
}
@@ -1402,6 +1402,7 @@ static const struct component_master_ops msm_drm_ops = {
static int msm_pdev_probe(struct platform_device *pdev)
{
struct component_match *match = NULL;
+ struct msm_mdss *mdss;
struct msm_drm_private *priv;
int ret;
@@ -1413,19 +1414,32 @@ static int msm_pdev_probe(struct platform_device *pdev)
switch (get_mdp_ver(pdev)) {
case KMS_MDP5:
- ret = msm_mdss_init(pdev, true);
+ mdss = msm_mdss_init(pdev, true);
+ if (IS_ERR(mdss)) {
+ ret = PTR_ERR(mdss);
+ platform_set_drvdata(pdev, NULL);
+
+ return ret;
+ } else {
+ priv->mdss = mdss;
+ pm_runtime_enable(&pdev->dev);
+ }
break;
case KMS_DPU:
- ret = msm_mdss_init(pdev, false);
+ mdss = msm_mdss_init(pdev, false);
+ if (IS_ERR(mdss)) {
+ ret = PTR_ERR(mdss);
+ platform_set_drvdata(pdev, NULL);
+
+ return ret;
+ } else {
+ priv->mdss = mdss;
+ pm_runtime_enable(&pdev->dev);
+ }
break;
default:
- ret = 0;
break;
}
- if (ret) {
- platform_set_drvdata(pdev, NULL);
- return ret;
- }
if (get_mdp_ver(pdev)) {
ret = add_display_components(pdev, &match);
@@ -1453,8 +1467,8 @@ static int msm_pdev_probe(struct platform_device *pdev)
fail:
of_platform_depopulate(&pdev->dev);
- if (priv->mdss && priv->mdss->funcs)
- priv->mdss->funcs->destroy(priv->mdss);
+ if (priv->mdss)
+ msm_mdss_destroy(priv->mdss);
return ret;
}
@@ -1467,8 +1481,8 @@ static int msm_pdev_remove(struct platform_device *pdev)
component_master_del(&pdev->dev, &msm_drm_ops);
of_platform_depopulate(&pdev->dev);
- if (mdss && mdss->funcs)
- mdss->funcs->destroy(mdss);
+ if (mdss)
+ msm_mdss_destroy(mdss);
return 0;
}
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index 2459ba479caf..0c341660941a 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -201,18 +201,12 @@ struct msm_kms *dpu_kms_init(struct drm_device *dev);
extern const struct of_device_id dpu_dt_match[];
extern const struct of_device_id mdp5_dt_match[];
-struct msm_mdss_funcs {
- int (*enable)(struct msm_mdss *mdss);
- int (*disable)(struct msm_mdss *mdss);
- void (*destroy)(struct msm_mdss *mdss);
-};
-
-struct msm_mdss {
- struct device *dev;
- const struct msm_mdss_funcs *funcs;
-};
+struct msm_mdss;
-int msm_mdss_init(struct platform_device *pdev, bool mdp5);
+struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool mdp5);
+int msm_mdss_enable(struct msm_mdss *mdss);
+int msm_mdss_disable(struct msm_mdss *mdss);
+void msm_mdss_destroy(struct msm_mdss *mdss);
#define for_each_crtc_mask(dev, crtc, crtc_mask) \
drm_for_each_crtc(crtc, dev) \
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index e8e7db49b7b1..8766666cfffb 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -14,8 +14,6 @@
/* for DPU_HW_* defines */
#include "disp/dpu1/dpu_hw_catalog.h"
-#define to_dpu_mdss(x) container_of(x, struct dpu_mdss, base)
-
#define HW_REV 0x0
#define HW_INTR_STATUS 0x0010
@@ -23,8 +21,9 @@
#define UBWC_CTRL_2 0x150
#define UBWC_PREDICTION_MODE 0x154
-struct dpu_mdss {
- struct msm_mdss base;
+struct msm_mdss {
+ struct device *dev;
+
void __iomem *mmio;
struct clk_bulk_data *clocks;
int num_clocks;
@@ -36,19 +35,19 @@ struct dpu_mdss {
static void msm_mdss_irq(struct irq_desc *desc)
{
- struct dpu_mdss *dpu_mdss = irq_desc_get_handler_data(desc);
+ struct msm_mdss *msm_mdss = irq_desc_get_handler_data(desc);
struct irq_chip *chip = irq_desc_get_chip(desc);
u32 interrupts;
chained_irq_enter(chip, desc);
- interrupts = readl_relaxed(dpu_mdss->mmio + HW_INTR_STATUS);
+ interrupts = readl_relaxed(msm_mdss->mmio + HW_INTR_STATUS);
while (interrupts) {
irq_hw_number_t hwirq = fls(interrupts) - 1;
int rc;
- rc = generic_handle_domain_irq(dpu_mdss->irq_controller.domain,
+ rc = generic_handle_domain_irq(msm_mdss->irq_controller.domain,
hwirq);
if (rc < 0) {
DRM_ERROR("handle irq fail: irq=%lu rc=%d\n",
@@ -64,28 +63,28 @@ static void msm_mdss_irq(struct irq_desc *desc)
static void msm_mdss_irq_mask(struct irq_data *irqd)
{
- struct dpu_mdss *dpu_mdss = irq_data_get_irq_chip_data(irqd);
+ struct msm_mdss *msm_mdss = irq_data_get_irq_chip_data(irqd);
/* memory barrier */
smp_mb__before_atomic();
- clear_bit(irqd->hwirq, &dpu_mdss->irq_controller.enabled_mask);
+ clear_bit(irqd->hwirq, &msm_mdss->irq_controller.enabled_mask);
/* memory barrier */
smp_mb__after_atomic();
}
static void msm_mdss_irq_unmask(struct irq_data *irqd)
{
- struct dpu_mdss *dpu_mdss = irq_data_get_irq_chip_data(irqd);
+ struct msm_mdss *msm_mdss = irq_data_get_irq_chip_data(irqd);
/* memory barrier */
smp_mb__before_atomic();
- set_bit(irqd->hwirq, &dpu_mdss->irq_controller.enabled_mask);
+ set_bit(irqd->hwirq, &msm_mdss->irq_controller.enabled_mask);
/* memory barrier */
smp_mb__after_atomic();
}
static struct irq_chip msm_mdss_irq_chip = {
- .name = "dpu_mdss",
+ .name = "msm_mdss",
.irq_mask = msm_mdss_irq_mask,
.irq_unmask = msm_mdss_irq_unmask,
};
@@ -95,12 +94,12 @@ static struct lock_class_key msm_mdss_lock_key, msm_mdss_request_key;
static int msm_mdss_irqdomain_map(struct irq_domain *domain,
unsigned int irq, irq_hw_number_t hwirq)
{
- struct dpu_mdss *dpu_mdss = domain->host_data;
+ struct msm_mdss *msm_mdss = domain->host_data;
irq_set_lockdep_class(irq, &msm_mdss_lock_key, &msm_mdss_request_key);
irq_set_chip_and_handler(irq, &msm_mdss_irq_chip, handle_level_irq);
- return irq_set_chip_data(irq, dpu_mdss);
+ return irq_set_chip_data(irq, msm_mdss);
}
static const struct irq_domain_ops msm_mdss_irqdomain_ops = {
@@ -108,32 +107,31 @@ static const struct irq_domain_ops msm_mdss_irqdomain_ops = {
.xlate = irq_domain_xlate_onecell,
};
-static int _msm_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
+static int _msm_mdss_irq_domain_add(struct msm_mdss *msm_mdss)
{
struct device *dev;
struct irq_domain *domain;
- dev = dpu_mdss->base.dev;
+ dev = msm_mdss->dev;
domain = irq_domain_add_linear(dev->of_node, 32,
- &msm_mdss_irqdomain_ops, dpu_mdss);
+ &msm_mdss_irqdomain_ops, msm_mdss);
if (!domain) {
DRM_ERROR("failed to add irq_domain\n");
return -EINVAL;
}
- dpu_mdss->irq_controller.enabled_mask = 0;
- dpu_mdss->irq_controller.domain = domain;
+ msm_mdss->irq_controller.enabled_mask = 0;
+ msm_mdss->irq_controller.domain = domain;
return 0;
}
-static int msm_mdss_enable(struct msm_mdss *mdss)
+int msm_mdss_enable(struct msm_mdss *msm_mdss)
{
- struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
int ret;
- ret = clk_bulk_prepare_enable(dpu_mdss->num_clocks, dpu_mdss->clocks);
+ ret = clk_bulk_prepare_enable(msm_mdss->num_clocks, msm_mdss->clocks);
if (ret) {
DRM_ERROR("clock enable failed, ret:%d\n", ret);
return ret;
@@ -143,57 +141,48 @@ static int msm_mdss_enable(struct msm_mdss *mdss)
* ubwc config is part of the "mdss" region which is not accessible
* from the rest of the driver. hardcode known configurations here
*/
- switch (readl_relaxed(dpu_mdss->mmio + HW_REV)) {
+ switch (readl_relaxed(msm_mdss->mmio + HW_REV)) {
case DPU_HW_VER_500:
case DPU_HW_VER_501:
- writel_relaxed(0x420, dpu_mdss->mmio + UBWC_STATIC);
+ writel_relaxed(0x420, msm_mdss->mmio + UBWC_STATIC);
break;
case DPU_HW_VER_600:
/* TODO: 0x102e for LP_DDR4 */
- writel_relaxed(0x103e, dpu_mdss->mmio + UBWC_STATIC);
- writel_relaxed(2, dpu_mdss->mmio + UBWC_CTRL_2);
- writel_relaxed(1, dpu_mdss->mmio + UBWC_PREDICTION_MODE);
+ writel_relaxed(0x103e, msm_mdss->mmio + UBWC_STATIC);
+ writel_relaxed(2, msm_mdss->mmio + UBWC_CTRL_2);
+ writel_relaxed(1, msm_mdss->mmio + UBWC_PREDICTION_MODE);
break;
case DPU_HW_VER_620:
- writel_relaxed(0x1e, dpu_mdss->mmio + UBWC_STATIC);
+ writel_relaxed(0x1e, msm_mdss->mmio + UBWC_STATIC);
break;
case DPU_HW_VER_720:
- writel_relaxed(0x101e, dpu_mdss->mmio + UBWC_STATIC);
+ writel_relaxed(0x101e, msm_mdss->mmio + UBWC_STATIC);
break;
}
return ret;
}
-static int msm_mdss_disable(struct msm_mdss *mdss)
+int msm_mdss_disable(struct msm_mdss *msm_mdss)
{
- struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
-
- clk_bulk_disable_unprepare(dpu_mdss->num_clocks, dpu_mdss->clocks);
+ clk_bulk_disable_unprepare(msm_mdss->num_clocks, msm_mdss->clocks);
return 0;
}
-static void msm_mdss_destroy(struct msm_mdss *mdss)
+void msm_mdss_destroy(struct msm_mdss *msm_mdss)
{
- struct platform_device *pdev = to_platform_device(mdss->dev);
- struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
+ struct platform_device *pdev = to_platform_device(msm_mdss->dev);
int irq;
- pm_runtime_suspend(mdss->dev);
- pm_runtime_disable(mdss->dev);
- irq_domain_remove(dpu_mdss->irq_controller.domain);
- dpu_mdss->irq_controller.domain = NULL;
+ pm_runtime_suspend(msm_mdss->dev);
+ pm_runtime_disable(msm_mdss->dev);
+ irq_domain_remove(msm_mdss->irq_controller.domain);
+ msm_mdss->irq_controller.domain = NULL;
irq = platform_get_irq(pdev, 0);
irq_set_chained_handler_and_data(irq, NULL, NULL);
}
-static const struct msm_mdss_funcs mdss_funcs = {
- .enable = msm_mdss_enable,
- .disable = msm_mdss_disable,
- .destroy = msm_mdss_destroy,
-};
-
/*
* MDP5 MDSS uses at most three specified clocks.
*/
@@ -239,50 +228,44 @@ int mdp5_mdss_parse_clock(struct platform_device *pdev, struct clk_bulk_data **c
return num_clocks;
}
-int msm_mdss_init(struct platform_device *pdev, bool mdp5)
+struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool mdp5)
{
- struct msm_drm_private *priv = platform_get_drvdata(pdev);
- struct dpu_mdss *dpu_mdss;
+ struct msm_mdss *msm_mdss;
int ret;
int irq;
- dpu_mdss = devm_kzalloc(&pdev->dev, sizeof(*dpu_mdss), GFP_KERNEL);
- if (!dpu_mdss)
- return -ENOMEM;
+ msm_mdss = devm_kzalloc(&pdev->dev, sizeof(*msm_mdss), GFP_KERNEL);
+ if (!msm_mdss)
+ return ERR_PTR(-ENOMEM);
- dpu_mdss->mmio = msm_ioremap(pdev, mdp5 ? "mdss_phys" : "mdss", "mdss");
- if (IS_ERR(dpu_mdss->mmio))
- return PTR_ERR(dpu_mdss->mmio);
+ msm_mdss->mmio = msm_ioremap(pdev, mdp5 ? "mdss_phys" : "mdss", "mdss");
+ if (IS_ERR(msm_mdss->mmio))
+ return ERR_CAST(msm_mdss->mmio);
- DRM_DEBUG("mapped mdss address space @%pK\n", dpu_mdss->mmio);
+ DRM_DEBUG("mapped mdss address space @%pK\n", msm_mdss->mmio);
if (mdp5)
- ret = mdp5_mdss_parse_clock(pdev, &dpu_mdss->clocks);
+ ret = mdp5_mdss_parse_clock(pdev, &msm_mdss->clocks);
else
- ret = msm_parse_clock(pdev, &dpu_mdss->clocks);
+ ret = msm_parse_clock(pdev, &msm_mdss->clocks);
if (ret < 0) {
DRM_ERROR("failed to parse clocks, ret=%d\n", ret);
- return ret;
+ return ERR_PTR(ret);
}
- dpu_mdss->num_clocks = ret;
+ msm_mdss->num_clocks = ret;
- dpu_mdss->base.dev = &pdev->dev;
- dpu_mdss->base.funcs = &mdss_funcs;
+ msm_mdss->dev = &pdev->dev;
irq = platform_get_irq(pdev, 0);
if (irq < 0)
- return irq;
+ return ERR_PTR(irq);
- ret = _msm_mdss_irq_domain_add(dpu_mdss);
+ ret = _msm_mdss_irq_domain_add(msm_mdss);
if (ret)
- return ret;
+ return ERR_PTR(ret);
irq_set_chained_handler_and_data(irq, msm_mdss_irq,
- dpu_mdss);
+ msm_mdss);
- priv->mdss = &dpu_mdss->base;
-
- pm_runtime_enable(&pdev->dev);
-
- return 0;
+ return msm_mdss;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 3/4] drm/msm: split the main platform driver
2022-01-06 0:42 [PATCH 0/4] drm/msm: rework MDSS drivers Dmitry Baryshkov
2022-01-06 0:42 ` [PATCH 1/4] drm/msm: unify " Dmitry Baryshkov
2022-01-06 0:42 ` [PATCH 2/4] drm/msm: remove extra indirection for msm_mdss Dmitry Baryshkov
@ 2022-01-06 0:42 ` Dmitry Baryshkov
2022-01-06 0:42 ` [PATCH 4/4] drm/msm: stop using device's match data pointer Dmitry Baryshkov
3 siblings, 0 replies; 5+ messages in thread
From: Dmitry Baryshkov @ 2022-01-06 0:42 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: David Airlie, linux-arm-msm, dri-devel, Stephen Boyd, freedreno
Currently the msm platform driver is a multiplex handling several cases:
- headless GPU-only driver,
- MDP4 with flat device nodes,
- MDP5/DPU MDSS with all the nodes being children of MDSS node.
This results in not-so-perfect code, checking the hardware version
(MDP4/MDP5/DPU) in several places, checking for mdss even when it can
not exist, etc. Split the code into three handling subdrivers (mdp4,
mdss and headless msm).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 56 ++++++
drivers/gpu/drm/msm/msm_drv.c | 236 ++++-------------------
drivers/gpu/drm/msm/msm_drv.h | 19 ++
drivers/gpu/drm/msm/msm_kms.h | 7 -
drivers/gpu/drm/msm/msm_mdss.c | 178 ++++++++++++++++-
5 files changed, 287 insertions(+), 209 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
index 5a33bb148e9e..089914dd058f 100644
--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
@@ -569,3 +569,59 @@ static struct mdp4_platform_config *mdp4_get_config(struct platform_device *dev)
return &config;
}
+
+static const struct dev_pm_ops mdp4_pm_ops = {
+ .prepare = msm_pm_prepare,
+ .complete = msm_pm_complete,
+};
+
+static int mdp4_probe(struct platform_device *pdev)
+{
+ struct msm_drm_private *priv;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, priv);
+
+ /*
+ * on MDP4 based platforms, the MDP platform device is the component
+ * master that adds other display interface components to itself.
+ */
+ return msm_drv_probe(&pdev->dev, &pdev->dev);
+}
+
+static int mdp4_remove(struct platform_device *pdev)
+{
+ component_master_del(&pdev->dev, &msm_drm_ops);
+
+ return 0;
+}
+
+static const struct of_device_id mdp4_dt_match[] = {
+ { .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, mdp4_dt_match);
+
+static struct platform_driver mdp4_platform_driver = {
+ .probe = mdp4_probe,
+ .remove = mdp4_remove,
+ .shutdown = msm_drv_shutdown,
+ .driver = {
+ .name = "mdp4",
+ .of_match_table = mdp4_dt_match,
+ .pm = &mdp4_pm_ops,
+ },
+};
+
+void __init msm_mdp4_register(void)
+{
+ platform_driver_register(&mdp4_platform_driver);
+}
+
+void __exit msm_mdp4_unregister(void)
+{
+ platform_driver_unregister(&mdp4_platform_driver);
+}
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index e978c29dc61a..93207a9eee81 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -458,10 +458,6 @@ static int msm_drm_uninit(struct device *dev)
return 0;
}
-#define KMS_MDP4 4
-#define KMS_MDP5 5
-#define KMS_DPU 3
-
static int get_mdp_ver(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -1146,50 +1142,7 @@ static const struct drm_driver msm_driver = {
.patchlevel = MSM_VERSION_PATCHLEVEL,
};
-static int __maybe_unused msm_runtime_suspend(struct device *dev)
-{
- struct msm_drm_private *priv = dev_get_drvdata(dev);
- struct msm_mdss *mdss = priv->mdss;
-
- DBG("");
-
- if (mdss)
- return msm_mdss_disable(mdss);
-
- return 0;
-}
-
-static int __maybe_unused msm_runtime_resume(struct device *dev)
-{
- struct msm_drm_private *priv = dev_get_drvdata(dev);
- struct msm_mdss *mdss = priv->mdss;
-
- DBG("");
-
- if (mdss)
- return msm_mdss_enable(mdss);
-
- return 0;
-}
-
-static int __maybe_unused msm_pm_suspend(struct device *dev)
-{
-
- if (pm_runtime_suspended(dev))
- return 0;
-
- return msm_runtime_suspend(dev);
-}
-
-static int __maybe_unused msm_pm_resume(struct device *dev)
-{
- if (pm_runtime_suspended(dev))
- return 0;
-
- return msm_runtime_resume(dev);
-}
-
-static int __maybe_unused msm_pm_prepare(struct device *dev)
+int msm_pm_prepare(struct device *dev)
{
struct msm_drm_private *priv = dev_get_drvdata(dev);
struct drm_device *ddev = priv ? priv->dev : NULL;
@@ -1200,7 +1153,7 @@ static int __maybe_unused msm_pm_prepare(struct device *dev)
return drm_mode_config_helper_suspend(ddev);
}
-static void __maybe_unused msm_pm_complete(struct device *dev)
+void msm_pm_complete(struct device *dev)
{
struct msm_drm_private *priv = dev_get_drvdata(dev);
struct drm_device *ddev = priv ? priv->dev : NULL;
@@ -1212,8 +1165,6 @@ static void __maybe_unused msm_pm_complete(struct device *dev)
}
static const struct dev_pm_ops msm_pm_ops = {
- SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
- SET_RUNTIME_PM_OPS(msm_runtime_suspend, msm_runtime_resume, NULL)
.prepare = msm_pm_prepare,
.complete = msm_pm_complete,
};
@@ -1237,25 +1188,11 @@ static int compare_of(struct device *dev, void *data)
* is no external component that we need to add since LVDS is within MDP4
* itself.
*/
-static int add_components_mdp(struct device *mdp_dev,
+static int add_components_mdp(struct device *master_dev, struct device *mdp_dev,
struct component_match **matchptr)
{
struct device_node *np = mdp_dev->of_node;
struct device_node *ep_node;
- struct device *master_dev;
-
- /*
- * on MDP4 based platforms, the MDP platform device is the component
- * master that adds other display interface components to itself.
- *
- * on MDP5 based platforms, the MDSS platform device is the component
- * master that adds MDP5 and other display interface components to
- * itself.
- */
- if (of_device_is_compatible(np, "qcom,mdp4"))
- master_dev = mdp_dev;
- else
- master_dev = mdp_dev->parent;
for_each_endpoint_of_node(np, ep_node) {
struct device_node *intf;
@@ -1296,60 +1233,6 @@ static int add_components_mdp(struct device *mdp_dev,
return 0;
}
-static int find_mdp_node(struct device *dev, void *data)
-{
- return of_match_node(dpu_dt_match, dev->of_node) ||
- of_match_node(mdp5_dt_match, dev->of_node);
-}
-
-static int add_display_components(struct platform_device *pdev,
- struct component_match **matchptr)
-{
- struct device *mdp_dev;
- struct device *dev = &pdev->dev;
- int ret;
-
- /*
- * MDP5/DPU based devices don't have a flat hierarchy. There is a top
- * level parent: MDSS, and children: MDP5/DPU, DSI, HDMI, eDP etc.
- * Populate the children devices, find the MDP5/DPU node, and then add
- * the interfaces to our components list.
- */
- switch (get_mdp_ver(pdev)) {
- case KMS_MDP5:
- case KMS_DPU:
- ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
- if (ret) {
- DRM_DEV_ERROR(dev, "failed to populate children devices\n");
- return ret;
- }
-
- mdp_dev = device_find_child(dev, NULL, find_mdp_node);
- if (!mdp_dev) {
- DRM_DEV_ERROR(dev, "failed to find MDSS MDP node\n");
- of_platform_depopulate(dev);
- return -ENODEV;
- }
-
- put_device(mdp_dev);
-
- /* add the MDP component itself */
- drm_of_component_match_add(dev, matchptr, compare_of,
- mdp_dev->of_node);
- break;
- case KMS_MDP4:
- /* MDP4 */
- mdp_dev = dev;
- break;
- }
-
- ret = add_components_mdp(mdp_dev, matchptr);
- if (ret)
- of_platform_depopulate(dev);
-
- return ret;
-}
-
/*
* We don't know what's the best binding to link the gpu with the drm device.
* Fow now, we just hunt for all the possible gpus that we support, and add them
@@ -1390,104 +1273,70 @@ static void msm_drm_unbind(struct device *dev)
msm_drm_uninit(dev);
}
-static const struct component_master_ops msm_drm_ops = {
+const struct component_master_ops msm_drm_ops = {
.bind = msm_drm_bind,
.unbind = msm_drm_unbind,
};
-/*
- * Platform driver:
- */
-
-static int msm_pdev_probe(struct platform_device *pdev)
+int msm_drv_probe(struct device *master_dev, struct device *mdp_dev)
{
struct component_match *match = NULL;
- struct msm_mdss *mdss;
- struct msm_drm_private *priv;
int ret;
- priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- platform_set_drvdata(pdev, priv);
-
- switch (get_mdp_ver(pdev)) {
- case KMS_MDP5:
- mdss = msm_mdss_init(pdev, true);
- if (IS_ERR(mdss)) {
- ret = PTR_ERR(mdss);
- platform_set_drvdata(pdev, NULL);
-
- return ret;
- } else {
- priv->mdss = mdss;
- pm_runtime_enable(&pdev->dev);
- }
- break;
- case KMS_DPU:
- mdss = msm_mdss_init(pdev, false);
- if (IS_ERR(mdss)) {
- ret = PTR_ERR(mdss);
- platform_set_drvdata(pdev, NULL);
-
- return ret;
- } else {
- priv->mdss = mdss;
- pm_runtime_enable(&pdev->dev);
- }
- break;
- default:
- break;
- }
+ if (mdp_dev) {
+ /* add the MDP component itself */
+ drm_of_component_match_add(master_dev, &match, compare_of,
+ mdp_dev->of_node);
- if (get_mdp_ver(pdev)) {
- ret = add_display_components(pdev, &match);
+ ret = add_components_mdp(master_dev, mdp_dev, &match);
if (ret)
- goto fail;
+ return ret;
}
- ret = add_gpu_components(&pdev->dev, &match);
+ ret = add_gpu_components(master_dev, &match);
if (ret)
- goto fail;
+ return ret;
/* on all devices that I am aware of, iommu's which can map
* any address the cpu can see are used:
*/
- ret = dma_set_mask_and_coherent(&pdev->dev, ~0);
+ ret = dma_set_mask_and_coherent(master_dev, ~0);
if (ret)
- goto fail;
+ return ret;
- ret = component_master_add_with_match(&pdev->dev, &msm_drm_ops, match);
+ ret = component_master_add_with_match(master_dev, &msm_drm_ops, match);
if (ret)
- goto fail;
+ return ret;
return 0;
+}
+
+/*
+ * Platform driver:
+ * Used only for headlesss GPU instances
+ */
-fail:
- of_platform_depopulate(&pdev->dev);
+static int msm_pdev_probe(struct platform_device *pdev)
+{
+ struct msm_drm_private *priv;
- if (priv->mdss)
- msm_mdss_destroy(priv->mdss);
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
- return ret;
+ platform_set_drvdata(pdev, priv);
+
+ return msm_drv_probe(&pdev->dev, NULL);
}
static int msm_pdev_remove(struct platform_device *pdev)
{
- struct msm_drm_private *priv = platform_get_drvdata(pdev);
- struct msm_mdss *mdss = priv->mdss;
-
component_master_del(&pdev->dev, &msm_drm_ops);
- of_platform_depopulate(&pdev->dev);
-
- if (mdss)
- msm_mdss_destroy(mdss);
return 0;
}
-static void msm_pdev_shutdown(struct platform_device *pdev)
+void msm_drv_shutdown(struct platform_device *pdev)
{
struct msm_drm_private *priv = platform_get_drvdata(pdev);
struct drm_device *drm = priv ? priv->dev : NULL;
@@ -1498,25 +1347,12 @@ static void msm_pdev_shutdown(struct platform_device *pdev)
drm_atomic_helper_shutdown(drm);
}
-static const struct of_device_id dt_match[] = {
- { .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
- { .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
- { .compatible = "qcom,sdm845-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sc7180-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sc7280-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sm8150-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sm8250-mdss", .data = (void *)KMS_DPU },
- {}
-};
-MODULE_DEVICE_TABLE(of, dt_match);
-
static struct platform_driver msm_platform_driver = {
.probe = msm_pdev_probe,
.remove = msm_pdev_remove,
- .shutdown = msm_pdev_shutdown,
+ .shutdown = msm_drv_shutdown,
.driver = {
.name = "msm",
- .of_match_table = dt_match,
.pm = &msm_pm_ops,
},
};
@@ -1533,6 +1369,8 @@ static int __init msm_drm_register(void)
msm_hdmi_register();
msm_dp_register();
adreno_register();
+ msm_mdp4_register();
+ msm_mdss_register();
return platform_driver_register(&msm_platform_driver);
}
@@ -1540,6 +1378,8 @@ static void __exit msm_drm_unregister(void)
{
DBG("fini");
platform_driver_unregister(&msm_platform_driver);
+ msm_mdss_unregister();
+ msm_mdp4_unregister();
msm_dp_unregister();
msm_hdmi_unregister();
adreno_unregister();
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index 7500742b7cbd..beddb29dc7f7 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -451,10 +451,18 @@ static inline void msm_dp_debugfs_init(struct msm_dp *dp_display,
#endif
+#define KMS_MDP4 4
+#define KMS_MDP5 5
+#define KMS_DPU 3
+
+void __init msm_mdp4_register(void);
+void __exit msm_mdp4_unregister(void);
void __init msm_mdp_register(void);
void __exit msm_mdp_unregister(void);
void __init msm_dpu_register(void);
void __exit msm_dpu_unregister(void);
+void __init msm_mdss_register(void);
+void __exit msm_mdss_unregister(void);
#ifdef CONFIG_DEBUG_FS
void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
@@ -549,4 +557,15 @@ static inline unsigned long timeout_to_jiffies(const ktime_t *timeout)
return clamp(remaining_jiffies, 0LL, (s64)INT_MAX);
}
+/* Driver helpers */
+
+extern const struct component_master_ops msm_drm_ops;
+
+int msm_pm_prepare(struct device *dev);
+void msm_pm_complete(struct device *dev);
+
+int msm_drv_probe(struct device *master_dev, struct device *mdp_dev);
+void msm_drv_shutdown(struct platform_device *pdev);
+
+
#endif /* __MSM_DRV_H__ */
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index 0c341660941a..13c2eb0b2bcf 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -201,13 +201,6 @@ struct msm_kms *dpu_kms_init(struct drm_device *dev);
extern const struct of_device_id dpu_dt_match[];
extern const struct of_device_id mdp5_dt_match[];
-struct msm_mdss;
-
-struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool mdp5);
-int msm_mdss_enable(struct msm_mdss *mdss);
-int msm_mdss_disable(struct msm_mdss *mdss);
-void msm_mdss_destroy(struct msm_mdss *mdss);
-
#define for_each_crtc_mask(dev, crtc, crtc_mask) \
drm_for_each_crtc(crtc, dev) \
for_each_if (drm_crtc_mask(crtc) & (crtc_mask))
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index 8766666cfffb..69b96683d673 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -8,6 +8,8 @@
#include <linux/irqdesc.h>
#include <linux/irqchip/chained_irq.h>
+#include <drm/drm_of.h>
+
#include "msm_drv.h"
#include "msm_kms.h"
@@ -127,7 +129,7 @@ static int _msm_mdss_irq_domain_add(struct msm_mdss *msm_mdss)
return 0;
}
-int msm_mdss_enable(struct msm_mdss *msm_mdss)
+static int msm_mdss_enable(struct msm_mdss *msm_mdss)
{
int ret;
@@ -163,14 +165,14 @@ int msm_mdss_enable(struct msm_mdss *msm_mdss)
return ret;
}
-int msm_mdss_disable(struct msm_mdss *msm_mdss)
+static int msm_mdss_disable(struct msm_mdss *msm_mdss)
{
clk_bulk_disable_unprepare(msm_mdss->num_clocks, msm_mdss->clocks);
return 0;
}
-void msm_mdss_destroy(struct msm_mdss *msm_mdss)
+static void msm_mdss_destroy(struct msm_mdss *msm_mdss)
{
struct platform_device *pdev = to_platform_device(msm_mdss->dev);
int irq;
@@ -228,7 +230,7 @@ int mdp5_mdss_parse_clock(struct platform_device *pdev, struct clk_bulk_data **c
return num_clocks;
}
-struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool mdp5)
+static struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool mdp5)
{
struct msm_mdss *msm_mdss;
int ret;
@@ -269,3 +271,171 @@ struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool mdp5)
return msm_mdss;
}
+
+static int __maybe_unused mdss_runtime_suspend(struct device *dev)
+{
+ struct msm_drm_private *priv = dev_get_drvdata(dev);
+
+ DBG("");
+
+ return msm_mdss_disable(priv->mdss);
+}
+
+static int __maybe_unused mdss_runtime_resume(struct device *dev)
+{
+ struct msm_drm_private *priv = dev_get_drvdata(dev);
+
+ DBG("");
+
+ return msm_mdss_enable(priv->mdss);
+}
+
+static int __maybe_unused mdss_pm_suspend(struct device *dev)
+{
+
+ if (pm_runtime_suspended(dev))
+ return 0;
+
+ return mdss_runtime_suspend(dev);
+}
+
+static int __maybe_unused mdss_pm_resume(struct device *dev)
+{
+ if (pm_runtime_suspended(dev))
+ return 0;
+
+ return mdss_runtime_resume(dev);
+}
+
+static const struct dev_pm_ops mdss_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(mdss_pm_suspend, mdss_pm_resume)
+ SET_RUNTIME_PM_OPS(mdss_runtime_suspend, mdss_runtime_resume, NULL)
+ .prepare = msm_pm_prepare,
+ .complete = msm_pm_complete,
+};
+
+static int get_mdp_ver(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+
+ return (int) (unsigned long) of_device_get_match_data(dev);
+}
+
+static int find_mdp_node(struct device *dev, void *data)
+{
+ return of_match_node(dpu_dt_match, dev->of_node) ||
+ of_match_node(mdp5_dt_match, dev->of_node);
+}
+
+static int mdss_probe(struct platform_device *pdev)
+{
+ struct msm_mdss *mdss;
+ struct msm_drm_private *priv;
+ int mdp_ver = get_mdp_ver(pdev);
+ struct device *mdp_dev;
+ struct device *dev = &pdev->dev;
+ int ret;
+
+ if (mdp_ver != KMS_MDP5 && mdp_ver != KMS_DPU)
+ return -EINVAL;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, priv);
+
+ mdss = msm_mdss_init(pdev, mdp_ver == KMS_MDP5);
+ if (IS_ERR(mdss)) {
+ ret = PTR_ERR(mdss);
+ platform_set_drvdata(pdev, NULL);
+
+ return ret;
+ }
+
+ priv->mdss = mdss;
+ pm_runtime_enable(&pdev->dev);
+
+ /*
+ * MDP5/DPU based devices don't have a flat hierarchy. There is a top
+ * level parent: MDSS, and children: MDP5/DPU, DSI, HDMI, eDP etc.
+ * Populate the children devices, find the MDP5/DPU node, and then add
+ * the interfaces to our components list.
+ */
+ ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
+ if (ret) {
+ DRM_DEV_ERROR(dev, "failed to populate children devices\n");
+ goto fail;
+ }
+
+ mdp_dev = device_find_child(dev, NULL, find_mdp_node);
+ if (!mdp_dev) {
+ DRM_DEV_ERROR(dev, "failed to find MDSS MDP node\n");
+ of_platform_depopulate(dev);
+ ret = -ENODEV;
+ goto fail;
+ }
+
+ /*
+ * on MDP5 based platforms, the MDSS platform device is the component
+ * master that adds MDP5 and other display interface components to
+ * itself.
+ */
+ ret = msm_drv_probe(dev, mdp_dev);
+ put_device(mdp_dev);
+ if (ret)
+ goto fail;
+
+ return 0;
+
+fail:
+ of_platform_depopulate(dev);
+ msm_mdss_destroy(priv->mdss);
+
+ return ret;
+}
+
+static int mdss_remove(struct platform_device *pdev)
+{
+ struct msm_drm_private *priv = platform_get_drvdata(pdev);
+ struct msm_mdss *mdss = priv->mdss;
+
+ component_master_del(&pdev->dev, &msm_drm_ops);
+ of_platform_depopulate(&pdev->dev);
+
+ msm_mdss_destroy(mdss);
+
+ return 0;
+}
+
+static const struct of_device_id mdss_dt_match[] = {
+ { .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
+ { .compatible = "qcom,sdm845-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,sc7180-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,sc7280-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,sm8150-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,sm8250-mdss", .data = (void *)KMS_DPU },
+ {}
+};
+MODULE_DEVICE_TABLE(of, dt_match);
+
+static struct platform_driver mdss_platform_driver = {
+ .probe = mdss_probe,
+ .remove = mdss_remove,
+ .shutdown = msm_drv_shutdown,
+ .driver = {
+ .name = "msm-mdss",
+ .of_match_table = mdss_dt_match,
+ .pm = &mdss_pm_ops,
+ },
+};
+
+void __init msm_mdss_register(void)
+{
+ platform_driver_register(&mdss_platform_driver);
+}
+
+void __exit msm_mdss_unregister(void)
+{
+ platform_driver_unregister(&mdss_platform_driver);
+}
--
2.34.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 4/4] drm/msm: stop using device's match data pointer
2022-01-06 0:42 [PATCH 0/4] drm/msm: rework MDSS drivers Dmitry Baryshkov
` (2 preceding siblings ...)
2022-01-06 0:42 ` [PATCH 3/4] drm/msm: split the main platform driver Dmitry Baryshkov
@ 2022-01-06 0:42 ` Dmitry Baryshkov
3 siblings, 0 replies; 5+ messages in thread
From: Dmitry Baryshkov @ 2022-01-06 0:42 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: David Airlie, linux-arm-msm, dri-devel, Stephen Boyd, freedreno
Let's make the match's data pointer a (sub-)driver's private data. The
only user currently is the msm_drm_init() function, using this data to
select kms_init callback. Pass this callback through the driver's
private data instead.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 10 ++++---
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 14 +++++----
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 11 ++++---
drivers/gpu/drm/msm/msm_drv.c | 38 ++++++------------------
drivers/gpu/drm/msm/msm_drv.h | 5 +---
drivers/gpu/drm/msm/msm_kms.h | 4 ---
drivers/gpu/drm/msm/msm_mdss.c | 23 +++++++-------
7 files changed, 41 insertions(+), 64 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 354991816041..d631f14b99d3 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -1175,7 +1175,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
return rc;
}
-struct msm_kms *dpu_kms_init(struct drm_device *dev)
+static int dpu_kms_init(struct drm_device *dev)
{
struct msm_drm_private *priv;
struct dpu_kms *dpu_kms;
@@ -1183,7 +1183,7 @@ struct msm_kms *dpu_kms_init(struct drm_device *dev)
if (!dev) {
DPU_ERROR("drm device node invalid\n");
- return ERR_PTR(-EINVAL);
+ return -EINVAL;
}
priv = dev->dev_private;
@@ -1192,11 +1192,11 @@ struct msm_kms *dpu_kms_init(struct drm_device *dev)
irq = irq_of_parse_and_map(dpu_kms->pdev->dev.of_node, 0);
if (irq < 0) {
DPU_ERROR("failed to get irq: %d\n", irq);
- return ERR_PTR(irq);
+ return irq;
}
dpu_kms->base.irq = irq;
- return &dpu_kms->base;
+ return 0;
}
static int dpu_bind(struct device *dev, struct device *master, void *data)
@@ -1207,6 +1207,8 @@ static int dpu_bind(struct device *dev, struct device *master, void *data)
struct dpu_kms *dpu_kms;
int ret = 0;
+ priv->kms_init = dpu_kms_init;
+
dpu_kms = devm_kzalloc(&pdev->dev, sizeof(*dpu_kms), GFP_KERNEL);
if (!dpu_kms)
return -ENOMEM;
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
index 089914dd058f..7cfa50ae0f6e 100644
--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
@@ -389,7 +389,7 @@ static void read_mdp_hw_revision(struct mdp4_kms *mdp4_kms,
DRM_DEV_INFO(dev->dev, "MDP4 version v%d.%d", *major, *minor);
}
-struct msm_kms *mdp4_kms_init(struct drm_device *dev)
+static int mdp4_kms_init(struct drm_device *dev)
{
struct platform_device *pdev = to_platform_device(dev->dev);
struct mdp4_platform_config *config = mdp4_get_config(pdev);
@@ -403,8 +403,7 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev)
mdp4_kms = kzalloc(sizeof(*mdp4_kms), GFP_KERNEL);
if (!mdp4_kms) {
DRM_DEV_ERROR(dev->dev, "failed to allocate kms\n");
- ret = -ENOMEM;
- goto fail;
+ return -ENOMEM;
}
ret = mdp_kms_init(&mdp4_kms->base, &kms_funcs);
@@ -551,12 +550,13 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev)
dev->mode_config.max_width = 2048;
dev->mode_config.max_height = 2048;
- return kms;
+ return 0;
fail:
if (kms)
mdp4_destroy(kms);
- return ERR_PTR(ret);
+
+ return ret;
}
static struct mdp4_platform_config *mdp4_get_config(struct platform_device *dev)
@@ -583,6 +583,8 @@ static int mdp4_probe(struct platform_device *pdev)
if (!priv)
return -ENOMEM;
+ priv->kms_init = mdp4_kms_init;
+
platform_set_drvdata(pdev, priv);
/*
@@ -600,7 +602,7 @@ static int mdp4_remove(struct platform_device *pdev)
}
static const struct of_device_id mdp4_dt_match[] = {
- { .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
+ { .compatible = "qcom,mdp4" },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, mdp4_dt_match);
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
index 12a5f81e402b..23990afa06f2 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
@@ -551,7 +551,7 @@ static int get_clk(struct platform_device *pdev, struct clk **clkp,
return 0;
}
-struct msm_kms *mdp5_kms_init(struct drm_device *dev)
+static int mdp5_kms_init(struct drm_device *dev)
{
struct msm_drm_private *priv = dev->dev_private;
struct platform_device *pdev;
@@ -565,7 +565,7 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev)
/* priv->kms would have been populated by the MDP5 driver */
kms = priv->kms;
if (!kms)
- return NULL;
+ return -ENOMEM;
mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
pdev = mdp5_kms->pdev;
@@ -644,11 +644,12 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev)
dev->max_vblank_count = 0; /* max_vblank_count is set on each CRTC */
dev->vblank_disable_immediate = true;
- return kms;
+ return 0;
fail:
if (kms)
mdp5_kms_destroy(kms);
- return ERR_PTR(ret);
+
+ return ret;
}
static void mdp5_destroy(struct platform_device *pdev)
@@ -810,6 +811,8 @@ static int mdp5_init(struct platform_device *pdev, struct drm_device *dev)
u32 major, minor;
int ret;
+ priv->kms_init = mdp5_kms_init;
+
mdp5_kms = devm_kzalloc(&pdev->dev, sizeof(*mdp5_kms), GFP_KERNEL);
if (!mdp5_kms) {
ret = -ENOMEM;
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 93207a9eee81..649a1fe56da3 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -458,13 +458,6 @@ static int msm_drm_uninit(struct device *dev)
return 0;
}
-static int get_mdp_ver(struct platform_device *pdev)
-{
- struct device *dev = &pdev->dev;
-
- return (int) (unsigned long) of_device_get_match_data(dev);
-}
-
#include <linux/of_address.h>
bool msm_use_mmu(struct drm_device *dev)
@@ -551,7 +544,6 @@ static int msm_init_vram(struct drm_device *dev)
static int msm_drm_init(struct device *dev, const struct drm_driver *drv)
{
- struct platform_device *pdev = to_platform_device(dev);
struct msm_drm_private *priv = dev_get_drvdata(dev);
struct drm_device *ddev;
struct msm_kms *kms;
@@ -599,30 +591,18 @@ static int msm_drm_init(struct device *dev, const struct drm_driver *drv)
msm_gem_shrinker_init(ddev);
- switch (get_mdp_ver(pdev)) {
- case KMS_MDP4:
- kms = mdp4_kms_init(ddev);
- priv->kms = kms;
- break;
- case KMS_MDP5:
- kms = mdp5_kms_init(ddev);
- break;
- case KMS_DPU:
- kms = dpu_kms_init(ddev);
- priv->kms = kms;
- break;
- default:
+ if (priv->kms_init) {
+ ret = priv->kms_init(ddev);
+ if (ret) {
+ DRM_DEV_ERROR(dev, "failed to load kms\n");
+ priv->kms = NULL;
+ goto err_msm_uninit;
+ }
+ kms = priv->kms;
+ } else {
/* valid only for the dummy headless case, where of_node=NULL */
WARN_ON(dev->of_node);
kms = NULL;
- break;
- }
-
- if (IS_ERR(kms)) {
- DRM_DEV_ERROR(dev, "failed to load kms\n");
- ret = PTR_ERR(kms);
- priv->kms = NULL;
- goto err_msm_uninit;
}
/* Enable normalization of plane zpos */
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index beddb29dc7f7..5634ee8fcc01 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -139,6 +139,7 @@ struct msm_drm_private {
struct drm_device *dev;
struct msm_kms *kms;
+ int (*kms_init)(struct drm_device *dev);
/* subordinate devices, if present: */
struct platform_device *gpu_pdev;
@@ -451,10 +452,6 @@ static inline void msm_dp_debugfs_init(struct msm_dp *dp_display,
#endif
-#define KMS_MDP4 4
-#define KMS_MDP5 5
-#define KMS_DPU 3
-
void __init msm_mdp4_register(void);
void __exit msm_mdp4_unregister(void);
void __init msm_mdp_register(void);
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index 13c2eb0b2bcf..1f571372e928 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -194,10 +194,6 @@ static inline void msm_kms_destroy(struct msm_kms *kms)
msm_atomic_destroy_pending_timer(&kms->pending_timers[i]);
}
-struct msm_kms *mdp4_kms_init(struct drm_device *dev);
-struct msm_kms *mdp5_kms_init(struct drm_device *dev);
-struct msm_kms *dpu_kms_init(struct drm_device *dev);
-
extern const struct of_device_id dpu_dt_match[];
extern const struct of_device_id mdp5_dt_match[];
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index 69b96683d673..ab82e1e52fc4 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -314,11 +314,11 @@ static const struct dev_pm_ops mdss_pm_ops = {
.complete = msm_pm_complete,
};
-static int get_mdp_ver(struct platform_device *pdev)
+static bool get_is_mdp5(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
- return (int) (unsigned long) of_device_get_match_data(dev);
+ return (bool) (unsigned long) of_device_get_match_data(dev);
}
static int find_mdp_node(struct device *dev, void *data)
@@ -331,21 +331,18 @@ static int mdss_probe(struct platform_device *pdev)
{
struct msm_mdss *mdss;
struct msm_drm_private *priv;
- int mdp_ver = get_mdp_ver(pdev);
+ bool is_mdp5 = get_is_mdp5(pdev);
struct device *mdp_dev;
struct device *dev = &pdev->dev;
int ret;
- if (mdp_ver != KMS_MDP5 && mdp_ver != KMS_DPU)
- return -EINVAL;
-
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
platform_set_drvdata(pdev, priv);
- mdss = msm_mdss_init(pdev, mdp_ver == KMS_MDP5);
+ mdss = msm_mdss_init(pdev, is_mdp5);
if (IS_ERR(mdss)) {
ret = PTR_ERR(mdss);
platform_set_drvdata(pdev, NULL);
@@ -409,12 +406,12 @@ static int mdss_remove(struct platform_device *pdev)
}
static const struct of_device_id mdss_dt_match[] = {
- { .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
- { .compatible = "qcom,sdm845-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sc7180-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sc7280-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sm8150-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sm8250-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,mdss", .data = (void *)true },
+ { .compatible = "qcom,sdm845-mdss", .data = (void *)false },
+ { .compatible = "qcom,sc7180-mdss", .data = (void *)false },
+ { .compatible = "qcom,sc7280-mdss", .data = (void *)false },
+ { .compatible = "qcom,sm8150-mdss", .data = (void *)false },
+ { .compatible = "qcom,sm8250-mdss", .data = (void *)false },
{}
};
MODULE_DEVICE_TABLE(of, dt_match);
--
2.34.1
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