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From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [PATCH 09/11] drm/i915/pvc: Reset support for new copy engines
Date: Mon,  2 May 2022 09:34:15 -0700	[thread overview]
Message-ID: <20220502163417.2635462-10-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20220502163417.2635462-1-matthew.d.roper@intel.com>

This patch adds the reset support for new copy engines
in PVC.

Bspec: 52549
Original-author: CQ Tang
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c |  8 +++++
 drivers/gpu/drm/i915/gt/intel_gt_regs.h   | 44 +++++++++++++----------
 2 files changed, 34 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 4532c3ea9ace..c6e93db134b1 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -390,6 +390,14 @@ static u32 get_reset_domain(u8 ver, enum intel_engine_id id)
 		static const u32 engine_reset_domains[] = {
 			[RCS0]  = GEN11_GRDOM_RENDER,
 			[BCS0]  = GEN11_GRDOM_BLT,
+			[BCS1]  = XEHPC_GRDOM_BLT1,
+			[BCS2]  = XEHPC_GRDOM_BLT2,
+			[BCS3]  = XEHPC_GRDOM_BLT3,
+			[BCS4]  = XEHPC_GRDOM_BLT4,
+			[BCS5]  = XEHPC_GRDOM_BLT5,
+			[BCS6]  = XEHPC_GRDOM_BLT6,
+			[BCS7]  = XEHPC_GRDOM_BLT7,
+			[BCS8]  = XEHPC_GRDOM_BLT8,
 			[VCS0]  = GEN11_GRDOM_MEDIA,
 			[VCS1]  = GEN11_GRDOM_MEDIA2,
 			[VCS2]  = GEN11_GRDOM_MEDIA3,
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index fe09288a3145..98ede9c93f00 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -597,24 +597,32 @@
 /* GEN11 changed all bit defs except for FULL & RENDER */
 #define   GEN11_GRDOM_FULL			GEN6_GRDOM_FULL
 #define   GEN11_GRDOM_RENDER			GEN6_GRDOM_RENDER
-#define   GEN11_GRDOM_BLT			(1 << 2)
-#define   GEN11_GRDOM_GUC			(1 << 3)
-#define   GEN11_GRDOM_MEDIA			(1 << 5)
-#define   GEN11_GRDOM_MEDIA2			(1 << 6)
-#define   GEN11_GRDOM_MEDIA3			(1 << 7)
-#define   GEN11_GRDOM_MEDIA4			(1 << 8)
-#define   GEN11_GRDOM_MEDIA5			(1 << 9)
-#define   GEN11_GRDOM_MEDIA6			(1 << 10)
-#define   GEN11_GRDOM_MEDIA7			(1 << 11)
-#define   GEN11_GRDOM_MEDIA8			(1 << 12)
-#define   GEN11_GRDOM_VECS			(1 << 13)
-#define   GEN11_GRDOM_VECS2			(1 << 14)
-#define   GEN11_GRDOM_VECS3			(1 << 15)
-#define   GEN11_GRDOM_VECS4			(1 << 16)
-#define   GEN11_GRDOM_SFC0			(1 << 17)
-#define   GEN11_GRDOM_SFC1			(1 << 18)
-#define   GEN11_GRDOM_SFC2			(1 << 19)
-#define   GEN11_GRDOM_SFC3			(1 << 20)
+#define   XEHPC_GRDOM_BLT8			REG_BIT(31)
+#define   XEHPC_GRDOM_BLT7			REG_BIT(30)
+#define   XEHPC_GRDOM_BLT6			REG_BIT(29)
+#define   XEHPC_GRDOM_BLT5			REG_BIT(28)
+#define   XEHPC_GRDOM_BLT4			REG_BIT(27)
+#define   XEHPC_GRDOM_BLT3			REG_BIT(26)
+#define   XEHPC_GRDOM_BLT2			REG_BIT(25)
+#define   XEHPC_GRDOM_BLT1			REG_BIT(24)
+#define   GEN11_GRDOM_SFC3			REG_BIT(20)
+#define   GEN11_GRDOM_SFC2			REG_BIT(19)
+#define   GEN11_GRDOM_SFC1			REG_BIT(18)
+#define   GEN11_GRDOM_SFC0			REG_BIT(17)
+#define   GEN11_GRDOM_VECS4			REG_BIT(16)
+#define   GEN11_GRDOM_VECS3			REG_BIT(15)
+#define   GEN11_GRDOM_VECS2			REG_BIT(14)
+#define   GEN11_GRDOM_VECS			REG_BIT(13)
+#define   GEN11_GRDOM_MEDIA8			REG_BIT(12)
+#define   GEN11_GRDOM_MEDIA7			REG_BIT(11)
+#define   GEN11_GRDOM_MEDIA6			REG_BIT(10)
+#define   GEN11_GRDOM_MEDIA5			REG_BIT(9)
+#define   GEN11_GRDOM_MEDIA4			REG_BIT(8)
+#define   GEN11_GRDOM_MEDIA3			REG_BIT(7)
+#define   GEN11_GRDOM_MEDIA2			REG_BIT(6)
+#define   GEN11_GRDOM_MEDIA			REG_BIT(5)
+#define   GEN11_GRDOM_GUC			REG_BIT(3)
+#define   GEN11_GRDOM_BLT			REG_BIT(2)
 #define   GEN11_VCS_SFC_RESET_BIT(instance)	(GEN11_GRDOM_SFC0 << ((instance) >> 1))
 #define   GEN11_VECS_SFC_RESET_BIT(instance)	(GEN11_GRDOM_SFC0 << (instance))
 
-- 
2.35.1


  parent reply	other threads:[~2022-05-02 16:34 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-02 16:34 [PATCH 00/11] i915: Introduce Ponte Vecchio Matt Roper
2022-05-02 16:34 ` [PATCH 01/11] drm/i915/pvc: add initial Ponte Vecchio definitions Matt Roper
2022-05-02 20:44   ` Lucas De Marchi
2022-05-02 16:34 ` [PATCH 02/11] drm/i915/pvc: Add forcewake support Matt Roper
2022-05-02 22:33   ` Summers, Stuart
2022-05-05  0:34     ` Matt Roper
2022-05-02 16:34 ` [PATCH 03/11] drm/i915/pvc: Define MOCS table for PVC Matt Roper
2022-05-02 16:50   ` Matt Roper
2022-05-02 18:39     ` [Intel-gfx] " Lucas De Marchi
2022-05-02 18:50       ` Matt Roper
2022-05-02 19:27         ` Lucas De Marchi
2022-05-02 19:42           ` Matt Roper
2022-05-02 21:03   ` Lucas De Marchi
2022-05-02 21:14     ` Matt Roper
2022-05-03  6:22       ` Lucas De Marchi
2022-05-02 16:34 ` [PATCH 04/11] drm/i915/pvc: Read correct RP_STATE_CAP register Matt Roper
2022-05-02 16:55   ` Rodrigo Vivi
2022-05-02 16:34 ` [PATCH 05/11] drm/i915/pvc: Remove additional 3D flags from PIPE_CONTROL Matt Roper
2022-05-02 16:34 ` [PATCH 06/11] drm/i915/pvc: Reduce stack usage in reset selftest with extra blitter engine Matt Roper
2022-05-02 18:46   ` Souza, Jose
2022-05-03  8:25   ` [Intel-gfx] " Tvrtko Ursulin
2022-05-02 16:34 ` [PATCH 07/11] drm/i915/pvc: Engines definitions for new copy engines Matt Roper
2022-05-02 18:45   ` [Intel-gfx] " Souza, Jose
2022-05-03  8:05   ` Tvrtko Ursulin
2022-05-05 20:59     ` Matt Roper
2022-05-06  7:21       ` Tvrtko Ursulin
2022-05-06 14:29         ` Matt Roper
2022-05-02 16:34 ` [PATCH 08/11] drm/i915/pvc: Interrupt support " Matt Roper
2022-05-02 22:23   ` Summers, Stuart
2022-05-02 16:34 ` Matt Roper [this message]
2022-05-02 18:44   ` [Intel-gfx] [PATCH 09/11] drm/i915/pvc: Reset " Souza, Jose
2022-05-02 22:23   ` Summers, Stuart
2022-05-02 16:34 ` [PATCH 10/11] drm/i915/pvc: skip all copy engines from aux table invalidate Matt Roper
2022-05-02 18:40   ` [Intel-gfx] " Souza, Jose
2022-05-02 22:58   ` Kumar Valsan, Prathap
2022-05-02 16:34 ` [PATCH 11/11] drm/i915/pvc: read fuses for link copy engines Matt Roper
2022-05-02 18:48   ` Souza, Jose
2022-05-03  8:19   ` [Intel-gfx] " Tvrtko Ursulin
2022-05-03  8:21 ` [Intel-gfx] [PATCH 00/11] i915: Introduce Ponte Vecchio Tvrtko Ursulin
2022-05-03 14:56   ` Matt Roper
2022-05-03 15:01     ` Tvrtko Ursulin

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