From: Aradhya Bhatia <a-bhatia1@ti.com>
To: Tomi Valkeinen <tomba@kernel.org>, Jyri Sarha <jyri.sarha@iki.fi>,
Rob Herring <robh+dt@kernel.org>, David Airlie <airlied@linux.ie>,
Daniel Vetter <daniel@ffwll.ch>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Nishanth Menon <nm@ti.com>,
Devicetree List <devicetree@vger.kernel.org>,
Vignesh Raghavendra <vigneshr@ti.com>,
Devarsh Thakkar <devarsht@ti.com>,
Linux Kernel List <linux-kernel@vger.kernel.org>,
DRI Development List <dri-devel@lists.freedesktop.org>,
Darren Etheridge <detheridge@ti.com>,
Rahul T R <r-ravikumar@ti.com>, Krunal Bhargav <k-bhargav@ti.com>
Subject: [PATCH 7/8] drm/tidss: Fix clock request value for OLDI videoports
Date: Tue, 19 Jul 2022 13:38:44 +0530 [thread overview]
Message-ID: <20220719080845.22122-8-a-bhatia1@ti.com> (raw)
In-Reply-To: <20220719080845.22122-1-a-bhatia1@ti.com>
The OLDI TX(es) require a serial clock which is 7 times the pixel clock
of the display panel. When the OLDI is enabled in DSS, the pixel clock
input of the corresponding videoport gets a divided-by 7 value of the
requested clock.
For the am625-dss, the requested clock needs to be 7 times the value.
Update the clock frequency by requesting 7 times the value.
Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
---
drivers/gpu/drm/tidss/tidss_dispc.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c
index c4a5f808648f..0b9689453ee8 100644
--- a/drivers/gpu/drm/tidss/tidss_dispc.c
+++ b/drivers/gpu/drm/tidss/tidss_dispc.c
@@ -1326,6 +1326,16 @@ int dispc_vp_set_clk_rate(struct dispc_device *dispc, u32 hw_videoport,
int r;
unsigned long new_rate;
+ /*
+ * For AM625 OLDI video ports, the requested pixel clock needs to take into account the
+ * serial clock required for the serialization of DPI signals into LVDS signals. The
+ * incoming pixel clock on the OLDI video port gets divided by 7 whenever OLDI enable bit
+ * gets set.
+ */
+ if (dispc->feat->vp_bus_type[hw_videoport] == DISPC_VP_OLDI &&
+ dispc->feat->subrev == DISPC_AM625)
+ rate *= 7;
+
r = clk_set_rate(dispc->vp_clk[hw_videoport], rate);
if (r) {
dev_err(dispc->dev, "vp%d: failed to set clk rate to %lu\n",
--
2.37.0
next prev parent reply other threads:[~2022-07-19 8:09 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-19 8:08 sFrom b69208b75f7ae8e223c81783afb04fecd2f5faf8 Mon Sep 17 00:00:00 2001 Aradhya Bhatia
2022-07-19 8:08 ` [PATCH 1/8] dt-bindings: display: ti, am65x-dss: Add port properties for DSS Aradhya Bhatia
2022-07-20 23:28 ` [PATCH 1/8] dt-bindings: display: ti,am65x-dss: " Rob Herring
2022-07-22 16:16 ` Nishanth Menon
2022-07-28 6:28 ` Tomi Valkeinen
2022-07-25 11:26 ` Aradhya Bhatia
2022-07-25 22:14 ` Francesco Dolcini
2022-08-10 17:48 ` Rob Herring
2022-07-28 11:16 ` Tomi Valkeinen
2022-07-19 8:08 ` [PATCH 2/8] dt-bindings: display: ti, am65x-dss: Add IO CTRL property for AM625 OLDI Aradhya Bhatia
2022-07-20 23:32 ` [PATCH 2/8] dt-bindings: display: ti,am65x-dss: " Rob Herring
2022-07-25 11:34 ` Aradhya Bhatia
2022-07-19 8:08 ` [PATCH 3/8] drm/tidss: Add support for DSS port properties Aradhya Bhatia
2022-07-28 12:07 ` Tomi Valkeinen
2022-07-19 8:08 ` [PATCH 4/8] drm/tidss: Add support for Dual Link LVDS Bus Format Aradhya Bhatia
2022-07-28 11:03 ` Tomi Valkeinen
2022-07-28 11:45 ` Tomi Valkeinen
2022-08-09 5:58 ` Aradhya Bhatia
2022-08-09 6:28 ` Tomi Valkeinen
2022-08-09 9:06 ` Aradhya Bhatia
2022-08-09 9:51 ` Tomi Valkeinen
2022-08-09 13:34 ` Aradhya Bhatia
2022-07-19 8:08 ` [PATCH 5/8] drm/tidss: dt property to force 16bit VP output to a 24bit bridge Aradhya Bhatia
2022-07-19 8:08 ` [PATCH 6/8] drm/tidss: Add IO CTRL and Power support for OLDI TX in AM625 Aradhya Bhatia
2022-07-19 8:08 ` Aradhya Bhatia [this message]
2022-07-28 10:05 ` [PATCH 7/8] drm/tidss: Fix clock request value for OLDI videoports Tomi Valkeinen
2022-07-29 3:56 ` Aradhya Bhatia
2022-07-29 8:13 ` Tomi Valkeinen
2022-07-19 8:08 ` [PATCH 8/8] drm/tidss: Enable Dual and Duplicate Modes for OLDI Aradhya Bhatia
2022-07-27 13:22 ` Tomi Valkeinen
2022-07-28 6:46 ` Tomi Valkeinen
2022-07-28 8:49 ` Aradhya Bhatia
2022-07-28 11:29 ` Tomi Valkeinen
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