* [PATCH v6 00/19] Add RZ/G2L Display support
@ 2022-11-23 17:28 Biju Das
2022-11-23 17:28 ` [PATCH v6 01/19] drm: rcar-du: Add encoder lib support Biju Das
` (20 more replies)
0 siblings, 21 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:28 UTC (permalink / raw)
To: David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, Chris Paterson, Laurent Pinchart, Geert Uytterhoeven,
Prabhakar Mahadev Lad, dri-devel, linux-renesas-soc, Biju Das
RZ/G2L LCD controller composed of Frame compression Processor(FCPVD),
Video signal processor (VSPD) and Display unit(DU). The output of LCDC is
connected to Display parallel interface and MIPI link video interface.
The output from DSI is connected to ADV7535.
The DU controller on RZ/G2L LCDC is similar to R-Car as it is
connected to VSPD. RCar DU lib is created for sharing kms, vsp and encoder
driver code between both RCar and RZ/G2L and created new CRTC/DRM driver
specific to RZ/G2L.
v5->v6:
* Merged DU lib and RZ/G2L du driver in same patch series
* Rebased to latest drm-misc.
* Merged patch#1 to RZ/G2L Driver patch.
* Updated KConfig dependency from ARCH_RENESAS->ARCH_RZG2L.
* Optimized rzg2l_du_output_name() by removing unsupported outputs.
* Fixed checkpatch warnings
* Updated rcar_du_vsp_plane_setup()
* Updated rcar_du_fb_create() for the pixel fmt error.
* Updated commit description for RZ/G2UL driver patch
* Updated Kconfig
* Replaced drm_fb_cma_helper->drm_gem_dma_helper
* Updated header files.
v4->v5:
* Added Rb tag from Rob for binding patch.
* Started using RCar DU libs(kms, vsp and encoder)
* Started using rcar_du_device, rcar_du_write, rcar_du_crtc,
rcar_du_format_info and rcar_du_encoder.
v3->v4:
* Changed compatible name from renesas,du-r9a07g044->renesas,r9a07g044-du
* started using same compatible for RZ/G2{L,LC}
* Removed rzg2l_du_group.h and struct rzg2l_du_group
* Renamed __rzg2l_du_group_start_stop->rzg2l_du_start_stop
* Removed rzg2l_du_group_restart
* Updated rzg2l_du_crtc_set_display_timing
* Removed mode_valid callback.
* Updated rzg2l_du_crtc_create() parameters
* Updated compatible
* Removed RZG2L_DU_MAX_GROUPS
V2->v3:
* Added new bindings for RZ/G2L DU
* Removed indirection and created new DRM driver based on R-Car DU
v1->v2:
* Based on [1], all references to 'rzg2l_lcdc' replaced with 'rzg2l_du'
* Updated commit description for bindings
* Removed LCDC references from bindings
* Changed clock name from du.0->aclk from bindings
* Changed reset name from du.0->du from bindings
* Replaced crtc_helper_funcs->rcar_crtc_helper_funcs
* Updated macro DRM_RZG2L_LCDC->DRM_RZG2L_DU
* Replaced rzg2l-lcdc-drm->rzg2l-du-drm
* Added forward declaration for struct reset_control
[1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220312084205.31462-2-biju.das.jz@bp.renesas.com/
RFC->v1:
* Changed minItems->maxItems for renesas,vsps.
* Added RZ/G2L LCDC driver with special handling for CRTC reusing
most of RCar DU code
* Fixed the comments for num_rpf from rpf's->RPFs/ and vsp->VSP.
RFC:
https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220112174612.10773-18-biju.das.jz@bp.renesas.com/
https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220112174612.10773-12-biju.das.jz@bp.renesas.com/
https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220112174612.10773-13-biju.das.jz@bp.renesas.com/
https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220112174612.10773-19-biju.das.jz@bp.renesas.com/
Modetest output:-
root@smarc-rzg2l:~# modetest -M rzg2l-du
Encoders:
id crtc type possible crtcs possible clones
43 42 none 0x00000001 0x00000001
45 0 Virtual 0x00000001 0x00000002
Connectors:
id encoder status name size (mm) modes encoders
44 43 connected HDMI-A-1 520x320 30 43
modes:
index name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot)
#0 1920x1080 59.72 1920 1968 2000 2080 1080 1082 1087 1111 138000 flags: phsync, nvsync; type: preferred, driver
#1 1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: driver
#2 1920x1080 59.94 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags: phsync, pvsync; type: driver
#3 1920x1080 59.94 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags: phsync, pvsync; type: driver
#4 1280x1024 75.02 1280 1296 1440 1688 1024 1025 1028 1066 135000 flags: phsync, pvsync; type: driver
#5 1280x1024 60.02 1280 1328 1440 1688 1024 1025 1028 1066 108000 flags: phsync, pvsync; type: driver
#6 1152x864 75.00 1152 1216 1344 1600 864 865 868 900 108000 flags: phsync, pvsync; type: driver
#7 1280x720 60.00 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver
#8 1280x720 59.94 1280 1390 1430 1650 720 725 730 750 74176 flags: phsync, pvsync; type: driver
#9 1280x720 50.00 1280 1720 1760 1980 720 725 730 750 74250 flags: phsync, pvsync; type: driver
#10 1280x720 50.00 1280 1720 1760 1980 720 725 730 750 74250 flags: phsync, pvsync; type: driver
#11 1024x768 75.03 1024 1040 1136 1312 768 769 772 800 78750 flags: phsync, pvsync; type: driver
#12 1024x768 70.07 1024 1048 1184 1328 768 771 777 806 75000 flags: nhsync, nvsync; type: driver
#13 1024x768 60.00 1024 1048 1184 1344 768 771 777 806 65000 flags: nhsync, nvsync; type: driver
#14 1080x607 59.97 1080 1120 1232 1384 607 608 611 629 52210 flags: nhsync, pvsync; type:
#15 832x624 74.55 832 864 928 1152 624 625 628 667 57284 flags: nhsync, nvsync; type: driver
#16 800x600 75.00 800 816 896 1056 600 601 604 625 49500 flags: phsync, pvsync; type: driver
#17 800x600 72.19 800 856 976 1040 600 637 643 666 50000 flags: phsync, pvsync; type: driver
#18 800x600 60.32 800 840 968 1056 600 601 605 628 40000 flags: phsync, pvsync; type: driver
#19 800x600 56.25 800 824 896 1024 600 601 603 625 36000 flags: phsync, pvsync; type: driver
#20 720x576 50.00 720 732 796 864 576 581 586 625 27000 flags: nhsync, nvsync; type: driver
#21 720x576 50.00 720 732 796 864 576 581 586 625 27000 flags: nhsync, nvsync; type: driver
#22 720x480 60.00 720 736 798 858 480 489 495 525 27027 flags: nhsync, nvsync; type: driver
#23 720x480 59.94 720 736 798 858 480 489 495 525 27000 flags: nhsync, nvsync; type: driver
#24 640x480 75.00 640 656 720 840 480 481 484 500 31500 flags: nhsync, nvsync; type: driver
#25 640x480 72.81 640 664 704 832 480 489 492 520 31500 flags: nhsync, nvsync; type: driver
#26 640x480 66.67 640 704 768 864 480 483 486 525 30240 flags: nhsync, nvsync; type: driver
#27 640x480 60.00 640 656 752 800 480 490 492 525 25200 flags: nhsync, nvsync; type: driver
#28 640x480 59.94 640 656 752 800 480 490 492 525 25175 flags: nhsync, nvsync; type: driver
#29 720x400 70.08 720 738 846 900 400 412 414 449 28320 flags: nhsync, pvsync; type: driver
props:
1 EDID:
flags: immutable blob
blobs:
value:
00ffffffffffff003683832410101010
1416010380342078eeb725ac5130b426
105054bfef8068c0714f818001010101
010101010101e83580a070381f403020
250044682100001a000000ff00303031
30310a20202020202020000000fc0048
444d490a2020202020202020000000fd
00384c1e5317000a20202020202001cf
02031a71471003140513841223090707
8301000065030c0010008c0ad0902040
31200c40550036d431000018011d8018
711c1620582c250036d43100009e011d
80d0721c1620102c258036d43100009e
011d00bc52d01e20b828554036d43100
001ef339801871382d40582c4500c48e
2100001e000000000000000000000054
2 DPMS:
flags: enum
enums: On=0 Standby=1 Suspend=2 Off=3
value: 0
5 link-status:
flags: enum
enums: Good=0 Bad=1
value: 0
6 non-desktop:
flags: immutable range
values: 0 1
value: 0
4 TILE:
flags: immutable blob
blobs:
value:
20 CRTC_ID:
flags: object
value: 42
CRTCs:
id fb pos size
42 52 (0,0) (1920x1080)
#0 1920x1080 59.72 1920 1968 2000 2080 1080 1082 1087 1111 138000 flags: phsync, nvsync; type: preferred, driver
props:
22 ACTIVE:
flags: range
values: 0 1
value: 1
23 MODE_ID:
flags: blob
blobs:
value:
101b02008007b007d007200800003804
3a043f04570400003c00000009000000
48000000313932307831303830000000
00000000000000000000000000000000
00000000
19 OUT_FENCE_PTR:
flags: range
values: 0 18446744073709551615
value: 0
24 VRR_ENABLED:
flags: range
values: 0 1
value: 0
Planes:
id crtc fb CRTC x,y x,y gamma size possible crtcs
32 42 52 0,0 0,0 0 0x00000001
formats: RGB8 AR12 XR12 AR15 XR15 RG16 BG24 RG24 BA24 BX24 AR24 XR24 UYVY YUYV YVYU NV12 NV21 NV16 NV61 YU12 YV12 YU16 YV16 YU24 YV24
props:
8 type:
flags: immutable enum
enums: Overlay=0 Primary=1 Cursor=2
value: 1
17 FB_ID:
flags: object
value: 52
18 IN_FENCE_FD:
flags: signed range
values: -1 2147483647
value: -1
20 CRTC_ID:
flags: object
value: 42
13 CRTC_X:
flags: signed range
values: -2147483648 2147483647
value: 0
14 CRTC_Y:
flags: signed range
values: -2147483648 2147483647
value: 0
15 CRTC_W:
flags: range
values: 0 2147483647
value: 1920
16 CRTC_H:
flags: range
values: 0 2147483647
value: 1080
9 SRC_X:
flags: range
values: 0 4294967295
value: 0
10 SRC_Y:
flags: range
values: 0 4294967295
value: 0
11 SRC_W:
flags: range
values: 0 4294967295
value: 125829120
12 SRC_H:
flags: range
values: 0 4294967295
value: 70778880
30 IN_FORMATS:
flags: immutable blob
blobs:
value:
01000000000000001900000018000000
01000000800000005247423841523132
58523132415231355852313552473136
42473234524732344241323442583234
41523234585232345559565959555956
595659554e5631324e5632314e563136
4e563631595531325956313259553136
59563136595532345956323400000000
ffffff01000000000000000000000000
0000000000000000
in_formats blob decoded:
RGB8: LINEAR
AR12: LINEAR
XR12: LINEAR
AR15: LINEAR
XR15: LINEAR
RG16: LINEAR
BG24: LINEAR
RG24: LINEAR
BA24: LINEAR
BX24: LINEAR
AR24: LINEAR
XR24: LINEAR
UYVY: LINEAR
YUYV: LINEAR
YVYU: LINEAR
NV12: LINEAR
NV21: LINEAR
NV16: LINEAR
NV61: LINEAR
YU12: LINEAR
YV12: LINEAR
YU16: LINEAR
YV16: LINEAR
YU24: LINEAR
YV24: LINEAR
34 alpha:
flags: range
values: 0 65535
value: 65535
35 zpos:
flags: range
values: 0 1
value: 0
36 pixel blend mode:
flags: enum
enums: None=2 Pre-multiplied=0 Coverage=1
value: 0
37 0 0 0,0 0,0 0 0x00000001
formats: RGB8 AR12 XR12 AR15 XR15 RG16 BG24 RG24 BA24 BX24 AR24 XR24 UYVY YUYV YVYU NV12 NV21 NV16 NV61 YU12 YV12 YU16 YV16 YU24 YV24
props:
8 type:
flags: immutable enum
enums: Overlay=0 Primary=1 Cursor=2
value: 0
17 FB_ID:
flags: object
value: 0
18 IN_FENCE_FD:
flags: signed range
values: -1 2147483647
value: -1
20 CRTC_ID:
flags: object
value: 0
13 CRTC_X:
flags: signed range
values: -2147483648 2147483647
value: 0
14 CRTC_Y:
flags: signed range
values: -2147483648 2147483647
value: 0
15 CRTC_W:
flags: range
values: 0 2147483647
value: 0
16 CRTC_H:
flags: range
values: 0 2147483647
value: 0
9 SRC_X:
flags: range
values: 0 4294967295
value: 0
10 SRC_Y:
flags: range
values: 0 4294967295
value: 0
11 SRC_W:
flags: range
values: 0 4294967295
value: 0
12 SRC_H:
flags: range
values: 0 4294967295
value: 0
30 IN_FORMATS:
flags: immutable blob
blobs:
value:
01000000000000001900000018000000
01000000800000005247423841523132
58523132415231355852313552473136
42473234524732344241323442583234
41523234585232345559565959555956
595659554e5631324e5632314e563136
4e563631595531325956313259553136
59563136595532345956323400000000
ffffff01000000000000000000000000
0000000000000000
in_formats blob decoded:
RGB8: LINEAR
AR12: LINEAR
XR12: LINEAR
AR15: LINEAR
XR15: LINEAR
RG16: LINEAR
BG24: LINEAR
RG24: LINEAR
BA24: LINEAR
BX24: LINEAR
AR24: LINEAR
XR24: LINEAR
UYVY: LINEAR
YUYV: LINEAR
YVYU: LINEAR
NV12: LINEAR
NV21: LINEAR
NV16: LINEAR
NV61: LINEAR
YU12: LINEAR
YV12: LINEAR
YU16: LINEAR
YV16: LINEAR
YU24: LINEAR
YV24: LINEAR
39 alpha:
flags: range
values: 0 65535
value: 65535
40 zpos:
flags: range
values: 0 1
value: 1
41 pixel blend mode:
flags: enum
enums: None=2 Pre-multiplied=0 Coverage=1
value: 0
Frame buffers:
id size pitch
root@smarc-rzg2l:~#
Biju Das (19):
drm: rcar-du: Add encoder lib support
drm: rcar-du: Add kms lib support
drm: rcar-du: Add vsp lib support
drm: rcar-du: Move rcar_du_vsp_atomic_begin()
drm: rcar-du: Move rcar_du_vsp_atomic_flush()
drm: rcar-du: Move vsp rcar_du_vsp_{map,unmap}_fb()
drm: rcar-du: Move rcar_du_dumb_create()
drm: rcar-du: Move rcar_du_gem_prime_import_sg_table()
drm: rcar-du: Add rcar_du_lib_vsp_init()
drm: rcar-du: Move rcar_du_vsp_plane_prepare_fb()
drm: rcar-du: Move rcar_du_vsp_plane_cleanup_fb()
drm: rcar-du: Move rcar_du_vsp_plane_atomic_update()
drm: rcar-du: Add rcar_du_lib_fb_create()
drm: rcar-du: Add rcar_du_lib_mode_cfg_helper_get()
drm: rcar-du: Move rcar_du_encoders_init()
drm: rcar-du: Move rcar_du_properties_init()
drm: rcar-du: Add rcar_du_lib_vsps_init()
dt-bindings: display: Document Renesas RZ/G2L DU bindings
drm: rcar-du: Add RZ/G2L DU Support
.../bindings/display/renesas,rzg2l-du.yaml | 124 +++
drivers/gpu/drm/rcar-du/Kconfig | 25 +-
drivers/gpu/drm/rcar-du/Makefile | 17 +
drivers/gpu/drm/rcar-du/rcar_du_crtc.h | 10 +
drivers/gpu/drm/rcar-du/rcar_du_encoder.c | 117 +--
drivers/gpu/drm/rcar-du/rcar_du_encoder.h | 14 +-
drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.c | 138 ++++
drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.h | 30 +
drivers/gpu/drm/rcar-du/rcar_du_kms.c | 664 +---------------
drivers/gpu/drm/rcar-du/rcar_du_kms.h | 29 +-
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 715 +++++++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 62 ++
drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 361 +--------
drivers/gpu/drm/rcar-du/rcar_du_vsp.h | 26 +-
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 390 ++++++++++
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 76 ++
drivers/gpu/drm/rcar-du/rzg2l_du_crtc.c | 716 ++++++++++++++++++
drivers/gpu/drm/rcar-du/rzg2l_du_crtc.h | 26 +
drivers/gpu/drm/rcar-du/rzg2l_du_drv.c | 196 +++++
drivers/gpu/drm/rcar-du/rzg2l_du_drv.h | 20 +
drivers/gpu/drm/rcar-du/rzg2l_du_encoder.c | 26 +
drivers/gpu/drm/rcar-du/rzg2l_du_encoder.h | 19 +
drivers/gpu/drm/rcar-du/rzg2l_du_kms.c | 157 ++++
drivers/gpu/drm/rcar-du/rzg2l_du_kms.h | 17 +
drivers/gpu/drm/rcar-du/rzg2l_du_regs.h | 67 ++
drivers/gpu/drm/rcar-du/rzg2l_du_vsp.c | 82 ++
drivers/gpu/drm/rcar-du/rzg2l_du_vsp.h | 30 +
27 files changed, 2958 insertions(+), 1196 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.c
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.h
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_crtc.c
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_crtc.h
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_drv.c
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_drv.h
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_encoder.c
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_encoder.h
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_kms.c
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_kms.h
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_regs.h
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_vsp.c
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_vsp.h
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v6 01/19] drm: rcar-du: Add encoder lib support
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
@ 2022-11-23 17:28 ` Biju Das
2022-11-23 17:28 ` [PATCH v6 02/19] drm: rcar-du: Add kms " Biju Das
` (19 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:28 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
Add RCar DU encoder lib support by moving rcar_du_encoder_count_ports()
and rcar_du_encoder_funcs to the lib file and added
rcar_du_encoder_funcs() to share the common code between RCar and
RZ/G2L DU encoder drivers.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v6:
* Updated rcar_du_encoder_init() to take care of DSI outputs.
v1->v2:
* Rebased on drm-misc-next and DU-next.
* Fixed the warning reported by bot.
---
drivers/gpu/drm/rcar-du/Kconfig | 5 +
drivers/gpu/drm/rcar-du/Makefile | 2 +
drivers/gpu/drm/rcar-du/rcar_du_encoder.c | 117 +--------------
drivers/gpu/drm/rcar-du/rcar_du_encoder.h | 14 +-
drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.c | 138 ++++++++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.h | 30 ++++
6 files changed, 180 insertions(+), 126 deletions(-)
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.c
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.h
diff --git a/drivers/gpu/drm/rcar-du/Kconfig b/drivers/gpu/drm/rcar-du/Kconfig
index b2bddbeca878..94a7abd5d499 100644
--- a/drivers/gpu/drm/rcar-du/Kconfig
+++ b/drivers/gpu/drm/rcar-du/Kconfig
@@ -74,3 +74,8 @@ config DRM_RCAR_WRITEBACK
bool
default y if ARM64
depends on DRM_RCAR_DU
+
+config DRM_RCAR_LIB
+ bool
+ default y
+ depends on DRM_RCAR_DU
diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile
index b8f2c82651d9..479c8eebba5a 100644
--- a/drivers/gpu/drm/rcar-du/Makefile
+++ b/drivers/gpu/drm/rcar-du/Makefile
@@ -6,6 +6,8 @@ rcar-du-drm-y := rcar_du_crtc.o \
rcar_du_kms.o \
rcar_du_plane.o \
+rcar-du-drm-$(CONFIG_DRM_RCAR_LIB) += rcar_du_encoder_lib.o
+
rcar-du-drm-$(CONFIG_DRM_RCAR_VSP) += rcar_du_vsp.o
rcar-du-drm-$(CONFIG_DRM_RCAR_WRITEBACK) += rcar_du_writeback.o
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
index b1787be31e92..444cc956f692 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
@@ -2,7 +2,7 @@
/*
* R-Car Display Unit Encoder
*
- * Copyright (C) 2013-2014 Renesas Electronics Corporation
+ * Copyright (C) 2013-2022 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*/
@@ -10,128 +10,17 @@
#include <linux/export.h>
#include <linux/of.h>
-#include <drm/drm_bridge.h>
-#include <drm/drm_bridge_connector.h>
-#include <drm/drm_panel.h>
-
#include "rcar_du_drv.h"
#include "rcar_du_encoder.h"
-#include "rcar_lvds.h"
/* -----------------------------------------------------------------------------
* Encoder
*/
-static unsigned int rcar_du_encoder_count_ports(struct device_node *node)
-{
- struct device_node *ports;
- struct device_node *port;
- unsigned int num_ports = 0;
-
- ports = of_get_child_by_name(node, "ports");
- if (!ports)
- ports = of_node_get(node);
-
- for_each_child_of_node(ports, port) {
- if (of_node_name_eq(port, "port"))
- num_ports++;
- }
-
- of_node_put(ports);
-
- return num_ports;
-}
-
-static const struct drm_encoder_funcs rcar_du_encoder_funcs = {
-};
-
int rcar_du_encoder_init(struct rcar_du_device *rcdu,
enum rcar_du_output output,
struct device_node *enc_node)
{
- struct rcar_du_encoder *renc;
- struct drm_connector *connector;
- struct drm_bridge *bridge;
- int ret;
-
- /*
- * Locate the DRM bridge from the DT node. For the DPAD outputs, if the
- * DT node has a single port, assume that it describes a panel and
- * create a panel bridge.
- */
- if ((output == RCAR_DU_OUTPUT_DPAD0 ||
- output == RCAR_DU_OUTPUT_DPAD1) &&
- rcar_du_encoder_count_ports(enc_node) == 1) {
- struct drm_panel *panel = of_drm_find_panel(enc_node);
-
- if (IS_ERR(panel))
- return PTR_ERR(panel);
-
- bridge = devm_drm_panel_bridge_add_typed(rcdu->dev, panel,
- DRM_MODE_CONNECTOR_DPI);
- if (IS_ERR(bridge))
- return PTR_ERR(bridge);
- } else {
- bridge = of_drm_find_bridge(enc_node);
- if (!bridge)
- return -EPROBE_DEFER;
-
- if (output == RCAR_DU_OUTPUT_LVDS0 ||
- output == RCAR_DU_OUTPUT_LVDS1)
- rcdu->lvds[output - RCAR_DU_OUTPUT_LVDS0] = bridge;
-
- if (output == RCAR_DU_OUTPUT_DSI0 ||
- output == RCAR_DU_OUTPUT_DSI1)
- rcdu->dsi[output - RCAR_DU_OUTPUT_DSI0] = bridge;
- }
-
- /*
- * Create and initialize the encoder. On Gen3, skip the LVDS1 output if
- * the LVDS1 encoder is used as a companion for LVDS0 in dual-link
- * mode, or any LVDS output if it isn't connected. The latter may happen
- * on D3 or E3 as the LVDS encoders are needed to provide the pixel
- * clock to the DU, even when the LVDS outputs are not used.
- */
- if (rcdu->info->gen >= 3) {
- if (output == RCAR_DU_OUTPUT_LVDS1 &&
- rcar_lvds_dual_link(bridge))
- return -ENOLINK;
-
- if ((output == RCAR_DU_OUTPUT_LVDS0 ||
- output == RCAR_DU_OUTPUT_LVDS1) &&
- !rcar_lvds_is_connected(bridge))
- return -ENOLINK;
- }
-
- dev_dbg(rcdu->dev, "initializing encoder %pOF for output %s\n",
- enc_node, rcar_du_output_name(output));
-
- renc = drmm_encoder_alloc(&rcdu->ddev, struct rcar_du_encoder, base,
- &rcar_du_encoder_funcs, DRM_MODE_ENCODER_NONE,
- NULL);
- if (!renc)
- return -ENOMEM;
-
- renc->output = output;
-
- /* Attach the bridge to the encoder. */
- ret = drm_bridge_attach(&renc->base, bridge, NULL,
- DRM_BRIDGE_ATTACH_NO_CONNECTOR);
- if (ret) {
- dev_err(rcdu->dev,
- "failed to attach bridge %pOF for output %s (%d)\n",
- bridge->of_node, rcar_du_output_name(output), ret);
- return ret;
- }
-
- /* Create the connector for the chain of bridges. */
- connector = drm_bridge_connector_init(&rcdu->ddev, &renc->base);
- if (IS_ERR(connector)) {
- dev_err(rcdu->dev,
- "failed to created connector for output %s (%ld)\n",
- rcar_du_output_name(output), PTR_ERR(connector));
- return PTR_ERR(connector);
- }
-
- return drm_connector_attach_encoder(connector, &renc->base);
+ return rcar_du_lib_encoder_init(rcdu, output, enc_node,
+ rcar_du_output_name(output));
}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
index e5ec8fbb3979..d33b684fe93f 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
@@ -2,7 +2,7 @@
/*
* R-Car Display Unit Encoder
*
- * Copyright (C) 2013-2014 Renesas Electronics Corporation
+ * Copyright (C) 2013-2022 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*/
@@ -10,17 +10,7 @@
#ifndef __RCAR_DU_ENCODER_H__
#define __RCAR_DU_ENCODER_H__
-#include <drm/drm_encoder.h>
-
-struct rcar_du_device;
-
-struct rcar_du_encoder {
- struct drm_encoder base;
- enum rcar_du_output output;
-};
-
-#define to_rcar_encoder(e) \
- container_of(e, struct rcar_du_encoder, base)
+#include "rcar_du_encoder_lib.h"
int rcar_du_encoder_init(struct rcar_du_device *rcdu,
enum rcar_du_output output,
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.c
new file mode 100644
index 000000000000..534d357cfbe2
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.c
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * R-Car Display Unit Encoder Lib
+ *
+ * Copyright (C) 2013-2022 Renesas Electronics Corporation
+ *
+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
+ */
+
+#include <linux/export.h>
+#include <linux/of.h>
+
+#include <drm/drm_bridge.h>
+#include <drm/drm_bridge_connector.h>
+#include <drm/drm_panel.h>
+
+#include "rcar_du_drv.h"
+#include "rcar_du_encoder.h"
+#include "rcar_lvds.h"
+
+/* -----------------------------------------------------------------------------
+ * Encoder
+ */
+
+static unsigned int rcar_du_encoder_count_ports(struct device_node *node)
+{
+ struct device_node *ports;
+ struct device_node *port;
+ unsigned int num_ports = 0;
+
+ ports = of_get_child_by_name(node, "ports");
+ if (!ports)
+ ports = of_node_get(node);
+
+ for_each_child_of_node(ports, port) {
+ if (of_node_name_eq(port, "port"))
+ num_ports++;
+ }
+
+ of_node_put(ports);
+
+ return num_ports;
+}
+
+static const struct drm_encoder_funcs rcar_du_encoder_funcs = {
+};
+
+int rcar_du_lib_encoder_init(struct rcar_du_device *rcdu,
+ enum rcar_du_output output,
+ struct device_node *enc_node,
+ const char *output_name)
+{
+ struct rcar_du_encoder *renc;
+ struct drm_connector *connector;
+ struct drm_bridge *bridge;
+ int ret;
+
+ /*
+ * Locate the DRM bridge from the DT node. For the DPAD outputs, if the
+ * DT node has a single port, assume that it describes a panel and
+ * create a panel bridge.
+ */
+ if ((output == RCAR_DU_OUTPUT_DPAD0 ||
+ output == RCAR_DU_OUTPUT_DPAD1) &&
+ rcar_du_encoder_count_ports(enc_node) == 1) {
+ struct drm_panel *panel = of_drm_find_panel(enc_node);
+
+ if (IS_ERR(panel))
+ return PTR_ERR(panel);
+
+ bridge = devm_drm_panel_bridge_add_typed(rcdu->dev, panel,
+ DRM_MODE_CONNECTOR_DPI);
+ if (IS_ERR(bridge))
+ return PTR_ERR(bridge);
+ } else {
+ bridge = of_drm_find_bridge(enc_node);
+ if (!bridge)
+ return -EPROBE_DEFER;
+
+ if (output == RCAR_DU_OUTPUT_LVDS0 ||
+ output == RCAR_DU_OUTPUT_LVDS1)
+ rcdu->lvds[output - RCAR_DU_OUTPUT_LVDS0] = bridge;
+
+ if (output == RCAR_DU_OUTPUT_DSI0 ||
+ output == RCAR_DU_OUTPUT_DSI1)
+ rcdu->dsi[output - RCAR_DU_OUTPUT_DSI0] = bridge;
+ }
+
+ /*
+ * Create and initialize the encoder. On Gen3, skip the LVDS1 output if
+ * the LVDS1 encoder is used as a companion for LVDS0 in dual-link
+ * mode, or any LVDS output if it isn't connected. The latter may happen
+ * on D3 or E3 as the LVDS encoders are needed to provide the pixel
+ * clock to the DU, even when the LVDS outputs are not used.
+ */
+ if (rcdu->info->gen >= 3) {
+ if (output == RCAR_DU_OUTPUT_LVDS1 &&
+ rcar_lvds_dual_link(bridge))
+ return -ENOLINK;
+
+ if ((output == RCAR_DU_OUTPUT_LVDS0 ||
+ output == RCAR_DU_OUTPUT_LVDS1) &&
+ !rcar_lvds_is_connected(bridge))
+ return -ENOLINK;
+ }
+
+ dev_dbg(rcdu->dev, "initializing encoder %pOF for output %s\n",
+ enc_node, rcar_du_output_name(output));
+
+ renc = drmm_encoder_alloc(&rcdu->ddev, struct rcar_du_encoder, base,
+ &rcar_du_encoder_funcs, DRM_MODE_ENCODER_NONE,
+ NULL);
+ if (!renc)
+ return -ENOMEM;
+
+ renc->output = output;
+
+ /* Attach the bridge to the encoder. */
+ ret = drm_bridge_attach(&renc->base, bridge, NULL,
+ DRM_BRIDGE_ATTACH_NO_CONNECTOR);
+ if (ret) {
+ dev_err(rcdu->dev,
+ "failed to attach bridge %pOF for output %s (%d)\n",
+ bridge->of_node, output_name, ret);
+ return ret;
+ }
+
+ /* Create the connector for the chain of bridges. */
+ connector = drm_bridge_connector_init(&rcdu->ddev, &renc->base);
+ if (IS_ERR(connector)) {
+ dev_err(rcdu->dev,
+ "failed to created connector for output %s (%ld)\n",
+ output_name, PTR_ERR(connector));
+ return PTR_ERR(connector);
+ }
+
+ return drm_connector_attach_encoder(connector, &renc->base);
+}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.h
new file mode 100644
index 000000000000..29fcc7cc12db
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.h
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * R-Car Display Unit Encoder Lib
+ *
+ * Copyright (C) 2013-2022 Renesas Electronics Corporation
+ *
+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
+ */
+
+#ifndef __RCAR_DU_ENCODER_LIB_H__
+#define __RCAR_DU_ENCODER_LIB_H__
+
+#include <drm/drm_encoder.h>
+
+struct rcar_du_device;
+
+struct rcar_du_encoder {
+ struct drm_encoder base;
+ enum rcar_du_output output;
+};
+
+#define to_rcar_encoder(e) \
+ container_of(e, struct rcar_du_encoder, base)
+
+int rcar_du_lib_encoder_init(struct rcar_du_device *rcdu,
+ enum rcar_du_output output,
+ struct device_node *enc_node,
+ const char *output_name);
+
+#endif /* __RCAR_DU_ENCODER_LIB_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 02/19] drm: rcar-du: Add kms lib support
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
2022-11-23 17:28 ` [PATCH v6 01/19] drm: rcar-du: Add encoder lib support Biju Das
@ 2022-11-23 17:28 ` Biju Das
2022-11-23 17:28 ` [PATCH v6 03/19] drm: rcar-du: Add vsp " Biju Das
` (18 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:28 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
Add RCar DU kms lib support by moving rcar_du_format_infos table and
rcar_du_format_infos() to the lib file to share the common code between
RCar and RZ/G2L DU KMS drivers.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v6:
* Rebased on drm-misc-next and DU-next.
v1->v2:
* Rebased on drm-misc-next and DU-next.
---
drivers/gpu/drm/rcar-du/Makefile | 3 +-
drivers/gpu/drm/rcar-du/rcar_du_kms.c | 290 --------------------
drivers/gpu/drm/rcar-du/rcar_du_kms.h | 16 +-
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 305 ++++++++++++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 27 ++
5 files changed, 336 insertions(+), 305 deletions(-)
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile
index 479c8eebba5a..3ce410300334 100644
--- a/drivers/gpu/drm/rcar-du/Makefile
+++ b/drivers/gpu/drm/rcar-du/Makefile
@@ -6,7 +6,8 @@ rcar-du-drm-y := rcar_du_crtc.o \
rcar_du_kms.o \
rcar_du_plane.o \
-rcar-du-drm-$(CONFIG_DRM_RCAR_LIB) += rcar_du_encoder_lib.o
+rcar-du-drm-$(CONFIG_DRM_RCAR_LIB) += rcar_du_encoder_lib.o \
+ rcar_du_kms_lib.o
rcar-du-drm-$(CONFIG_DRM_RCAR_VSP) += rcar_du_vsp.o
rcar-du-drm-$(CONFIG_DRM_RCAR_WRITEBACK) += rcar_du_writeback.o
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
index 8c2719efda2a..3141d447e979 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -32,296 +32,6 @@
#include "rcar_du_vsp.h"
#include "rcar_du_writeback.h"
-/* -----------------------------------------------------------------------------
- * Format helpers
- */
-
-static const struct rcar_du_format_info rcar_du_format_infos[] = {
- {
- .fourcc = DRM_FORMAT_RGB565,
- .v4l2 = V4L2_PIX_FMT_RGB565,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
- .edf = PnDDCR4_EDF_NONE,
- }, {
- .fourcc = DRM_FORMAT_ARGB1555,
- .v4l2 = V4L2_PIX_FMT_ARGB555,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
- .edf = PnDDCR4_EDF_NONE,
- }, {
- .fourcc = DRM_FORMAT_XRGB1555,
- .v4l2 = V4L2_PIX_FMT_XRGB555,
- .bpp = 16,
- .planes = 1,
- .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
- .edf = PnDDCR4_EDF_NONE,
- }, {
- .fourcc = DRM_FORMAT_XRGB8888,
- .v4l2 = V4L2_PIX_FMT_XBGR32,
- .bpp = 32,
- .planes = 1,
- .hsub = 1,
- .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
- .edf = PnDDCR4_EDF_RGB888,
- }, {
- .fourcc = DRM_FORMAT_ARGB8888,
- .v4l2 = V4L2_PIX_FMT_ABGR32,
- .bpp = 32,
- .planes = 1,
- .hsub = 1,
- .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
- .edf = PnDDCR4_EDF_ARGB8888,
- }, {
- .fourcc = DRM_FORMAT_UYVY,
- .v4l2 = V4L2_PIX_FMT_UYVY,
- .bpp = 16,
- .planes = 1,
- .hsub = 2,
- .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
- .edf = PnDDCR4_EDF_NONE,
- }, {
- .fourcc = DRM_FORMAT_YUYV,
- .v4l2 = V4L2_PIX_FMT_YUYV,
- .bpp = 16,
- .planes = 1,
- .hsub = 2,
- .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
- .edf = PnDDCR4_EDF_NONE,
- }, {
- .fourcc = DRM_FORMAT_NV12,
- .v4l2 = V4L2_PIX_FMT_NV12M,
- .bpp = 12,
- .planes = 2,
- .hsub = 2,
- .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
- .edf = PnDDCR4_EDF_NONE,
- }, {
- .fourcc = DRM_FORMAT_NV21,
- .v4l2 = V4L2_PIX_FMT_NV21M,
- .bpp = 12,
- .planes = 2,
- .hsub = 2,
- .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
- .edf = PnDDCR4_EDF_NONE,
- }, {
- .fourcc = DRM_FORMAT_NV16,
- .v4l2 = V4L2_PIX_FMT_NV16M,
- .bpp = 16,
- .planes = 2,
- .hsub = 2,
- .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
- .edf = PnDDCR4_EDF_NONE,
- },
- /*
- * The following formats are not supported on Gen2 and thus have no
- * associated .pnmr or .edf settings.
- */
- {
- .fourcc = DRM_FORMAT_RGB332,
- .v4l2 = V4L2_PIX_FMT_RGB332,
- .bpp = 8,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_ARGB4444,
- .v4l2 = V4L2_PIX_FMT_ARGB444,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_XRGB4444,
- .v4l2 = V4L2_PIX_FMT_XRGB444,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_RGBA4444,
- .v4l2 = V4L2_PIX_FMT_RGBA444,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_RGBX4444,
- .v4l2 = V4L2_PIX_FMT_RGBX444,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_ABGR4444,
- .v4l2 = V4L2_PIX_FMT_ABGR444,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_XBGR4444,
- .v4l2 = V4L2_PIX_FMT_XBGR444,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_BGRA4444,
- .v4l2 = V4L2_PIX_FMT_BGRA444,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_BGRX4444,
- .v4l2 = V4L2_PIX_FMT_BGRX444,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_RGBA5551,
- .v4l2 = V4L2_PIX_FMT_RGBA555,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_RGBX5551,
- .v4l2 = V4L2_PIX_FMT_RGBX555,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_ABGR1555,
- .v4l2 = V4L2_PIX_FMT_ABGR555,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_XBGR1555,
- .v4l2 = V4L2_PIX_FMT_XBGR555,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_BGRA5551,
- .v4l2 = V4L2_PIX_FMT_BGRA555,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_BGRX5551,
- .v4l2 = V4L2_PIX_FMT_BGRX555,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_BGR888,
- .v4l2 = V4L2_PIX_FMT_RGB24,
- .bpp = 24,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_RGB888,
- .v4l2 = V4L2_PIX_FMT_BGR24,
- .bpp = 24,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_RGBA8888,
- .v4l2 = V4L2_PIX_FMT_BGRA32,
- .bpp = 32,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_RGBX8888,
- .v4l2 = V4L2_PIX_FMT_BGRX32,
- .bpp = 32,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_ABGR8888,
- .v4l2 = V4L2_PIX_FMT_RGBA32,
- .bpp = 32,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_XBGR8888,
- .v4l2 = V4L2_PIX_FMT_RGBX32,
- .bpp = 32,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_BGRA8888,
- .v4l2 = V4L2_PIX_FMT_ARGB32,
- .bpp = 32,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_BGRX8888,
- .v4l2 = V4L2_PIX_FMT_XRGB32,
- .bpp = 32,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_YVYU,
- .v4l2 = V4L2_PIX_FMT_YVYU,
- .bpp = 16,
- .planes = 1,
- .hsub = 2,
- }, {
- .fourcc = DRM_FORMAT_NV61,
- .v4l2 = V4L2_PIX_FMT_NV61M,
- .bpp = 16,
- .planes = 2,
- .hsub = 2,
- }, {
- .fourcc = DRM_FORMAT_YUV420,
- .v4l2 = V4L2_PIX_FMT_YUV420M,
- .bpp = 12,
- .planes = 3,
- .hsub = 2,
- }, {
- .fourcc = DRM_FORMAT_YVU420,
- .v4l2 = V4L2_PIX_FMT_YVU420M,
- .bpp = 12,
- .planes = 3,
- .hsub = 2,
- }, {
- .fourcc = DRM_FORMAT_YUV422,
- .v4l2 = V4L2_PIX_FMT_YUV422M,
- .bpp = 16,
- .planes = 3,
- .hsub = 2,
- }, {
- .fourcc = DRM_FORMAT_YVU422,
- .v4l2 = V4L2_PIX_FMT_YVU422M,
- .bpp = 16,
- .planes = 3,
- .hsub = 2,
- }, {
- .fourcc = DRM_FORMAT_YUV444,
- .v4l2 = V4L2_PIX_FMT_YUV444M,
- .bpp = 24,
- .planes = 3,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_YVU444,
- .v4l2 = V4L2_PIX_FMT_YVU444M,
- .bpp = 24,
- .planes = 3,
- .hsub = 1,
- },
-};
-
-const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
-{
- unsigned int i;
-
- for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) {
- if (rcar_du_format_infos[i].fourcc == fourcc)
- return &rcar_du_format_infos[i];
- }
-
- return NULL;
-}
-
/* -----------------------------------------------------------------------------
* Frame buffer
*/
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.h b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
index f31afeeee05a..2d4b8e608989 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
@@ -2,7 +2,7 @@
/*
* R-Car Display Unit Mode Setting
*
- * Copyright (C) 2013-2014 Renesas Electronics Corporation
+ * Copyright (C) 2013-2022 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*/
@@ -10,7 +10,7 @@
#ifndef __RCAR_DU_KMS_H__
#define __RCAR_DU_KMS_H__
-#include <linux/types.h>
+#include "rcar_du_kms_lib.h"
struct dma_buf_attachment;
struct drm_file;
@@ -20,18 +20,6 @@ struct drm_mode_create_dumb;
struct rcar_du_device;
struct sg_table;
-struct rcar_du_format_info {
- u32 fourcc;
- u32 v4l2;
- unsigned int bpp;
- unsigned int planes;
- unsigned int hsub;
- unsigned int pnmr;
- unsigned int edf;
-};
-
-const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc);
-
int rcar_du_modeset_init(struct rcar_du_device *rcdu);
int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
new file mode 100644
index 000000000000..97c526dae521
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
@@ -0,0 +1,305 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * R-Car Display Unit Mode Setting Lib
+ *
+ * Copyright (C) 2013-2022 Renesas Electronics Corporation
+ *
+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
+ */
+
+#include <drm/drm_framebuffer.h>
+
+#include <linux/videodev2.h>
+
+#include "rcar_du_kms.h"
+#include "rcar_du_regs.h"
+
+/* -----------------------------------------------------------------------------
+ * Format helpers
+ */
+
+static const struct rcar_du_format_info rcar_du_format_infos[] = {
+ {
+ .fourcc = DRM_FORMAT_RGB565,
+ .v4l2 = V4L2_PIX_FMT_RGB565,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 1,
+ .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
+ .edf = PnDDCR4_EDF_NONE,
+ }, {
+ .fourcc = DRM_FORMAT_ARGB1555,
+ .v4l2 = V4L2_PIX_FMT_ARGB555,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 1,
+ .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
+ .edf = PnDDCR4_EDF_NONE,
+ }, {
+ .fourcc = DRM_FORMAT_XRGB1555,
+ .v4l2 = V4L2_PIX_FMT_XRGB555,
+ .bpp = 16,
+ .planes = 1,
+ .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
+ .edf = PnDDCR4_EDF_NONE,
+ }, {
+ .fourcc = DRM_FORMAT_XRGB8888,
+ .v4l2 = V4L2_PIX_FMT_XBGR32,
+ .bpp = 32,
+ .planes = 1,
+ .hsub = 1,
+ .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
+ .edf = PnDDCR4_EDF_RGB888,
+ }, {
+ .fourcc = DRM_FORMAT_ARGB8888,
+ .v4l2 = V4L2_PIX_FMT_ABGR32,
+ .bpp = 32,
+ .planes = 1,
+ .hsub = 1,
+ .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
+ .edf = PnDDCR4_EDF_ARGB8888,
+ }, {
+ .fourcc = DRM_FORMAT_UYVY,
+ .v4l2 = V4L2_PIX_FMT_UYVY,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 2,
+ .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
+ .edf = PnDDCR4_EDF_NONE,
+ }, {
+ .fourcc = DRM_FORMAT_YUYV,
+ .v4l2 = V4L2_PIX_FMT_YUYV,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 2,
+ .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
+ .edf = PnDDCR4_EDF_NONE,
+ }, {
+ .fourcc = DRM_FORMAT_NV12,
+ .v4l2 = V4L2_PIX_FMT_NV12M,
+ .bpp = 12,
+ .planes = 2,
+ .hsub = 2,
+ .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
+ .edf = PnDDCR4_EDF_NONE,
+ }, {
+ .fourcc = DRM_FORMAT_NV21,
+ .v4l2 = V4L2_PIX_FMT_NV21M,
+ .bpp = 12,
+ .planes = 2,
+ .hsub = 2,
+ .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
+ .edf = PnDDCR4_EDF_NONE,
+ }, {
+ .fourcc = DRM_FORMAT_NV16,
+ .v4l2 = V4L2_PIX_FMT_NV16M,
+ .bpp = 16,
+ .planes = 2,
+ .hsub = 2,
+ .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
+ .edf = PnDDCR4_EDF_NONE,
+ },
+ /*
+ * The following formats are not supported on Gen2 and thus have no
+ * associated .pnmr or .edf settings.
+ */
+ {
+ .fourcc = DRM_FORMAT_RGB332,
+ .v4l2 = V4L2_PIX_FMT_RGB332,
+ .bpp = 8,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_ARGB4444,
+ .v4l2 = V4L2_PIX_FMT_ARGB444,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_XRGB4444,
+ .v4l2 = V4L2_PIX_FMT_XRGB444,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_RGBA4444,
+ .v4l2 = V4L2_PIX_FMT_RGBA444,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_RGBX4444,
+ .v4l2 = V4L2_PIX_FMT_RGBX444,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_ABGR4444,
+ .v4l2 = V4L2_PIX_FMT_ABGR444,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_XBGR4444,
+ .v4l2 = V4L2_PIX_FMT_XBGR444,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_BGRA4444,
+ .v4l2 = V4L2_PIX_FMT_BGRA444,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_BGRX4444,
+ .v4l2 = V4L2_PIX_FMT_BGRX444,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_RGBA5551,
+ .v4l2 = V4L2_PIX_FMT_RGBA555,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_RGBX5551,
+ .v4l2 = V4L2_PIX_FMT_RGBX555,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_ABGR1555,
+ .v4l2 = V4L2_PIX_FMT_ABGR555,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_XBGR1555,
+ .v4l2 = V4L2_PIX_FMT_XBGR555,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_BGRA5551,
+ .v4l2 = V4L2_PIX_FMT_BGRA555,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_BGRX5551,
+ .v4l2 = V4L2_PIX_FMT_BGRX555,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_BGR888,
+ .v4l2 = V4L2_PIX_FMT_RGB24,
+ .bpp = 24,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_RGB888,
+ .v4l2 = V4L2_PIX_FMT_BGR24,
+ .bpp = 24,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_RGBA8888,
+ .v4l2 = V4L2_PIX_FMT_BGRA32,
+ .bpp = 32,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_RGBX8888,
+ .v4l2 = V4L2_PIX_FMT_BGRX32,
+ .bpp = 32,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_ABGR8888,
+ .v4l2 = V4L2_PIX_FMT_RGBA32,
+ .bpp = 32,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_XBGR8888,
+ .v4l2 = V4L2_PIX_FMT_RGBX32,
+ .bpp = 32,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_BGRA8888,
+ .v4l2 = V4L2_PIX_FMT_ARGB32,
+ .bpp = 32,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_BGRX8888,
+ .v4l2 = V4L2_PIX_FMT_XRGB32,
+ .bpp = 32,
+ .planes = 1,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_YVYU,
+ .v4l2 = V4L2_PIX_FMT_YVYU,
+ .bpp = 16,
+ .planes = 1,
+ .hsub = 2,
+ }, {
+ .fourcc = DRM_FORMAT_NV61,
+ .v4l2 = V4L2_PIX_FMT_NV61M,
+ .bpp = 16,
+ .planes = 2,
+ .hsub = 2,
+ }, {
+ .fourcc = DRM_FORMAT_YUV420,
+ .v4l2 = V4L2_PIX_FMT_YUV420M,
+ .bpp = 12,
+ .planes = 3,
+ .hsub = 2,
+ }, {
+ .fourcc = DRM_FORMAT_YVU420,
+ .v4l2 = V4L2_PIX_FMT_YVU420M,
+ .bpp = 12,
+ .planes = 3,
+ .hsub = 2,
+ }, {
+ .fourcc = DRM_FORMAT_YUV422,
+ .v4l2 = V4L2_PIX_FMT_YUV422M,
+ .bpp = 16,
+ .planes = 3,
+ .hsub = 2,
+ }, {
+ .fourcc = DRM_FORMAT_YVU422,
+ .v4l2 = V4L2_PIX_FMT_YVU422M,
+ .bpp = 16,
+ .planes = 3,
+ .hsub = 2,
+ }, {
+ .fourcc = DRM_FORMAT_YUV444,
+ .v4l2 = V4L2_PIX_FMT_YUV444M,
+ .bpp = 24,
+ .planes = 3,
+ .hsub = 1,
+ }, {
+ .fourcc = DRM_FORMAT_YVU444,
+ .v4l2 = V4L2_PIX_FMT_YVU444M,
+ .bpp = 24,
+ .planes = 3,
+ .hsub = 1,
+ },
+};
+
+const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
+{
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) {
+ if (rcar_du_format_infos[i].fourcc == fourcc)
+ return &rcar_du_format_infos[i];
+ }
+
+ return NULL;
+}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
new file mode 100644
index 000000000000..674a38d24917
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * R-Car Display Unit Mode Setting Lib
+ *
+ * Copyright (C) 2013-2022 Renesas Electronics Corporation
+ *
+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
+ */
+
+#ifndef __RCAR_DU_KMS_LIB_H__
+#define __RCAR_DU_KMS_LIB_H__
+
+#include <linux/types.h>
+
+struct rcar_du_format_info {
+ u32 fourcc;
+ u32 v4l2;
+ unsigned int bpp;
+ unsigned int planes;
+ unsigned int hsub;
+ unsigned int pnmr;
+ unsigned int edf;
+};
+
+const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc);
+
+#endif /* __RCAR_DU_KMS_LIB_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 03/19] drm: rcar-du: Add vsp lib support
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
2022-11-23 17:28 ` [PATCH v6 01/19] drm: rcar-du: Add encoder lib support Biju Das
2022-11-23 17:28 ` [PATCH v6 02/19] drm: rcar-du: Add kms " Biju Das
@ 2022-11-23 17:28 ` Biju Das
2022-11-23 17:28 ` [PATCH v6 04/19] drm: rcar-du: Move rcar_du_vsp_atomic_begin() Biju Das
` (17 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:28 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
Add RCar DU vsp lib support by moving rcar_du_vsp_disable()
to the lib file so that same function can be used by both
RCar and RZ/G2L DU VSP drivers.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v6:
* Rebased on drm-misc-next and DU-next.
v1->v2:
* Rebased on drm-misc-next and DU-next.
---
drivers/gpu/drm/rcar-du/Kconfig | 5 +++++
drivers/gpu/drm/rcar-du/Makefile | 1 +
drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 5 -----
drivers/gpu/drm/rcar-du/rcar_du_vsp.h | 4 ++--
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 17 +++++++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 19 +++++++++++++++++++
6 files changed, 44 insertions(+), 7 deletions(-)
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
diff --git a/drivers/gpu/drm/rcar-du/Kconfig b/drivers/gpu/drm/rcar-du/Kconfig
index 94a7abd5d499..12fb2bb873dc 100644
--- a/drivers/gpu/drm/rcar-du/Kconfig
+++ b/drivers/gpu/drm/rcar-du/Kconfig
@@ -79,3 +79,8 @@ config DRM_RCAR_LIB
bool
default y
depends on DRM_RCAR_DU
+
+config DRM_RCAR_VSP_LIB
+ bool
+ default y
+ depends on DRM_RCAR_VSP
diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile
index 3ce410300334..8fc924cf37a7 100644
--- a/drivers/gpu/drm/rcar-du/Makefile
+++ b/drivers/gpu/drm/rcar-du/Makefile
@@ -10,6 +10,7 @@ rcar-du-drm-$(CONFIG_DRM_RCAR_LIB) += rcar_du_encoder_lib.o \
rcar_du_kms_lib.o
rcar-du-drm-$(CONFIG_DRM_RCAR_VSP) += rcar_du_vsp.o
+rcar-du-drm-$(CONFIG_DRM_RCAR_VSP_LIB) += rcar_du_vsp_lib.o
rcar-du-drm-$(CONFIG_DRM_RCAR_WRITEBACK) += rcar_du_writeback.o
obj-$(CONFIG_DRM_RCAR_CMM) += rcar_cmm.o
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index e465aef41585..bed3f2a3c4a5 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -88,11 +88,6 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc)
vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
}
-void rcar_du_vsp_disable(struct rcar_du_crtc *crtc)
-{
- vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, NULL);
-}
-
void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc)
{
vsp1_du_atomic_begin(crtc->vsp->vsp, crtc->vsp_pipe);
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
index 67630f0b6599..8fbfa86c93e0 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
@@ -12,6 +12,8 @@
#include <drm/drm_plane.h>
+#include "rcar_du_vsp_lib.h"
+
struct drm_framebuffer;
struct rcar_du_format_info;
struct rcar_du_vsp;
@@ -59,7 +61,6 @@ to_rcar_vsp_plane_state(struct drm_plane_state *state)
int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
unsigned int crtcs);
void rcar_du_vsp_enable(struct rcar_du_crtc *crtc);
-void rcar_du_vsp_disable(struct rcar_du_crtc *crtc);
void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc);
void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc);
int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
@@ -74,7 +75,6 @@ static inline int rcar_du_vsp_init(struct rcar_du_vsp *vsp,
return -ENXIO;
}
static inline void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) { };
-static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { };
static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { };
static inline void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc) { };
static inline int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp,
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
new file mode 100644
index 000000000000..e22d4e535268
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * R-Car Display Unit VSP-Based Compositor Lib
+ *
+ * Copyright (C) 2015-2022 Renesas Electronics Corporation
+ *
+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
+ */
+
+#include <media/vsp1.h>
+
+#include "rcar_du_drv.h"
+
+void rcar_du_vsp_disable(struct rcar_du_crtc *crtc)
+{
+ vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, NULL);
+}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
new file mode 100644
index 000000000000..d91c043bbced
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * R-Car Display Unit VSP-Based Compositor Lib
+ *
+ * Copyright (C) 2015-2022 Renesas Electronics Corporation
+ *
+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
+ */
+
+#ifndef __RCAR_DU_VSP_LIB_H__
+#define __RCAR_DU_VSP_LIB_H__
+
+#ifdef CONFIG_DRM_RCAR_VSP
+void rcar_du_vsp_disable(struct rcar_du_crtc *crtc);
+#else
+static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { };
+#endif
+
+#endif /* __RCAR_DU_VSP_LIB_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 04/19] drm: rcar-du: Move rcar_du_vsp_atomic_begin()
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (2 preceding siblings ...)
2022-11-23 17:28 ` [PATCH v6 03/19] drm: rcar-du: Add vsp " Biju Das
@ 2022-11-23 17:28 ` Biju Das
2022-11-23 17:28 ` [PATCH v6 05/19] drm: rcar-du: Move rcar_du_vsp_atomic_flush() Biju Das
` (16 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:28 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
Move rcar_du_vsp_atomic_begin() to RCar DU VSP lib.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v6:
* Rebased on drm-misc-next and DU-next.
v1->v2:
* Rebased on drm-misc-next and DU-next.
---
drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 5 -----
drivers/gpu/drm/rcar-du/rcar_du_vsp.h | 2 --
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 5 +++++
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 2 ++
4 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index bed3f2a3c4a5..685e3e8f6ddb 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -88,11 +88,6 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc)
vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
}
-void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc)
-{
- vsp1_du_atomic_begin(crtc->vsp->vsp, crtc->vsp_pipe);
-}
-
void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc)
{
struct vsp1_du_atomic_pipe_config cfg = { { 0, } };
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
index 8fbfa86c93e0..83a2f3e85860 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
@@ -61,7 +61,6 @@ to_rcar_vsp_plane_state(struct drm_plane_state *state)
int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
unsigned int crtcs);
void rcar_du_vsp_enable(struct rcar_du_crtc *crtc);
-void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc);
void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc);
int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
struct sg_table sg_tables[3]);
@@ -75,7 +74,6 @@ static inline int rcar_du_vsp_init(struct rcar_du_vsp *vsp,
return -ENXIO;
}
static inline void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) { };
-static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { };
static inline void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc) { };
static inline int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp,
struct drm_framebuffer *fb,
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
index e22d4e535268..f6c0cae7c4af 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
@@ -15,3 +15,8 @@ void rcar_du_vsp_disable(struct rcar_du_crtc *crtc)
{
vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, NULL);
}
+
+void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc)
+{
+ vsp1_du_atomic_begin(crtc->vsp->vsp, crtc->vsp_pipe);
+}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
index d91c043bbced..8c22042d4a80 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
@@ -12,8 +12,10 @@
#ifdef CONFIG_DRM_RCAR_VSP
void rcar_du_vsp_disable(struct rcar_du_crtc *crtc);
+void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc);
#else
static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { };
+static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { };
#endif
#endif /* __RCAR_DU_VSP_LIB_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 05/19] drm: rcar-du: Move rcar_du_vsp_atomic_flush()
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (3 preceding siblings ...)
2022-11-23 17:28 ` [PATCH v6 04/19] drm: rcar-du: Move rcar_du_vsp_atomic_begin() Biju Das
@ 2022-11-23 17:28 ` Biju Das
2022-11-23 17:28 ` [PATCH v6 06/19] drm: rcar-du: Move vsp rcar_du_vsp_{map,unmap}_fb() Biju Das
` (15 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:28 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
Move rcar_du_vsp_atomic_flush() to RCar DU vsp lib.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v6:
* Rebased on drm-misc-next and DU-next.
v1->v2:
* Rebased on drm-misc-next and DU-next.
---
drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 13 -------------
drivers/gpu/drm/rcar-du/rcar_du_vsp.h | 2 --
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 14 ++++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 2 ++
4 files changed, 16 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index 685e3e8f6ddb..870b72eda4da 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -88,19 +88,6 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc)
vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
}
-void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc)
-{
- struct vsp1_du_atomic_pipe_config cfg = { { 0, } };
- struct rcar_du_crtc_state *state;
-
- state = to_rcar_crtc_state(crtc->crtc.state);
- cfg.crc = state->crc;
-
- rcar_du_writeback_setup(crtc, &cfg.writeback);
-
- vsp1_du_atomic_flush(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
-}
-
static const u32 rcar_du_vsp_formats[] = {
DRM_FORMAT_RGB332,
DRM_FORMAT_ARGB4444,
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
index 83a2f3e85860..b610e6b40304 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
@@ -61,7 +61,6 @@ to_rcar_vsp_plane_state(struct drm_plane_state *state)
int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
unsigned int crtcs);
void rcar_du_vsp_enable(struct rcar_du_crtc *crtc);
-void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc);
int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
struct sg_table sg_tables[3]);
void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
@@ -74,7 +73,6 @@ static inline int rcar_du_vsp_init(struct rcar_du_vsp *vsp,
return -ENXIO;
}
static inline void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) { };
-static inline void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc) { };
static inline int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp,
struct drm_framebuffer *fb,
struct sg_table sg_tables[3])
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
index f6c0cae7c4af..89169dc7594a 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
@@ -10,6 +10,7 @@
#include <media/vsp1.h>
#include "rcar_du_drv.h"
+#include "rcar_du_writeback.h"
void rcar_du_vsp_disable(struct rcar_du_crtc *crtc)
{
@@ -20,3 +21,16 @@ void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc)
{
vsp1_du_atomic_begin(crtc->vsp->vsp, crtc->vsp_pipe);
}
+
+void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc)
+{
+ struct vsp1_du_atomic_pipe_config cfg = { { 0, } };
+ struct rcar_du_crtc_state *state;
+
+ state = to_rcar_crtc_state(crtc->crtc.state);
+ cfg.crc = state->crc;
+
+ rcar_du_writeback_setup(crtc, &cfg.writeback);
+
+ vsp1_du_atomic_flush(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
+}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
index 8c22042d4a80..e8f16236be0a 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
@@ -13,9 +13,11 @@
#ifdef CONFIG_DRM_RCAR_VSP
void rcar_du_vsp_disable(struct rcar_du_crtc *crtc);
void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc);
+void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc);
#else
static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { };
static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { };
+static inline void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc) { };
#endif
#endif /* __RCAR_DU_VSP_LIB_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 06/19] drm: rcar-du: Move vsp rcar_du_vsp_{map,unmap}_fb()
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (4 preceding siblings ...)
2022-11-23 17:28 ` [PATCH v6 05/19] drm: rcar-du: Move rcar_du_vsp_atomic_flush() Biju Das
@ 2022-11-23 17:28 ` Biju Das
2022-11-23 17:28 ` [PATCH v6 07/19] drm: rcar-du: Move rcar_du_dumb_create() Biju Das
` (14 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:28 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
Move vsp rcar_du_vsp_{map,unmap}_fb() to RCar DU VSP lib.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v6:
* Fixed check patch warning in header file.
v1->v2:
* Rebased on drm-misc-next and DU-next.
---
drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 78 ---------------------
drivers/gpu/drm/rcar-du/rcar_du_vsp.h | 18 -----
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 84 +++++++++++++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 20 ++++++
4 files changed, 104 insertions(+), 96 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index 870b72eda4da..fabb616d8853 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -11,11 +11,8 @@
#include <drm/drm_atomic_helper.h>
#include <drm/drm_blend.h>
#include <drm/drm_crtc.h>
-#include <drm/drm_fb_dma_helper.h>
-#include <drm/drm_fourcc.h>
#include <drm/drm_framebuffer.h>
#include <drm/drm_gem_atomic_helper.h>
-#include <drm/drm_gem_dma_helper.h>
#include <drm/drm_managed.h>
#include <drm/drm_vblank.h>
@@ -171,68 +168,6 @@ static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)
plane->index, &cfg);
}
-int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
- struct sg_table sg_tables[3])
-{
- struct rcar_du_device *rcdu = vsp->dev;
- unsigned int i, j;
- int ret;
-
- for (i = 0; i < fb->format->num_planes; ++i) {
- struct drm_gem_dma_object *gem = drm_fb_dma_get_gem_obj(fb, i);
- struct sg_table *sgt = &sg_tables[i];
-
- if (gem->sgt) {
- struct scatterlist *src;
- struct scatterlist *dst;
-
- /*
- * If the GEM buffer has a scatter gather table, it has
- * been imported from a dma-buf and has no physical
- * address as it might not be physically contiguous.
- * Copy the original scatter gather table to map it to
- * the VSP.
- */
- ret = sg_alloc_table(sgt, gem->sgt->orig_nents,
- GFP_KERNEL);
- if (ret)
- goto fail;
-
- src = gem->sgt->sgl;
- dst = sgt->sgl;
- for (j = 0; j < gem->sgt->orig_nents; ++j) {
- sg_set_page(dst, sg_page(src), src->length,
- src->offset);
- src = sg_next(src);
- dst = sg_next(dst);
- }
- } else {
- ret = dma_get_sgtable(rcdu->dev, sgt, gem->vaddr,
- gem->dma_addr, gem->base.size);
- if (ret)
- goto fail;
- }
-
- ret = vsp1_du_map_sg(vsp->vsp, sgt);
- if (ret) {
- sg_free_table(sgt);
- goto fail;
- }
- }
-
- return 0;
-
-fail:
- while (i--) {
- struct sg_table *sgt = &sg_tables[i];
-
- vsp1_du_unmap_sg(vsp->vsp, sgt);
- sg_free_table(sgt);
- }
-
- return ret;
-}
-
static int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane,
struct drm_plane_state *state)
{
@@ -254,19 +189,6 @@ static int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane,
return drm_gem_plane_helper_prepare_fb(plane, state);
}
-void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
- struct sg_table sg_tables[3])
-{
- unsigned int i;
-
- for (i = 0; i < fb->format->num_planes; ++i) {
- struct sg_table *sgt = &sg_tables[i];
-
- vsp1_du_unmap_sg(vsp->vsp, sgt);
- sg_free_table(sgt);
- }
-}
-
static void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane,
struct drm_plane_state *state)
{
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
index b610e6b40304..4022ed014353 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
@@ -14,10 +14,7 @@
#include "rcar_du_vsp_lib.h"
-struct drm_framebuffer;
struct rcar_du_format_info;
-struct rcar_du_vsp;
-struct sg_table;
struct rcar_du_vsp_plane {
struct drm_plane plane;
@@ -61,10 +58,6 @@ to_rcar_vsp_plane_state(struct drm_plane_state *state)
int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
unsigned int crtcs);
void rcar_du_vsp_enable(struct rcar_du_crtc *crtc);
-int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
- struct sg_table sg_tables[3]);
-void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
- struct sg_table sg_tables[3]);
#else
static inline int rcar_du_vsp_init(struct rcar_du_vsp *vsp,
struct device_node *np,
@@ -73,17 +66,6 @@ static inline int rcar_du_vsp_init(struct rcar_du_vsp *vsp,
return -ENXIO;
}
static inline void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) { };
-static inline int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp,
- struct drm_framebuffer *fb,
- struct sg_table sg_tables[3])
-{
- return -ENXIO;
-}
-static inline void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp,
- struct drm_framebuffer *fb,
- struct sg_table sg_tables[3])
-{
-}
#endif
#endif /* __RCAR_DU_VSP_H__ */
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
index 89169dc7594a..d59dc250bbb3 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
@@ -7,6 +7,15 @@
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*/
+#include <drm/drm_fb_dma_helper.h>
+#include <drm/drm_fourcc.h>
+#include <drm/drm_framebuffer.h>
+#include <drm/drm_gem_atomic_helper.h>
+#include <drm/drm_gem_dma_helper.h>
+
+#include <linux/dma-mapping.h>
+#include <linux/scatterlist.h>
+
#include <media/vsp1.h>
#include "rcar_du_drv.h"
@@ -34,3 +43,78 @@ void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc)
vsp1_du_atomic_flush(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
}
+
+int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
+ struct sg_table sg_tables[3])
+{
+ struct rcar_du_device *rcdu = vsp->dev;
+ unsigned int i, j;
+ int ret;
+
+ for (i = 0; i < fb->format->num_planes; ++i) {
+ struct drm_gem_dma_object *gem = drm_fb_dma_get_gem_obj(fb, i);
+ struct sg_table *sgt = &sg_tables[i];
+
+ if (gem->sgt) {
+ struct scatterlist *src;
+ struct scatterlist *dst;
+
+ /*
+ * If the GEM buffer has a scatter gather table, it has
+ * been imported from a dma-buf and has no physical
+ * address as it might not be physically contiguous.
+ * Copy the original scatter gather table to map it to
+ * the VSP.
+ */
+ ret = sg_alloc_table(sgt, gem->sgt->orig_nents,
+ GFP_KERNEL);
+ if (ret)
+ goto fail;
+
+ src = gem->sgt->sgl;
+ dst = sgt->sgl;
+ for (j = 0; j < gem->sgt->orig_nents; ++j) {
+ sg_set_page(dst, sg_page(src), src->length,
+ src->offset);
+ src = sg_next(src);
+ dst = sg_next(dst);
+ }
+ } else {
+ ret = dma_get_sgtable(rcdu->dev, sgt, gem->vaddr,
+ gem->dma_addr, gem->base.size);
+ if (ret)
+ goto fail;
+ }
+
+ ret = vsp1_du_map_sg(vsp->vsp, sgt);
+ if (ret) {
+ sg_free_table(sgt);
+ goto fail;
+ }
+ }
+
+ return 0;
+
+fail:
+ while (i--) {
+ struct sg_table *sgt = &sg_tables[i];
+
+ vsp1_du_unmap_sg(vsp->vsp, sgt);
+ sg_free_table(sgt);
+ }
+
+ return ret;
+}
+
+void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
+ struct sg_table sg_tables[3])
+{
+ unsigned int i;
+
+ for (i = 0; i < fb->format->num_planes; ++i) {
+ struct sg_table *sgt = &sg_tables[i];
+
+ vsp1_du_unmap_sg(vsp->vsp, sgt);
+ sg_free_table(sgt);
+ }
+}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
index e8f16236be0a..bf13748c3ea8 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
@@ -10,14 +10,34 @@
#ifndef __RCAR_DU_VSP_LIB_H__
#define __RCAR_DU_VSP_LIB_H__
+struct drm_framebuffer;
+struct rcar_du_vsp;
+struct sg_table;
+
#ifdef CONFIG_DRM_RCAR_VSP
void rcar_du_vsp_disable(struct rcar_du_crtc *crtc);
void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc);
void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc);
+int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
+ struct sg_table sg_tables[3]);
+void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
+ struct sg_table sg_tables[3]);
#else
static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { };
static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { };
static inline void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc) { };
+static inline int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp,
+ struct drm_framebuffer *fb,
+ struct sg_table sg_tables[3])
+{
+ return -ENXIO;
+}
+
+static inline void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp,
+ struct drm_framebuffer *fb,
+ struct sg_table sg_tables[3])
+{
+}
#endif
#endif /* __RCAR_DU_VSP_LIB_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 07/19] drm: rcar-du: Move rcar_du_dumb_create()
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (5 preceding siblings ...)
2022-11-23 17:28 ` [PATCH v6 06/19] drm: rcar-du: Move vsp rcar_du_vsp_{map,unmap}_fb() Biju Das
@ 2022-11-23 17:28 ` Biju Das
2022-11-23 17:28 ` [PATCH v6 08/19] drm: rcar-du: Move rcar_du_gem_prime_import_sg_table() Biju Das
` (13 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:28 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
Move rcar_du_dumb_create() to RCar DU KMS lib.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v6:
* Rebased on drm-misc-next and DU-next.
v1->v2:
* Rebased on drm-misc-next and DU-next.
---
drivers/gpu/drm/rcar-du/rcar_du_kms.c | 21 -----------------
drivers/gpu/drm/rcar-du/rcar_du_kms.h | 5 ----
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 28 +++++++++++++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 7 ++++++
4 files changed, 35 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
index 3141d447e979..4b5511a20313 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -81,27 +81,6 @@ struct drm_gem_object *rcar_du_gem_prime_import_sg_table(struct drm_device *dev,
return gem_obj;
}
-int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
- struct drm_mode_create_dumb *args)
-{
- struct rcar_du_device *rcdu = to_rcar_du_device(dev);
- unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
- unsigned int align;
-
- /*
- * The R8A7779 DU requires a 16 pixels pitch alignment as documented,
- * but the R8A7790 DU seems to require a 128 bytes pitch alignment.
- */
- if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
- align = 128;
- else
- align = 16 * args->bpp / 8;
-
- args->pitch = roundup(min_pitch, align);
-
- return drm_gem_dma_dumb_create_internal(file, dev, args);
-}
-
static struct drm_framebuffer *
rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
const struct drm_mode_fb_cmd2 *mode_cmd)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.h b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
index 2d4b8e608989..821eac74077f 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
@@ -13,18 +13,13 @@
#include "rcar_du_kms_lib.h"
struct dma_buf_attachment;
-struct drm_file;
struct drm_device;
struct drm_gem_object;
-struct drm_mode_create_dumb;
struct rcar_du_device;
struct sg_table;
int rcar_du_modeset_init(struct rcar_du_device *rcdu);
-int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
- struct drm_mode_create_dumb *args);
-
struct drm_gem_object *rcar_du_gem_prime_import_sg_table(struct drm_device *dev,
struct dma_buf_attachment *attach,
struct sg_table *sgt);
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
index 97c526dae521..0a2b1c6c1ea6 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
@@ -7,10 +7,13 @@
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*/
+#include <drm/drm_device.h>
#include <drm/drm_framebuffer.h>
+#include <drm/drm_gem_dma_helper.h>
#include <linux/videodev2.h>
+#include "rcar_du_drv.h"
#include "rcar_du_kms.h"
#include "rcar_du_regs.h"
@@ -303,3 +306,28 @@ const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
return NULL;
}
+
+/* -----------------------------------------------------------------------------
+ * Frame buffer
+ */
+
+int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
+ struct drm_mode_create_dumb *args)
+{
+ struct rcar_du_device *rcdu = to_rcar_du_device(dev);
+ unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
+ unsigned int align;
+
+ /*
+ * The R8A7779 DU requires a 16 pixels pitch alignment as documented,
+ * but the R8A7790 DU seems to require a 128 bytes pitch alignment.
+ */
+ if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
+ align = 128;
+ else
+ align = 16 * args->bpp / 8;
+
+ args->pitch = roundup(min_pitch, align);
+
+ return drm_gem_dma_dumb_create_internal(file, dev, args);
+}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
index 674a38d24917..33f96e96f6a2 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
@@ -12,6 +12,10 @@
#include <linux/types.h>
+struct drm_device;
+struct drm_file;
+struct drm_mode_create_dumb;
+
struct rcar_du_format_info {
u32 fourcc;
u32 v4l2;
@@ -24,4 +28,7 @@ struct rcar_du_format_info {
const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc);
+int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
+ struct drm_mode_create_dumb *args);
+
#endif /* __RCAR_DU_KMS_LIB_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 08/19] drm: rcar-du: Move rcar_du_gem_prime_import_sg_table()
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (6 preceding siblings ...)
2022-11-23 17:28 ` [PATCH v6 07/19] drm: rcar-du: Move rcar_du_dumb_create() Biju Das
@ 2022-11-23 17:28 ` Biju Das
2022-11-23 17:28 ` [PATCH v6 09/19] drm: rcar-du: Add rcar_du_lib_vsp_init() Biju Das
` (12 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:28 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
Move rcar_du_gem_prime_import_sg_table() to RCar DU KMS lib.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v6:
* Fixed checkpatch warnings related to alignment.
v1->v2:
* Rebased on drm-misc-next and DU-next.
---
drivers/gpu/drm/rcar-du/rcar_du_kms.c | 47 -----------------------
drivers/gpu/drm/rcar-du/rcar_du_kms.h | 8 ----
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 47 +++++++++++++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 8 ++++
4 files changed, 55 insertions(+), 55 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
index 4b5511a20313..ae969f640bb6 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -11,8 +11,6 @@
#include <drm/drm_atomic_helper.h>
#include <drm/drm_crtc.h>
#include <drm/drm_device.h>
-#include <drm/drm_framebuffer.h>
-#include <drm/drm_gem_dma_helper.h>
#include <drm/drm_gem_framebuffer_helper.h>
#include <drm/drm_managed.h>
#include <drm/drm_probe_helper.h>
@@ -36,51 +34,6 @@
* Frame buffer
*/
-static const struct drm_gem_object_funcs rcar_du_gem_funcs = {
- .free = drm_gem_dma_object_free,
- .print_info = drm_gem_dma_object_print_info,
- .get_sg_table = drm_gem_dma_object_get_sg_table,
- .vmap = drm_gem_dma_object_vmap,
- .mmap = drm_gem_dma_object_mmap,
- .vm_ops = &drm_gem_dma_vm_ops,
-};
-
-struct drm_gem_object *rcar_du_gem_prime_import_sg_table(struct drm_device *dev,
- struct dma_buf_attachment *attach,
- struct sg_table *sgt)
-{
- struct rcar_du_device *rcdu = to_rcar_du_device(dev);
- struct drm_gem_dma_object *dma_obj;
- struct drm_gem_object *gem_obj;
- int ret;
-
- if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE))
- return drm_gem_dma_prime_import_sg_table(dev, attach, sgt);
-
- /* Create a DMA GEM buffer. */
- dma_obj = kzalloc(sizeof(*dma_obj), GFP_KERNEL);
- if (!dma_obj)
- return ERR_PTR(-ENOMEM);
-
- gem_obj = &dma_obj->base;
- gem_obj->funcs = &rcar_du_gem_funcs;
-
- drm_gem_private_object_init(dev, gem_obj, attach->dmabuf->size);
- dma_obj->map_noncoherent = false;
-
- ret = drm_gem_create_mmap_offset(gem_obj);
- if (ret) {
- drm_gem_object_release(gem_obj);
- kfree(dma_obj);
- return ERR_PTR(ret);
- }
-
- dma_obj->dma_addr = 0;
- dma_obj->sgt = sgt;
-
- return gem_obj;
-}
-
static struct drm_framebuffer *
rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
const struct drm_mode_fb_cmd2 *mode_cmd)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.h b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
index 821eac74077f..b47a9e464ef4 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
@@ -12,16 +12,8 @@
#include "rcar_du_kms_lib.h"
-struct dma_buf_attachment;
-struct drm_device;
-struct drm_gem_object;
struct rcar_du_device;
-struct sg_table;
int rcar_du_modeset_init(struct rcar_du_device *rcdu);
-struct drm_gem_object *rcar_du_gem_prime_import_sg_table(struct drm_device *dev,
- struct dma_buf_attachment *attach,
- struct sg_table *sgt);
-
#endif /* __RCAR_DU_KMS_H__ */
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
index 0a2b1c6c1ea6..ed5e2b78c351 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
@@ -10,6 +10,7 @@
#include <drm/drm_device.h>
#include <drm/drm_framebuffer.h>
#include <drm/drm_gem_dma_helper.h>
+#include <drm/drm_gem_framebuffer_helper.h>
#include <linux/videodev2.h>
@@ -311,6 +312,52 @@ const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
* Frame buffer
*/
+static const struct drm_gem_object_funcs rcar_du_gem_funcs = {
+ .free = drm_gem_dma_object_free,
+ .print_info = drm_gem_dma_object_print_info,
+ .get_sg_table = drm_gem_dma_object_get_sg_table,
+ .vmap = drm_gem_dma_object_vmap,
+ .mmap = drm_gem_dma_object_mmap,
+ .vm_ops = &drm_gem_dma_vm_ops,
+};
+
+struct drm_gem_object *
+rcar_du_gem_prime_import_sg_table(struct drm_device *dev,
+ struct dma_buf_attachment *attach,
+ struct sg_table *sgt)
+{
+ struct rcar_du_device *rcdu = to_rcar_du_device(dev);
+ struct drm_gem_dma_object *dma_obj;
+ struct drm_gem_object *gem_obj;
+ int ret;
+
+ if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE))
+ return drm_gem_dma_prime_import_sg_table(dev, attach, sgt);
+
+ /* Create a DMA GEM buffer. */
+ dma_obj = kzalloc(sizeof(*dma_obj), GFP_KERNEL);
+ if (!dma_obj)
+ return ERR_PTR(-ENOMEM);
+
+ gem_obj = &dma_obj->base;
+ gem_obj->funcs = &rcar_du_gem_funcs;
+
+ drm_gem_private_object_init(dev, gem_obj, attach->dmabuf->size);
+ dma_obj->map_noncoherent = false;
+
+ ret = drm_gem_create_mmap_offset(gem_obj);
+ if (ret) {
+ drm_gem_object_release(gem_obj);
+ kfree(dma_obj);
+ return ERR_PTR(ret);
+ }
+
+ dma_obj->dma_addr = 0;
+ dma_obj->sgt = sgt;
+
+ return gem_obj;
+}
+
int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
struct drm_mode_create_dumb *args)
{
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
index 33f96e96f6a2..4941c32bc9ce 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
@@ -12,9 +12,12 @@
#include <linux/types.h>
+struct dma_buf_attachment;
struct drm_device;
struct drm_file;
+struct drm_gem_object;
struct drm_mode_create_dumb;
+struct sg_table;
struct rcar_du_format_info {
u32 fourcc;
@@ -31,4 +34,9 @@ const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc);
int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
struct drm_mode_create_dumb *args);
+struct drm_gem_object *
+rcar_du_gem_prime_import_sg_table(struct drm_device *dev,
+ struct dma_buf_attachment *attach,
+ struct sg_table *sgt);
+
#endif /* __RCAR_DU_KMS_LIB_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 09/19] drm: rcar-du: Add rcar_du_lib_vsp_init()
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (7 preceding siblings ...)
2022-11-23 17:28 ` [PATCH v6 08/19] drm: rcar-du: Move rcar_du_gem_prime_import_sg_table() Biju Das
@ 2022-11-23 17:28 ` Biju Das
2022-11-23 17:28 ` [PATCH v6 10/19] drm: rcar-du: Move rcar_du_vsp_plane_prepare_fb() Biju Das
` (11 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:28 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
RZ/G2L does not have plane registers as well as it uses different
CRTC. The below functions are SoC specific
* rcar_du_crtc_finish_page_flip()
* __rcar_du_plane_setup
* __rcar_du_plane_atomic_check
All other function can be handled in common code. This patch introduces
rcar_du_lib_vsp_init() to share common_init, vsp_formats and vsp_plane_funcs().
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v6:
* Updated rcar_du_vsp_init() for blend config.
v1->v2:
* Rebased on drm-misc-next and DU-next.
---
drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 157 +-------------------
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 166 ++++++++++++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 11 ++
3 files changed, 179 insertions(+), 155 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index fabb616d8853..d798d97b0dd4 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -13,7 +13,6 @@
#include <drm/drm_crtc.h>
#include <drm/drm_framebuffer.h>
#include <drm/drm_gem_atomic_helper.h>
-#include <drm/drm_managed.h>
#include <drm/drm_vblank.h>
#include <linux/bitops.h>
@@ -85,34 +84,6 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc)
vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
}
-static const u32 rcar_du_vsp_formats[] = {
- DRM_FORMAT_RGB332,
- DRM_FORMAT_ARGB4444,
- DRM_FORMAT_XRGB4444,
- DRM_FORMAT_ARGB1555,
- DRM_FORMAT_XRGB1555,
- DRM_FORMAT_RGB565,
- DRM_FORMAT_BGR888,
- DRM_FORMAT_RGB888,
- DRM_FORMAT_BGRA8888,
- DRM_FORMAT_BGRX8888,
- DRM_FORMAT_ARGB8888,
- DRM_FORMAT_XRGB8888,
- DRM_FORMAT_UYVY,
- DRM_FORMAT_YUYV,
- DRM_FORMAT_YVYU,
- DRM_FORMAT_NV12,
- DRM_FORMAT_NV21,
- DRM_FORMAT_NV16,
- DRM_FORMAT_NV61,
- DRM_FORMAT_YUV420,
- DRM_FORMAT_YVU420,
- DRM_FORMAT_YUV422,
- DRM_FORMAT_YVU422,
- DRM_FORMAT_YUV444,
- DRM_FORMAT_YVU444,
-};
-
static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)
{
struct rcar_du_vsp_plane_state *state =
@@ -234,133 +205,9 @@ static const struct drm_plane_helper_funcs rcar_du_vsp_plane_helper_funcs = {
.atomic_update = rcar_du_vsp_plane_atomic_update,
};
-static struct drm_plane_state *
-rcar_du_vsp_plane_atomic_duplicate_state(struct drm_plane *plane)
-{
- struct rcar_du_vsp_plane_state *copy;
-
- if (WARN_ON(!plane->state))
- return NULL;
-
- copy = kzalloc(sizeof(*copy), GFP_KERNEL);
- if (copy == NULL)
- return NULL;
-
- __drm_atomic_helper_plane_duplicate_state(plane, ©->state);
-
- return ©->state;
-}
-
-static void rcar_du_vsp_plane_atomic_destroy_state(struct drm_plane *plane,
- struct drm_plane_state *state)
-{
- __drm_atomic_helper_plane_destroy_state(state);
- kfree(to_rcar_vsp_plane_state(state));
-}
-
-static void rcar_du_vsp_plane_reset(struct drm_plane *plane)
-{
- struct rcar_du_vsp_plane_state *state;
-
- if (plane->state) {
- rcar_du_vsp_plane_atomic_destroy_state(plane, plane->state);
- plane->state = NULL;
- }
-
- state = kzalloc(sizeof(*state), GFP_KERNEL);
- if (state == NULL)
- return;
-
- __drm_atomic_helper_plane_reset(plane, &state->state);
-}
-
-static const struct drm_plane_funcs rcar_du_vsp_plane_funcs = {
- .update_plane = drm_atomic_helper_update_plane,
- .disable_plane = drm_atomic_helper_disable_plane,
- .reset = rcar_du_vsp_plane_reset,
- .destroy = drm_plane_cleanup,
- .atomic_duplicate_state = rcar_du_vsp_plane_atomic_duplicate_state,
- .atomic_destroy_state = rcar_du_vsp_plane_atomic_destroy_state,
-};
-
-static void rcar_du_vsp_cleanup(struct drm_device *dev, void *res)
-{
- struct rcar_du_vsp *vsp = res;
- unsigned int i;
-
- for (i = 0; i < vsp->num_planes; ++i) {
- struct rcar_du_vsp_plane *plane = &vsp->planes[i];
-
- drm_plane_cleanup(&plane->plane);
- }
-
- kfree(vsp->planes);
-
- put_device(vsp->vsp);
-}
-
int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
unsigned int crtcs)
{
- struct rcar_du_device *rcdu = vsp->dev;
- struct platform_device *pdev;
- unsigned int num_crtcs = hweight32(crtcs);
- unsigned int num_planes;
- unsigned int i;
- int ret;
-
- /* Find the VSP device and initialize it. */
- pdev = of_find_device_by_node(np);
- if (!pdev)
- return -ENXIO;
-
- vsp->vsp = &pdev->dev;
-
- ret = drmm_add_action_or_reset(&rcdu->ddev, rcar_du_vsp_cleanup, vsp);
- if (ret < 0)
- return ret;
-
- ret = vsp1_du_init(vsp->vsp);
- if (ret < 0)
- return ret;
-
- num_planes = rcdu->info->num_rpf;
-
- vsp->planes = kcalloc(num_planes, sizeof(*vsp->planes), GFP_KERNEL);
- if (!vsp->planes)
- return -ENOMEM;
-
- for (i = 0; i < num_planes; ++i) {
- enum drm_plane_type type = i < num_crtcs
- ? DRM_PLANE_TYPE_PRIMARY
- : DRM_PLANE_TYPE_OVERLAY;
- struct rcar_du_vsp_plane *plane = &vsp->planes[i];
-
- plane->vsp = vsp;
- plane->index = i;
-
- ret = drm_universal_plane_init(&rcdu->ddev, &plane->plane,
- crtcs, &rcar_du_vsp_plane_funcs,
- rcar_du_vsp_formats,
- ARRAY_SIZE(rcar_du_vsp_formats),
- NULL, type, NULL);
- if (ret < 0)
- return ret;
-
- drm_plane_helper_add(&plane->plane,
- &rcar_du_vsp_plane_helper_funcs);
-
- drm_plane_create_alpha_property(&plane->plane);
- drm_plane_create_zpos_property(&plane->plane, i, 0,
- num_planes - 1);
-
- drm_plane_create_blend_mode_property(&plane->plane,
- BIT(DRM_MODE_BLEND_PIXEL_NONE) |
- BIT(DRM_MODE_BLEND_PREMULTI) |
- BIT(DRM_MODE_BLEND_COVERAGE));
-
- vsp->num_planes++;
- }
-
- return 0;
+ return rcar_du_lib_vsp_init(vsp, np, crtcs,
+ &rcar_du_vsp_plane_helper_funcs);
}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
index d59dc250bbb3..7f8742005df1 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
@@ -7,13 +7,19 @@
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*/
+#include <drm/drm_atomic.h>
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_blend.h>
+#include <drm/drm_crtc.h>
#include <drm/drm_fb_dma_helper.h>
#include <drm/drm_fourcc.h>
#include <drm/drm_framebuffer.h>
#include <drm/drm_gem_atomic_helper.h>
#include <drm/drm_gem_dma_helper.h>
+#include <drm/drm_managed.h>
#include <linux/dma-mapping.h>
+#include <linux/of_platform.h>
#include <linux/scatterlist.h>
#include <media/vsp1.h>
@@ -44,6 +50,34 @@ void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc)
vsp1_du_atomic_flush(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
}
+static const u32 rcar_du_vsp_formats[] = {
+ DRM_FORMAT_RGB332,
+ DRM_FORMAT_ARGB4444,
+ DRM_FORMAT_XRGB4444,
+ DRM_FORMAT_ARGB1555,
+ DRM_FORMAT_XRGB1555,
+ DRM_FORMAT_RGB565,
+ DRM_FORMAT_BGR888,
+ DRM_FORMAT_RGB888,
+ DRM_FORMAT_BGRA8888,
+ DRM_FORMAT_BGRX8888,
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_UYVY,
+ DRM_FORMAT_YUYV,
+ DRM_FORMAT_YVYU,
+ DRM_FORMAT_NV12,
+ DRM_FORMAT_NV21,
+ DRM_FORMAT_NV16,
+ DRM_FORMAT_NV61,
+ DRM_FORMAT_YUV420,
+ DRM_FORMAT_YVU420,
+ DRM_FORMAT_YUV422,
+ DRM_FORMAT_YVU422,
+ DRM_FORMAT_YUV444,
+ DRM_FORMAT_YVU444,
+};
+
int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
struct sg_table sg_tables[3])
{
@@ -118,3 +152,135 @@ void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
sg_free_table(sgt);
}
}
+
+static struct drm_plane_state *
+rcar_du_vsp_plane_atomic_duplicate_state(struct drm_plane *plane)
+{
+ struct rcar_du_vsp_plane_state *copy;
+
+ if (WARN_ON(!plane->state))
+ return NULL;
+
+ copy = kzalloc(sizeof(*copy), GFP_KERNEL);
+ if (copy == NULL)
+ return NULL;
+
+ __drm_atomic_helper_plane_duplicate_state(plane, ©->state);
+
+ return ©->state;
+}
+
+static void rcar_du_vsp_plane_atomic_destroy_state(struct drm_plane *plane,
+ struct drm_plane_state *state)
+{
+ __drm_atomic_helper_plane_destroy_state(state);
+ kfree(to_rcar_vsp_plane_state(state));
+}
+
+static void rcar_du_vsp_plane_reset(struct drm_plane *plane)
+{
+ struct rcar_du_vsp_plane_state *state;
+
+ if (plane->state) {
+ rcar_du_vsp_plane_atomic_destroy_state(plane, plane->state);
+ plane->state = NULL;
+ }
+
+ state = kzalloc(sizeof(*state), GFP_KERNEL);
+ if (state == NULL)
+ return;
+
+ __drm_atomic_helper_plane_reset(plane, &state->state);
+}
+
+static const struct drm_plane_funcs rcar_du_vsp_plane_funcs = {
+ .update_plane = drm_atomic_helper_update_plane,
+ .disable_plane = drm_atomic_helper_disable_plane,
+ .reset = rcar_du_vsp_plane_reset,
+ .destroy = drm_plane_cleanup,
+ .atomic_duplicate_state = rcar_du_vsp_plane_atomic_duplicate_state,
+ .atomic_destroy_state = rcar_du_vsp_plane_atomic_destroy_state,
+};
+
+static void rcar_du_vsp_cleanup(struct drm_device *dev, void *res)
+{
+ struct rcar_du_vsp *vsp = res;
+ unsigned int i;
+
+ for (i = 0; i < vsp->num_planes; ++i) {
+ struct rcar_du_vsp_plane *plane = &vsp->planes[i];
+
+ drm_plane_cleanup(&plane->plane);
+ }
+
+ kfree(vsp->planes);
+
+ put_device(vsp->vsp);
+}
+
+int rcar_du_lib_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
+ unsigned int crtcs,
+ const struct drm_plane_helper_funcs *rcar_du_vsp_plane_helper_funcs)
+{
+ struct rcar_du_device *rcdu = vsp->dev;
+ struct platform_device *pdev;
+ unsigned int num_crtcs = hweight32(crtcs);
+ unsigned int num_planes;
+ unsigned int i;
+ int ret;
+
+ /* Find the VSP device and initialize it. */
+ pdev = of_find_device_by_node(np);
+ if (!pdev)
+ return -ENXIO;
+
+ vsp->vsp = &pdev->dev;
+
+ ret = drmm_add_action_or_reset(&rcdu->ddev, rcar_du_vsp_cleanup, vsp);
+ if (ret < 0)
+ return ret;
+
+ ret = vsp1_du_init(vsp->vsp);
+ if (ret < 0)
+ return ret;
+
+ num_planes = rcdu->info->num_rpf;
+
+ vsp->planes = kcalloc(num_planes, sizeof(*vsp->planes), GFP_KERNEL);
+ if (!vsp->planes)
+ return -ENOMEM;
+
+ for (i = 0; i < num_planes; ++i) {
+ enum drm_plane_type type = i < num_crtcs
+ ? DRM_PLANE_TYPE_PRIMARY
+ : DRM_PLANE_TYPE_OVERLAY;
+ struct rcar_du_vsp_plane *plane = &vsp->planes[i];
+
+ plane->vsp = vsp;
+ plane->index = i;
+
+ ret = drm_universal_plane_init(&rcdu->ddev, &plane->plane,
+ crtcs, &rcar_du_vsp_plane_funcs,
+ rcar_du_vsp_formats,
+ ARRAY_SIZE(rcar_du_vsp_formats),
+ NULL, type, NULL);
+ if (ret < 0)
+ return ret;
+
+ drm_plane_helper_add(&plane->plane,
+ rcar_du_vsp_plane_helper_funcs);
+
+ drm_plane_create_alpha_property(&plane->plane);
+ drm_plane_create_zpos_property(&plane->plane, i, 0,
+ num_planes - 1);
+
+ drm_plane_create_blend_mode_property(&plane->plane,
+ BIT(DRM_MODE_BLEND_PIXEL_NONE) |
+ BIT(DRM_MODE_BLEND_PREMULTI) |
+ BIT(DRM_MODE_BLEND_COVERAGE));
+
+ vsp->num_planes++;
+ }
+
+ return 0;
+}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
index bf13748c3ea8..2a346c0d5a76 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
@@ -22,6 +22,9 @@ int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
struct sg_table sg_tables[3]);
void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
struct sg_table sg_tables[3]);
+int rcar_du_lib_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
+ unsigned int crtcs,
+ const struct drm_plane_helper_funcs *rcar_du_vsp_plane_helper_funcs);
#else
static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { };
static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { };
@@ -38,6 +41,14 @@ static inline void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp,
struct sg_table sg_tables[3])
{
}
+
+static inline int
+rcar_du_lib_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
+ unsigned int crtcs,
+ const struct drm_plane_helper_funcs *rcar_du_vsp_plane_helper_funcs)
+{
+ return -ENXIO;
+}
#endif
#endif /* __RCAR_DU_VSP_LIB_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 10/19] drm: rcar-du: Move rcar_du_vsp_plane_prepare_fb()
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (8 preceding siblings ...)
2022-11-23 17:28 ` [PATCH v6 09/19] drm: rcar-du: Add rcar_du_lib_vsp_init() Biju Das
@ 2022-11-23 17:28 ` Biju Das
2022-11-23 17:28 ` [PATCH v6 11/19] drm: rcar-du: Move rcar_du_vsp_plane_cleanup_fb() Biju Das
` (10 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:28 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
Move rcar_du_vsp_plane_prepare_fb() to RCar DU vsp lib so that
both RCar and RZ/G2L DU vsp drivers can share this function.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v5->v6:
* Fix checkpatch warning.
v5:
* New patch
---
drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 21 ---------------------
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 21 +++++++++++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 8 ++++++++
3 files changed, 29 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index d798d97b0dd4..b26c30902118 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -139,27 +139,6 @@ static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)
plane->index, &cfg);
}
-static int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane,
- struct drm_plane_state *state)
-{
- struct rcar_du_vsp_plane_state *rstate = to_rcar_vsp_plane_state(state);
- struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp;
- int ret;
-
- /*
- * There's no need to prepare (and unprepare) the framebuffer when the
- * plane is not visible, as it will not be displayed.
- */
- if (!state->visible)
- return 0;
-
- ret = rcar_du_vsp_map_fb(vsp, state->fb, rstate->sg_tables);
- if (ret < 0)
- return ret;
-
- return drm_gem_plane_helper_prepare_fb(plane, state);
-}
-
static void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane,
struct drm_plane_state *state)
{
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
index 7f8742005df1..1a5988cdf41a 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
@@ -140,6 +140,27 @@ int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
return ret;
}
+int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane,
+ struct drm_plane_state *state)
+{
+ struct rcar_du_vsp_plane_state *rstate = to_rcar_vsp_plane_state(state);
+ struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp;
+ int ret;
+
+ /*
+ * There's no need to prepare (and unprepare) the framebuffer when the
+ * plane is not visible, as it will not be displayed.
+ */
+ if (!state->visible)
+ return 0;
+
+ ret = rcar_du_vsp_map_fb(vsp, state->fb, rstate->sg_tables);
+ if (ret < 0)
+ return ret;
+
+ return drm_gem_plane_helper_prepare_fb(plane, state);
+}
+
void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
struct sg_table sg_tables[3])
{
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
index 2a346c0d5a76..cf2e8a4549e2 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
@@ -25,6 +25,8 @@ void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
int rcar_du_lib_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
unsigned int crtcs,
const struct drm_plane_helper_funcs *rcar_du_vsp_plane_helper_funcs);
+int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane,
+ struct drm_plane_state *state);
#else
static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { };
static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { };
@@ -49,6 +51,12 @@ rcar_du_lib_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
{
return -ENXIO;
}
+
+static inline int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane,
+ struct drm_plane_state *state)
+{
+ return -ENXIO;
+}
#endif
#endif /* __RCAR_DU_VSP_LIB_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 11/19] drm: rcar-du: Move rcar_du_vsp_plane_cleanup_fb()
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (9 preceding siblings ...)
2022-11-23 17:28 ` [PATCH v6 10/19] drm: rcar-du: Move rcar_du_vsp_plane_prepare_fb() Biju Das
@ 2022-11-23 17:28 ` Biju Das
2022-11-23 17:28 ` [PATCH v6 12/19] drm: rcar-du: Move rcar_du_vsp_plane_atomic_update() Biju Das
` (9 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:28 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
Move rcar_du_vsp_plane_cleanup_fb() to RCar DU vsp lib so that
it can be shared by both RCar and RZ/G2L DU vsp drivers.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v5->v6:
* Fixed check patch warning
v5:
* New patch
---
drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 12 ------------
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 12 ++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 7 +++++++
3 files changed, 19 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index b26c30902118..77a15450fca9 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -139,18 +139,6 @@ static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)
plane->index, &cfg);
}
-static void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane,
- struct drm_plane_state *state)
-{
- struct rcar_du_vsp_plane_state *rstate = to_rcar_vsp_plane_state(state);
- struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp;
-
- if (!state->visible)
- return;
-
- rcar_du_vsp_unmap_fb(vsp, state->fb, rstate->sg_tables);
-}
-
static int rcar_du_vsp_plane_atomic_check(struct drm_plane *plane,
struct drm_atomic_state *state)
{
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
index 1a5988cdf41a..56ed232326f7 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
@@ -174,6 +174,18 @@ void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
}
}
+void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane,
+ struct drm_plane_state *state)
+{
+ struct rcar_du_vsp_plane_state *rstate = to_rcar_vsp_plane_state(state);
+ struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp;
+
+ if (!state->visible)
+ return;
+
+ rcar_du_vsp_unmap_fb(vsp, state->fb, rstate->sg_tables);
+}
+
static struct drm_plane_state *
rcar_du_vsp_plane_atomic_duplicate_state(struct drm_plane *plane)
{
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
index cf2e8a4549e2..c14cd2f545d9 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
@@ -27,6 +27,8 @@ int rcar_du_lib_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
const struct drm_plane_helper_funcs *rcar_du_vsp_plane_helper_funcs);
int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane,
struct drm_plane_state *state);
+void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane,
+ struct drm_plane_state *state);
#else
static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { };
static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { };
@@ -57,6 +59,11 @@ static inline int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane,
{
return -ENXIO;
}
+
+static inline void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane,
+ struct drm_plane_state *state)
+{
+}
#endif
#endif /* __RCAR_DU_VSP_LIB_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 12/19] drm: rcar-du: Move rcar_du_vsp_plane_atomic_update()
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (10 preceding siblings ...)
2022-11-23 17:28 ` [PATCH v6 11/19] drm: rcar-du: Move rcar_du_vsp_plane_cleanup_fb() Biju Das
@ 2022-11-23 17:28 ` Biju Das
2022-11-23 17:29 ` [PATCH v6 13/19] drm: rcar-du: Add rcar_du_lib_fb_create() Biju Das
` (8 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:28 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
Move rcar_du_vsp_plane_atomic_update() to RCar DU vsp lib so that
both RCar and RZ/G2L DU vsp drivers can share this function.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v5->v6:
* Updated rcar_du_vsp_plane_setup()
v5:
* New patch
---
drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 70 ----------------------
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 71 +++++++++++++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 7 +++
3 files changed, 78 insertions(+), 70 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index 77a15450fca9..8d6ab048f5a5 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -84,61 +84,6 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc)
vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
}
-static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)
-{
- struct rcar_du_vsp_plane_state *state =
- to_rcar_vsp_plane_state(plane->plane.state);
- struct rcar_du_crtc *crtc = to_rcar_crtc(state->state.crtc);
- struct drm_framebuffer *fb = plane->plane.state->fb;
- const struct rcar_du_format_info *format;
- struct vsp1_du_atomic_config cfg = {
- .pixelformat = 0,
- .pitch = fb->pitches[0],
- .alpha = state->state.alpha >> 8,
- .zpos = state->state.zpos,
- };
- u32 fourcc = state->format->fourcc;
- unsigned int i;
-
- cfg.src.left = state->state.src.x1 >> 16;
- cfg.src.top = state->state.src.y1 >> 16;
- cfg.src.width = drm_rect_width(&state->state.src) >> 16;
- cfg.src.height = drm_rect_height(&state->state.src) >> 16;
-
- cfg.dst.left = state->state.dst.x1;
- cfg.dst.top = state->state.dst.y1;
- cfg.dst.width = drm_rect_width(&state->state.dst);
- cfg.dst.height = drm_rect_height(&state->state.dst);
-
- for (i = 0; i < state->format->planes; ++i)
- cfg.mem[i] = sg_dma_address(state->sg_tables[i].sgl)
- + fb->offsets[i];
-
- if (state->state.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE) {
- switch (fourcc) {
- case DRM_FORMAT_ARGB1555:
- fourcc = DRM_FORMAT_XRGB1555;
- break;
-
- case DRM_FORMAT_ARGB4444:
- fourcc = DRM_FORMAT_XRGB4444;
- break;
-
- case DRM_FORMAT_ARGB8888:
- fourcc = DRM_FORMAT_XRGB8888;
- break;
- }
- }
-
- format = rcar_du_format_info(fourcc);
- cfg.pixelformat = format->v4l2;
-
- cfg.premult = state->state.pixel_blend_mode == DRM_MODE_BLEND_PREMULTI;
-
- vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe,
- plane->index, &cfg);
-}
-
static int rcar_du_vsp_plane_atomic_check(struct drm_plane *plane,
struct drm_atomic_state *state)
{
@@ -150,21 +95,6 @@ static int rcar_du_vsp_plane_atomic_check(struct drm_plane *plane,
&rstate->format);
}
-static void rcar_du_vsp_plane_atomic_update(struct drm_plane *plane,
- struct drm_atomic_state *state)
-{
- struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);
- struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);
- struct rcar_du_vsp_plane *rplane = to_rcar_vsp_plane(plane);
- struct rcar_du_crtc *crtc = to_rcar_crtc(old_state->crtc);
-
- if (new_state->visible)
- rcar_du_vsp_plane_setup(rplane);
- else if (old_state->crtc)
- vsp1_du_atomic_update(rplane->vsp->vsp, crtc->vsp_pipe,
- rplane->index, NULL);
-}
-
static const struct drm_plane_helper_funcs rcar_du_vsp_plane_helper_funcs = {
.prepare_fb = rcar_du_vsp_plane_prepare_fb,
.cleanup_fb = rcar_du_vsp_plane_cleanup_fb,
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
index 56ed232326f7..2573d293da18 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
@@ -25,6 +25,7 @@
#include <media/vsp1.h>
#include "rcar_du_drv.h"
+#include "rcar_du_kms.h"
#include "rcar_du_writeback.h"
void rcar_du_vsp_disable(struct rcar_du_crtc *crtc)
@@ -78,6 +79,61 @@ static const u32 rcar_du_vsp_formats[] = {
DRM_FORMAT_YVU444,
};
+static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)
+{
+ struct rcar_du_vsp_plane_state *state =
+ to_rcar_vsp_plane_state(plane->plane.state);
+ struct rcar_du_crtc *crtc = to_rcar_crtc(state->state.crtc);
+ struct drm_framebuffer *fb = plane->plane.state->fb;
+ const struct rcar_du_format_info *format;
+ struct vsp1_du_atomic_config cfg = {
+ .pixelformat = 0,
+ .pitch = fb->pitches[0],
+ .alpha = state->state.alpha >> 8,
+ .zpos = state->state.zpos,
+ };
+ u32 fourcc = state->format->fourcc;
+ unsigned int i;
+
+ cfg.src.left = state->state.src.x1 >> 16;
+ cfg.src.top = state->state.src.y1 >> 16;
+ cfg.src.width = drm_rect_width(&state->state.src) >> 16;
+ cfg.src.height = drm_rect_height(&state->state.src) >> 16;
+
+ cfg.dst.left = state->state.dst.x1;
+ cfg.dst.top = state->state.dst.y1;
+ cfg.dst.width = drm_rect_width(&state->state.dst);
+ cfg.dst.height = drm_rect_height(&state->state.dst);
+
+ for (i = 0; i < state->format->planes; ++i)
+ cfg.mem[i] = sg_dma_address(state->sg_tables[i].sgl)
+ + fb->offsets[i];
+
+ if (state->state.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE) {
+ switch (fourcc) {
+ case DRM_FORMAT_ARGB1555:
+ fourcc = DRM_FORMAT_XRGB1555;
+ break;
+
+ case DRM_FORMAT_ARGB4444:
+ fourcc = DRM_FORMAT_XRGB4444;
+ break;
+
+ case DRM_FORMAT_ARGB8888:
+ fourcc = DRM_FORMAT_XRGB8888;
+ break;
+ }
+ }
+
+ format = rcar_du_format_info(fourcc);
+ cfg.pixelformat = format->v4l2;
+
+ cfg.premult = state->state.pixel_blend_mode == DRM_MODE_BLEND_PREMULTI;
+
+ vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe,
+ plane->index, &cfg);
+}
+
int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
struct sg_table sg_tables[3])
{
@@ -186,6 +242,21 @@ void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane,
rcar_du_vsp_unmap_fb(vsp, state->fb, rstate->sg_tables);
}
+void rcar_du_vsp_plane_atomic_update(struct drm_plane *plane,
+ struct drm_atomic_state *state)
+{
+ struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);
+ struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);
+ struct rcar_du_vsp_plane *rplane = to_rcar_vsp_plane(plane);
+ struct rcar_du_crtc *crtc = to_rcar_crtc(old_state->crtc);
+
+ if (new_state->visible)
+ rcar_du_vsp_plane_setup(rplane);
+ else if (old_state->crtc)
+ vsp1_du_atomic_update(rplane->vsp->vsp, crtc->vsp_pipe,
+ rplane->index, NULL);
+}
+
static struct drm_plane_state *
rcar_du_vsp_plane_atomic_duplicate_state(struct drm_plane *plane)
{
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
index c14cd2f545d9..0e1bf59d5133 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
@@ -29,6 +29,8 @@ int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane,
struct drm_plane_state *state);
void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane,
struct drm_plane_state *state);
+void rcar_du_vsp_plane_atomic_update(struct drm_plane *plane,
+ struct drm_atomic_state *state);
#else
static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { };
static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { };
@@ -64,6 +66,11 @@ static inline void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane,
struct drm_plane_state *state)
{
}
+
+static inline void rcar_du_vsp_plane_atomic_update(struct drm_plane *plane,
+ struct drm_atomic_state *state)
+{
+}
#endif
#endif /* __RCAR_DU_VSP_LIB_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 13/19] drm: rcar-du: Add rcar_du_lib_fb_create()
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (11 preceding siblings ...)
2022-11-23 17:28 ` [PATCH v6 12/19] drm: rcar-du: Move rcar_du_vsp_plane_atomic_update() Biju Das
@ 2022-11-23 17:29 ` Biju Das
2022-11-23 17:29 ` [PATCH v6 14/19] drm: rcar-du: Add rcar_du_lib_mode_cfg_helper_get() Biju Das
` (7 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:29 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
Move the common code from rcar_du_fb_create->rcar_du_lib_fb_create,
so that rzg2l_du_fb_create() can reuse the common code.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v5->v6:
* Updated rcar_du_fb_create() for the pixel fmt error.
v5:
* New patch
---
drivers/gpu/drm/rcar-du/rcar_du_kms.c | 64 +--------------------
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 69 +++++++++++++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 4 ++
3 files changed, 74 insertions(+), 63 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
index ae969f640bb6..74845d8bad9d 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -38,69 +38,7 @@ static struct drm_framebuffer *
rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
const struct drm_mode_fb_cmd2 *mode_cmd)
{
- struct rcar_du_device *rcdu = to_rcar_du_device(dev);
- const struct rcar_du_format_info *format;
- unsigned int chroma_pitch;
- unsigned int max_pitch;
- unsigned int align;
- unsigned int i;
-
- format = rcar_du_format_info(mode_cmd->pixel_format);
- if (format == NULL) {
- dev_dbg(dev->dev, "unsupported pixel format %p4cc\n",
- &mode_cmd->pixel_format);
- return ERR_PTR(-EINVAL);
- }
-
- if (rcdu->info->gen < 3) {
- /*
- * On Gen2 the DU limits the pitch to 4095 pixels and requires
- * buffers to be aligned to a 16 pixels boundary (or 128 bytes
- * on some platforms).
- */
- unsigned int bpp = format->planes == 1 ? format->bpp / 8 : 1;
-
- max_pitch = 4095 * bpp;
-
- if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
- align = 128;
- else
- align = 16 * bpp;
- } else {
- /*
- * On Gen3 the memory interface is handled by the VSP that
- * limits the pitch to 65535 bytes and has no alignment
- * constraint.
- */
- max_pitch = 65535;
- align = 1;
- }
-
- if (mode_cmd->pitches[0] & (align - 1) ||
- mode_cmd->pitches[0] > max_pitch) {
- dev_dbg(dev->dev, "invalid pitch value %u\n",
- mode_cmd->pitches[0]);
- return ERR_PTR(-EINVAL);
- }
-
- /*
- * Calculate the chroma plane(s) pitch using the horizontal subsampling
- * factor. For semi-planar formats, the U and V planes are combined, the
- * pitch must thus be doubled.
- */
- chroma_pitch = mode_cmd->pitches[0] / format->hsub;
- if (format->planes == 2)
- chroma_pitch *= 2;
-
- for (i = 1; i < format->planes; ++i) {
- if (mode_cmd->pitches[i] != chroma_pitch) {
- dev_dbg(dev->dev,
- "luma and chroma pitches are not compatible\n");
- return ERR_PTR(-EINVAL);
- }
- }
-
- return drm_gem_fb_create(dev, file_priv, mode_cmd);
+ return rcar_du_lib_fb_create(dev, file_priv, mode_cmd);
}
/* -----------------------------------------------------------------------------
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
index ed5e2b78c351..25548e727db9 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
@@ -378,3 +378,72 @@ int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
return drm_gem_dma_dumb_create_internal(file, dev, args);
}
+
+struct drm_framebuffer *
+rcar_du_lib_fb_create(struct drm_device *dev, struct drm_file *file_priv,
+ const struct drm_mode_fb_cmd2 *mode_cmd)
+{
+ struct rcar_du_device *rcdu = to_rcar_du_device(dev);
+ const struct rcar_du_format_info *format;
+ unsigned int chroma_pitch;
+ unsigned int max_pitch;
+ unsigned int align;
+ unsigned int i;
+
+ format = rcar_du_format_info(mode_cmd->pixel_format);
+ if (format == NULL) {
+ dev_dbg(dev->dev, "unsupported pixel format %p4cc\n",
+ &mode_cmd->pixel_format);
+ return ERR_PTR(-EINVAL);
+ }
+
+ if (rcdu->info->gen < 3) {
+ /*
+ * On Gen2 the DU limits the pitch to 4095 pixels and requires
+ * buffers to be aligned to a 16 pixels boundary (or 128 bytes
+ * on some platforms).
+ */
+ unsigned int bpp = format->planes == 1 ? format->bpp / 8 : 1;
+
+ max_pitch = 4095 * bpp;
+
+ if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
+ align = 128;
+ else
+ align = 16 * bpp;
+ } else {
+ /*
+ * On Gen3 the memory interface is handled by the VSP that
+ * limits the pitch to 65535 bytes and has no alignment
+ * constraint.
+ */
+ max_pitch = 65535;
+ align = 1;
+ }
+
+ if (mode_cmd->pitches[0] & (align - 1) ||
+ mode_cmd->pitches[0] > max_pitch) {
+ dev_dbg(dev->dev, "invalid pitch value %u\n",
+ mode_cmd->pitches[0]);
+ return ERR_PTR(-EINVAL);
+ }
+
+ /*
+ * Calculate the chroma plane(s) pitch using the horizontal subsampling
+ * factor. For semi-planar formats, the U and V planes are combined, the
+ * pitch must thus be doubled.
+ */
+ chroma_pitch = mode_cmd->pitches[0] / format->hsub;
+ if (format->planes == 2)
+ chroma_pitch *= 2;
+
+ for (i = 1; i < format->planes; ++i) {
+ if (mode_cmd->pitches[i] != chroma_pitch) {
+ dev_dbg(dev->dev,
+ "luma and chroma pitches are not compatible\n");
+ return ERR_PTR(-EINVAL);
+ }
+ }
+
+ return drm_gem_fb_create(dev, file_priv, mode_cmd);
+}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
index 4941c32bc9ce..b621a7e2e439 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
@@ -39,4 +39,8 @@ rcar_du_gem_prime_import_sg_table(struct drm_device *dev,
struct dma_buf_attachment *attach,
struct sg_table *sgt);
+struct drm_framebuffer *
+rcar_du_lib_fb_create(struct drm_device *dev, struct drm_file *file_priv,
+ const struct drm_mode_fb_cmd2 *mode_cmd);
+
#endif /* __RCAR_DU_KMS_LIB_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 14/19] drm: rcar-du: Add rcar_du_lib_mode_cfg_helper_get()
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (12 preceding siblings ...)
2022-11-23 17:29 ` [PATCH v6 13/19] drm: rcar-du: Add rcar_du_lib_fb_create() Biju Das
@ 2022-11-23 17:29 ` Biju Das
2022-11-23 17:29 ` [PATCH v6 15/19] drm: rcar-du: Move rcar_du_encoders_init() Biju Das
` (6 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:29 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
Add rcar_du_lib_mode_cfg_helper_get() in RCar DU kms lib to get the
pointer to rcar_du_mode_config_helper, so that both rcar_du_atomic_
commit_tail() and rcar_du_mode_config_helper can be reused by
rcar_du_modeset_init() and rzg2l_du_modeset_init().
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v5->v6:
* Updated header files
* Renamed rcar_du_lib_mode_cfg_helper_fns()->rcar_du_lib_mode_cfg_helper_get()
v5:
* New patch
---
drivers/gpu/drm/rcar-du/rcar_du_kms.c | 46 +-----------------
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 59 +++++++++++++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 3 ++
3 files changed, 63 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
index 74845d8bad9d..b0b40b1cc37d 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -7,9 +7,7 @@
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*/
-#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
-#include <drm/drm_crtc.h>
#include <drm/drm_device.h>
#include <drm/drm_gem_framebuffer_helper.h>
#include <drm/drm_managed.h>
@@ -61,52 +59,10 @@ static int rcar_du_atomic_check(struct drm_device *dev,
return rcar_du_atomic_check_planes(dev, state);
}
-static void rcar_du_atomic_commit_tail(struct drm_atomic_state *old_state)
-{
- struct drm_device *dev = old_state->dev;
- struct rcar_du_device *rcdu = to_rcar_du_device(dev);
- struct drm_crtc_state *crtc_state;
- struct drm_crtc *crtc;
- unsigned int i;
-
- /*
- * Store RGB routing to DPAD0 and DPAD1, the hardware will be configured
- * when starting the CRTCs.
- */
- rcdu->dpad1_source = -1;
-
- for_each_new_crtc_in_state(old_state, crtc, crtc_state, i) {
- struct rcar_du_crtc_state *rcrtc_state =
- to_rcar_crtc_state(crtc_state);
- struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
-
- if (rcrtc_state->outputs & BIT(RCAR_DU_OUTPUT_DPAD0))
- rcdu->dpad0_source = rcrtc->index;
-
- if (rcrtc_state->outputs & BIT(RCAR_DU_OUTPUT_DPAD1))
- rcdu->dpad1_source = rcrtc->index;
- }
-
- /* Apply the atomic update. */
- drm_atomic_helper_commit_modeset_disables(dev, old_state);
- drm_atomic_helper_commit_planes(dev, old_state,
- DRM_PLANE_COMMIT_ACTIVE_ONLY);
- drm_atomic_helper_commit_modeset_enables(dev, old_state);
-
- drm_atomic_helper_commit_hw_done(old_state);
- drm_atomic_helper_wait_for_flip_done(dev, old_state);
-
- drm_atomic_helper_cleanup_planes(dev, old_state);
-}
-
/* -----------------------------------------------------------------------------
* Initialization
*/
-static const struct drm_mode_config_helper_funcs rcar_du_mode_config_helper = {
- .atomic_commit_tail = rcar_du_atomic_commit_tail,
-};
-
static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
.fb_create = rcar_du_fb_create,
.atomic_check = rcar_du_atomic_check,
@@ -412,7 +368,7 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
dev->mode_config.min_height = 0;
dev->mode_config.normalize_zpos = true;
dev->mode_config.funcs = &rcar_du_mode_config_funcs;
- dev->mode_config.helper_private = &rcar_du_mode_config_helper;
+ dev->mode_config.helper_private = rcar_du_lib_mode_cfg_helper_get();
if (rcdu->info->gen < 3) {
dev->mode_config.max_width = 4095;
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
index 25548e727db9..a2d56ca56fc3 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
@@ -7,6 +7,9 @@
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*/
+#include <drm/drm_atomic.h>
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_crtc.h>
#include <drm/drm_device.h>
#include <drm/drm_framebuffer.h>
#include <drm/drm_gem_dma_helper.h>
@@ -447,3 +450,59 @@ rcar_du_lib_fb_create(struct drm_device *dev, struct drm_file *file_priv,
return drm_gem_fb_create(dev, file_priv, mode_cmd);
}
+
+/* -----------------------------------------------------------------------------
+ * Atomic Check and Update
+ */
+
+static void rcar_du_atomic_commit_tail(struct drm_atomic_state *old_state)
+{
+ struct drm_device *dev = old_state->dev;
+ struct rcar_du_device *rcdu = to_rcar_du_device(dev);
+ struct drm_crtc_state *crtc_state;
+ struct drm_crtc *crtc;
+ unsigned int i;
+
+ /*
+ * Store RGB routing to DPAD0 and DPAD1, the hardware will be configured
+ * when starting the CRTCs.
+ */
+ rcdu->dpad1_source = -1;
+
+ for_each_new_crtc_in_state(old_state, crtc, crtc_state, i) {
+ struct rcar_du_crtc_state *rcrtc_state =
+ to_rcar_crtc_state(crtc_state);
+ struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
+
+ if (rcrtc_state->outputs & BIT(RCAR_DU_OUTPUT_DPAD0))
+ rcdu->dpad0_source = rcrtc->index;
+
+ if (rcrtc_state->outputs & BIT(RCAR_DU_OUTPUT_DPAD1))
+ rcdu->dpad1_source = rcrtc->index;
+ }
+
+ /* Apply the atomic update. */
+ drm_atomic_helper_commit_modeset_disables(dev, old_state);
+ drm_atomic_helper_commit_planes(dev, old_state,
+ DRM_PLANE_COMMIT_ACTIVE_ONLY);
+ drm_atomic_helper_commit_modeset_enables(dev, old_state);
+
+ drm_atomic_helper_commit_hw_done(old_state);
+ drm_atomic_helper_wait_for_flip_done(dev, old_state);
+
+ drm_atomic_helper_cleanup_planes(dev, old_state);
+}
+
+/* -----------------------------------------------------------------------------
+ * Initialization
+ */
+
+static const struct drm_mode_config_helper_funcs rcar_du_mode_config_helper = {
+ .atomic_commit_tail = rcar_du_atomic_commit_tail,
+};
+
+const struct drm_mode_config_helper_funcs *
+rcar_du_lib_mode_cfg_helper_get(void)
+{
+ return &rcar_du_mode_config_helper;
+}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
index b621a7e2e439..bba68592e73d 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
@@ -43,4 +43,7 @@ struct drm_framebuffer *
rcar_du_lib_fb_create(struct drm_device *dev, struct drm_file *file_priv,
const struct drm_mode_fb_cmd2 *mode_cmd);
+const struct drm_mode_config_helper_funcs *
+rcar_du_lib_mode_cfg_helper_get(void);
+
#endif /* __RCAR_DU_KMS_LIB_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 15/19] drm: rcar-du: Move rcar_du_encoders_init()
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (13 preceding siblings ...)
2022-11-23 17:29 ` [PATCH v6 14/19] drm: rcar-du: Add rcar_du_lib_mode_cfg_helper_get() Biju Das
@ 2022-11-23 17:29 ` Biju Das
2022-11-23 17:29 ` [PATCH v6 16/19] drm: rcar-du: Move rcar_du_properties_init() Biju Das
` (5 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:29 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
RZ/G2L supports only DSI and DPI. Add rcar_du_encoders_init() to handle
the pointer to du_output_name(), so that we can share du_encoders_init()
between RCar and RZ/G2L kms drivers.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v5->v6:
* Updated header files.
v5:
* New patch
---
drivers/gpu/drm/rcar-du/rcar_du_kms.c | 92 +------------------
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 102 ++++++++++++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 6 ++
3 files changed, 110 insertions(+), 90 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
index b0b40b1cc37d..94f1602ea707 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -69,95 +69,6 @@ static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
.atomic_commit = drm_atomic_helper_commit,
};
-static int rcar_du_encoders_init_one(struct rcar_du_device *rcdu,
- enum rcar_du_output output,
- struct of_endpoint *ep)
-{
- struct device_node *entity;
- int ret;
-
- /* Locate the connected entity and initialize the encoder. */
- entity = of_graph_get_remote_port_parent(ep->local_node);
- if (!entity) {
- dev_dbg(rcdu->dev, "unconnected endpoint %pOF, skipping\n",
- ep->local_node);
- return -ENODEV;
- }
-
- if (!of_device_is_available(entity)) {
- dev_dbg(rcdu->dev,
- "connected entity %pOF is disabled, skipping\n",
- entity);
- of_node_put(entity);
- return -ENODEV;
- }
-
- ret = rcar_du_encoder_init(rcdu, output, entity);
- if (ret && ret != -EPROBE_DEFER && ret != -ENOLINK)
- dev_warn(rcdu->dev,
- "failed to initialize encoder %pOF on output %s (%d), skipping\n",
- entity, rcar_du_output_name(output), ret);
-
- of_node_put(entity);
-
- return ret;
-}
-
-static int rcar_du_encoders_init(struct rcar_du_device *rcdu)
-{
- struct device_node *np = rcdu->dev->of_node;
- struct device_node *ep_node;
- unsigned int num_encoders = 0;
-
- /*
- * Iterate over the endpoints and create one encoder for each output
- * pipeline.
- */
- for_each_endpoint_of_node(np, ep_node) {
- enum rcar_du_output output;
- struct of_endpoint ep;
- unsigned int i;
- int ret;
-
- ret = of_graph_parse_endpoint(ep_node, &ep);
- if (ret < 0) {
- of_node_put(ep_node);
- return ret;
- }
-
- /* Find the output route corresponding to the port number. */
- for (i = 0; i < RCAR_DU_OUTPUT_MAX; ++i) {
- if (rcdu->info->routes[i].possible_crtcs &&
- rcdu->info->routes[i].port == ep.port) {
- output = i;
- break;
- }
- }
-
- if (i == RCAR_DU_OUTPUT_MAX) {
- dev_warn(rcdu->dev,
- "port %u references unexisting output, skipping\n",
- ep.port);
- continue;
- }
-
- /* Process the output pipeline. */
- ret = rcar_du_encoders_init_one(rcdu, output, &ep);
- if (ret < 0) {
- if (ret == -EPROBE_DEFER) {
- of_node_put(ep_node);
- return ret;
- }
-
- continue;
- }
-
- num_encoders++;
- }
-
- return num_encoders;
-}
-
static int rcar_du_properties_init(struct rcar_du_device *rcdu)
{
/*
@@ -457,7 +368,8 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
}
/* Initialize the encoders. */
- ret = rcar_du_encoders_init(rcdu);
+ ret = rcar_du_encoders_init(rcdu, rcar_du_output_name,
+ rcar_du_encoder_init);
if (ret < 0)
return ret;
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
index a2d56ca56fc3..5fe2a1bd8de2 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
@@ -15,6 +15,8 @@
#include <drm/drm_gem_dma_helper.h>
#include <drm/drm_gem_framebuffer_helper.h>
+#include <linux/of_graph.h>
+#include <linux/of_platform.h>
#include <linux/videodev2.h>
#include "rcar_du_drv.h"
@@ -506,3 +508,103 @@ rcar_du_lib_mode_cfg_helper_get(void)
{
return &rcar_du_mode_config_helper;
}
+
+static int
+rcar_du_encoders_init_one(struct rcar_du_device *rcdu,
+ enum rcar_du_output output,
+ struct of_endpoint *ep,
+ const char *output_name,
+ int (*rcar_du_encoder_init_fn)(struct rcar_du_device *r,
+ enum rcar_du_output op,
+ struct device_node *d))
+{
+ struct device_node *entity;
+ int ret;
+
+ /* Locate the connected entity and initialize the encoder. */
+ entity = of_graph_get_remote_port_parent(ep->local_node);
+ if (!entity) {
+ dev_dbg(rcdu->dev, "unconnected endpoint %pOF, skipping\n",
+ ep->local_node);
+ return -ENODEV;
+ }
+
+ if (!of_device_is_available(entity)) {
+ dev_dbg(rcdu->dev,
+ "connected entity %pOF is disabled, skipping\n",
+ entity);
+ of_node_put(entity);
+ return -ENODEV;
+ }
+
+ ret = rcar_du_encoder_init_fn(rcdu, output, entity);
+ if (ret && ret != -EPROBE_DEFER && ret != -ENOLINK)
+ dev_warn(rcdu->dev,
+ "failed to initialize encoder %pOF on output %s (%d), skipping\n",
+ entity, output_name, ret);
+
+ of_node_put(entity);
+
+ return ret;
+}
+
+int rcar_du_encoders_init(struct rcar_du_device *rcdu,
+ const char* (*out_name)(enum rcar_du_output output),
+ int (*encoder_init_fn)(struct rcar_du_device *rcdu,
+ enum rcar_du_output output,
+ struct device_node *enc_node))
+{
+ struct device_node *np = rcdu->dev->of_node;
+ struct device_node *ep_node;
+ unsigned int num_encoders = 0;
+
+ /*
+ * Iterate over the endpoints and create one encoder for each output
+ * pipeline.
+ */
+ for_each_endpoint_of_node(np, ep_node) {
+ enum rcar_du_output output;
+ struct of_endpoint ep;
+ unsigned int i;
+ int ret;
+
+ ret = of_graph_parse_endpoint(ep_node, &ep);
+ if (ret < 0) {
+ of_node_put(ep_node);
+ return ret;
+ }
+
+ /* Find the output route corresponding to the port number. */
+ for (i = 0; i < RCAR_DU_OUTPUT_MAX; ++i) {
+ if (rcdu->info->routes[i].possible_crtcs &&
+ rcdu->info->routes[i].port == ep.port) {
+ output = i;
+ break;
+ }
+ }
+
+ if (i == RCAR_DU_OUTPUT_MAX) {
+ dev_warn(rcdu->dev,
+ "port %u references unexisting output, skipping\n",
+ ep.port);
+ continue;
+ }
+
+ /* Process the output pipeline. */
+ ret = rcar_du_encoders_init_one(rcdu, output, &ep,
+ out_name(output),
+ encoder_init_fn);
+ if (ret < 0) {
+ if (ret == -EPROBE_DEFER) {
+ of_node_put(ep_node);
+ return ret;
+ }
+
+ continue;
+ }
+
+ num_encoders++;
+ }
+
+ return num_encoders;
+}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
index bba68592e73d..1028ce490484 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
@@ -46,4 +46,10 @@ rcar_du_lib_fb_create(struct drm_device *dev, struct drm_file *file_priv,
const struct drm_mode_config_helper_funcs *
rcar_du_lib_mode_cfg_helper_get(void);
+int rcar_du_encoders_init(struct rcar_du_device *rcdu,
+ const char* (*out_name)(enum rcar_du_output output),
+ int (*encoder_init_fn)(struct rcar_du_device *rcdu,
+ enum rcar_du_output output,
+ struct device_node *enc_node));
+
#endif /* __RCAR_DU_KMS_LIB_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 16/19] drm: rcar-du: Move rcar_du_properties_init()
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (14 preceding siblings ...)
2022-11-23 17:29 ` [PATCH v6 15/19] drm: rcar-du: Move rcar_du_encoders_init() Biju Das
@ 2022-11-23 17:29 ` Biju Das
2022-11-23 17:29 ` [PATCH v6 17/19] drm: rcar-du: Add rcar_du_lib_vsps_init() Biju Das
` (4 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:29 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
Move rcar_du_properties_init() to RCar DU kms lib, so that it can be
shared by both RCar and RZ/G2L kms drivers.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v5->v6:
* Rebase to drm-misc-next.
v5:
* New patch
---
drivers/gpu/drm/rcar-du/rcar_du_kms.c | 16 ----------------
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 16 ++++++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 2 ++
3 files changed, 18 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
index 94f1602ea707..01ffe36f9d44 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -69,22 +69,6 @@ static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
.atomic_commit = drm_atomic_helper_commit,
};
-static int rcar_du_properties_init(struct rcar_du_device *rcdu)
-{
- /*
- * The color key is expressed as an RGB888 triplet stored in a 32-bit
- * integer in XRGB8888 format. Bit 24 is used as a flag to disable (0)
- * or enable source color keying (1).
- */
- rcdu->props.colorkey =
- drm_property_create_range(&rcdu->ddev, 0, "colorkey",
- 0, 0x01ffffff);
- if (rcdu->props.colorkey == NULL)
- return -ENOMEM;
-
- return 0;
-}
-
static int rcar_du_vsps_init(struct rcar_du_device *rcdu)
{
const struct device_node *np = rcdu->dev->of_node;
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
index 5fe2a1bd8de2..21777d782018 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
@@ -608,3 +608,19 @@ int rcar_du_encoders_init(struct rcar_du_device *rcdu,
return num_encoders;
}
+
+int rcar_du_properties_init(struct rcar_du_device *rcdu)
+{
+ /*
+ * The color key is expressed as an RGB888 triplet stored in a 32-bit
+ * integer in XRGB8888 format. Bit 24 is used as a flag to disable (0)
+ * or enable source color keying (1).
+ */
+ rcdu->props.colorkey =
+ drm_property_create_range(&rcdu->ddev, 0, "colorkey",
+ 0, 0x01ffffff);
+ if (rcdu->props.colorkey == NULL)
+ return -ENOMEM;
+
+ return 0;
+}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
index 1028ce490484..8fcba1b9c28f 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
@@ -52,4 +52,6 @@ int rcar_du_encoders_init(struct rcar_du_device *rcdu,
enum rcar_du_output output,
struct device_node *enc_node));
+int rcar_du_properties_init(struct rcar_du_device *rcdu);
+
#endif /* __RCAR_DU_KMS_LIB_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 17/19] drm: rcar-du: Add rcar_du_lib_vsps_init()
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (15 preceding siblings ...)
2022-11-23 17:29 ` [PATCH v6 16/19] drm: rcar-du: Move rcar_du_properties_init() Biju Das
@ 2022-11-23 17:29 ` Biju Das
2022-11-23 17:29 ` [PATCH v6 18/19] dt-bindings: display: Document Renesas RZ/G2L DU bindings Biju Das
` (3 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:29 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
Add rcar_du_lib_vsps_init() to RCar DU kms lib to handle both
rcar_du_vsp_init() and rzg2l_du_vsp_init().
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v5->v6:
* Rebased to drm-misc-next.
v5:
* New patch
---
drivers/gpu/drm/rcar-du/rcar_du_kms.c | 88 +---------------------
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 89 +++++++++++++++++++++++
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 5 ++
3 files changed, 95 insertions(+), 87 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
index 01ffe36f9d44..6f3352a6a264 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -69,92 +69,6 @@ static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
.atomic_commit = drm_atomic_helper_commit,
};
-static int rcar_du_vsps_init(struct rcar_du_device *rcdu)
-{
- const struct device_node *np = rcdu->dev->of_node;
- const char *vsps_prop_name = "renesas,vsps";
- struct of_phandle_args args;
- struct {
- struct device_node *np;
- unsigned int crtcs_mask;
- } vsps[RCAR_DU_MAX_VSPS] = { { NULL, }, };
- unsigned int vsps_count = 0;
- unsigned int cells;
- unsigned int i;
- int ret;
-
- /*
- * First parse the DT vsps property to populate the list of VSPs. Each
- * entry contains a pointer to the VSP DT node and a bitmask of the
- * connected DU CRTCs.
- */
- ret = of_property_count_u32_elems(np, vsps_prop_name);
- if (ret < 0) {
- /* Backward compatibility with old DTBs. */
- vsps_prop_name = "vsps";
- ret = of_property_count_u32_elems(np, vsps_prop_name);
- }
- cells = ret / rcdu->num_crtcs - 1;
- if (cells > 1)
- return -EINVAL;
-
- for (i = 0; i < rcdu->num_crtcs; ++i) {
- unsigned int j;
-
- ret = of_parse_phandle_with_fixed_args(np, vsps_prop_name,
- cells, i, &args);
- if (ret < 0)
- goto error;
-
- /*
- * Add the VSP to the list or update the corresponding existing
- * entry if the VSP has already been added.
- */
- for (j = 0; j < vsps_count; ++j) {
- if (vsps[j].np == args.np)
- break;
- }
-
- if (j < vsps_count)
- of_node_put(args.np);
- else
- vsps[vsps_count++].np = args.np;
-
- vsps[j].crtcs_mask |= BIT(i);
-
- /*
- * Store the VSP pointer and pipe index in the CRTC. If the
- * second cell of the 'renesas,vsps' specifier isn't present,
- * default to 0 to remain compatible with older DT bindings.
- */
- rcdu->crtcs[i].vsp = &rcdu->vsps[j];
- rcdu->crtcs[i].vsp_pipe = cells >= 1 ? args.args[0] : 0;
- }
-
- /*
- * Then initialize all the VSPs from the node pointers and CRTCs bitmask
- * computed previously.
- */
- for (i = 0; i < vsps_count; ++i) {
- struct rcar_du_vsp *vsp = &rcdu->vsps[i];
-
- vsp->index = i;
- vsp->dev = rcdu;
-
- ret = rcar_du_vsp_init(vsp, vsps[i].np, vsps[i].crtcs_mask);
- if (ret < 0)
- goto error;
- }
-
- return 0;
-
-error:
- for (i = 0; i < ARRAY_SIZE(vsps); ++i)
- of_node_put(vsps[i].np);
-
- return ret;
-}
-
static int rcar_du_cmm_init(struct rcar_du_device *rcdu)
{
const struct device_node *np = rcdu->dev->of_node;
@@ -326,7 +240,7 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
/* Initialize the compositors. */
if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) {
- ret = rcar_du_vsps_init(rcdu);
+ ret = rcar_du_lib_vsps_init(rcdu, rcar_du_vsp_init);
if (ret < 0)
return ret;
}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
index 21777d782018..cac82728c9f9 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
@@ -624,3 +624,92 @@ int rcar_du_properties_init(struct rcar_du_device *rcdu)
return 0;
}
+
+int rcar_du_lib_vsps_init(struct rcar_du_device *rcdu,
+ int (*rcar_du_vsp_init_fn)(struct rcar_du_vsp *vsp,
+ struct device_node *np,
+ unsigned int crtcs))
+{
+ const struct device_node *np = rcdu->dev->of_node;
+ const char *vsps_prop_name = "renesas,vsps";
+ struct of_phandle_args args;
+ struct {
+ struct device_node *np;
+ unsigned int crtcs_mask;
+ } vsps[RCAR_DU_MAX_VSPS] = { { NULL, }, };
+ unsigned int vsps_count = 0;
+ unsigned int cells;
+ unsigned int i;
+ int ret;
+
+ /*
+ * First parse the DT vsps property to populate the list of VSPs. Each
+ * entry contains a pointer to the VSP DT node and a bitmask of the
+ * connected DU CRTCs.
+ */
+ ret = of_property_count_u32_elems(np, vsps_prop_name);
+ if (ret < 0) {
+ /* Backward compatibility with old DTBs. */
+ vsps_prop_name = "vsps";
+ ret = of_property_count_u32_elems(np, vsps_prop_name);
+ }
+ cells = ret / rcdu->num_crtcs - 1;
+ if (cells > 1)
+ return -EINVAL;
+
+ for (i = 0; i < rcdu->num_crtcs; ++i) {
+ unsigned int j;
+
+ ret = of_parse_phandle_with_fixed_args(np, vsps_prop_name,
+ cells, i, &args);
+ if (ret < 0)
+ goto error;
+
+ /*
+ * Add the VSP to the list or update the corresponding existing
+ * entry if the VSP has already been added.
+ */
+ for (j = 0; j < vsps_count; ++j) {
+ if (vsps[j].np == args.np)
+ break;
+ }
+
+ if (j < vsps_count)
+ of_node_put(args.np);
+ else
+ vsps[vsps_count++].np = args.np;
+
+ vsps[j].crtcs_mask |= BIT(i);
+
+ /*
+ * Store the VSP pointer and pipe index in the CRTC. If the
+ * second cell of the 'renesas,vsps' specifier isn't present,
+ * default to 0 to remain compatible with older DT bindings.
+ */
+ rcdu->crtcs[i].vsp = &rcdu->vsps[j];
+ rcdu->crtcs[i].vsp_pipe = cells >= 1 ? args.args[0] : 0;
+ }
+
+ /*
+ * Then initialize all the VSPs from the node pointers and CRTCs bitmask
+ * computed previously.
+ */
+ for (i = 0; i < vsps_count; ++i) {
+ struct rcar_du_vsp *vsp = &rcdu->vsps[i];
+
+ vsp->index = i;
+ vsp->dev = rcdu;
+
+ ret = rcar_du_vsp_init_fn(vsp, vsps[i].np, vsps[i].crtcs_mask);
+ if (ret < 0)
+ goto error;
+ }
+
+ return 0;
+
+error:
+ for (i = 0; i < ARRAY_SIZE(vsps); ++i)
+ of_node_put(vsps[i].np);
+
+ return ret;
+}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
index 8fcba1b9c28f..033750260668 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
@@ -54,4 +54,9 @@ int rcar_du_encoders_init(struct rcar_du_device *rcdu,
int rcar_du_properties_init(struct rcar_du_device *rcdu);
+int rcar_du_lib_vsps_init(struct rcar_du_device *rcdu,
+ int (*rcar_du_vsp_init_fn)(struct rcar_du_vsp *vsp,
+ struct device_node *np,
+ unsigned int crtcs));
+
#endif /* __RCAR_DU_KMS_LIB_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 18/19] dt-bindings: display: Document Renesas RZ/G2L DU bindings
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (16 preceding siblings ...)
2022-11-23 17:29 ` [PATCH v6 17/19] drm: rcar-du: Add rcar_du_lib_vsps_init() Biju Das
@ 2022-11-23 17:29 ` Biju Das
2022-11-23 17:29 ` [PATCH v6 19/19] drm: rcar-du: Add RZ/G2L DU Support Biju Das
` (2 subsequent siblings)
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:29 UTC (permalink / raw)
To: David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, Chris Paterson, Laurent Pinchart, Geert Uytterhoeven,
Prabhakar Mahadev Lad, dri-devel, Biju Das, linux-renesas-soc,
Biju Das
The RZ/G2L LCD controller is composed of Frame Compression Processor
(FCPVD), Video Signal Processor (VSPD), and Display Unit (DU).
The DU module supports the following hardware features
− Display Parallel Interface (DPI) and MIPI LINK Video Interface
− Display timing master
− Generates video timings
− Selecting the polarity of output DCLK, HSYNC, VSYNC, and DE
− Supports Progressive
− Input data format (from VSPD): RGB888, RGB666
− Output data format: same as Input data format
− Supporting Full HD (1920 pixels x 1080 lines) for MIPI-DSI Output
− Supporting WXGA (1280 pixels x 800 lines) for Parallel Output
This patch document DU module found on RZ/G2L LCDC.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
v5->v6:
* No change.
v4->v5:
* Added Rb tag from Rob.
v3->v4:
* Changed compatible name from renesas,du-r9a07g044->renesas,r9a07g044-du
* started using same compatible for RZ/G2{L,LC}
v3: New patch
---
.../bindings/display/renesas,rzg2l-du.yaml | 124 ++++++++++++++++++
1 file changed, 124 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
diff --git a/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
new file mode 100644
index 000000000000..7626043debd8
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
@@ -0,0 +1,124 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/renesas,rzg2l-du.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas RZ/G2L Display Unit (DU)
+
+maintainers:
+ - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+ - Biju Das <biju.das.jz@bp.renesas.com>
+
+description: |
+ These DT bindings describe the Display Unit embedded in the Renesas RZ/G2L
+ and RZ/V2L SoCs.
+
+properties:
+ compatible:
+ enum:
+ - renesas,r9a07g044-du # RZ/G2{L,LC}
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Main clock
+ - description: Register access clock
+ - description: Video clock
+
+ clock-names:
+ items:
+ - const: aclk
+ - const: pclk
+ - const: vclk
+
+ resets:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: |
+ The connections to the DU output video ports are modeled using the OF
+ graph bindings specified in Documentation/devicetree/bindings/graph.txt.
+ The number of ports and their assignment are model-dependent. Each port
+ shall have a single endpoint.
+
+ patternProperties:
+ "^port@[0-1]$":
+ $ref: /schemas/graph.yaml#/properties/port
+ unevaluatedProperties: false
+
+ required:
+ - port@0
+
+ unevaluatedProperties: false
+
+ renesas,vsps:
+ $ref: "/schemas/types.yaml#/definitions/phandle-array"
+ items:
+ items:
+ - description: phandle to VSP instance that serves the DU channel
+ - description: Channel index identifying the LIF instance in that VSP
+ description:
+ A list of phandle and channel index tuples to the VSPs that handle the
+ memory interfaces for the DU channels.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - resets
+ - power-domains
+ - ports
+ - renesas,vsps
+
+additionalProperties: false
+
+examples:
+ # RZ/G2L DU
+ - |
+ #include <dt-bindings/clock/r9a07g044-cpg.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ display@10890000 {
+ compatible = "renesas,r9a07g044-du";
+ reg = <0x10890000 0x10000>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A07G044_LCDC_CLK_A>,
+ <&cpg CPG_MOD R9A07G044_LCDC_CLK_P>,
+ <&cpg CPG_MOD R9A07G044_LCDC_CLK_D>;
+ clock-names = "aclk", "pclk", "vclk";
+ resets = <&cpg R9A07G044_LCDC_RESET_N>;
+ power-domains = <&cpg>;
+
+ renesas,vsps = <&vspd0 0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ endpoint {
+ remote-endpoint = <&dsi0_in>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ endpoint {
+ };
+ };
+ };
+ };
+
+...
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 19/19] drm: rcar-du: Add RZ/G2L DU Support
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (17 preceding siblings ...)
2022-11-23 17:29 ` [PATCH v6 18/19] dt-bindings: display: Document Renesas RZ/G2L DU bindings Biju Das
@ 2022-11-23 17:29 ` Biju Das
2023-01-09 9:15 ` [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
2023-02-14 11:00 ` Biju Das
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2022-11-23 17:29 UTC (permalink / raw)
To: David Airlie, Daniel Vetter
Cc: Geert Uytterhoeven, Prabhakar Mahadev Lad, dri-devel,
linux-renesas-soc, Kieran Bingham, Laurent Pinchart, Biju Das
The LCD controller is composed of Frame Compression Processor (FCPVD),
Video Signal Processor (VSPD), and Display Unit (DU).
It has DPI/DSI interfaces and supports a maximum resolution of 1080p
along with 2 RPFs to support the blending of two picture layers and
raster operations (ROPs).
The DU module is connected to VSPD. This patch adds support for
RZ/G2L DU by creating CRTC/DRM driver specific to RZ/G2L and
it links with RCar DU lib for the common code between both RCar
and RZ/G2L.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v5->v6:
* Updated commit description
* Updated Kconfig
* Replaced drm_fb_cma_helper->drm_gem_dma_helper
* Updated header files.
v4->v5:
* Started using RCar DU libs(kms, vsp and encoder)
* Started using rcar_du_device, rcar_du_write, rcar_du_crtc,
rcar_du_format_info and rcar_du_encoder.
v3->v4:
* Removed rzg2l_du_group.h and struct rzg2l_du_group
* Renamed __rzg2l_du_group_start_stop->rzg2l_du_start_stop
* Removed rzg2l_du_group_restart
* Updated rzg2l_du_crtc_set_display_timing
* Removed mode_valid callback.
* Updated rzg2l_du_crtc_create() parameters
* Updated compatible
* Removed RZG2L_DU_MAX_GROUPS
v3:
* New patch after removing all the indirections and by adding
new DRM driver.
---
drivers/gpu/drm/rcar-du/Kconfig | 17 +-
drivers/gpu/drm/rcar-du/Makefile | 13 +
drivers/gpu/drm/rcar-du/rcar_du_crtc.h | 10 +
drivers/gpu/drm/rcar-du/rzg2l_du_crtc.c | 716 +++++++++++++++++++++
drivers/gpu/drm/rcar-du/rzg2l_du_crtc.h | 26 +
drivers/gpu/drm/rcar-du/rzg2l_du_drv.c | 196 ++++++
drivers/gpu/drm/rcar-du/rzg2l_du_drv.h | 20 +
drivers/gpu/drm/rcar-du/rzg2l_du_encoder.c | 26 +
drivers/gpu/drm/rcar-du/rzg2l_du_encoder.h | 19 +
drivers/gpu/drm/rcar-du/rzg2l_du_kms.c | 157 +++++
drivers/gpu/drm/rcar-du/rzg2l_du_kms.h | 17 +
drivers/gpu/drm/rcar-du/rzg2l_du_regs.h | 67 ++
drivers/gpu/drm/rcar-du/rzg2l_du_vsp.c | 82 +++
drivers/gpu/drm/rcar-du/rzg2l_du_vsp.h | 30 +
14 files changed, 1394 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_crtc.c
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_crtc.h
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_drv.c
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_drv.h
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_encoder.c
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_encoder.h
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_kms.c
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_kms.h
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_regs.h
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_vsp.c
create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_vsp.h
diff --git a/drivers/gpu/drm/rcar-du/Kconfig b/drivers/gpu/drm/rcar-du/Kconfig
index 12fb2bb873dc..618384c861f0 100644
--- a/drivers/gpu/drm/rcar-du/Kconfig
+++ b/drivers/gpu/drm/rcar-du/Kconfig
@@ -11,6 +11,18 @@ config DRM_RCAR_DU
Choose this option if you have an R-Car chipset.
If M is selected the module will be called rcar-du-drm.
+config DRM_RZG2L_DU
+ tristate "DRM Support for RZ/G2L Display Unit"
+ depends on DRM && OF
+ depends on ARM || ARM64
+ depends on ARCH_RZG2L || COMPILE_TEST
+ select DRM_KMS_HELPER
+ select DRM_GEM_DMA_HELPER
+ select VIDEOMODE_HELPERS
+ help
+ Choose this option if you have an RZ/G2L chipset.
+ If M is selected the module will be called rzg2l-du-drm.
+
config DRM_RCAR_USE_CMM
bool "R-Car DU Color Management Module (CMM) Support"
depends on DRM_RCAR_DU
@@ -65,8 +77,9 @@ config DRM_RZG2L_MIPI_DSI
config DRM_RCAR_VSP
bool "R-Car DU VSP Compositor Support" if ARM
default y if ARM64
- depends on DRM_RCAR_DU
+ depends on DRM_RCAR_DU || DRM_RZG2L_DU
depends on VIDEO_RENESAS_VSP1=y || (VIDEO_RENESAS_VSP1 && DRM_RCAR_DU=m)
+ depends on VIDEO_RENESAS_VSP1=y || (VIDEO_RENESAS_VSP1 && DRM_RZG2L_DU=m)
help
Enable support to expose the R-Car VSP Compositor as KMS planes.
@@ -78,7 +91,7 @@ config DRM_RCAR_WRITEBACK
config DRM_RCAR_LIB
bool
default y
- depends on DRM_RCAR_DU
+ depends on DRM_RCAR_DU || DRM_RZG2L_DU
config DRM_RCAR_VSP_LIB
bool
diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile
index 8fc924cf37a7..ca905c526469 100644
--- a/drivers/gpu/drm/rcar-du/Makefile
+++ b/drivers/gpu/drm/rcar-du/Makefile
@@ -19,4 +19,17 @@ obj-$(CONFIG_DRM_RCAR_DW_HDMI) += rcar_dw_hdmi.o
obj-$(CONFIG_DRM_RCAR_LVDS) += rcar_lvds.o
obj-$(CONFIG_DRM_RCAR_MIPI_DSI) += rcar_mipi_dsi.o
+rzg2l-du-drm-y := rzg2l_du_crtc.o \
+ rzg2l_du_drv.o \
+ rzg2l_du_encoder.o \
+ rzg2l_du_kms.o \
+
+rzg2l-du-drm-$(CONFIG_DRM_RCAR_LIB) += rcar_du_encoder_lib.o \
+ rcar_du_kms_lib.o
+
+rzg2l-du-drm-$(CONFIG_DRM_RCAR_VSP) += rzg2l_du_vsp.o
+rzg2l-du-drm-$(CONFIG_DRM_RCAR_VSP_LIB) += rcar_du_vsp_lib.o
+rzg2l-du-drm-$(CONFIG_DRM_RCAR_WRITEBACK) += rcar_du_writeback.o
+
+obj-$(CONFIG_DRM_RZG2L_DU) += rzg2l-du-drm.o
obj-$(CONFIG_DRM_RZG2L_MIPI_DSI) += rzg2l_mipi_dsi.o
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
index d0f38a8b3561..d2164ee6e599 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
@@ -43,6 +43,8 @@ struct rcar_du_vsp;
* @vsp: VSP feeding video to this CRTC
* @vsp_pipe: index of the VSP pipeline feeding video to this CRTC
* @writeback: the writeback connector
+ * @rzg2l_clocks: the bus, main and video clock
+ * @rstc: reset controller
*/
struct rcar_du_crtc {
struct drm_crtc crtc;
@@ -73,6 +75,14 @@ struct rcar_du_crtc {
unsigned int sources_count;
struct drm_writeback_connector writeback;
+
+ /* RZ/G2L specific */
+ struct reset_control *rstc;
+ struct {
+ struct clk *aclk;
+ struct clk *pclk;
+ struct clk *dclk;
+ } rzg2l_clocks;
};
#define to_rcar_crtc(c) container_of(c, struct rcar_du_crtc, crtc)
diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_crtc.c b/drivers/gpu/drm/rcar-du/rzg2l_du_crtc.c
new file mode 100644
index 000000000000..a60756f985e7
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rzg2l_du_crtc.c
@@ -0,0 +1,716 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * RZ/G2L DU CRTCs
+ *
+ * Copyright (C) 2022 Renesas Electronics Corporation
+ *
+ * Based on rcar_du_crtc.c
+ */
+
+#include <linux/clk.h>
+#include <linux/mutex.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
+#include <linux/sys_soc.h>
+
+#include <drm/drm_atomic.h>
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_bridge.h>
+#include <drm/drm_crtc.h>
+#include <drm/drm_device.h>
+#include <drm/drm_gem_dma_helper.h>
+#include <drm/drm_framebuffer.h>
+#include <drm/drm_vblank.h>
+
+#include "rzg2l_du_crtc.h"
+#include "rzg2l_du_drv.h"
+#include "rzg2l_du_encoder.h"
+#include "rzg2l_du_kms.h"
+#include "rzg2l_du_vsp.h"
+#include "rzg2l_du_regs.h"
+
+/* -----------------------------------------------------------------------------
+ * Hardware Setup
+ */
+
+static void rzg2l_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
+{
+ const struct drm_display_mode *mode = &rcrtc->crtc.state->adjusted_mode;
+ struct rcar_du_device *rcdu = rcrtc->dev;
+ unsigned long mode_clock = mode->clock * 1000;
+ u32 ditr0, ditr1, ditr2, ditr3, ditr4, ditr5, pbcr0;
+ struct clk *parent_clk;
+
+ parent_clk = clk_get_parent(rcrtc->rzg2l_clocks.dclk);
+ clk_set_rate(parent_clk, mode_clock);
+
+ clk_prepare_enable(rcrtc->rzg2l_clocks.dclk);
+
+ ditr0 = (DU_DITR0_DEMD_HIGH
+ | ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? DU_DITR0_VSPOL : 0)
+ | ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? DU_DITR0_HSPOL : 0));
+
+ ditr1 = DU_DITR1_VSA(mode->vsync_end - mode->vsync_start)
+ | DU_DITR1_VACTIVE(mode->vdisplay);
+
+ ditr2 = DU_DITR2_VBP(mode->vtotal - mode->vsync_end)
+ | DU_DITR2_VFP(mode->vsync_start - mode->vdisplay);
+
+ ditr3 = DU_DITR3_HSA(mode->hsync_end - mode->hsync_start)
+ | DU_DITR3_HACTIVE(mode->hdisplay);
+
+ ditr4 = DU_DITR4_HBP(mode->htotal - mode->hsync_end)
+ | DU_DITR4_HFP(mode->hsync_start - mode->hdisplay);
+
+ ditr5 = DU_DITR5_VSFT(0) | DU_DITR5_HSFT(0);
+
+ pbcr0 = DU_PBCR0_PB_DEP(0x1f);
+
+ rcar_du_write(rcdu, DU_DITR0, ditr0);
+ rcar_du_write(rcdu, DU_DITR1, ditr1);
+ rcar_du_write(rcdu, DU_DITR2, ditr2);
+ rcar_du_write(rcdu, DU_DITR3, ditr3);
+ rcar_du_write(rcdu, DU_DITR4, ditr4);
+ rcar_du_write(rcdu, DU_DITR5, ditr5);
+ rcar_du_write(rcdu, DU_PBCR0, pbcr0);
+
+ /* Enable auto resume when underrun */
+ rcar_du_write(rcdu, DU_MCR1, DU_MCR1_PB_AUTOCLR);
+}
+
+/* -----------------------------------------------------------------------------
+ * Page Flip
+ */
+
+void rzg2l_du_crtc_finish_page_flip(struct rcar_du_crtc *rcrtc)
+{
+ struct drm_pending_vblank_event *event;
+ struct drm_device *dev = rcrtc->crtc.dev;
+ unsigned long flags;
+
+ spin_lock_irqsave(&dev->event_lock, flags);
+ event = rcrtc->event;
+ rcrtc->event = NULL;
+ spin_unlock_irqrestore(&dev->event_lock, flags);
+
+ if (!event)
+ return;
+
+ spin_lock_irqsave(&dev->event_lock, flags);
+ drm_crtc_send_vblank_event(&rcrtc->crtc, event);
+ wake_up(&rcrtc->flip_wait);
+ spin_unlock_irqrestore(&dev->event_lock, flags);
+
+ drm_crtc_vblank_put(&rcrtc->crtc);
+}
+
+static bool rzg2l_du_crtc_page_flip_pending(struct rcar_du_crtc *rcrtc)
+{
+ struct drm_device *dev = rcrtc->crtc.dev;
+ unsigned long flags;
+ bool pending;
+
+ spin_lock_irqsave(&dev->event_lock, flags);
+ pending = rcrtc->event;
+ spin_unlock_irqrestore(&dev->event_lock, flags);
+
+ return pending;
+}
+
+static void rzg2l_du_crtc_wait_page_flip(struct rcar_du_crtc *rcrtc)
+{
+ struct rcar_du_device *rcdu = rcrtc->dev;
+
+ if (wait_event_timeout(rcrtc->flip_wait,
+ !rzg2l_du_crtc_page_flip_pending(rcrtc),
+ msecs_to_jiffies(50)))
+ return;
+
+ dev_warn(rcdu->dev, "page flip timeout\n");
+
+ rzg2l_du_crtc_finish_page_flip(rcrtc);
+}
+
+/* -----------------------------------------------------------------------------
+ * Start/Stop and Suspend/Resume
+ */
+
+static void rzg2l_du_crtc_setup(struct rcar_du_crtc *rcrtc)
+{
+ /* Configure display timings and output routing */
+ rzg2l_du_crtc_set_display_timing(rcrtc);
+
+ /* Enable the VSP compositor. */
+ rzg2l_du_vsp_enable(rcrtc);
+
+ /* Turn vertical blanking interrupt reporting on. */
+ drm_crtc_vblank_on(&rcrtc->crtc);
+}
+
+static int rzg2l_du_crtc_get(struct rcar_du_crtc *rcrtc)
+{
+ int ret;
+
+ /*
+ * Guard against double-get, as the function is called from both the
+ * .atomic_enable() and .atomic_begin() handlers.
+ */
+ if (rcrtc->initialized)
+ return 0;
+
+ ret = clk_prepare_enable(rcrtc->rzg2l_clocks.aclk);
+ if (ret < 0)
+ return ret;
+
+ ret = clk_prepare_enable(rcrtc->rzg2l_clocks.pclk);
+ if (ret < 0)
+ goto error_clock;
+
+ ret = reset_control_deassert(rcrtc->rstc);
+ if (ret < 0)
+ goto error_reset;
+
+ rzg2l_du_crtc_setup(rcrtc);
+ rcrtc->initialized = true;
+
+ return 0;
+
+error_reset:
+ reset_control_assert(rcrtc->rstc);
+error_clock:
+ clk_disable_unprepare(rcrtc->rzg2l_clocks.aclk);
+ return ret;
+}
+
+static void rzg2l_du_crtc_put(struct rcar_du_crtc *rcrtc)
+{
+ clk_disable_unprepare(rcrtc->rzg2l_clocks.dclk);
+ reset_control_assert(rcrtc->rstc);
+ clk_disable_unprepare(rcrtc->rzg2l_clocks.pclk);
+ clk_disable_unprepare(rcrtc->rzg2l_clocks.aclk);
+
+ rcrtc->initialized = false;
+}
+
+static void rzg2l_du_start_stop(struct rcar_du_crtc *rcrtc, bool start)
+{
+ struct rcar_du_device *rcdu = rcrtc->dev;
+
+ rcar_du_write(rcdu, DU_MCR0, start ? DU_MCR0_DI_EN : 0);
+}
+
+static void rzg2l_du_crtc_start(struct rcar_du_crtc *rcrtc)
+{
+ rzg2l_du_start_stop(rcrtc, true);
+}
+
+static void rzg2l_du_crtc_disable_planes(struct rcar_du_crtc *rcrtc)
+{
+ struct rcar_du_device *rcdu = rcrtc->dev;
+ struct drm_crtc *crtc = &rcrtc->crtc;
+
+ /* Make sure vblank interrupts are enabled. */
+ drm_crtc_vblank_get(crtc);
+
+ if (!wait_event_timeout(rcrtc->vblank_wait, rcrtc->vblank_count == 0,
+ msecs_to_jiffies(100)))
+ dev_warn(rcdu->dev, "vertical blanking timeout\n");
+
+ drm_crtc_vblank_put(crtc);
+}
+
+static void rzg2l_du_crtc_stop(struct rcar_du_crtc *rcrtc)
+{
+ struct drm_crtc *crtc = &rcrtc->crtc;
+
+ /*
+ * Disable all planes and wait for the change to take effect. This is
+ * required as the plane enable registers are updated on vblank, and no
+ * vblank will occur once the CRTC is stopped. Disabling planes when
+ * starting the CRTC thus wouldn't be enough as it would start scanning
+ * out immediately from old frame buffers until the next vblank.
+ *
+ * This increases the CRTC stop delay, especially when multiple CRTCs
+ * are stopped in one operation as we now wait for one vblank per CRTC.
+ * Whether this can be improved needs to be researched.
+ */
+ rzg2l_du_crtc_disable_planes(rcrtc);
+
+ /*
+ * Disable vertical blanking interrupt reporting. We first need to wait
+ * for page flip completion before stopping the CRTC as userspace
+ * expects page flips to eventually complete.
+ */
+ rzg2l_du_crtc_wait_page_flip(rcrtc);
+ drm_crtc_vblank_off(crtc);
+
+ /* Disable the VSP compositor. */
+ rcar_du_vsp_disable(rcrtc);
+
+ rzg2l_du_start_stop(rcrtc, false);
+}
+
+/* -----------------------------------------------------------------------------
+ * CRTC Functions
+ */
+
+int __rzg2l_du_crtc_plane_atomic_check(struct drm_plane *plane,
+ struct drm_plane_state *state,
+ const struct rcar_du_format_info **format)
+{
+ struct drm_device *dev = plane->dev;
+ struct drm_crtc_state *crtc_state;
+ int ret;
+
+ if (!state->crtc) {
+ /*
+ * The visible field is not reset by the DRM core but only
+ * updated by drm_plane_helper_check_state(), set it manually.
+ */
+ state->visible = false;
+ *format = NULL;
+ return 0;
+ }
+
+ crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc);
+ if (IS_ERR(crtc_state))
+ return PTR_ERR(crtc_state);
+
+ ret = drm_atomic_helper_check_plane_state(state, crtc_state,
+ DRM_PLANE_NO_SCALING,
+ DRM_PLANE_NO_SCALING,
+ true, true);
+ if (ret < 0)
+ return ret;
+
+ if (!state->visible) {
+ *format = NULL;
+ return 0;
+ }
+
+ *format = rcar_du_format_info(state->fb->format->format);
+ if (*format == NULL) {
+ dev_dbg(dev->dev, "%s: unsupported format %08x\n", __func__,
+ state->fb->format->format);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int rzg2l_du_crtc_atomic_check(struct drm_crtc *crtc,
+ struct drm_atomic_state *state)
+{
+ struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
+ crtc);
+ struct rcar_du_crtc_state *rstate = to_rcar_crtc_state(crtc_state);
+ struct drm_encoder *encoder;
+
+ /* Store the routes from the CRTC output to the DU outputs. */
+ rstate->outputs = 0;
+
+ drm_for_each_encoder_mask(encoder, crtc->dev,
+ crtc_state->encoder_mask) {
+ struct rcar_du_encoder *renc;
+
+ /* Skip the writeback encoder. */
+ if (encoder->encoder_type == DRM_MODE_ENCODER_VIRTUAL)
+ continue;
+
+ renc = to_rcar_encoder(encoder);
+ rstate->outputs |= BIT(renc->output);
+ }
+
+ return 0;
+}
+
+static void rzg2l_du_crtc_atomic_enable(struct drm_crtc *crtc,
+ struct drm_atomic_state *state)
+{
+ struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
+
+ rzg2l_du_crtc_get(rcrtc);
+
+ rzg2l_du_crtc_start(rcrtc);
+}
+
+static void rzg2l_du_crtc_atomic_disable(struct drm_crtc *crtc,
+ struct drm_atomic_state *state)
+{
+ struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
+
+ rzg2l_du_crtc_stop(rcrtc);
+ rzg2l_du_crtc_put(rcrtc);
+
+ spin_lock_irq(&crtc->dev->event_lock);
+ if (crtc->state->event) {
+ drm_crtc_send_vblank_event(crtc, crtc->state->event);
+ crtc->state->event = NULL;
+ }
+ spin_unlock_irq(&crtc->dev->event_lock);
+}
+
+static void rzg2l_du_crtc_atomic_begin(struct drm_crtc *crtc,
+ struct drm_atomic_state *state)
+{
+ struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
+
+ WARN_ON(!crtc->state->enable);
+
+ /*
+ * If a mode set is in progress we can be called with the CRTC disabled.
+ * We thus need to first get and setup the CRTC in order to configure
+ * planes. We must *not* put the CRTC in .atomic_flush(), as it must be
+ * kept awake until the .atomic_enable() call that will follow. The get
+ * operation in .atomic_enable() will in that case be a no-op, and the
+ * CRTC will be put later in .atomic_disable().
+ *
+ * If a mode set is not in progress the CRTC is enabled, and the
+ * following get call will be a no-op. There is thus no need to balance
+ * it in .atomic_flush() either.
+ */
+ rzg2l_du_crtc_get(rcrtc);
+
+ rcar_du_vsp_atomic_begin(rcrtc);
+}
+
+static void rzg2l_du_crtc_atomic_flush(struct drm_crtc *crtc,
+ struct drm_atomic_state *state)
+{
+ struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
+ struct drm_device *dev = rcrtc->crtc.dev;
+ unsigned long flags;
+
+ if (crtc->state->event) {
+ WARN_ON(drm_crtc_vblank_get(crtc) != 0);
+
+ spin_lock_irqsave(&dev->event_lock, flags);
+ rcrtc->event = crtc->state->event;
+ crtc->state->event = NULL;
+ spin_unlock_irqrestore(&dev->event_lock, flags);
+ }
+
+ rcar_du_vsp_atomic_flush(rcrtc);
+}
+
+static const struct drm_crtc_helper_funcs crtc_helper_funcs = {
+ .atomic_check = rzg2l_du_crtc_atomic_check,
+ .atomic_begin = rzg2l_du_crtc_atomic_begin,
+ .atomic_flush = rzg2l_du_crtc_atomic_flush,
+ .atomic_enable = rzg2l_du_crtc_atomic_enable,
+ .atomic_disable = rzg2l_du_crtc_atomic_disable,
+};
+
+static void rzg2l_du_crtc_crc_init(struct rcar_du_crtc *rcrtc)
+{
+ const char **sources;
+ unsigned int count;
+ int i = -1;
+
+ /* Reserve 1 for "auto" source. */
+ count = rcrtc->vsp->num_planes + 1;
+
+ sources = kmalloc_array(count, sizeof(*sources), GFP_KERNEL);
+ if (!sources)
+ return;
+
+ sources[0] = kstrdup("auto", GFP_KERNEL);
+ if (!sources[0])
+ goto error;
+
+ for (i = 0; i < rcrtc->vsp->num_planes; ++i) {
+ struct drm_plane *plane = &rcrtc->vsp->planes[i].plane;
+ char name[16];
+
+ sprintf(name, "plane%u", plane->base.id);
+ sources[i + 1] = kstrdup(name, GFP_KERNEL);
+ if (!sources[i + 1])
+ goto error;
+ }
+
+ rcrtc->sources = sources;
+ rcrtc->sources_count = count;
+ return;
+
+error:
+ while (i >= 0) {
+ kfree(sources[i]);
+ i--;
+ }
+ kfree(sources);
+}
+
+static void rzg2l_du_crtc_crc_cleanup(struct rcar_du_crtc *rcrtc)
+{
+ unsigned int i;
+
+ if (!rcrtc->sources)
+ return;
+
+ for (i = 0; i < rcrtc->sources_count; i++)
+ kfree(rcrtc->sources[i]);
+ kfree(rcrtc->sources);
+
+ rcrtc->sources = NULL;
+ rcrtc->sources_count = 0;
+}
+
+static struct drm_crtc_state *
+rzg2l_du_crtc_atomic_duplicate_state(struct drm_crtc *crtc)
+{
+ struct rcar_du_crtc_state *state;
+ struct rcar_du_crtc_state *copy;
+
+ if (WARN_ON(!crtc->state))
+ return NULL;
+
+ state = to_rcar_crtc_state(crtc->state);
+ copy = kmemdup(state, sizeof(*state), GFP_KERNEL);
+ if (!copy)
+ return NULL;
+
+ __drm_atomic_helper_crtc_duplicate_state(crtc, ©->state);
+
+ return ©->state;
+}
+
+static void rzg2l_du_crtc_atomic_destroy_state(struct drm_crtc *crtc,
+ struct drm_crtc_state *state)
+{
+ __drm_atomic_helper_crtc_destroy_state(state);
+ kfree(to_rcar_crtc_state(state));
+}
+
+static void rzg2l_du_crtc_cleanup(struct drm_crtc *crtc)
+{
+ struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
+
+ rzg2l_du_crtc_crc_cleanup(rcrtc);
+
+ return drm_crtc_cleanup(crtc);
+}
+
+static void rzg2l_du_crtc_reset(struct drm_crtc *crtc)
+{
+ struct rcar_du_crtc_state *state;
+
+ if (crtc->state) {
+ rzg2l_du_crtc_atomic_destroy_state(crtc, crtc->state);
+ crtc->state = NULL;
+ }
+
+ state = kzalloc(sizeof(*state), GFP_KERNEL);
+ if (!state)
+ return;
+
+ state->crc.source = VSP1_DU_CRC_NONE;
+ state->crc.index = 0;
+
+ __drm_atomic_helper_crtc_reset(crtc, &state->state);
+}
+
+static int rzg2l_du_crtc_enable_vblank(struct drm_crtc *crtc)
+{
+ struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
+
+ rcrtc->vblank_enable = true;
+
+ return 0;
+}
+
+static void rzg2l_du_crtc_disable_vblank(struct drm_crtc *crtc)
+{
+ struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
+
+ rcrtc->vblank_enable = false;
+}
+
+static int rzg2l_du_crtc_parse_crc_source(struct rcar_du_crtc *rcrtc,
+ const char *source_name,
+ enum vsp1_du_crc_source *source)
+{
+ unsigned int index;
+ int ret;
+
+ /*
+ * Parse the source name. Supported values are "plane%u" to compute the
+ * CRC on an input plane (%u is the plane ID), and "auto" to compute the
+ * CRC on the composer (VSP) output.
+ */
+
+ if (!source_name) {
+ *source = VSP1_DU_CRC_NONE;
+ return 0;
+ } else if (!strcmp(source_name, "auto")) {
+ *source = VSP1_DU_CRC_OUTPUT;
+ return 0;
+ } else if (strstarts(source_name, "plane")) {
+ unsigned int i;
+
+ *source = VSP1_DU_CRC_PLANE;
+
+ ret = kstrtouint(source_name + strlen("plane"), 10, &index);
+ if (ret < 0)
+ return ret;
+
+ for (i = 0; i < rcrtc->vsp->num_planes; ++i) {
+ if (index == rcrtc->vsp->planes[i].plane.base.id)
+ return i;
+ }
+ }
+
+ return -EINVAL;
+}
+
+static int rzg2l_du_crtc_verify_crc_source(struct drm_crtc *crtc,
+ const char *source_name,
+ size_t *values_cnt)
+{
+ struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
+ enum vsp1_du_crc_source source;
+
+ if (rzg2l_du_crtc_parse_crc_source(rcrtc, source_name, &source) < 0) {
+ DRM_DEBUG_DRIVER("unknown source %s\n", source_name);
+ return -EINVAL;
+ }
+
+ *values_cnt = 1;
+ return 0;
+}
+
+static const char *const *
+rzg2l_du_crtc_get_crc_sources(struct drm_crtc *crtc, size_t *count)
+{
+ struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
+
+ *count = rcrtc->sources_count;
+ return rcrtc->sources;
+}
+
+static int rzg2l_du_crtc_set_crc_source(struct drm_crtc *crtc,
+ const char *source_name)
+{
+ struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
+ struct drm_modeset_acquire_ctx ctx;
+ struct drm_crtc_state *crtc_state;
+ struct drm_atomic_state *state;
+ enum vsp1_du_crc_source source;
+ unsigned int index;
+ int ret;
+
+ ret = rzg2l_du_crtc_parse_crc_source(rcrtc, source_name, &source);
+ if (ret < 0)
+ return ret;
+
+ index = ret;
+
+ /* Perform an atomic commit to set the CRC source. */
+ drm_modeset_acquire_init(&ctx, 0);
+
+ state = drm_atomic_state_alloc(crtc->dev);
+ if (!state) {
+ ret = -ENOMEM;
+ goto unlock;
+ }
+
+ state->acquire_ctx = &ctx;
+
+retry:
+ crtc_state = drm_atomic_get_crtc_state(state, crtc);
+ if (!IS_ERR(crtc_state)) {
+ struct rcar_du_crtc_state *rcrtc_state;
+
+ rcrtc_state = to_rcar_crtc_state(crtc_state);
+ rcrtc_state->crc.source = source;
+ rcrtc_state->crc.index = index;
+
+ ret = drm_atomic_commit(state);
+ } else {
+ ret = PTR_ERR(crtc_state);
+ }
+
+ if (ret == -EDEADLK) {
+ drm_atomic_state_clear(state);
+ drm_modeset_backoff(&ctx);
+ goto retry;
+ }
+
+ drm_atomic_state_put(state);
+
+unlock:
+ drm_modeset_drop_locks(&ctx);
+ drm_modeset_acquire_fini(&ctx);
+
+ return ret;
+}
+
+static const struct drm_crtc_funcs crtc_funcs_rzg2l = {
+ .reset = rzg2l_du_crtc_reset,
+ .destroy = rzg2l_du_crtc_cleanup,
+ .set_config = drm_atomic_helper_set_config,
+ .page_flip = drm_atomic_helper_page_flip,
+ .atomic_duplicate_state = rzg2l_du_crtc_atomic_duplicate_state,
+ .atomic_destroy_state = rzg2l_du_crtc_atomic_destroy_state,
+ .enable_vblank = rzg2l_du_crtc_enable_vblank,
+ .disable_vblank = rzg2l_du_crtc_disable_vblank,
+ .set_crc_source = rzg2l_du_crtc_set_crc_source,
+ .verify_crc_source = rzg2l_du_crtc_verify_crc_source,
+ .get_crc_sources = rzg2l_du_crtc_get_crc_sources,
+};
+
+/* -----------------------------------------------------------------------------
+ * Initialization
+ */
+
+int rzg2l_du_crtc_create(struct rcar_du_device *rcdu)
+{
+ struct rcar_du_crtc *rcrtc = &rcdu->crtcs[0];
+ struct drm_crtc *crtc = &rcrtc->crtc;
+ struct drm_plane *primary;
+ int ret;
+
+ rcrtc->rstc = devm_reset_control_get_shared(rcdu->dev, NULL);
+ if (IS_ERR(rcrtc->rstc)) {
+ dev_err(rcdu->dev, "can't get cpg reset\n");
+ return PTR_ERR(rcrtc->rstc);
+ }
+
+ rcrtc->rzg2l_clocks.aclk = devm_clk_get(rcdu->dev, "aclk");
+ if (IS_ERR(rcrtc->rzg2l_clocks.aclk)) {
+ dev_err(rcdu->dev, "no axi clock for DU\n");
+ return PTR_ERR(rcrtc->rzg2l_clocks.aclk);
+ }
+
+ rcrtc->rzg2l_clocks.pclk = devm_clk_get(rcdu->dev, "pclk");
+ if (IS_ERR(rcrtc->rzg2l_clocks.pclk)) {
+ dev_err(rcdu->dev, "no peripheral clock for DU\n");
+ return PTR_ERR(rcrtc->rzg2l_clocks.pclk);
+ }
+
+ rcrtc->rzg2l_clocks.dclk = devm_clk_get(rcdu->dev, "vclk");
+ if (IS_ERR(rcrtc->rzg2l_clocks.dclk)) {
+ dev_err(rcdu->dev, "no video clock for DU\n");
+ return PTR_ERR(rcrtc->rzg2l_clocks.dclk);
+ }
+
+ init_waitqueue_head(&rcrtc->flip_wait);
+ init_waitqueue_head(&rcrtc->vblank_wait);
+ spin_lock_init(&rcrtc->vblank_lock);
+
+ rcrtc->dev = rcdu;
+ rcrtc->index = 0;
+
+ primary = &rcrtc->vsp->planes[rcrtc->vsp_pipe].plane;
+
+ ret = drm_crtc_init_with_planes(&rcdu->ddev, crtc, primary, NULL,
+ &crtc_funcs_rzg2l,
+ NULL);
+ if (ret < 0)
+ return ret;
+
+ drm_crtc_helper_add(crtc, &crtc_helper_funcs);
+
+ rzg2l_du_crtc_crc_init(rcrtc);
+
+ return 0;
+}
diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_crtc.h b/drivers/gpu/drm/rcar-du/rzg2l_du_crtc.h
new file mode 100644
index 000000000000..3ce55f2d2b3d
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rzg2l_du_crtc.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * RZ/G2L Display Unit CRTCs
+ *
+ * Copyright (C) 2022 Renesas Electronics Corporation
+ *
+ * Based on rcar_du_crtc.h
+ */
+
+#ifndef __RZG2L_DU_CRTC_H__
+#define __RZG2L_DU_CRTC_H__
+
+#include "rcar_du_crtc.h"
+
+struct rcar_du_format_info;
+struct reset_control;
+
+int rzg2l_du_crtc_create(struct rcar_du_device *rcdu);
+
+void rzg2l_du_crtc_finish_page_flip(struct rcar_du_crtc *rcrtc);
+
+int __rzg2l_du_crtc_plane_atomic_check(struct drm_plane *plane,
+ struct drm_plane_state *state,
+ const struct rcar_du_format_info **format);
+
+#endif /* __RZG2L_DU_CRTC_H__ */
diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_drv.c b/drivers/gpu/drm/rcar-du/rzg2l_du_drv.c
new file mode 100644
index 000000000000..4c45b9b8441e
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rzg2l_du_drv.c
@@ -0,0 +1,196 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * RZ/G2L DU DRM driver
+ *
+ * Copyright (C) 2022 Renesas Electronics Corporation
+ *
+ * Based on rcar_du_drv.c
+ */
+
+#include <linux/clk.h>
+#include <linux/dma-mapping.h>
+#include <linux/io.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pm.h>
+#include <linux/slab.h>
+#include <linux/wait.h>
+
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_drv.h>
+#include <drm/drm_fbdev_generic.h>
+#include <drm/drm_gem_dma_helper.h>
+#include <drm/drm_managed.h>
+#include <drm/drm_probe_helper.h>
+
+#include "rzg2l_du_drv.h"
+#include "rzg2l_du_kms.h"
+
+/* -----------------------------------------------------------------------------
+ * Device Information
+ */
+
+static const struct rcar_du_device_info rzg2l_du_r9a07g044_info = {
+ .gen = 3,
+ .features = RCAR_DU_FEATURE_CRTC_IRQ
+ | RCAR_DU_FEATURE_CRTC_CLOCK
+ | RCAR_DU_FEATURE_VSP1_SOURCE,
+ .channels_mask = BIT(0),
+ .routes = {
+ [RCAR_DU_OUTPUT_DPAD0] = {
+ .possible_crtcs = BIT(0),
+ .port = 0,
+ },
+ [RCAR_DU_OUTPUT_DSI0] = {
+ .possible_crtcs = BIT(0),
+ .port = 1,
+ },
+ },
+ .num_rpf = 2,
+};
+
+static const struct of_device_id rzg2l_du_of_table[] = {
+ { .compatible = "renesas,r9a07g044-du", .data = &rzg2l_du_r9a07g044_info },
+ { /* sentinel */ }
+};
+
+MODULE_DEVICE_TABLE(of, rzg2l_du_of_table);
+
+const char *rzg2l_du_output_name(enum rcar_du_output output)
+{
+ static const char * const names[] = {
+ [RCAR_DU_OUTPUT_DPAD0] = "DPAD0",
+ [RCAR_DU_OUTPUT_DSI0] = "DSI0",
+ };
+
+ if (output != RCAR_DU_OUTPUT_DPAD0 && output != RCAR_DU_OUTPUT_DSI0)
+ return "NOT SUPPORTED";
+
+ if (output >= ARRAY_SIZE(names) || !names[output])
+ return "UNKNOWN";
+
+ return names[output];
+}
+
+/* -----------------------------------------------------------------------------
+ * DRM operations
+ */
+
+DEFINE_DRM_GEM_DMA_FOPS(rzg2l_du_fops);
+
+static const struct drm_driver rzg2l_du_driver = {
+ .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
+ .dumb_create = rcar_du_dumb_create,
+ .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
+ .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
+ .gem_prime_import_sg_table = rcar_du_gem_prime_import_sg_table,
+ .gem_prime_mmap = drm_gem_prime_mmap,
+ .fops = &rzg2l_du_fops,
+ .name = "rzg2l-du",
+ .desc = "Renesas RZ/G2L DU",
+ .date = "20220305",
+ .major = 1,
+ .minor = 0,
+};
+
+/* -----------------------------------------------------------------------------
+ * Platform driver
+ */
+
+static int rzg2l_du_remove(struct platform_device *pdev)
+{
+ struct rcar_du_device *rcdu = platform_get_drvdata(pdev);
+ struct drm_device *ddev = &rcdu->ddev;
+
+ drm_dev_unregister(ddev);
+ drm_atomic_helper_shutdown(ddev);
+
+ drm_kms_helper_poll_fini(ddev);
+
+ return 0;
+}
+
+static void rzg2l_du_shutdown(struct platform_device *pdev)
+{
+ struct rcar_du_device *rcdu = platform_get_drvdata(pdev);
+
+ drm_atomic_helper_shutdown(&rcdu->ddev);
+}
+
+static int rzg2l_du_probe(struct platform_device *pdev)
+{
+ struct rcar_du_device *rcdu;
+ int ret;
+
+ if (drm_firmware_drivers_only())
+ return -ENODEV;
+
+ /* Allocate and initialize the RZ/G2L device structure. */
+ rcdu = devm_drm_dev_alloc(&pdev->dev, &rzg2l_du_driver,
+ struct rcar_du_device, ddev);
+ if (IS_ERR(rcdu))
+ return PTR_ERR(rcdu);
+
+ rcdu->dev = &pdev->dev;
+ rcdu->info = of_device_get_match_data(rcdu->dev);
+
+ platform_set_drvdata(pdev, rcdu);
+
+ /* I/O resources */
+ rcdu->mmio = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(rcdu->mmio))
+ return PTR_ERR(rcdu->mmio);
+
+ /*
+ * When sourcing frames from a VSP the DU doesn't perform any memory
+ * access so set the DMA coherent mask to 40 bits to accept all buffers.
+ */
+ ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(40));
+ if (ret)
+ return ret;
+
+ /* DRM/KMS objects */
+ ret = rzg2l_du_modeset_init(rcdu);
+ if (ret < 0) {
+ if (ret != -EPROBE_DEFER)
+ dev_err(&pdev->dev,
+ "failed to initialize DRM/KMS (%d)\n", ret);
+ goto error;
+ }
+
+ /*
+ * Register the DRM device with the core and the connectors with
+ * sysfs.
+ */
+ ret = drm_dev_register(&rcdu->ddev, 0);
+ if (ret)
+ goto error;
+
+ DRM_INFO("Device %s probed\n", dev_name(&pdev->dev));
+
+ drm_fbdev_generic_setup(&rcdu->ddev, 32);
+
+ return 0;
+
+error:
+ drm_kms_helper_poll_fini(&rcdu->ddev);
+ return ret;
+}
+
+static struct platform_driver rzg2l_du_platform_driver = {
+ .probe = rzg2l_du_probe,
+ .remove = rzg2l_du_remove,
+ .shutdown = rzg2l_du_shutdown,
+ .driver = {
+ .name = "rzg2l-du",
+ .of_match_table = rzg2l_du_of_table,
+ },
+};
+
+module_platform_driver(rzg2l_du_platform_driver);
+
+MODULE_AUTHOR("Biju Das <biju.das.jz@bp.renesas.com>");
+MODULE_DESCRIPTION("Renesas RZ/G2L DU DRM Driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_drv.h b/drivers/gpu/drm/rcar-du/rzg2l_du_drv.h
new file mode 100644
index 000000000000..1f619c2362fe
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rzg2l_du_drv.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * RZ/G2L Display Unit DRM driver
+ *
+ * Copyright (C) 2022 Renesas Electronics Corporation
+ *
+ * Based on rcar_du_drv.h
+ */
+
+#ifndef __RZG2L_DU_DRV_H__
+#define __RZG2L_DU_DRV_H__
+
+#include "rcar_du_drv.h"
+
+#include "rzg2l_du_crtc.h"
+#include "rzg2l_du_vsp.h"
+
+const char *rzg2l_du_output_name(enum rcar_du_output output);
+
+#endif /* __RZG2L_DU_DRV_H__ */
diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_encoder.c b/drivers/gpu/drm/rcar-du/rzg2l_du_encoder.c
new file mode 100644
index 000000000000..cf4ed49f3db1
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rzg2l_du_encoder.c
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * RZ/G2L Display Unit Encoder
+ *
+ * Copyright (C) 2022 Renesas Electronics Corporation
+ *
+ * Based on rcar_du_encoder.c
+ */
+
+#include <linux/export.h>
+#include <linux/of.h>
+
+#include "rzg2l_du_drv.h"
+#include "rzg2l_du_encoder.h"
+
+/* -----------------------------------------------------------------------------
+ * Encoder
+ */
+
+int rzg2l_du_encoder_init(struct rcar_du_device *rcdu,
+ enum rcar_du_output output,
+ struct device_node *enc_node)
+{
+ return rcar_du_lib_encoder_init(rcdu, output, enc_node,
+ rzg2l_du_output_name(output));
+}
diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_encoder.h b/drivers/gpu/drm/rcar-du/rzg2l_du_encoder.h
new file mode 100644
index 000000000000..c39a0c7cd12f
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rzg2l_du_encoder.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * RZ/G2L Display Unit Encoder
+ *
+ * Copyright (C) 2022 Renesas Electronics Corporation
+ *
+ * Based on rcar_du_encoder.h
+ */
+
+#ifndef __RZG2L_DU_ENCODER_H__
+#define __RZG2L_DU_ENCODER_H__
+
+#include "rcar_du_encoder_lib.h"
+
+int rzg2l_du_encoder_init(struct rcar_du_device *rcdu,
+ enum rcar_du_output output,
+ struct device_node *enc_node);
+
+#endif /* __RZG2L_DU_ENCODER_H__ */
diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_kms.c b/drivers/gpu/drm/rcar-du/rzg2l_du_kms.c
new file mode 100644
index 000000000000..5b7f0ebd2a06
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rzg2l_du_kms.c
@@ -0,0 +1,157 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * RZ/G2L Display Unit Mode Setting
+ *
+ * Copyright (C) 2022 Renesas Electronics Corporation
+ *
+ * Based on rcar_du_kms.c
+ */
+
+#include <drm/drm_atomic.h>
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_crtc.h>
+#include <drm/drm_device.h>
+#include <drm/drm_framebuffer.h>
+#include <drm/drm_gem_dma_helper.h>
+#include <drm/drm_gem_framebuffer_helper.h>
+#include <drm/drm_managed.h>
+#include <drm/drm_probe_helper.h>
+#include <drm/drm_vblank.h>
+
+#include <linux/device.h>
+#include <linux/dma-buf.h>
+#include <linux/of_graph.h>
+#include <linux/of_platform.h>
+#include <linux/wait.h>
+
+#include "rzg2l_du_crtc.h"
+#include "rzg2l_du_drv.h"
+#include "rzg2l_du_encoder.h"
+#include "rzg2l_du_kms.h"
+#include "rzg2l_du_vsp.h"
+#include "rcar_du_writeback.h"
+
+/* -----------------------------------------------------------------------------
+ * Frame buffer
+ */
+
+static struct drm_framebuffer *
+rzg2l_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
+ const struct drm_mode_fb_cmd2 *mode_cmd)
+{
+ return rcar_du_lib_fb_create(dev, file_priv, mode_cmd);
+}
+
+/* -----------------------------------------------------------------------------
+ * Initialization
+ */
+
+static const struct drm_mode_config_funcs rzg2l_du_mode_config_funcs = {
+ .fb_create = rzg2l_du_fb_create,
+ .atomic_check = drm_atomic_helper_check,
+ .atomic_commit = drm_atomic_helper_commit,
+};
+
+int rzg2l_du_modeset_init(struct rcar_du_device *rcdu)
+{
+ struct drm_device *dev = &rcdu->ddev;
+ struct drm_encoder *encoder;
+ unsigned int dpad0_sources;
+ unsigned int num_encoders;
+ unsigned int i;
+ int ret;
+
+ ret = drmm_mode_config_init(dev);
+ if (ret)
+ return ret;
+
+ dev->mode_config.min_width = 0;
+ dev->mode_config.min_height = 0;
+ dev->mode_config.normalize_zpos = true;
+ dev->mode_config.funcs = &rzg2l_du_mode_config_funcs;
+ dev->mode_config.helper_private = rcar_du_lib_mode_cfg_helper_get();
+
+ /*
+ * The RZ/G2L DU uses the VSP1 for memory access, and is limited
+ * to frame sizes of 1920x1080.
+ */
+ dev->mode_config.max_width = 1920;
+ dev->mode_config.max_height = 1080;
+
+ rcdu->num_crtcs = hweight8(rcdu->info->channels_mask);
+
+ ret = rcar_du_properties_init(rcdu);
+ if (ret < 0)
+ return ret;
+
+ /*
+ * Initialize vertical blanking interrupts handling. Start with vblank
+ * disabled for all CRTCs.
+ */
+ ret = drm_vblank_init(dev, rcdu->num_crtcs);
+ if (ret < 0)
+ return ret;
+
+ /* Initialize the compositors. */
+ ret = rcar_du_lib_vsps_init(rcdu, rzg2l_du_vsp_init);
+ if (ret < 0)
+ return ret;
+
+ /* Create the CRTCs. */
+ ret = rzg2l_du_crtc_create(rcdu);
+ if (ret < 0)
+ return ret;
+
+ /* Initialize the encoders. */
+ ret = rcar_du_encoders_init(rcdu, rzg2l_du_output_name,
+ rzg2l_du_encoder_init);
+ if (ret < 0)
+ return ret;
+
+ if (ret == 0) {
+ dev_err(rcdu->dev, "error: no encoder could be initialized\n");
+ return -EINVAL;
+ }
+
+ num_encoders = ret;
+
+ /*
+ * Set the possible CRTCs and possible clones. There's always at least
+ * one way for all encoders to clone each other, set all bits in the
+ * possible clones field.
+ */
+ list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+ struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
+ const struct rcar_du_output_routing *route =
+ &rcdu->info->routes[renc->output];
+
+ encoder->possible_crtcs = route->possible_crtcs;
+ encoder->possible_clones = (1 << num_encoders) - 1;
+ }
+
+ /* Create the writeback connectors. */
+ for (i = 0; i < rcdu->num_crtcs; ++i) {
+ struct rcar_du_crtc *rcrtc = &rcdu->crtcs[i];
+
+ ret = rcar_du_writeback_init(rcdu, rcrtc);
+ if (ret < 0)
+ return ret;
+ }
+
+ /*
+ * Initialize the default DPAD0 source to the index of the first DU
+ * channel that can be connected to DPAD0. The exact value doesn't
+ * matter as it should be overwritten by mode setting for the RGB
+ * output, but it is nonetheless required to ensure a valid initial
+ * hardware configuration on Gen3 where DU0 can't always be connected to
+ * DPAD0.
+ */
+ dpad0_sources = rcdu->info->routes[RCAR_DU_OUTPUT_DPAD0].possible_crtcs;
+ rcdu->dpad0_source = ffs(dpad0_sources) - 1;
+
+ drm_mode_config_reset(dev);
+
+ drm_kms_helper_poll_init(dev);
+
+ return 0;
+}
diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_kms.h b/drivers/gpu/drm/rcar-du/rzg2l_du_kms.h
new file mode 100644
index 000000000000..c56d29953d2b
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rzg2l_du_kms.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * RZ/G2L Display Unit Mode Setting
+ *
+ * Copyright (C) 2022 Renesas Electronics Corporation
+ *
+ * Based on rcar_du_kms.h
+ */
+
+#ifndef __RZG2L_DU_KMS_H__
+#define __RZG2L_DU_KMS_H__
+
+#include "rcar_du_kms_lib.h"
+
+int rzg2l_du_modeset_init(struct rcar_du_device *rcdu);
+
+#endif /* __RZG2L_DU_KMS_H__ */
diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_regs.h b/drivers/gpu/drm/rcar-du/rzg2l_du_regs.h
new file mode 100644
index 000000000000..07787c12d5b6
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rzg2l_du_regs.h
@@ -0,0 +1,67 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * RZ/G2L LCDC Registers Definitions
+ *
+ * Copyright (C) 2022 Renesas Electronics Corporation
+ *
+ */
+
+#ifndef __RZG2L_DU_REGS_H__
+#define __RZG2L_DU_REGS_H__
+
+/* -----------------------------------------------------------------------------
+ * RZ/G2L Display Registers
+ */
+
+#define DU_MCR0 0x00
+#define DU_MCR0_DPI_OE BIT(0)
+#define DU_MCR0_DI_EN BIT(8)
+#define DU_MCR0_PB_CLR BIT(16)
+
+#define DU_MSR0 0x04
+#define DU_MSR0_ST_DI_BSY BIT(8)
+#define DU_MSR0_ST_PB_WFULL BIT(16)
+#define DU_MSR0_ST_PB_WINIT BIT(18)
+#define DU_MSR0_ST_PB_REMPTY BIT(20)
+#define DU_MSR0_ST_PB_RUF BIT(21)
+#define DU_MSR0_ST_PB_RINIT BIT(22)
+
+#define DU_MSR1 0x08
+
+#define DU_IMR0 0x0c
+#define DU_MSR0_IM_PB_RUF BIT(0)
+
+#define DU_DITR0 0x10
+#define DU_DITR0_DPI_CLKMD BIT(0)
+#define DU_DITR0_DEMD_LOW 0x0
+#define DU_DITR0_DEMD_HIGH (BIT(8) | BIT(9))
+#define DU_DITR0_VSPOL BIT(16)
+#define DU_DITR0_HSPOL BIT(17)
+
+#define DU_DITR1 0x14
+#define DU_DITR1_VSA(x) ((x) << 0)
+#define DU_DITR1_VACTIVE(x) ((x) << 16)
+
+#define DU_DITR2 0x18
+#define DU_DITR2_VBP(x) ((x) << 0)
+#define DU_DITR2_VFP(x) ((x) << 16)
+
+#define DU_DITR3 0x1c
+#define DU_DITR3_HSA(x) ((x) << 0)
+#define DU_DITR3_HACTIVE(x) ((x) << 16)
+
+#define DU_DITR4 0x20
+#define DU_DITR4_HBP(x) ((x) << 0)
+#define DU_DITR4_HFP(x) ((x) << 16)
+
+#define DU_DITR5 0x24
+#define DU_DITR5_VSFT(x) ((x) << 0)
+#define DU_DITR5_HSFT(x) ((x) << 16)
+
+#define DU_MCR1 0x40
+#define DU_MCR1_PB_AUTOCLR BIT(16)
+
+#define DU_PBCR0 0x4c
+#define DU_PBCR0_PB_DEP(x) ((x) << 0)
+
+#endif /* __RZG2L_DU_REGS_H__ */
diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_vsp.c b/drivers/gpu/drm/rcar-du/rzg2l_du_vsp.c
new file mode 100644
index 000000000000..e6da657b77c5
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rzg2l_du_vsp.c
@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * RZ/G2L Display Unit VSP-Based Compositor
+ *
+ * Copyright (C) 2022 Renesas Electronics Corporation
+ *
+ * Based on rcar_du_vsp.c
+ */
+
+#include <drm/drm_atomic.h>
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_blend.h>
+#include <drm/drm_crtc.h>
+#include <drm/drm_framebuffer.h>
+#include <drm/drm_gem_atomic_helper.h>
+#include <drm/drm_managed.h>
+#include <drm/drm_plane_helper.h>
+#include <drm/drm_vblank.h>
+
+#include <linux/bitops.h>
+#include <linux/of_platform.h>
+#include <linux/scatterlist.h>
+
+#include <media/vsp1.h>
+
+#include "rzg2l_du_drv.h"
+#include "rzg2l_du_kms.h"
+#include "rzg2l_du_vsp.h"
+#include "rcar_du_writeback.h"
+
+static void rzg2l_du_vsp_complete(void *private, unsigned int status, u32 crc)
+{
+ struct rcar_du_crtc *crtc = private;
+
+ if (crtc->vblank_enable)
+ drm_crtc_handle_vblank(&crtc->crtc);
+
+ if (status & VSP1_DU_STATUS_COMPLETE)
+ rzg2l_du_crtc_finish_page_flip(crtc);
+ if (status & VSP1_DU_STATUS_WRITEBACK)
+ rcar_du_writeback_complete(crtc);
+
+ drm_crtc_add_crc_entry(&crtc->crtc, false, 0, &crc);
+}
+
+void rzg2l_du_vsp_enable(struct rcar_du_crtc *crtc)
+{
+ const struct drm_display_mode *mode = &crtc->crtc.state->adjusted_mode;
+ struct vsp1_du_lif_config cfg = {
+ .width = mode->hdisplay,
+ .height = mode->vdisplay,
+ .interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE,
+ .callback = rzg2l_du_vsp_complete,
+ .callback_data = crtc,
+ };
+
+ vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
+}
+
+static int rzg2l_du_vsp_plane_atomic_check(struct drm_plane *plane,
+ struct drm_atomic_state *state)
+{
+ struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
+ plane);
+ struct rcar_du_vsp_plane_state *rstate = to_rcar_vsp_plane_state(new_plane_state);
+
+ return __rzg2l_du_crtc_plane_atomic_check(plane, new_plane_state, &rstate->format);
+}
+
+static const struct drm_plane_helper_funcs rzg2l_du_vsp_plane_helper_funcs = {
+ .prepare_fb = rcar_du_vsp_plane_prepare_fb,
+ .cleanup_fb = rcar_du_vsp_plane_cleanup_fb,
+ .atomic_check = rzg2l_du_vsp_plane_atomic_check,
+ .atomic_update = rcar_du_vsp_plane_atomic_update,
+};
+
+int rzg2l_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
+ unsigned int crtcs)
+{
+ return rcar_du_lib_vsp_init(vsp, np, crtcs,
+ &rzg2l_du_vsp_plane_helper_funcs);
+}
diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_vsp.h b/drivers/gpu/drm/rcar-du/rzg2l_du_vsp.h
new file mode 100644
index 000000000000..b9d7da42b0da
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rzg2l_du_vsp.h
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * RZ/G2L Display Unit VSP-Based Compositor
+ *
+ * Copyright (C) 2022 Renesas Electronics Corporation
+ *
+ * Based on rcar_du_vsp.h
+ */
+
+#ifndef __RZG2L_DU_VSP_H__
+#define __RZG2L_DU_VSP_H__
+
+#include "rcar_du_vsp_lib.h"
+
+#ifdef CONFIG_DRM_RCAR_VSP
+int rzg2l_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
+ unsigned int crtcs);
+void rzg2l_du_vsp_enable(struct rcar_du_crtc *crtc);
+#else
+static inline int rzg2l_du_vsp_init(struct rcar_du_vsp *vsp,
+ struct device_node *np,
+ unsigned int crtcs)
+{
+ return -ENXIO;
+}
+
+static inline void rzg2l_du_vsp_enable(struct rcar_du_crtc *crtc) { };
+#endif
+
+#endif /* __RZG2L_DU_VSP_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* RE: [PATCH v6 00/19] Add RZ/G2L Display support
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (18 preceding siblings ...)
2022-11-23 17:29 ` [PATCH v6 19/19] drm: rcar-du: Add RZ/G2L DU Support Biju Das
@ 2023-01-09 9:15 ` Biju Das
2023-02-14 11:00 ` Biju Das
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2023-01-09 9:15 UTC (permalink / raw)
To: David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski,
Laurent Pinchart
Cc: devicetree, Chris Paterson, Geert Uytterhoeven,
Prabhakar Mahadev Lad, dri-devel, linux-renesas-soc
Hi Laurent and DRM folks,
Gentle ping for review.
Cheers,
Biju
> -----Original Message-----
> From: Biju Das <biju.das.jz@bp.renesas.com>
> Sent: 23 November 2022 17:29
> To: David Airlie <airlied@gmail.com>; Daniel Vetter <daniel@ffwll.ch>; Rob
> Herring <robh+dt@kernel.org>; Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Biju Das <biju.das.jz@bp.renesas.com>; Laurent Pinchart
> <laurent.pinchart+renesas@ideasonboard.com>; dri-
> devel@lists.freedesktop.org; devicetree@vger.kernel.org; Geert Uytterhoeven
> <geert+renesas@glider.be>; Chris Paterson <Chris.Paterson2@renesas.com>;
> Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>; linux-
> renesas-soc@vger.kernel.org
> Subject: [PATCH v6 00/19] Add RZ/G2L Display support
>
> RZ/G2L LCD controller composed of Frame compression Processor(FCPVD), Video
> signal processor (VSPD) and Display unit(DU). The output of LCDC is
> connected to Display parallel interface and MIPI link video interface.
>
> The output from DSI is connected to ADV7535.
>
> The DU controller on RZ/G2L LCDC is similar to R-Car as it is connected to
> VSPD. RCar DU lib is created for sharing kms, vsp and encoder driver code
> between both RCar and RZ/G2L and created new CRTC/DRM driver specific to
> RZ/G2L.
>
> v5->v6:
> * Merged DU lib and RZ/G2L du driver in same patch series
> * Rebased to latest drm-misc.
> * Merged patch#1 to RZ/G2L Driver patch.
> * Updated KConfig dependency from ARCH_RENESAS->ARCH_RZG2L.
> * Optimized rzg2l_du_output_name() by removing unsupported outputs.
> * Fixed checkpatch warnings
> * Updated rcar_du_vsp_plane_setup()
> * Updated rcar_du_fb_create() for the pixel fmt error.
> * Updated commit description for RZ/G2UL driver patch
> * Updated Kconfig
> * Replaced drm_fb_cma_helper->drm_gem_dma_helper
> * Updated header files.
> v4->v5:
> * Added Rb tag from Rob for binding patch.
> * Started using RCar DU libs(kms, vsp and encoder)
> * Started using rcar_du_device, rcar_du_write, rcar_du_crtc,
> rcar_du_format_info and rcar_du_encoder.
> v3->v4:
> * Changed compatible name from renesas,du-r9a07g044->renesas,r9a07g044-du
> * started using same compatible for RZ/G2{L,LC}
> * Removed rzg2l_du_group.h and struct rzg2l_du_group
> * Renamed __rzg2l_du_group_start_stop->rzg2l_du_start_stop
> * Removed rzg2l_du_group_restart
> * Updated rzg2l_du_crtc_set_display_timing
> * Removed mode_valid callback.
> * Updated rzg2l_du_crtc_create() parameters
> * Updated compatible
> * Removed RZG2L_DU_MAX_GROUPS
> V2->v3:
> * Added new bindings for RZ/G2L DU
> * Removed indirection and created new DRM driver based on R-Car DU
> v1->v2:
> * Based on [1], all references to 'rzg2l_lcdc' replaced with 'rzg2l_du'
> * Updated commit description for bindings
> * Removed LCDC references from bindings
> * Changed clock name from du.0->aclk from bindings
> * Changed reset name from du.0->du from bindings
> * Replaced crtc_helper_funcs->rcar_crtc_helper_funcs
> * Updated macro DRM_RZG2L_LCDC->DRM_RZG2L_DU
> * Replaced rzg2l-lcdc-drm->rzg2l-du-drm
> * Added forward declaration for struct reset_control
>
> [1]
> https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.
> kernel.org%2Fproject%2Flinux-renesas-soc%2Fpatch%2F20220312084205.31462-2-
> biju.das.jz%40bp.renesas.com%2F&data=05%7C01%7Cbiju.das.jz%40bp.renesas.
> com%7C188b5bb9959c455feddd08dacd783d30%7C53d82571da1947e49cb4625a166a4a2a%7C
> 0%7C0%7C638048213567344079%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQI
> joiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=IMfszHaw
> IRmRJzVhVxvRyWI9%2FJQAJ5UJ7mjJsCVWCZY%3D&reserved=0
>
> RFC->v1:
> * Changed minItems->maxItems for renesas,vsps.
> * Added RZ/G2L LCDC driver with special handling for CRTC reusing
> most of RCar DU code
> * Fixed the comments for num_rpf from rpf's->RPFs/ and vsp->VSP.
> RFC:
>
> https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.
> kernel.org%2Fproject%2Flinux-renesas-soc%2Fpatch%2F20220112174612.10773-18-
> biju.das.jz%40bp.renesas.com%2F&data=05%7C01%7Cbiju.das.jz%40bp.renesas.
> com%7C188b5bb9959c455feddd08dacd783d30%7C53d82571da1947e49cb4625a166a4a2a%7C
> 0%7C0%7C638048213567344079%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQI
> joiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=j4VAFXNz
> bRYcEnVYegtYyIs917yfivurp8YCuNs26kI%3D&reserved=0
>
> https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.
> kernel.org%2Fproject%2Flinux-renesas-soc%2Fpatch%2F20220112174612.10773-12-
> biju.das.jz%40bp.renesas.com%2F&data=05%7C01%7Cbiju.das.jz%40bp.renesas.
> com%7C188b5bb9959c455feddd08dacd783d30%7C53d82571da1947e49cb4625a166a4a2a%7C
> 0%7C0%7C638048213567344079%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQI
> joiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=IuTkYbVY
> zBkRIVEalsm%2BDt8yfkdbRnyvYXO%2B5tBNFQw%3D&reserved=0
>
> https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.
> kernel.org%2Fproject%2Flinux-renesas-soc%2Fpatch%2F20220112174612.10773-13-
> biju.das.jz%40bp.renesas.com%2F&data=05%7C01%7Cbiju.das.jz%40bp.renesas.
> com%7C188b5bb9959c455feddd08dacd783d30%7C53d82571da1947e49cb4625a166a4a2a%7C
> 0%7C0%7C638048213567344079%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQI
> joiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=PwDmpSsm
> Yr9xnHDc1R%2FeljaeDDaCeIKUUjs7ak6cu3A%3D&reserved=0
>
> https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.
> kernel.org%2Fproject%2Flinux-renesas-soc%2Fpatch%2F20220112174612.10773-19-
> biju.das.jz%40bp.renesas.com%2F&data=05%7C01%7Cbiju.das.jz%40bp.renesas.
> com%7C188b5bb9959c455feddd08dacd783d30%7C53d82571da1947e49cb4625a166a4a2a%7C
> 0%7C0%7C638048213567344079%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQI
> joiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=%2B8Koz6
> XdxLSbvRgJ7o319aTShHiPbod%2FA0TVl9%2FqYSE%3D&reserved=0
>
> Modetest output:-
> root@smarc-rzg2l:~# modetest -M rzg2l-du
> Encoders:
> id crtc type possible crtcs possible clones
> 43 42 none 0x00000001 0x00000001
> 45 0 Virtual 0x00000001 0x00000002
>
> Connectors:
> id encoder status name size (mm) modes
> encoders
> 44 43 connected HDMI-A-1 520x320 30 43
> modes:
> index name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot)
> #0 1920x1080 59.72 1920 1968 2000 2080 1080 1082 1087 1111 138000 flags:
> phsync, nvsync; type: preferred, driver
> #1 1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags:
> phsync, pvsync; type: driver
> #2 1920x1080 59.94 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags:
> phsync, pvsync; type: driver
> #3 1920x1080 59.94 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags:
> phsync, pvsync; type: driver
> #4 1280x1024 75.02 1280 1296 1440 1688 1024 1025 1028 1066 135000 flags:
> phsync, pvsync; type: driver
> #5 1280x1024 60.02 1280 1328 1440 1688 1024 1025 1028 1066 108000 flags:
> phsync, pvsync; type: driver
> #6 1152x864 75.00 1152 1216 1344 1600 864 865 868 900 108000 flags:
> phsync, pvsync; type: driver
> #7 1280x720 60.00 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync,
> pvsync; type: driver
> #8 1280x720 59.94 1280 1390 1430 1650 720 725 730 750 74176 flags: phsync,
> pvsync; type: driver
> #9 1280x720 50.00 1280 1720 1760 1980 720 725 730 750 74250 flags: phsync,
> pvsync; type: driver
> #10 1280x720 50.00 1280 1720 1760 1980 720 725 730 750 74250 flags:
> phsync, pvsync; type: driver
> #11 1024x768 75.03 1024 1040 1136 1312 768 769 772 800 78750 flags:
> phsync, pvsync; type: driver
> #12 1024x768 70.07 1024 1048 1184 1328 768 771 777 806 75000 flags:
> nhsync, nvsync; type: driver
> #13 1024x768 60.00 1024 1048 1184 1344 768 771 777 806 65000 flags:
> nhsync, nvsync; type: driver
> #14 1080x607 59.97 1080 1120 1232 1384 607 608 611 629 52210 flags:
> nhsync, pvsync; type:
> #15 832x624 74.55 832 864 928 1152 624 625 628 667 57284 flags: nhsync,
> nvsync; type: driver
> #16 800x600 75.00 800 816 896 1056 600 601 604 625 49500 flags: phsync,
> pvsync; type: driver
> #17 800x600 72.19 800 856 976 1040 600 637 643 666 50000 flags: phsync,
> pvsync; type: driver
> #18 800x600 60.32 800 840 968 1056 600 601 605 628 40000 flags: phsync,
> pvsync; type: driver
> #19 800x600 56.25 800 824 896 1024 600 601 603 625 36000 flags: phsync,
> pvsync; type: driver
> #20 720x576 50.00 720 732 796 864 576 581 586 625 27000 flags: nhsync,
> nvsync; type: driver
> #21 720x576 50.00 720 732 796 864 576 581 586 625 27000 flags: nhsync,
> nvsync; type: driver
> #22 720x480 60.00 720 736 798 858 480 489 495 525 27027 flags: nhsync,
> nvsync; type: driver
> #23 720x480 59.94 720 736 798 858 480 489 495 525 27000 flags: nhsync,
> nvsync; type: driver
> #24 640x480 75.00 640 656 720 840 480 481 484 500 31500 flags: nhsync,
> nvsync; type: driver
> #25 640x480 72.81 640 664 704 832 480 489 492 520 31500 flags: nhsync,
> nvsync; type: driver
> #26 640x480 66.67 640 704 768 864 480 483 486 525 30240 flags: nhsync,
> nvsync; type: driver
> #27 640x480 60.00 640 656 752 800 480 490 492 525 25200 flags: nhsync,
> nvsync; type: driver
> #28 640x480 59.94 640 656 752 800 480 490 492 525 25175 flags: nhsync,
> nvsync; type: driver
> #29 720x400 70.08 720 738 846 900 400 412 414 449 28320 flags: nhsync,
> pvsync; type: driver
> props:
> 1 EDID:
> flags: immutable blob
> blobs:
>
> value:
> 00ffffffffffff003683832410101010
> 1416010380342078eeb725ac5130b426
> 105054bfef8068c0714f818001010101
> 010101010101e83580a070381f403020
> 250044682100001a000000ff00303031
> 30310a20202020202020000000fc0048
> 444d490a2020202020202020000000fd
> 00384c1e5317000a20202020202001cf
> 02031a71471003140513841223090707
> 8301000065030c0010008c0ad0902040
> 31200c40550036d431000018011d8018
> 711c1620582c250036d43100009e011d
> 80d0721c1620102c258036d43100009e
> 011d00bc52d01e20b828554036d43100
> 001ef339801871382d40582c4500c48e
> 2100001e000000000000000000000054
> 2 DPMS:
> flags: enum
> enums: On=0 Standby=1 Suspend=2 Off=3
> value: 0
> 5 link-status:
> flags: enum
> enums: Good=0 Bad=1
> value: 0
> 6 non-desktop:
> flags: immutable range
> values: 0 1
> value: 0
> 4 TILE:
> flags: immutable blob
> blobs:
>
> value:
> 20 CRTC_ID:
> flags: object
> value: 42
>
> CRTCs:
> id fb pos size
> 42 52 (0,0) (1920x1080)
> #0 1920x1080 59.72 1920 1968 2000 2080 1080 1082 1087 1111 138000 flags:
> phsync, nvsync; type: preferred, driver
> props:
> 22 ACTIVE:
> flags: range
> values: 0 1
> value: 1
> 23 MODE_ID:
> flags: blob
> blobs:
>
> value:
> 101b02008007b007d007200800003804
> 3a043f04570400003c00000009000000
> 48000000313932307831303830000000
> 00000000000000000000000000000000
> 00000000
> 19 OUT_FENCE_PTR:
> flags: range
> values: 0 18446744073709551615
> value: 0
> 24 VRR_ENABLED:
> flags: range
> values: 0 1
> value: 0
>
> Planes:
> id crtc fb CRTC x,y x,y gamma size possible
> crtcs
> 32 42 52 0,0 0,0 0 0x00000001
> formats: RGB8 AR12 XR12 AR15 XR15 RG16 BG24 RG24 BA24 BX24 AR24 XR24 UYVY
> YUYV YVYU NV12 NV21 NV16 NV61 YU12 YV12 YU16 YV16 YU24 YV24
> props:
> 8 type:
> flags: immutable enum
> enums: Overlay=0 Primary=1 Cursor=2
> value: 1
> 17 FB_ID:
> flags: object
> value: 52
> 18 IN_FENCE_FD:
> flags: signed range
> values: -1 2147483647
> value: -1
> 20 CRTC_ID:
> flags: object
> value: 42
> 13 CRTC_X:
> flags: signed range
> values: -2147483648 2147483647
> value: 0
> 14 CRTC_Y:
> flags: signed range
> values: -2147483648 2147483647
> value: 0
> 15 CRTC_W:
> flags: range
> values: 0 2147483647
> value: 1920
> 16 CRTC_H:
> flags: range
> values: 0 2147483647
> value: 1080
> 9 SRC_X:
> flags: range
> values: 0 4294967295
> value: 0
> 10 SRC_Y:
> flags: range
> values: 0 4294967295
> value: 0
> 11 SRC_W:
> flags: range
> values: 0 4294967295
> value: 125829120
> 12 SRC_H:
> flags: range
> values: 0 4294967295
> value: 70778880
> 30 IN_FORMATS:
> flags: immutable blob
> blobs:
>
> value:
> 01000000000000001900000018000000
> 01000000800000005247423841523132
> 58523132415231355852313552473136
> 42473234524732344241323442583234
> 41523234585232345559565959555956
> 595659554e5631324e5632314e563136
> 4e563631595531325956313259553136
> 59563136595532345956323400000000
> ffffff01000000000000000000000000
> 0000000000000000
> in_formats blob decoded:
> RGB8: LINEAR
> AR12: LINEAR
> XR12: LINEAR
> AR15: LINEAR
> XR15: LINEAR
> RG16: LINEAR
> BG24: LINEAR
> RG24: LINEAR
> BA24: LINEAR
> BX24: LINEAR
> AR24: LINEAR
> XR24: LINEAR
> UYVY: LINEAR
> YUYV: LINEAR
> YVYU: LINEAR
> NV12: LINEAR
> NV21: LINEAR
> NV16: LINEAR
> NV61: LINEAR
> YU12: LINEAR
> YV12: LINEAR
> YU16: LINEAR
> YV16: LINEAR
> YU24: LINEAR
> YV24: LINEAR
> 34 alpha:
> flags: range
> values: 0 65535
> value: 65535
> 35 zpos:
> flags: range
> values: 0 1
> value: 0
> 36 pixel blend mode:
> flags: enum
> enums: None=2 Pre-multiplied=0 Coverage=1
> value: 0
> 37 0 0 0,0 0,0 0 0x00000001
> formats: RGB8 AR12 XR12 AR15 XR15 RG16 BG24 RG24 BA24 BX24 AR24 XR24 UYVY
> YUYV YVYU NV12 NV21 NV16 NV61 YU12 YV12 YU16 YV16 YU24 YV24
> props:
> 8 type:
> flags: immutable enum
> enums: Overlay=0 Primary=1 Cursor=2
> value: 0
> 17 FB_ID:
> flags: object
> value: 0
> 18 IN_FENCE_FD:
> flags: signed range
> values: -1 2147483647
> value: -1
> 20 CRTC_ID:
> flags: object
> value: 0
> 13 CRTC_X:
> flags: signed range
> values: -2147483648 2147483647
> value: 0
> 14 CRTC_Y:
> flags: signed range
> values: -2147483648 2147483647
> value: 0
> 15 CRTC_W:
> flags: range
> values: 0 2147483647
> value: 0
> 16 CRTC_H:
> flags: range
> values: 0 2147483647
> value: 0
> 9 SRC_X:
> flags: range
> values: 0 4294967295
> value: 0
> 10 SRC_Y:
> flags: range
> values: 0 4294967295
> value: 0
> 11 SRC_W:
> flags: range
> values: 0 4294967295
> value: 0
> 12 SRC_H:
> flags: range
> values: 0 4294967295
> value: 0
> 30 IN_FORMATS:
> flags: immutable blob
> blobs:
>
> value:
> 01000000000000001900000018000000
> 01000000800000005247423841523132
> 58523132415231355852313552473136
> 42473234524732344241323442583234
> 41523234585232345559565959555956
> 595659554e5631324e5632314e563136
> 4e563631595531325956313259553136
> 59563136595532345956323400000000
> ffffff01000000000000000000000000
> 0000000000000000
> in_formats blob decoded:
> RGB8: LINEAR
> AR12: LINEAR
> XR12: LINEAR
> AR15: LINEAR
> XR15: LINEAR
> RG16: LINEAR
> BG24: LINEAR
> RG24: LINEAR
> BA24: LINEAR
> BX24: LINEAR
> AR24: LINEAR
> XR24: LINEAR
> UYVY: LINEAR
> YUYV: LINEAR
> YVYU: LINEAR
> NV12: LINEAR
> NV21: LINEAR
> NV16: LINEAR
> NV61: LINEAR
> YU12: LINEAR
> YV12: LINEAR
> YU16: LINEAR
> YV16: LINEAR
> YU24: LINEAR
> YV24: LINEAR
> 39 alpha:
> flags: range
> values: 0 65535
> value: 65535
> 40 zpos:
> flags: range
> values: 0 1
> value: 1
> 41 pixel blend mode:
> flags: enum
> enums: None=2 Pre-multiplied=0 Coverage=1
> value: 0
>
> Frame buffers:
> id size pitch
>
> root@smarc-rzg2l:~#
>
> Biju Das (19):
> drm: rcar-du: Add encoder lib support
> drm: rcar-du: Add kms lib support
> drm: rcar-du: Add vsp lib support
> drm: rcar-du: Move rcar_du_vsp_atomic_begin()
> drm: rcar-du: Move rcar_du_vsp_atomic_flush()
> drm: rcar-du: Move vsp rcar_du_vsp_{map,unmap}_fb()
> drm: rcar-du: Move rcar_du_dumb_create()
> drm: rcar-du: Move rcar_du_gem_prime_import_sg_table()
> drm: rcar-du: Add rcar_du_lib_vsp_init()
> drm: rcar-du: Move rcar_du_vsp_plane_prepare_fb()
> drm: rcar-du: Move rcar_du_vsp_plane_cleanup_fb()
> drm: rcar-du: Move rcar_du_vsp_plane_atomic_update()
> drm: rcar-du: Add rcar_du_lib_fb_create()
> drm: rcar-du: Add rcar_du_lib_mode_cfg_helper_get()
> drm: rcar-du: Move rcar_du_encoders_init()
> drm: rcar-du: Move rcar_du_properties_init()
> drm: rcar-du: Add rcar_du_lib_vsps_init()
> dt-bindings: display: Document Renesas RZ/G2L DU bindings
> drm: rcar-du: Add RZ/G2L DU Support
>
> .../bindings/display/renesas,rzg2l-du.yaml | 124 +++
> drivers/gpu/drm/rcar-du/Kconfig | 25 +-
> drivers/gpu/drm/rcar-du/Makefile | 17 +
> drivers/gpu/drm/rcar-du/rcar_du_crtc.h | 10 +
> drivers/gpu/drm/rcar-du/rcar_du_encoder.c | 117 +--
> drivers/gpu/drm/rcar-du/rcar_du_encoder.h | 14 +-
> drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.c | 138 ++++
> drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.h | 30 +
> drivers/gpu/drm/rcar-du/rcar_du_kms.c | 664 +---------------
> drivers/gpu/drm/rcar-du/rcar_du_kms.h | 29 +-
> drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 715 +++++++++++++++++
> drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 62 ++
> drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 361 +--------
> drivers/gpu/drm/rcar-du/rcar_du_vsp.h | 26 +-
> drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 390 ++++++++++
> drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 76 ++
> drivers/gpu/drm/rcar-du/rzg2l_du_crtc.c | 716 ++++++++++++++++++
> drivers/gpu/drm/rcar-du/rzg2l_du_crtc.h | 26 +
> drivers/gpu/drm/rcar-du/rzg2l_du_drv.c | 196 +++++
> drivers/gpu/drm/rcar-du/rzg2l_du_drv.h | 20 +
> drivers/gpu/drm/rcar-du/rzg2l_du_encoder.c | 26 +
> drivers/gpu/drm/rcar-du/rzg2l_du_encoder.h | 19 +
> drivers/gpu/drm/rcar-du/rzg2l_du_kms.c | 157 ++++
> drivers/gpu/drm/rcar-du/rzg2l_du_kms.h | 17 +
> drivers/gpu/drm/rcar-du/rzg2l_du_regs.h | 67 ++
> drivers/gpu/drm/rcar-du/rzg2l_du_vsp.c | 82 ++
> drivers/gpu/drm/rcar-du/rzg2l_du_vsp.h | 30 +
> 27 files changed, 2958 insertions(+), 1196 deletions(-) create mode 100644
> Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
> create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.c
> create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.h
> create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
> create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
> create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
> create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_crtc.c
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_crtc.h
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_drv.c
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_drv.h
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_encoder.c
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_encoder.h
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_kms.c
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_kms.h
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_regs.h
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_vsp.c
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_vsp.h
>
> --
> 2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread
* RE: [PATCH v6 00/19] Add RZ/G2L Display support
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
` (19 preceding siblings ...)
2023-01-09 9:15 ` [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
@ 2023-02-14 11:00 ` Biju Das
20 siblings, 0 replies; 22+ messages in thread
From: Biju Das @ 2023-02-14 11:00 UTC (permalink / raw)
To: Biju Das, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, Chris Paterson, Laurent Pinchart, Geert Uytterhoeven,
Prabhakar Mahadev Lad, dri-devel, linux-renesas-soc
Hi Laurent,
Gentle ping for review. Is this patchset is on the right direction?
Please let me know.
As per [1], Indirection being removed and created a new DRM driver(rzg2l-du), and
share common code with the DU driver.
[1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220316131100.30685-6-biju.das.jz@bp.renesas.com/
Cheers,
Biju
> -----Original Message-----
> From: Biju Das <biju.das.jz@bp.renesas.com>
> Sent: Wednesday, November 23, 2022 5:29 PM
> To: David Airlie <airlied@gmail.com>; Daniel Vetter <daniel@ffwll.ch>; Rob
> Herring <robh+dt@kernel.org>; Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Biju Das <biju.das.jz@bp.renesas.com>; Laurent Pinchart
> <laurent.pinchart+renesas@ideasonboard.com>; dri-
> devel@lists.freedesktop.org; devicetree@vger.kernel.org; Geert Uytterhoeven
> <geert+renesas@glider.be>; Chris Paterson <Chris.Paterson2@renesas.com>;
> Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>; linux-
> renesas-soc@vger.kernel.org
> Subject: [PATCH v6 00/19] Add RZ/G2L Display support
>
> RZ/G2L LCD controller composed of Frame compression Processor(FCPVD), Video
> signal processor (VSPD) and Display unit(DU). The output of LCDC is
> connected to Display parallel interface and MIPI link video interface.
>
> The output from DSI is connected to ADV7535.
>
> The DU controller on RZ/G2L LCDC is similar to R-Car as it is connected to
> VSPD. RCar DU lib is created for sharing kms, vsp and encoder driver code
> between both RCar and RZ/G2L and created new CRTC/DRM driver specific to
> RZ/G2L.
>
> v5->v6:
> * Merged DU lib and RZ/G2L du driver in same patch series
> * Rebased to latest drm-misc.
> * Merged patch#1 to RZ/G2L Driver patch.
> * Updated KConfig dependency from ARCH_RENESAS->ARCH_RZG2L.
> * Optimized rzg2l_du_output_name() by removing unsupported outputs.
> * Fixed checkpatch warnings
> * Updated rcar_du_vsp_plane_setup()
> * Updated rcar_du_fb_create() for the pixel fmt error.
> * Updated commit description for RZ/G2UL driver patch
> * Updated Kconfig
> * Replaced drm_fb_cma_helper->drm_gem_dma_helper
> * Updated header files.
> v4->v5:
> * Added Rb tag from Rob for binding patch.
> * Started using RCar DU libs(kms, vsp and encoder)
> * Started using rcar_du_device, rcar_du_write, rcar_du_crtc,
> rcar_du_format_info and rcar_du_encoder.
> v3->v4:
> * Changed compatible name from renesas,du-r9a07g044->renesas,r9a07g044-du
> * started using same compatible for RZ/G2{L,LC}
> * Removed rzg2l_du_group.h and struct rzg2l_du_group
> * Renamed __rzg2l_du_group_start_stop->rzg2l_du_start_stop
> * Removed rzg2l_du_group_restart
> * Updated rzg2l_du_crtc_set_display_timing
> * Removed mode_valid callback.
> * Updated rzg2l_du_crtc_create() parameters
> * Updated compatible
> * Removed RZG2L_DU_MAX_GROUPS
> V2->v3:
> * Added new bindings for RZ/G2L DU
> * Removed indirection and created new DRM driver based on R-Car DU
> v1->v2:
> * Based on [1], all references to 'rzg2l_lcdc' replaced with 'rzg2l_du'
> * Updated commit description for bindings
> * Removed LCDC references from bindings
> * Changed clock name from du.0->aclk from bindings
> * Changed reset name from du.0->du from bindings
> * Replaced crtc_helper_funcs->rcar_crtc_helper_funcs
> * Updated macro DRM_RZG2L_LCDC->DRM_RZG2L_DU
> * Replaced rzg2l-lcdc-drm->rzg2l-du-drm
> * Added forward declaration for struct reset_control
>
> [1]
> https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.
> kernel.org%2Fproject%2Flinux-renesas-soc%2Fpatch%2F20220312084205.31462-2-
> biju.das.jz%40bp.renesas.com%2F&data=05%7C01%7Cbiju.das.jz%40bp.renesas.
> com%7C188b5bb9959c455feddd08dacd783d30%7C53d82571da1947e49cb4625a166a4a2a%7C
> 0%7C0%7C638048213567344079%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQI
> joiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=IMfszHaw
> IRmRJzVhVxvRyWI9%2FJQAJ5UJ7mjJsCVWCZY%3D&reserved=0
>
> RFC->v1:
> * Changed minItems->maxItems for renesas,vsps.
> * Added RZ/G2L LCDC driver with special handling for CRTC reusing
> most of RCar DU code
> * Fixed the comments for num_rpf from rpf's->RPFs/ and vsp->VSP.
> RFC:
>
> https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.
> kernel.org%2Fproject%2Flinux-renesas-soc%2Fpatch%2F20220112174612.10773-18-
> biju.das.jz%40bp.renesas.com%2F&data=05%7C01%7Cbiju.das.jz%40bp.renesas.
> com%7C188b5bb9959c455feddd08dacd783d30%7C53d82571da1947e49cb4625a166a4a2a%7C
> 0%7C0%7C638048213567344079%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQI
> joiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=j4VAFXNz
> bRYcEnVYegtYyIs917yfivurp8YCuNs26kI%3D&reserved=0
>
> https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.
> kernel.org%2Fproject%2Flinux-renesas-soc%2Fpatch%2F20220112174612.10773-12-
> biju.das.jz%40bp.renesas.com%2F&data=05%7C01%7Cbiju.das.jz%40bp.renesas.
> com%7C188b5bb9959c455feddd08dacd783d30%7C53d82571da1947e49cb4625a166a4a2a%7C
> 0%7C0%7C638048213567344079%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQI
> joiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=IuTkYbVY
> zBkRIVEalsm%2BDt8yfkdbRnyvYXO%2B5tBNFQw%3D&reserved=0
>
> https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.
> kernel.org%2Fproject%2Flinux-renesas-soc%2Fpatch%2F20220112174612.10773-13-
> biju.das.jz%40bp.renesas.com%2F&data=05%7C01%7Cbiju.das.jz%40bp.renesas.
> com%7C188b5bb9959c455feddd08dacd783d30%7C53d82571da1947e49cb4625a166a4a2a%7C
> 0%7C0%7C638048213567344079%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQI
> joiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=PwDmpSsm
> Yr9xnHDc1R%2FeljaeDDaCeIKUUjs7ak6cu3A%3D&reserved=0
>
> https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.
> kernel.org%2Fproject%2Flinux-renesas-soc%2Fpatch%2F20220112174612.10773-19-
> biju.das.jz%40bp.renesas.com%2F&data=05%7C01%7Cbiju.das.jz%40bp.renesas.
> com%7C188b5bb9959c455feddd08dacd783d30%7C53d82571da1947e49cb4625a166a4a2a%7C
> 0%7C0%7C638048213567344079%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQI
> joiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=%2B8Koz6
> XdxLSbvRgJ7o319aTShHiPbod%2FA0TVl9%2FqYSE%3D&reserved=0
>
> Modetest output:-
> root@smarc-rzg2l:~# modetest -M rzg2l-du
> Encoders:
> id crtc type possible crtcs possible clones
> 43 42 none 0x00000001 0x00000001
> 45 0 Virtual 0x00000001 0x00000002
>
> Connectors:
> id encoder status name size (mm) modes
> encoders
> 44 43 connected HDMI-A-1 520x320 30 43
> modes:
> index name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot)
> #0 1920x1080 59.72 1920 1968 2000 2080 1080 1082 1087 1111 138000 flags:
> phsync, nvsync; type: preferred, driver
> #1 1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags:
> phsync, pvsync; type: driver
> #2 1920x1080 59.94 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags:
> phsync, pvsync; type: driver
> #3 1920x1080 59.94 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags:
> phsync, pvsync; type: driver
> #4 1280x1024 75.02 1280 1296 1440 1688 1024 1025 1028 1066 135000 flags:
> phsync, pvsync; type: driver
> #5 1280x1024 60.02 1280 1328 1440 1688 1024 1025 1028 1066 108000 flags:
> phsync, pvsync; type: driver
> #6 1152x864 75.00 1152 1216 1344 1600 864 865 868 900 108000 flags:
> phsync, pvsync; type: driver
> #7 1280x720 60.00 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync,
> pvsync; type: driver
> #8 1280x720 59.94 1280 1390 1430 1650 720 725 730 750 74176 flags: phsync,
> pvsync; type: driver
> #9 1280x720 50.00 1280 1720 1760 1980 720 725 730 750 74250 flags: phsync,
> pvsync; type: driver
> #10 1280x720 50.00 1280 1720 1760 1980 720 725 730 750 74250 flags:
> phsync, pvsync; type: driver
> #11 1024x768 75.03 1024 1040 1136 1312 768 769 772 800 78750 flags:
> phsync, pvsync; type: driver
> #12 1024x768 70.07 1024 1048 1184 1328 768 771 777 806 75000 flags:
> nhsync, nvsync; type: driver
> #13 1024x768 60.00 1024 1048 1184 1344 768 771 777 806 65000 flags:
> nhsync, nvsync; type: driver
> #14 1080x607 59.97 1080 1120 1232 1384 607 608 611 629 52210 flags:
> nhsync, pvsync; type:
> #15 832x624 74.55 832 864 928 1152 624 625 628 667 57284 flags: nhsync,
> nvsync; type: driver
> #16 800x600 75.00 800 816 896 1056 600 601 604 625 49500 flags: phsync,
> pvsync; type: driver
> #17 800x600 72.19 800 856 976 1040 600 637 643 666 50000 flags: phsync,
> pvsync; type: driver
> #18 800x600 60.32 800 840 968 1056 600 601 605 628 40000 flags: phsync,
> pvsync; type: driver
> #19 800x600 56.25 800 824 896 1024 600 601 603 625 36000 flags: phsync,
> pvsync; type: driver
> #20 720x576 50.00 720 732 796 864 576 581 586 625 27000 flags: nhsync,
> nvsync; type: driver
> #21 720x576 50.00 720 732 796 864 576 581 586 625 27000 flags: nhsync,
> nvsync; type: driver
> #22 720x480 60.00 720 736 798 858 480 489 495 525 27027 flags: nhsync,
> nvsync; type: driver
> #23 720x480 59.94 720 736 798 858 480 489 495 525 27000 flags: nhsync,
> nvsync; type: driver
> #24 640x480 75.00 640 656 720 840 480 481 484 500 31500 flags: nhsync,
> nvsync; type: driver
> #25 640x480 72.81 640 664 704 832 480 489 492 520 31500 flags: nhsync,
> nvsync; type: driver
> #26 640x480 66.67 640 704 768 864 480 483 486 525 30240 flags: nhsync,
> nvsync; type: driver
> #27 640x480 60.00 640 656 752 800 480 490 492 525 25200 flags: nhsync,
> nvsync; type: driver
> #28 640x480 59.94 640 656 752 800 480 490 492 525 25175 flags: nhsync,
> nvsync; type: driver
> #29 720x400 70.08 720 738 846 900 400 412 414 449 28320 flags: nhsync,
> pvsync; type: driver
> props:
> 1 EDID:
> flags: immutable blob
> blobs:
>
> value:
> 00ffffffffffff003683832410101010
> 1416010380342078eeb725ac5130b426
> 105054bfef8068c0714f818001010101
> 010101010101e83580a070381f403020
> 250044682100001a000000ff00303031
> 30310a20202020202020000000fc0048
> 444d490a2020202020202020000000fd
> 00384c1e5317000a20202020202001cf
> 02031a71471003140513841223090707
> 8301000065030c0010008c0ad0902040
> 31200c40550036d431000018011d8018
> 711c1620582c250036d43100009e011d
> 80d0721c1620102c258036d43100009e
> 011d00bc52d01e20b828554036d43100
> 001ef339801871382d40582c4500c48e
> 2100001e000000000000000000000054
> 2 DPMS:
> flags: enum
> enums: On=0 Standby=1 Suspend=2 Off=3
> value: 0
> 5 link-status:
> flags: enum
> enums: Good=0 Bad=1
> value: 0
> 6 non-desktop:
> flags: immutable range
> values: 0 1
> value: 0
> 4 TILE:
> flags: immutable blob
> blobs:
>
> value:
> 20 CRTC_ID:
> flags: object
> value: 42
>
> CRTCs:
> id fb pos size
> 42 52 (0,0) (1920x1080)
> #0 1920x1080 59.72 1920 1968 2000 2080 1080 1082 1087 1111 138000 flags:
> phsync, nvsync; type: preferred, driver
> props:
> 22 ACTIVE:
> flags: range
> values: 0 1
> value: 1
> 23 MODE_ID:
> flags: blob
> blobs:
>
> value:
> 101b02008007b007d007200800003804
> 3a043f04570400003c00000009000000
> 48000000313932307831303830000000
> 00000000000000000000000000000000
> 00000000
> 19 OUT_FENCE_PTR:
> flags: range
> values: 0 18446744073709551615
> value: 0
> 24 VRR_ENABLED:
> flags: range
> values: 0 1
> value: 0
>
> Planes:
> id crtc fb CRTC x,y x,y gamma size possible
> crtcs
> 32 42 52 0,0 0,0 0 0x00000001
> formats: RGB8 AR12 XR12 AR15 XR15 RG16 BG24 RG24 BA24 BX24 AR24 XR24 UYVY
> YUYV YVYU NV12 NV21 NV16 NV61 YU12 YV12 YU16 YV16 YU24 YV24
> props:
> 8 type:
> flags: immutable enum
> enums: Overlay=0 Primary=1 Cursor=2
> value: 1
> 17 FB_ID:
> flags: object
> value: 52
> 18 IN_FENCE_FD:
> flags: signed range
> values: -1 2147483647
> value: -1
> 20 CRTC_ID:
> flags: object
> value: 42
> 13 CRTC_X:
> flags: signed range
> values: -2147483648 2147483647
> value: 0
> 14 CRTC_Y:
> flags: signed range
> values: -2147483648 2147483647
> value: 0
> 15 CRTC_W:
> flags: range
> values: 0 2147483647
> value: 1920
> 16 CRTC_H:
> flags: range
> values: 0 2147483647
> value: 1080
> 9 SRC_X:
> flags: range
> values: 0 4294967295
> value: 0
> 10 SRC_Y:
> flags: range
> values: 0 4294967295
> value: 0
> 11 SRC_W:
> flags: range
> values: 0 4294967295
> value: 125829120
> 12 SRC_H:
> flags: range
> values: 0 4294967295
> value: 70778880
> 30 IN_FORMATS:
> flags: immutable blob
> blobs:
>
> value:
> 01000000000000001900000018000000
> 01000000800000005247423841523132
> 58523132415231355852313552473136
> 42473234524732344241323442583234
> 41523234585232345559565959555956
> 595659554e5631324e5632314e563136
> 4e563631595531325956313259553136
> 59563136595532345956323400000000
> ffffff01000000000000000000000000
> 0000000000000000
> in_formats blob decoded:
> RGB8: LINEAR
> AR12: LINEAR
> XR12: LINEAR
> AR15: LINEAR
> XR15: LINEAR
> RG16: LINEAR
> BG24: LINEAR
> RG24: LINEAR
> BA24: LINEAR
> BX24: LINEAR
> AR24: LINEAR
> XR24: LINEAR
> UYVY: LINEAR
> YUYV: LINEAR
> YVYU: LINEAR
> NV12: LINEAR
> NV21: LINEAR
> NV16: LINEAR
> NV61: LINEAR
> YU12: LINEAR
> YV12: LINEAR
> YU16: LINEAR
> YV16: LINEAR
> YU24: LINEAR
> YV24: LINEAR
> 34 alpha:
> flags: range
> values: 0 65535
> value: 65535
> 35 zpos:
> flags: range
> values: 0 1
> value: 0
> 36 pixel blend mode:
> flags: enum
> enums: None=2 Pre-multiplied=0 Coverage=1
> value: 0
> 37 0 0 0,0 0,0 0 0x00000001
> formats: RGB8 AR12 XR12 AR15 XR15 RG16 BG24 RG24 BA24 BX24 AR24 XR24 UYVY
> YUYV YVYU NV12 NV21 NV16 NV61 YU12 YV12 YU16 YV16 YU24 YV24
> props:
> 8 type:
> flags: immutable enum
> enums: Overlay=0 Primary=1 Cursor=2
> value: 0
> 17 FB_ID:
> flags: object
> value: 0
> 18 IN_FENCE_FD:
> flags: signed range
> values: -1 2147483647
> value: -1
> 20 CRTC_ID:
> flags: object
> value: 0
> 13 CRTC_X:
> flags: signed range
> values: -2147483648 2147483647
> value: 0
> 14 CRTC_Y:
> flags: signed range
> values: -2147483648 2147483647
> value: 0
> 15 CRTC_W:
> flags: range
> values: 0 2147483647
> value: 0
> 16 CRTC_H:
> flags: range
> values: 0 2147483647
> value: 0
> 9 SRC_X:
> flags: range
> values: 0 4294967295
> value: 0
> 10 SRC_Y:
> flags: range
> values: 0 4294967295
> value: 0
> 11 SRC_W:
> flags: range
> values: 0 4294967295
> value: 0
> 12 SRC_H:
> flags: range
> values: 0 4294967295
> value: 0
> 30 IN_FORMATS:
> flags: immutable blob
> blobs:
>
> value:
> 01000000000000001900000018000000
> 01000000800000005247423841523132
> 58523132415231355852313552473136
> 42473234524732344241323442583234
> 41523234585232345559565959555956
> 595659554e5631324e5632314e563136
> 4e563631595531325956313259553136
> 59563136595532345956323400000000
> ffffff01000000000000000000000000
> 0000000000000000
> in_formats blob decoded:
> RGB8: LINEAR
> AR12: LINEAR
> XR12: LINEAR
> AR15: LINEAR
> XR15: LINEAR
> RG16: LINEAR
> BG24: LINEAR
> RG24: LINEAR
> BA24: LINEAR
> BX24: LINEAR
> AR24: LINEAR
> XR24: LINEAR
> UYVY: LINEAR
> YUYV: LINEAR
> YVYU: LINEAR
> NV12: LINEAR
> NV21: LINEAR
> NV16: LINEAR
> NV61: LINEAR
> YU12: LINEAR
> YV12: LINEAR
> YU16: LINEAR
> YV16: LINEAR
> YU24: LINEAR
> YV24: LINEAR
> 39 alpha:
> flags: range
> values: 0 65535
> value: 65535
> 40 zpos:
> flags: range
> values: 0 1
> value: 1
> 41 pixel blend mode:
> flags: enum
> enums: None=2 Pre-multiplied=0 Coverage=1
> value: 0
>
> Frame buffers:
> id size pitch
>
> root@smarc-rzg2l:~#
>
> Biju Das (19):
> drm: rcar-du: Add encoder lib support
> drm: rcar-du: Add kms lib support
> drm: rcar-du: Add vsp lib support
> drm: rcar-du: Move rcar_du_vsp_atomic_begin()
> drm: rcar-du: Move rcar_du_vsp_atomic_flush()
> drm: rcar-du: Move vsp rcar_du_vsp_{map,unmap}_fb()
> drm: rcar-du: Move rcar_du_dumb_create()
> drm: rcar-du: Move rcar_du_gem_prime_import_sg_table()
> drm: rcar-du: Add rcar_du_lib_vsp_init()
> drm: rcar-du: Move rcar_du_vsp_plane_prepare_fb()
> drm: rcar-du: Move rcar_du_vsp_plane_cleanup_fb()
> drm: rcar-du: Move rcar_du_vsp_plane_atomic_update()
> drm: rcar-du: Add rcar_du_lib_fb_create()
> drm: rcar-du: Add rcar_du_lib_mode_cfg_helper_get()
> drm: rcar-du: Move rcar_du_encoders_init()
> drm: rcar-du: Move rcar_du_properties_init()
> drm: rcar-du: Add rcar_du_lib_vsps_init()
> dt-bindings: display: Document Renesas RZ/G2L DU bindings
> drm: rcar-du: Add RZ/G2L DU Support
>
> .../bindings/display/renesas,rzg2l-du.yaml | 124 +++
> drivers/gpu/drm/rcar-du/Kconfig | 25 +-
> drivers/gpu/drm/rcar-du/Makefile | 17 +
> drivers/gpu/drm/rcar-du/rcar_du_crtc.h | 10 +
> drivers/gpu/drm/rcar-du/rcar_du_encoder.c | 117 +--
> drivers/gpu/drm/rcar-du/rcar_du_encoder.h | 14 +-
> drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.c | 138 ++++
> drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.h | 30 +
> drivers/gpu/drm/rcar-du/rcar_du_kms.c | 664 +---------------
> drivers/gpu/drm/rcar-du/rcar_du_kms.h | 29 +-
> drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 715 +++++++++++++++++
> drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 62 ++
> drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 361 +--------
> drivers/gpu/drm/rcar-du/rcar_du_vsp.h | 26 +-
> drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 390 ++++++++++
> drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 76 ++
> drivers/gpu/drm/rcar-du/rzg2l_du_crtc.c | 716 ++++++++++++++++++
> drivers/gpu/drm/rcar-du/rzg2l_du_crtc.h | 26 +
> drivers/gpu/drm/rcar-du/rzg2l_du_drv.c | 196 +++++
> drivers/gpu/drm/rcar-du/rzg2l_du_drv.h | 20 +
> drivers/gpu/drm/rcar-du/rzg2l_du_encoder.c | 26 +
> drivers/gpu/drm/rcar-du/rzg2l_du_encoder.h | 19 +
> drivers/gpu/drm/rcar-du/rzg2l_du_kms.c | 157 ++++
> drivers/gpu/drm/rcar-du/rzg2l_du_kms.h | 17 +
> drivers/gpu/drm/rcar-du/rzg2l_du_regs.h | 67 ++
> drivers/gpu/drm/rcar-du/rzg2l_du_vsp.c | 82 ++
> drivers/gpu/drm/rcar-du/rzg2l_du_vsp.h | 30 +
> 27 files changed, 2958 insertions(+), 1196 deletions(-) create mode 100644
> Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
> create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.c
> create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.h
> create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
> create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
> create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
> create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_crtc.c
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_crtc.h
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_drv.c
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_drv.h
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_encoder.c
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_encoder.h
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_kms.c
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_kms.h
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_regs.h
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_vsp.c
> create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_vsp.h
>
> --
> 2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread
end of thread, other threads:[~2023-02-14 11:00 UTC | newest]
Thread overview: 22+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-11-23 17:28 [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
2022-11-23 17:28 ` [PATCH v6 01/19] drm: rcar-du: Add encoder lib support Biju Das
2022-11-23 17:28 ` [PATCH v6 02/19] drm: rcar-du: Add kms " Biju Das
2022-11-23 17:28 ` [PATCH v6 03/19] drm: rcar-du: Add vsp " Biju Das
2022-11-23 17:28 ` [PATCH v6 04/19] drm: rcar-du: Move rcar_du_vsp_atomic_begin() Biju Das
2022-11-23 17:28 ` [PATCH v6 05/19] drm: rcar-du: Move rcar_du_vsp_atomic_flush() Biju Das
2022-11-23 17:28 ` [PATCH v6 06/19] drm: rcar-du: Move vsp rcar_du_vsp_{map,unmap}_fb() Biju Das
2022-11-23 17:28 ` [PATCH v6 07/19] drm: rcar-du: Move rcar_du_dumb_create() Biju Das
2022-11-23 17:28 ` [PATCH v6 08/19] drm: rcar-du: Move rcar_du_gem_prime_import_sg_table() Biju Das
2022-11-23 17:28 ` [PATCH v6 09/19] drm: rcar-du: Add rcar_du_lib_vsp_init() Biju Das
2022-11-23 17:28 ` [PATCH v6 10/19] drm: rcar-du: Move rcar_du_vsp_plane_prepare_fb() Biju Das
2022-11-23 17:28 ` [PATCH v6 11/19] drm: rcar-du: Move rcar_du_vsp_plane_cleanup_fb() Biju Das
2022-11-23 17:28 ` [PATCH v6 12/19] drm: rcar-du: Move rcar_du_vsp_plane_atomic_update() Biju Das
2022-11-23 17:29 ` [PATCH v6 13/19] drm: rcar-du: Add rcar_du_lib_fb_create() Biju Das
2022-11-23 17:29 ` [PATCH v6 14/19] drm: rcar-du: Add rcar_du_lib_mode_cfg_helper_get() Biju Das
2022-11-23 17:29 ` [PATCH v6 15/19] drm: rcar-du: Move rcar_du_encoders_init() Biju Das
2022-11-23 17:29 ` [PATCH v6 16/19] drm: rcar-du: Move rcar_du_properties_init() Biju Das
2022-11-23 17:29 ` [PATCH v6 17/19] drm: rcar-du: Add rcar_du_lib_vsps_init() Biju Das
2022-11-23 17:29 ` [PATCH v6 18/19] dt-bindings: display: Document Renesas RZ/G2L DU bindings Biju Das
2022-11-23 17:29 ` [PATCH v6 19/19] drm: rcar-du: Add RZ/G2L DU Support Biju Das
2023-01-09 9:15 ` [PATCH v6 00/19] Add RZ/G2L Display support Biju Das
2023-02-14 11:00 ` Biju Das
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