Re: [PATCH v2 07/11] drm/mediatek: Add secure layer config support for ovl

["Jason-JH Lin (林睿祥)" <Jason-JH.Lin@mediatek.com>]

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Hi Angelo,

Thanks for the reviews.

On Tue, 2023-10-24 at 10:37 +0200, AngeloGioacchino Del Regno wrote:
> Il 23/10/23 06:45, Jason-JH.Lin ha scritto:
> > Add secure layer config support for ovl.
> > 
> > Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> > ---
> >   drivers/gpu/drm/mediatek/mtk_disp_drv.h       |  3 ++
> >   drivers/gpu/drm/mediatek/mtk_disp_ovl.c       | 31
> > +++++++++++++++++--
> >   .../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c   | 12 +++++++
> >   drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c   |  2 ++
> >   4 files changed, 46 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > index 2254038519e1..dec937b183a8 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > @@ -9,6 +9,7 @@
> >   #include <linux/soc/mediatek/mtk-cmdq.h>
> >   #include <linux/soc/mediatek/mtk-mmsys.h>
> >   #include <linux/soc/mediatek/mtk-mutex.h>
> > +#include "mtk_drm_ddp_comp.h"
> >   #include "mtk_drm_plane.h"
> >   #include "mtk_mdp_rdma.h"
> >   
> > @@ -79,6 +80,7 @@ void mtk_ovl_clk_disable(struct device *dev);
> >   void mtk_ovl_config(struct device *dev, unsigned int w,
> >   		    unsigned int h, unsigned int vrefresh,
> >   		    unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
> > +u64 mtk_ovl_get_sec_port(struct mtk_ddp_comp *comp, unsigned int
> > idx);
> >   int mtk_ovl_layer_check(struct device *dev, unsigned int idx,
> >   			struct mtk_plane_state *mtk_state);
> >   void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
> > @@ -112,6 +114,7 @@ void mtk_ovl_adaptor_clk_disable(struct device
> > *dev);
> >   void mtk_ovl_adaptor_config(struct device *dev, unsigned int w,
> >   			    unsigned int h, unsigned int vrefresh,
> >   			    unsigned int bpc, struct cmdq_pkt
> > *cmdq_pkt);
> > +u64 mtk_ovl_adaptor_get_sec_port(struct mtk_ddp_comp *comp,
> > unsigned int idx);
> >   void mtk_ovl_adaptor_layer_config(struct device *dev, unsigned
> > int idx,
> >   				  struct mtk_plane_state *state,
> >   				  struct cmdq_pkt *cmdq_pkt);
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > index 2bffe4245466..76e832e4875a 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > @@ -46,6 +46,7 @@
> >   #define DISP_REG_OVL_ADDR(ovl, n)		((ovl)->data->addr +
> > 0x20 * (n))
> >   #define DISP_REG_OVL_HDR_ADDR(ovl, n)		((ovl)->data-
> > >addr + 0x20 * (n) + 0x04)
> >   #define DISP_REG_OVL_HDR_PITCH(ovl, n)		((ovl)->data-
> > >addr + 0x20 * (n) + 0x08)
> > +#define DISP_REG_OVL_SECURE			0x0fc0
> >   
> >   #define GMC_THRESHOLD_BITS	16
> >   #define GMC_THRESHOLD_HIGH	((1 << GMC_THRESHOLD_BITS) / 4)
> > @@ -126,8 +127,19 @@ struct mtk_disp_ovl {
> >   	const struct mtk_disp_ovl_data	*data;
> >   	void				(*vblank_cb)(void *data);
> >   	void				*vblank_cb_data;
> > +	resource_size_t			regs_pa;
> >   };
> >   
> > +u64 mtk_ovl_get_sec_port(struct mtk_ddp_comp *comp, unsigned int
> > idx)
> > +{
> > +	if (comp->id == DDP_COMPONENT_OVL0)
> > +		return 1ULL << CMDQ_SEC_DISP_OVL0;
> 
> This is BIT_ULL():
> 
> return BIT_ULL(CMDQ_SEC_DISP_OVL0);

OK, I'll change it. Thanks for the advice.

> 
> > +	else if (comp->id == DDP_COMPONENT_OVL1)
> > +		return 1ULL << CMDQ_SEC_DISP_OVL1;
> > +
> > +	return 0;
> > +}
> > +
> >   static irqreturn_t mtk_disp_ovl_irq_handler(int irq, void
> > *dev_id)
> >   {
> >   	struct mtk_disp_ovl *priv = dev_id;
> > @@ -449,8 +461,22 @@ void mtk_ovl_layer_config(struct device *dev,
> > unsigned int idx,
> >   			      DISP_REG_OVL_SRC_SIZE(idx));
> >   	mtk_ddp_write_relaxed(cmdq_pkt, offset, &ovl->cmdq_reg, ovl-
> > >regs,
> >   			      DISP_REG_OVL_OFFSET(idx));
> > -	mtk_ddp_write_relaxed(cmdq_pkt, addr, &ovl->cmdq_reg, ovl-
> > >regs,
> > -			      DISP_REG_OVL_ADDR(ovl, idx));
> > +
> > +	if (state->pending.is_sec) {
> > +		const struct drm_format_info *fmt_info =
> > drm_format_info(fmt);
> > +		unsigned int buf_size = (pending->height - 1) *
> > pending->pitch +
> > +					pending->width * fmt_info-
> > >cpp[0];
> > +
> > +		mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &ovl->cmdq_reg,
> > ovl->regs,
> > +				   DISP_REG_OVL_SECURE, BIT(idx));
> > +		mtk_ddp_sec_write(cmdq_pkt, ovl->regs_pa +
> > DISP_REG_OVL_ADDR(ovl, idx),
> > +				  pending->addr, CMDQ_IWC_H_2_MVA, 0,
> > buf_size, 0);
> > +	} else {
> > +		mtk_ddp_write_mask(cmdq_pkt, 0, &ovl->cmdq_reg, ovl-
> > >regs,
> > +				   DISP_REG_OVL_SECURE, BIT(idx));
> > +		mtk_ddp_write_relaxed(cmdq_pkt, addr, &ovl->cmdq_reg,
> > ovl->regs,
> > +				      DISP_REG_OVL_ADDR(ovl, idx));
> > +	}
> >   
> >   	if (is_afbc) {
> >   		mtk_ddp_write_relaxed(cmdq_pkt, hdr_addr, &ovl-
> > >cmdq_reg, ovl->regs,
> > @@ -529,6 +555,7 @@ static int mtk_disp_ovl_probe(struct
> > platform_device *pdev)
> >   	}
> >   
> >   	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > +	priv->regs_pa = res->start;
> >   	priv->regs = devm_ioremap_resource(dev, res);
> >   	if (IS_ERR(priv->regs)) {
> >   		dev_err(dev, "failed to ioremap ovl\n");
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> > b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> > index 6bf6367853fb..28a0bccfb0b9 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> > @@ -83,6 +83,18 @@ static const struct ovl_adaptor_comp_match
> > comp_matches[OVL_ADAPTOR_ID_MAX] = {
> >   	[OVL_ADAPTOR_ETHDR0]	= { OVL_ADAPTOR_TYPE_ETHDR, 0 },
> >   };
> >   
> > +static const u64 ovl_adaptor_sec_port[] = {
> > +	1ULL << CMDQ_SEC_VDO1_DISP_RDMA_L0,
> 
> BIT_ULL(CMDQ_SEC_VDO1_DISP_RDMA_L0),
> BIT_ULL(......),

OK' Ill change it.

Regards,
Jason-JH.Lin
> 
> 
> Regards,
> Angelo
> 
>