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* imx IPU2 video out
@ 2015-10-20 14:22 Akshay Bhat
  2015-10-21  9:54 ` Lucas Stach
  0 siblings, 1 reply; 5+ messages in thread
From: Akshay Bhat @ 2015-10-20 14:22 UTC (permalink / raw)
  To: dri-devel

Hi,

We are trying to use IPU2 DI0 for LVDS and IPU1 DI0 for HDMI on a iMX6Q 
based board. Below is the ldb entry in device tree and with these 
settings the LVDS is still being mapped to IPU1. Is there something 
missing/incorrect in the dts entry? The board is running 4.3-rc5 kernel.

&ldb {
         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
                           <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
                                  <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
         fsl,dual-channel;
         status = "okay";

         lvds0: lvds-channel@0 {
                 fsl,data-mapping = "spwg";
                 fsl,data-width = <24>;
                 status = "okay";
                 display-timings {
                         native-mode = <&timing0>;
                         timing0: stdp4028 {
                                 clock-frequency = <137143857>;
                                 hactive = <1920>;
                                 vactive = <1080>;
                                 hback-porch = <100>;
                                 hfront-porch = <40>;
                                 vback-porch = <30>;
                                 vfront-porch = <3>;
                                 hsync-len = <10>;
                                 vsync-len = <2>;
                         };
                 };
                 port@2 {
                         reg = <2>;
                         lvds0_in: endpoint {
                                 remote-endpoint = <&ipu2_di0_lvds0>;
                         };
                 };
         };
};

I have also tried 2 other settings with the same result:
&ldb {
..............
                 port {
                         lvds0_in: endpoint {
                                 remote-endpoint = <&ipu2_di0_lvds0>;
                         };
                 };
};

and also:
&ldb {
..............
                 port {
                         lvds0_in: endpoint {
                                 remote-endpoint = <&ipu2_di0_disp0>;
                         };
                 };
};

&ipu2_di0_disp0 {
         remote-endpoint = <&lvds0_in>;
};

If i dump the clock tree, the use count for ipu2_diX interface show ipu2 
is not being used.
clock                    parent                   use      rate
ipu1_di0                 clk                       1  148500000
ipu1_di1                 clk                       1  137142857
ipu2_di0                 clk                       0   49500000
ipu2_di1                 clk                       0   49500000

Thanks,
Akshay
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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: imx IPU2 video out
  2015-10-20 14:22 imx IPU2 video out Akshay Bhat
@ 2015-10-21  9:54 ` Lucas Stach
  2015-10-21 17:47   ` Akshay Bhat
  0 siblings, 1 reply; 5+ messages in thread
From: Lucas Stach @ 2015-10-21  9:54 UTC (permalink / raw)
  To: Akshay Bhat; +Cc: dri-devel

Am Dienstag, den 20.10.2015, 10:22 -0400 schrieb Akshay Bhat:
> Hi,
> 
> We are trying to use IPU2 DI0 for LVDS and IPU1 DI0 for HDMI on a iMX6Q 
> based board. Below is the ldb entry in device tree and with these 
> settings the LVDS is still being mapped to IPU1. Is there something 
> missing/incorrect in the dts entry? The board is running 4.3-rc5 kernel.
> 
The DT includes all possible connections and you should not need to
modify it in any way as it is describing the hardware.

What IPU to use is purely a software decision. IPU1 is used by default
with the in-kernel framebuffer emulation layer as it will pick the
lowest possible CRTC, and thus always picks one of the IPU1 DIs. If you
want to use something different for any reason you need to explicitly
set a mode with a different CRTC through the KMS interface.

Regards,
Lucas
 
> &ldb {
>          assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
>                            <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
>          assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
>                                   <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
>          fsl,dual-channel;
>          status = "okay";
> 
>          lvds0: lvds-channel@0 {
>                  fsl,data-mapping = "spwg";
>                  fsl,data-width = <24>;
>                  status = "okay";
>                  display-timings {
>                          native-mode = <&timing0>;
>                          timing0: stdp4028 {
>                                  clock-frequency = <137143857>;
>                                  hactive = <1920>;
>                                  vactive = <1080>;
>                                  hback-porch = <100>;
>                                  hfront-porch = <40>;
>                                  vback-porch = <30>;
>                                  vfront-porch = <3>;
>                                  hsync-len = <10>;
>                                  vsync-len = <2>;
>                          };
>                  };
>                  port@2 {
>                          reg = <2>;
>                          lvds0_in: endpoint {
>                                  remote-endpoint = <&ipu2_di0_lvds0>;
>                          };
>                  };
>          };
> };
> 
> I have also tried 2 other settings with the same result:
> &ldb {
> ..............
>                  port {
>                          lvds0_in: endpoint {
>                                  remote-endpoint = <&ipu2_di0_lvds0>;
>                          };
>                  };
> };
> 
> and also:
> &ldb {
> ..............
>                  port {
>                          lvds0_in: endpoint {
>                                  remote-endpoint = <&ipu2_di0_disp0>;
>                          };
>                  };
> };
> 
> &ipu2_di0_disp0 {
>          remote-endpoint = <&lvds0_in>;
> };
> 
> If i dump the clock tree, the use count for ipu2_diX interface show ipu2 
> is not being used.
> clock                    parent                   use      rate
> ipu1_di0                 clk                       1  148500000
> ipu1_di1                 clk                       1  137142857
> ipu2_di0                 clk                       0   49500000
> ipu2_di1                 clk                       0   49500000
> 
> Thanks,
> Akshay
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Pengutronix e.K.             | Lucas Stach                 |
Industrial Linux Solutions   | http://www.pengutronix.de/  |

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: imx IPU2 video out
  2015-10-21  9:54 ` Lucas Stach
@ 2015-10-21 17:47   ` Akshay Bhat
  2015-10-21 18:03     ` Fabio Estevam
  0 siblings, 1 reply; 5+ messages in thread
From: Akshay Bhat @ 2015-10-21 17:47 UTC (permalink / raw)
  To: Lucas Stach; +Cc: dri-devel



On 10/21/2015 05:54 AM, Lucas Stach wrote:
> Am Dienstag, den 20.10.2015, 10:22 -0400 schrieb Akshay Bhat:
>> Hi,
>>
>> We are trying to use IPU2 DI0 for LVDS and IPU1 DI0 for HDMI on a iMX6Q
>> based board. Below is the ldb entry in device tree and with these
>> settings the LVDS is still being mapped to IPU1. Is there something
>> missing/incorrect in the dts entry? The board is running 4.3-rc5 kernel.
>>
> The DT includes all possible connections and you should not need to
> modify it in any way as it is describing the hardware.
>
> What IPU to use is purely a software decision. IPU1 is used by default
> with the in-kernel framebuffer emulation layer as it will pick the
> lowest possible CRTC, and thus always picks one of the IPU1 DIs. If you
> want to use something different for any reason you need to explicitly
> set a mode with a different CRTC through the KMS interface.
>
> Regards,
> Lucas

Lucas, thanks for the detailed response; it makes sense.

Pardon my ignorance but is it possible to specify a connector to use a 
different CRTC via bootargs (helps display the kernel splash screen on 
both displays)? I looked at drm_mode_parse_command_line_for_connector 
function and couldn't find an option.

Currently on our setup since LVDS and HDMI use the same IPU, there are 
clock conflicts at 1080p when setting DI frequency resulting in HDMI 
display not showing anything, hence the need to use the 2nd IPU.

>
>> &ldb {
>>           assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
>>                             <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
>>           assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
>>                                    <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
>>           fsl,dual-channel;
>>           status = "okay";
>>
>>           lvds0: lvds-channel@0 {
>>                   fsl,data-mapping = "spwg";
>>                   fsl,data-width = <24>;
>>                   status = "okay";
>>                   display-timings {
>>                           native-mode = <&timing0>;
>>                           timing0: stdp4028 {
>>                                   clock-frequency = <137143857>;
>>                                   hactive = <1920>;
>>                                   vactive = <1080>;
>>                                   hback-porch = <100>;
>>                                   hfront-porch = <40>;
>>                                   vback-porch = <30>;
>>                                   vfront-porch = <3>;
>>                                   hsync-len = <10>;
>>                                   vsync-len = <2>;
>>                           };
>>                   };
>>                   port@2 {
>>                           reg = <2>;
>>                           lvds0_in: endpoint {
>>                                   remote-endpoint = <&ipu2_di0_lvds0>;
>>                           };
>>                   };
>>           };
>> };
>>
>> I have also tried 2 other settings with the same result:
>> &ldb {
>> ..............
>>                   port {
>>                           lvds0_in: endpoint {
>>                                   remote-endpoint = <&ipu2_di0_lvds0>;
>>                           };
>>                   };
>> };
>>
>> and also:
>> &ldb {
>> ..............
>>                   port {
>>                           lvds0_in: endpoint {
>>                                   remote-endpoint = <&ipu2_di0_disp0>;
>>                           };
>>                   };
>> };
>>
>> &ipu2_di0_disp0 {
>>           remote-endpoint = <&lvds0_in>;
>> };
>>
>> If i dump the clock tree, the use count for ipu2_diX interface show ipu2
>> is not being used.
>> clock                    parent                   use      rate
>> ipu1_di0                 clk                       1  148500000
>> ipu1_di1                 clk                       1  137142857
>> ipu2_di0                 clk                       0   49500000
>> ipu2_di1                 clk                       0   49500000
>>
>> Thanks,
>> Akshay
>> _______________________________________________
>> dri-devel mailing list
>> dri-devel@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/dri-devel
>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: imx IPU2 video out
  2015-10-21 17:47   ` Akshay Bhat
@ 2015-10-21 18:03     ` Fabio Estevam
  2015-10-21 18:41       ` Akshay Bhat
  0 siblings, 1 reply; 5+ messages in thread
From: Fabio Estevam @ 2015-10-21 18:03 UTC (permalink / raw)
  To: Akshay Bhat; +Cc: DRI mailing list

On Wed, Oct 21, 2015 at 3:47 PM, Akshay Bhat <akshay.bhat@timesys.com> wrote:

> Currently on our setup since LVDS and HDMI use the same IPU, there are clock
> conflicts at 1080p when setting DI frequency resulting in HDMI display not
> showing anything, hence the need to use the 2nd IPU.

Maybe LVDS and HDMI are trying to use the same clock source.

Take a look at how we solved this for mx6dl-sabresd:

https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/arch/arm/boot/dts/imx6qdl-sabresd.dtsi?id=d28be499c45e6e16d7a042ce280eb872dc06952b

Regards,

Fabio Estevam
_______________________________________________
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dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: imx IPU2 video out
  2015-10-21 18:03     ` Fabio Estevam
@ 2015-10-21 18:41       ` Akshay Bhat
  0 siblings, 0 replies; 5+ messages in thread
From: Akshay Bhat @ 2015-10-21 18:41 UTC (permalink / raw)
  To: Fabio Estevam; +Cc: DRI mailing list



On 10/21/2015 02:03 PM, Fabio Estevam wrote:
> On Wed, Oct 21, 2015 at 3:47 PM, Akshay Bhat <akshay.bhat@timesys.com> wrote:
>
>> Currently on our setup since LVDS and HDMI use the same IPU, there are clock
>> conflicts at 1080p when setting DI frequency resulting in HDMI display not
>> showing anything, hence the need to use the 2nd IPU.
>
> Maybe LVDS and HDMI are trying to use the same clock source.
>
> Take a look at how we solved this for mx6dl-sabresd:
>
> https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/arch/arm/boot/dts/imx6qdl-sabresd.dtsi?id=d28be499c45e6e16d7a042ce280eb872dc06952b
>
> Regards,
>
> Fabio Estevam
>

Fabio, I did pull in that patch; however our pixel clock frequency is 
greater than 68.57 MHz so it did not work. When I assigned LVDS to IPU2 
(by forcing it in the dtsi file); then I was able to get 1080p 
resolution on both displays. If it helps I can send a clock dump of the 
working case (2 different IPU's) and not working case (single IPU) with 
your patch applied.

We do have another board which has 65MHz pixel clock and your patch 
helped us get simultaneous LVDS and HDMI output on it :)

Thanks,
Akshay
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dri-devel mailing list
dri-devel@lists.freedesktop.org
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^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2015-10-21 18:41 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-10-20 14:22 imx IPU2 video out Akshay Bhat
2015-10-21  9:54 ` Lucas Stach
2015-10-21 17:47   ` Akshay Bhat
2015-10-21 18:03     ` Fabio Estevam
2015-10-21 18:41       ` Akshay Bhat

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