From: Robin Murphy <robin.murphy@arm.com>
To: Mark Brown <broonie@kernel.org>
Cc: Jernej Skrabec <jernej.skrabec@siol.net>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
"open list:DRM DRIVERS" <dri-devel@lists.freedesktop.org>,
Russell King - ARM Linux <linux@armlinux.org.uk>,
Neil Armstrong <narmstrong@baylibre.com>,
Andrzej Hajda <a.hajda@samsung.com>,
Andy Shevchenko <andy.shevchenko@gmail.com>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Marek Szyprowski <m.szyprowski@samsung.com>,
linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>,
Jonas Karlman <jonas@kwiboo.se>
Subject: Re: [RESEND PATCH v5 1/5] driver core: add probe_err log helper
Date: Wed, 24 Jun 2020 16:00:34 +0100 [thread overview]
Message-ID: <6373a4eb-2f1b-b56f-48a8-ae97b4e4476a@arm.com> (raw)
In-Reply-To: <20200624140207.GE5472@sirena.org.uk>
On 2020-06-24 15:02, Mark Brown wrote:
> On Wed, Jun 24, 2020 at 04:45:28PM +0300, Andy Shevchenko wrote:
>> On Wed, Jun 24, 2020 at 4:27 PM Mark Brown <broonie@kernel.org> wrote:
>
>>> As I said down the thread that's not a great pattern since it means that
>>> probe deferral errors never get displayed and users have a hard time
>>> figuring out why their driver isn't instantiating.
>
>> Don't we have a file in the debugfs to list deferred drivers?
>
> Part of what this patch series aims to solve is that that list is not
> very useful since it doesn't provide any information on how things got
> deferred which means it's of no use in trying to figure out any
> problems.
>
>> In the case of deferred probes the errors out of it makes users more
>> miserable in order to look through tons of spam and lose really useful
>> data in the logs.
>
> I seem to never manage to end up using any of the systems which generate
> excessive deferrals.
Be thankful... And count me in as one of those miserable users; here's one
of mine being bad enough without even printing any specific messages about
deferring ;)
Robin.
-----
[robin@weasel-cheese ~]$ dmesg | grep dwmmc
[ 3.046297] dwmmc_rockchip ff0c0000.mmc: IDMAC supports 32-bit address mode.
[ 3.054312] dwmmc_rockchip ff0c0000.mmc: Using internal DMA controller.
[ 3.061774] dwmmc_rockchip ff0c0000.mmc: Version ID is 270a
[ 3.068101] dwmmc_rockchip ff0c0000.mmc: DW MMC controller at irq 30,32 bit host data width,256 deep fifo
[ 3.079638] dwmmc_rockchip ff0d0000.mmc: IDMAC supports 32-bit address mode.
[ 3.087678] dwmmc_rockchip ff0d0000.mmc: Using internal DMA controller.
[ 3.095134] dwmmc_rockchip ff0d0000.mmc: Version ID is 270a
[ 3.101480] dwmmc_rockchip ff0d0000.mmc: DW MMC controller at irq 31,32 bit host data width,256 deep fifo
[ 3.113071] dwmmc_rockchip ff0f0000.mmc: IDMAC supports 32-bit address mode.
[ 3.121110] dwmmc_rockchip ff0f0000.mmc: Using internal DMA controller.
[ 3.128565] dwmmc_rockchip ff0f0000.mmc: Version ID is 270a
[ 3.134886] dwmmc_rockchip ff0f0000.mmc: DW MMC controller at irq 32,32 bit host data width,256 deep fifo
[ 3.948510] dwmmc_rockchip ff0c0000.mmc: IDMAC supports 32-bit address mode.
[ 3.956475] dwmmc_rockchip ff0c0000.mmc: Using internal DMA controller.
[ 3.963884] dwmmc_rockchip ff0c0000.mmc: Version ID is 270a
[ 3.970133] dwmmc_rockchip ff0c0000.mmc: DW MMC controller at irq 30,32 bit host data width,256 deep fifo
[ 4.141231] dwmmc_rockchip ff0d0000.mmc: IDMAC supports 32-bit address mode.
[ 4.149178] dwmmc_rockchip ff0d0000.mmc: Using internal DMA controller.
[ 4.156582] dwmmc_rockchip ff0d0000.mmc: Version ID is 270a
[ 4.162823] dwmmc_rockchip ff0d0000.mmc: DW MMC controller at irq 31,32 bit host data width,256 deep fifo
[ 4.175606] dwmmc_rockchip ff0f0000.mmc: IDMAC supports 32-bit address mode.
[ 4.183540] dwmmc_rockchip ff0f0000.mmc: Using internal DMA controller.
[ 4.190946] dwmmc_rockchip ff0f0000.mmc: Version ID is 270a
[ 4.197196] dwmmc_rockchip ff0f0000.mmc: DW MMC controller at irq 32,32 bit host data width,256 deep fifo
[ 4.250758] dwmmc_rockchip ff0d0000.mmc: IDMAC supports 32-bit address mode.
[ 4.258688] dwmmc_rockchip ff0d0000.mmc: Using internal DMA controller.
[ 4.266104] dwmmc_rockchip ff0d0000.mmc: Version ID is 270a
[ 4.272358] dwmmc_rockchip ff0d0000.mmc: DW MMC controller at irq 31,32 bit host data width,256 deep fifo
[ 4.285390] dwmmc_rockchip ff0d0000.mmc: IDMAC supports 32-bit address mode.
[ 4.293333] dwmmc_rockchip ff0d0000.mmc: Using internal DMA controller.
[ 4.300750] dwmmc_rockchip ff0d0000.mmc: Version ID is 270a
[ 4.307005] dwmmc_rockchip ff0d0000.mmc: DW MMC controller at irq 31,32 bit host data width,256 deep fifo
[ 4.971373] dwmmc_rockchip ff0f0000.mmc: Successfully tuned phase to 134
[ 5.027225] dwmmc_rockchip ff0d0000.mmc: IDMAC supports 32-bit address mode.
[ 5.035339] dwmmc_rockchip ff0d0000.mmc: Using internal DMA controller.
[ 5.042769] dwmmc_rockchip ff0d0000.mmc: Version ID is 270a
[ 5.049050] dwmmc_rockchip ff0d0000.mmc: DW MMC controller at irq 31,32 bit host data width,256 deep fifo
[ 24.727583] dwmmc_rockchip ff0d0000.mmc: IDMAC supports 32-bit address mode.
[ 24.745541] dwmmc_rockchip ff0d0000.mmc: Using internal DMA controller.
[ 24.753003] dwmmc_rockchip ff0d0000.mmc: Version ID is 270a
[ 24.763289] dwmmc_rockchip ff0d0000.mmc: DW MMC controller at irq 31,32 bit host data width,256 deep fifo
[ 25.589620] dwmmc_rockchip ff0d0000.mmc: IDMAC supports 32-bit address mode.
[ 25.603066] dwmmc_rockchip ff0d0000.mmc: Using internal DMA controller.
[ 25.615283] dwmmc_rockchip ff0d0000.mmc: Version ID is 270a
[ 25.627911] dwmmc_rockchip ff0d0000.mmc: DW MMC controller at irq 31,32 bit host data width,256 deep fifo
[ 25.643469] dwmmc_rockchip ff0d0000.mmc: IDMAC supports 32-bit address mode.
[ 25.651532] dwmmc_rockchip ff0d0000.mmc: Using internal DMA controller.
[ 25.658960] dwmmc_rockchip ff0d0000.mmc: Version ID is 270a
[ 25.665246] dwmmc_rockchip ff0d0000.mmc: DW MMC controller at irq 31,32 bit host data width,256 deep fifo
[ 25.677154] dwmmc_rockchip ff0d0000.mmc: allocated mmc-pwrseq
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next prev parent reply other threads:[~2020-06-24 15:00 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20200624114134eucas1p2799e0ae76fcb026a0e4bcccc2026b732@eucas1p2.samsung.com>
2020-06-24 11:41 ` [RESEND PATCH v5 0/5] driver core: add probe error check helper Andrzej Hajda
[not found] ` <CGME20200624114135eucas1p26e2e4683d60cebdce7acd55177013992@eucas1p2.samsung.com>
2020-06-24 11:41 ` [RESEND PATCH v5 1/5] driver core: add probe_err log helper Andrzej Hajda
2020-06-24 11:52 ` Rafael J. Wysocki
2020-06-24 12:31 ` Greg Kroah-Hartman
2020-06-24 13:23 ` Laurent Pinchart
2020-06-24 14:04 ` Andrzej Hajda
2020-06-24 13:27 ` Mark Brown
2020-06-24 13:45 ` Andy Shevchenko
2020-06-24 14:02 ` Mark Brown
2020-06-24 15:00 ` Robin Murphy [this message]
2020-06-24 15:28 ` Mark Brown
[not found] ` <CGME20200624114136eucas1p1a3a31d95d86754201c7965f26ccd5de0@eucas1p1.samsung.com>
2020-06-24 11:41 ` [RESEND PATCH v5 2/5] driver core: add deferring probe reason to devices_deferred property Andrzej Hajda
2020-06-24 12:11 ` Rafael J. Wysocki
2020-06-24 13:28 ` Andrzej Hajda
2020-06-24 12:34 ` Greg Kroah-Hartman
2020-06-24 13:26 ` Andrzej Hajda
[not found] ` <CGME20200624114136eucas1p1c84f81b1d78e2dbad7ac1b762f0a4b4f@eucas1p1.samsung.com>
2020-06-24 11:41 ` [RESEND PATCH v5 3/5] drivers core: allow probe_err accept integer and pointer types Andrzej Hajda
2020-06-24 12:14 ` Rafael J. Wysocki
2020-06-24 14:44 ` Andrzej Hajda
2020-06-24 14:55 ` Rafael J. Wysocki
2020-06-24 12:30 ` Greg Kroah-Hartman
2020-06-24 14:48 ` Andrzej Hajda
2020-06-24 12:37 ` Robin Murphy
2020-06-24 12:55 ` Andy Shevchenko
2020-06-24 14:25 ` Robin Murphy
2020-06-24 15:04 ` Mark Brown
2020-06-24 15:16 ` Robin Murphy
2020-06-24 19:39 ` Andrzej Hajda
2020-06-25 8:41 ` Andy Shevchenko
2020-06-25 10:19 ` Andrzej Hajda
2020-06-24 13:29 ` Laurent Pinchart
2020-06-24 12:53 ` Andy Shevchenko
2020-06-24 13:12 ` Andrzej Hajda
[not found] ` <CGME20200624114137eucas1p13599d33a0c4a9abf7708bf8c8e77264b@eucas1p1.samsung.com>
2020-06-24 11:41 ` [RESEND PATCH v5 4/5] drm/bridge/sii8620: fix resource acquisition error handling Andrzej Hajda
2020-06-24 13:25 ` Mark Brown
2020-06-24 13:43 ` Andrzej Hajda
2020-06-24 14:11 ` Mark Brown
[not found] ` <CGME20200624114138eucas1p262505da3ad1067720080d20209ff32de@eucas1p2.samsung.com>
2020-06-24 11:41 ` [RESEND PATCH v5 5/5] drm/bridge: lvds-codec: simplify error handling code Andrzej Hajda
2020-06-24 13:33 ` Laurent Pinchart
2020-06-24 14:03 ` Andrzej Hajda
2020-06-24 21:18 ` Laurent Pinchart
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