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From: John Harrison <john.c.harrison@intel.com>
To: Matthew Brost <matthew.brost@intel.com>
Cc: intel-gfx@lists.freedesktop.org, daniele.ceraolospurio@intel.com,
	dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 17/47] drm/i915/guc: Extend deregistration fence to schedule disable
Date: Mon, 12 Jul 2021 10:54:02 -0700	[thread overview]
Message-ID: <6e805972-e0cc-34e5-ed01-7d1f6019e328@intel.com> (raw)
In-Reply-To: <20210710033647.GA187136@DUT030-TGLY.fm.intel.com>

On 7/9/2021 20:36, Matthew Brost wrote:
> On Fri, Jul 09, 2021 at 03:59:11PM -0700, John Harrison wrote:
>> On 6/24/2021 00:04, Matthew Brost wrote:
>>> Extend the deregistration context fence to fence whne a GuC context has
>>> scheduling disable pending.
>>>
>>> Cc: John Harrison <john.c.harrison@intel.com>
>>> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
>>> ---
>>>    .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 37 +++++++++++++++----
>>>    1 file changed, 30 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>>> index 0386ccd5a481..0a6ccdf32316 100644
>>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>>> @@ -918,7 +918,19 @@ static void guc_context_sched_disable(struct intel_context *ce)
>>>    		goto unpin;
>>>    	spin_lock_irqsave(&ce->guc_state.lock, flags);
>>> +
>>> +	/*
>>> +	 * We have to check if the context has been pinned again as another pin
>>> +	 * operation is allowed to pass this function. Checking the pin count
>>> +	 * here synchronizes this function with guc_request_alloc ensuring a
>>> +	 * request doesn't slip through the 'context_pending_disable' fence.
>>> +	 */
>> The pin count is an atomic so doesn't need the spinlock. Also the above
> How about?
>
> /*
>   * We have to check if the context has been pinned again as another pin
>   * operation is allowed to pass this function. Checking the pin count,
>   * within ce->guc_state.lock, synchronizes this function with
>   * guc_request_alloc ensuring a request doesn't slip through the
>   * 'context_pending_disable' fence. Checking within the spin lock (can't
>   * sleep) ensures another process doesn't pin this context and generate
>   * a request before we set the 'context_pending_disable' flag here.
>   */
>
> Matt
Sounds good. With that added in:
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>

>
>> comment 'checking the pin count here synchronizes ...' seems wrong. Isn't
>> the point that acquiring the spinlock is what synchronises with
>> guc_request_alloc? So the comment should be before the spinlock acquire and
>> should mention using the spinlock for this purpose?
>>
>> John.
>>
>>
>>> +	if (unlikely(atomic_add_unless(&ce->pin_count, -2, 2))) {
>>> +		spin_unlock_irqrestore(&ce->guc_state.lock, flags);
>>> +		return;
>>> +	}
>>>    	guc_id = prep_context_pending_disable(ce);
>>> +
>>>    	spin_unlock_irqrestore(&ce->guc_state.lock, flags);
>>>    	with_intel_runtime_pm(runtime_pm, wakeref)
>>> @@ -1123,19 +1135,22 @@ static int guc_request_alloc(struct i915_request *rq)
>>>    out:
>>>    	/*
>>>    	 * We block all requests on this context if a G2H is pending for a
>>> -	 * context deregistration as the GuC will fail a context registration
>>> -	 * while this G2H is pending. Once a G2H returns, the fence is released
>>> -	 * that is blocking these requests (see guc_signal_context_fence).
>>> +	 * schedule disable or context deregistration as the GuC will fail a
>>> +	 * schedule enable or context registration if either G2H is pending
>>> +	 * respectfully. Once a G2H returns, the fence is released that is
>>> +	 * blocking these requests (see guc_signal_context_fence).
>>>    	 *
>>> -	 * We can safely check the below field outside of the lock as it isn't
>>> -	 * possible for this field to transition from being clear to set but
>>> +	 * We can safely check the below fields outside of the lock as it isn't
>>> +	 * possible for these fields to transition from being clear to set but
>>>    	 * converse is possible, hence the need for the check within the lock.
>>>    	 */
>>> -	if (likely(!context_wait_for_deregister_to_register(ce)))
>>> +	if (likely(!context_wait_for_deregister_to_register(ce) &&
>>> +		   !context_pending_disable(ce)))
>>>    		return 0;
>>>    	spin_lock_irqsave(&ce->guc_state.lock, flags);
>>> -	if (context_wait_for_deregister_to_register(ce)) {
>>> +	if (context_wait_for_deregister_to_register(ce) ||
>>> +	    context_pending_disable(ce)) {
>>>    		i915_sw_fence_await(&rq->submit);
>>>    		list_add_tail(&rq->guc_fence_link, &ce->guc_state.fences);
>>> @@ -1484,10 +1499,18 @@ int intel_guc_sched_done_process_msg(struct intel_guc *guc,
>>>    	if (context_pending_enable(ce)) {
>>>    		clr_context_pending_enable(ce);
>>>    	} else if (context_pending_disable(ce)) {
>>> +		/*
>>> +		 * Unpin must be done before __guc_signal_context_fence,
>>> +		 * otherwise a race exists between the requests getting
>>> +		 * submitted + retired before this unpin completes resulting in
>>> +		 * the pin_count going to zero and the context still being
>>> +		 * enabled.
>>> +		 */
>>>    		intel_context_sched_disable_unpin(ce);
>>>    		spin_lock_irqsave(&ce->guc_state.lock, flags);
>>>    		clr_context_pending_disable(ce);
>>> +		__guc_signal_context_fence(ce);
>>>    		spin_unlock_irqrestore(&ce->guc_state.lock, flags);
>>>    	}


  reply	other threads:[~2021-07-12 17:54 UTC|newest]

Thread overview: 166+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-24  7:04 [PATCH 00/47] GuC submission support Matthew Brost
2021-06-24  7:04 ` [PATCH 01/47] drm/i915/guc: Relax CTB response timeout Matthew Brost
2021-06-24 17:23   ` Michal Wajdeczko
2021-06-24  7:04 ` [PATCH 02/47] drm/i915/guc: Improve error message for unsolicited CT response Matthew Brost
2021-06-25 11:58   ` [Intel-gfx] " Michal Wajdeczko
2021-06-24  7:04 ` [PATCH 03/47] drm/i915/guc: Increase size of CTB buffers Matthew Brost
2021-06-24 13:49   ` Michal Wajdeczko
2021-06-24 15:41     ` Matthew Brost
2021-06-25 12:03       ` Michal Wajdeczko
2021-06-24  7:04 ` [PATCH 04/47] drm/i915/guc: Add non blocking CTB send function Matthew Brost
2021-06-24 14:48   ` [Intel-gfx] " Michal Wajdeczko
2021-06-24 15:49     ` Matthew Brost
2021-06-24 17:02       ` Michal Wajdeczko
2021-06-24 22:41         ` Matthew Brost
2021-06-25 11:50           ` Michal Wajdeczko
2021-06-25 17:53             ` Matthew Brost
2021-06-24 22:47         ` Matthew Brost
2021-06-24  7:04 ` [PATCH 05/47] drm/i915/guc: Add stall timer to " Matthew Brost
2021-06-24 17:37   ` [Intel-gfx] " Michal Wajdeczko
2021-06-24 23:01     ` Matthew Brost
2021-06-24  7:04 ` [PATCH 06/47] drm/i915/guc: Optimize CTB writes and reads Matthew Brost
2021-06-25 13:09   ` [Intel-gfx] " Michal Wajdeczko
2021-06-25 18:26     ` Matthew Brost
2021-06-25 20:28     ` Matthew Brost
2021-06-24  7:04 ` [PATCH 07/47] drm/i915/guc: Module load failure test for CT buffer creation Matthew Brost
2021-06-24  7:04 ` [PATCH 08/47] drm/i915/guc: Add new GuC interface defines and structures Matthew Brost
2021-06-29 21:11   ` John Harrison
2021-06-30  0:30     ` Matthew Brost
2021-06-24  7:04 ` [PATCH 09/47] drm/i915/guc: Remove GuC stage descriptor, add lrc descriptor Matthew Brost
2021-06-25 19:44   ` John Harrison
2021-06-24  7:04 ` [PATCH 10/47] drm/i915/guc: Add lrc descriptor context lookup array Matthew Brost
2021-06-25 13:17   ` Michal Wajdeczko
2021-06-25 17:26     ` Matthew Brost
2021-06-29 21:20       ` John Harrison
2021-06-24  7:04 ` [PATCH 11/47] drm/i915/guc: Implement GuC submission tasklet Matthew Brost
2021-06-29 22:04   ` John Harrison
2021-06-30  0:41     ` Matthew Brost
2021-06-24  7:04 ` [PATCH 12/47] drm/i915/guc: Add bypass tasklet submission path to GuC Matthew Brost
2021-06-29 22:09   ` John Harrison
2021-06-24  7:04 ` [PATCH 13/47] drm/i915/guc: Implement GuC context operations for new inteface Matthew Brost
2021-06-25 13:25   ` Michal Wajdeczko
2021-06-25 17:46     ` Matthew Brost
2021-06-24  7:04 ` [PATCH 14/47] drm/i915/guc: Insert fence on context when deregistering Matthew Brost
2021-07-09 22:39   ` John Harrison
2021-06-24  7:04 ` [PATCH 15/47] drm/i915/guc: Defer context unpin until scheduling is disabled Matthew Brost
2021-07-09 22:48   ` John Harrison
2021-06-24  7:04 ` [PATCH 16/47] drm/i915/guc: Disable engine barriers with GuC during unpin Matthew Brost
2021-07-09 22:53   ` John Harrison
2021-07-10  3:00     ` Matthew Brost
2021-07-12 17:57       ` John Harrison
2021-07-12 18:11         ` [Intel-gfx] " Daniel Vetter
2021-06-24  7:04 ` [PATCH 17/47] drm/i915/guc: Extend deregistration fence to schedule disable Matthew Brost
2021-07-09 22:59   ` John Harrison
2021-07-10  3:36     ` Matthew Brost
2021-07-12 17:54       ` John Harrison [this message]
2021-06-24  7:04 ` [PATCH 18/47] drm/i915: Disable preempt busywait when using GuC scheduling Matthew Brost
2021-07-09 23:03   ` John Harrison
2021-06-24  7:04 ` [PATCH 19/47] drm/i915/guc: Ensure request ordering via completion fences Matthew Brost
2021-07-15  1:51   ` Daniele Ceraolo Spurio
2021-06-24  7:04 ` [PATCH 20/47] drm/i915/guc: Disable semaphores when using GuC scheduling Matthew Brost
2021-07-09 23:53   ` John Harrison
2021-07-15  0:07     ` Matthew Brost
2021-06-24  7:04 ` [PATCH 21/47] drm/i915/guc: Ensure G2H response has space in buffer Matthew Brost
2021-07-13 18:36   ` John Harrison
2021-07-15  0:06     ` Matthew Brost
2021-07-15  0:12       ` John Harrison
2021-06-24  7:04 ` [PATCH 22/47] drm/i915/guc: Update intel_gt_wait_for_idle to work with GuC Matthew Brost
2021-07-10  0:16   ` John Harrison
2021-07-10  3:55     ` Matthew Brost
2021-07-17  4:09       ` Matthew Brost
2021-06-24  7:04 ` [PATCH 23/47] drm/i915/guc: Update GuC debugfs to support new GuC Matthew Brost
2021-07-12 18:05   ` John Harrison
2021-07-12 20:59     ` Matthew Brost
2021-07-12 21:37       ` John Harrison
2021-07-13  8:51   ` Michal Wajdeczko
2021-07-14 23:56     ` Matthew Brost
2021-06-24  7:04 ` [PATCH 24/47] drm/i915/guc: Add several request trace points Matthew Brost
2021-07-12 18:08   ` John Harrison
2021-07-13  9:06   ` [Intel-gfx] " Tvrtko Ursulin
2021-07-20  1:59     ` Matthew Brost
2021-07-22 13:55       ` Tvrtko Ursulin
2021-06-24  7:04 ` [PATCH 25/47] drm/i915: Add intel_context tracing Matthew Brost
2021-07-12 18:10   ` John Harrison
2021-07-12 21:47     ` Matthew Brost
2021-07-12 21:51       ` John Harrison
2021-06-24  7:04 ` [PATCH 26/47] drm/i915/guc: GuC virtual engines Matthew Brost
2021-07-15  1:21   ` Daniele Ceraolo Spurio
2021-06-24  7:04 ` [PATCH 27/47] drm/i915: Track 'serial' counts for " Matthew Brost
2021-07-12 18:11   ` John Harrison
2021-07-12 20:06     ` Matthew Brost
2021-06-24  7:04 ` [PATCH 28/47] drm/i915: Hold reference to intel_context over life of i915_request Matthew Brost
2021-07-12 18:23   ` John Harrison
2021-07-12 20:05     ` Matthew Brost
2021-07-12 21:36       ` [Intel-gfx] " Matthew Brost
2021-07-12 21:48         ` John Harrison
2021-06-24  7:04 ` [PATCH 29/47] drm/i915/guc: Disable bonding extension with GuC submission Matthew Brost
2021-07-12 18:23   ` John Harrison
2021-06-24  7:04 ` [PATCH 30/47] drm/i915/guc: Direct all breadcrumbs for a class to single breadcrumbs Matthew Brost
2021-07-12 19:19   ` John Harrison
2021-06-24  7:05 ` [PATCH 31/47] drm/i915/guc: Reset implementation for new GuC interface Matthew Brost
2021-07-12 19:58   ` John Harrison
2021-07-15  0:53     ` Matthew Brost
2021-07-15  9:36   ` [Intel-gfx] " Tvrtko Ursulin
2021-07-26 22:48     ` Matthew Brost
2021-07-27  8:56       ` Tvrtko Ursulin
2021-07-27 18:30         ` Matthew Brost
2021-06-24  7:05 ` [PATCH 32/47] drm/i915: Reset GPU immediately if submission is disabled Matthew Brost
2021-07-12 20:01   ` John Harrison
2021-06-24  7:05 ` [PATCH 33/47] drm/i915/guc: Add disable interrupts to guc sanitize Matthew Brost
2021-07-12 20:11   ` John Harrison
2021-06-24  7:05 ` [PATCH 34/47] drm/i915/guc: Suspend/resume implementation for new interface Matthew Brost
2021-07-12 22:56   ` John Harrison
2021-06-24  7:05 ` [PATCH 35/47] drm/i915/guc: Handle context reset notification Matthew Brost
2021-07-12 22:58   ` John Harrison
2021-07-15  0:32     ` Matthew Brost
2021-06-24  7:05 ` [PATCH 36/47] drm/i915/guc: Handle engine reset failure notification Matthew Brost
2021-07-12 22:59   ` John Harrison
2021-06-24  7:05 ` [PATCH 37/47] drm/i915/guc: Enable the timer expired interrupt for GuC Matthew Brost
2021-07-12 23:00   ` John Harrison
2021-06-24  7:05 ` [PATCH 38/47] drm/i915/guc: Provide mmio list to be saved/restored on engine reset Matthew Brost
2021-06-24  7:05 ` [PATCH 39/47] drm/i915/guc: Don't complain about reset races Matthew Brost
2021-06-24 15:55   ` [Intel-gfx] " Matthew Brost
2021-06-24  7:05 ` [PATCH 40/47] drm/i915/guc: Enable GuC engine reset Matthew Brost
2021-06-24 16:19   ` [Intel-gfx] " Matthew Brost
2021-06-24  7:05 ` [PATCH 41/47] drm/i915/guc: Capture error state on context reset Matthew Brost
2021-07-12 23:05   ` John Harrison
2021-06-24  7:05 ` [PATCH 42/47] drm/i915/guc: Fix for error capture after full GPU reset with GuC Matthew Brost
2021-07-15  0:43   ` [Intel-gfx] " Matthew Brost
2021-06-24  7:05 ` [PATCH 43/47] drm/i915/guc: Hook GuC scheduling policies up Matthew Brost
2021-06-25  0:59   ` [Intel-gfx] " Matthew Brost
2021-06-25 19:10     ` John Harrison
2021-07-10 18:56       ` Matthew Brost
2021-06-24  7:05 ` [PATCH 44/47] drm/i915/guc: Connect reset modparam updates to GuC policy flags Matthew Brost
2021-06-25  1:10   ` [Intel-gfx] " Matthew Brost
2021-06-24  7:05 ` [PATCH 45/47] drm/i915/guc: Include scheduling policies in the debugfs state dump Matthew Brost
2021-06-24 16:34   ` Matthew Brost
2021-06-24  7:05 ` [PATCH 46/47] drm/i915/guc: Add golden context to GuC ADS Matthew Brost
2021-06-24  7:05 ` [PATCH 47/47] drm/i915/guc: Unblock GuC submission on Gen11+ Matthew Brost
2021-06-30  8:22   ` Martin Peres
2021-06-30 18:00     ` Matthew Brost
2021-07-01 18:24       ` Martin Peres
2021-07-02  8:13         ` Martin Peres
2021-07-02 13:06           ` Michal Wajdeczko
2021-07-02 13:12             ` Martin Peres
2021-07-02 14:08               ` Michal Wajdeczko
2021-06-30 18:58     ` John Harrison
2021-07-01  8:14       ` Pekka Paalanen
2021-07-01 18:27         ` Martin Peres
2021-07-01 19:28           ` [Intel-gfx] " Daniel Vetter
2021-07-02  7:29             ` Pekka Paalanen
2021-07-02  8:09               ` Martin Peres
2021-07-02 15:07                 ` Michal Wajdeczko
2021-07-03  8:21                   ` Martin Peres
2021-07-07  0:57                     ` John Harrison
2021-07-07  7:47                       ` Pekka Paalanen
2021-07-07 10:11                       ` Michal Wajdeczko
2021-07-15  0:49   ` Matthew Brost
2021-10-22  9:35 ` [PATCH 00/47] GuC submission support Joonas Lahtinen
2021-10-22 16:42   ` Matthew Brost
2021-10-25  9:37     ` Joonas Lahtinen
2021-10-25 15:15       ` Matthew Brost
2021-10-26  8:59         ` Joonas Lahtinen
2021-10-26 15:43           ` Matthew Brost
2021-10-26 15:51           ` Matthew Brost
2021-10-27  9:21             ` Joonas Lahtinen
2021-10-25 17:06       ` John Harrison

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