* [PATCH v6 0/4] Add mt8186 dsi compatoble & Convert dsi_dtbinding to .yaml
@ 2022-05-04 9:19 Rex-BC Chen
2022-05-04 9:19 ` [PATCH v6 1/4] dt-bindings: display: mediatek: dsi: " Rex-BC Chen
` (3 more replies)
0 siblings, 4 replies; 13+ messages in thread
From: Rex-BC Chen @ 2022-05-04 9:19 UTC (permalink / raw)
To: robh+dt, krzysztof.kozlowski+dt, chunkuang.hu, p.zabel
Cc: devicetree, jitao.shi, xinlei.lee, airlied, linux-kernel,
dri-devel, Project_Global_Chrome_Upstream_Group, Rex-BC Chen,
linux-mediatek, matthias.bgg, linux-arm-kernel
Changes since v5:
1. Drop #address-cells, #size-cells.
2. Based on chunkuang.hu/linux.git/mediatek-drm-next
Changes since v4:
1. Modify DSI dt-binding.
2. Add support for MT8186 DSI in mtk_drm_drv.c.
Changes since v3:
1. Add dsi port property.
2. Fix some formatting.
Changes since v2:
1. Added #address-cells, #size-cells two properties.
2. Fix some formatting issues.
Changes since v1:
1. Delete the mediatek,dsi.txt & Add the mediatek,dsi.yaml.
2. Ignore the Move the getting bridge node function patch for V1.
Rex-BC Chen (1):
drm/mediatek: Add MT8186 DSI compatible for mtk_drm_drv.c
Xinlei Lee (3):
dt-bindings: display: mediatek: dsi: Convert dsi_dtbinding to .yaml
dt-bindings: display: mediatek: dsi: Add compatible for MediaTek
MT8186
drm/mediatek: Add mt8186 dsi compatible to mtk_dsi.c
.../display/mediatek/mediatek,dsi.txt | 62 ----------
.../display/mediatek/mediatek,dsi.yaml | 116 ++++++++++++++++++
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +
drivers/gpu/drm/mediatek/mtk_dsi.c | 8 ++
4 files changed, 126 insertions(+), 62 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
--
2.18.0
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v6 1/4] dt-bindings: display: mediatek: dsi: Convert dsi_dtbinding to .yaml
2022-05-04 9:19 [PATCH v6 0/4] Add mt8186 dsi compatoble & Convert dsi_dtbinding to .yaml Rex-BC Chen
@ 2022-05-04 9:19 ` Rex-BC Chen
2022-05-11 7:24 ` Rex-BC Chen
` (2 more replies)
2022-05-04 9:19 ` [PATCH v6 2/4] dt-bindings: display: mediatek: dsi: Add compatible for MediaTek MT8186 Rex-BC Chen
` (2 subsequent siblings)
3 siblings, 3 replies; 13+ messages in thread
From: Rex-BC Chen @ 2022-05-04 9:19 UTC (permalink / raw)
To: robh+dt, krzysztof.kozlowski+dt, chunkuang.hu, p.zabel
Cc: devicetree, jitao.shi, xinlei.lee, airlied, linux-kernel,
dri-devel, Project_Global_Chrome_Upstream_Group, Rex-BC Chen,
linux-mediatek, matthias.bgg, linux-arm-kernel
From: Xinlei Lee <xinlei.lee@mediatek.com>
Convert mediatek,dsi.txt to mediatek,dsi.yaml format
Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
---
.../display/mediatek/mediatek,dsi.txt | 62 ----------
.../display/mediatek/mediatek,dsi.yaml | 115 ++++++++++++++++++
2 files changed, 115 insertions(+), 62 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
deleted file mode 100644
index 36b01458f45c..000000000000
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
+++ /dev/null
@@ -1,62 +0,0 @@
-Mediatek DSI Device
-===================
-
-The Mediatek DSI function block is a sink of the display subsystem and can
-drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual-
-channel output.
-
-Required properties:
-- compatible: "mediatek,<chip>-dsi"
-- the supported chips are mt2701, mt7623, mt8167, mt8173 and mt8183.
-- reg: Physical base address and length of the controller's registers
-- interrupts: The interrupt signal from the function block.
-- clocks: device clocks
- See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
-- clock-names: must contain "engine", "digital", and "hs"
-- phys: phandle link to the MIPI D-PHY controller.
-- phy-names: must contain "dphy"
-- port: Output port node with endpoint definitions as described in
- Documentation/devicetree/bindings/graph.txt. This port should be connected
- to the input port of an attached DSI panel or DSI-to-eDP encoder chip.
-
-Optional properties:
-- resets: list of phandle + reset specifier pair, as described in [1].
-
-[1] Documentation/devicetree/bindings/reset/reset.txt
-
-MIPI TX Configuration Module
-============================
-
-See phy/mediatek,dsi-phy.yaml
-
-Example:
-
-mipi_tx0: mipi-dphy@10215000 {
- compatible = "mediatek,mt8173-mipi-tx";
- reg = <0 0x10215000 0 0x1000>;
- clocks = <&clk26m>;
- clock-output-names = "mipi_tx0_pll";
- #clock-cells = <0>;
- #phy-cells = <0>;
- drive-strength-microamp = <4600>;
- nvmem-cells= <&mipi_tx_calibration>;
- nvmem-cell-names = "calibration-data";
-};
-
-dsi0: dsi@1401b000 {
- compatible = "mediatek,mt8173-dsi";
- reg = <0 0x1401b000 0 0x1000>;
- interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&mmsys MM_DSI0_ENGINE>, <&mmsys MM_DSI0_DIGITAL>,
- <&mipi_tx0>;
- clock-names = "engine", "digital", "hs";
- resets = <&mmsys MT8173_MMSYS_SW0_RST_B_DISP_DSI0>;
- phys = <&mipi_tx0>;
- phy-names = "dphy";
-
- port {
- dsi0_out: endpoint {
- remote-endpoint = <&panel_in>;
- };
- };
-};
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
new file mode 100644
index 000000000000..fa5bdf28668a
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
@@ -0,0 +1,115 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/mediatek/mediatek,dsi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek DSI Controller Device Tree Bindings
+
+maintainers:
+ - Chun-Kuang Hu <chunkuang.hu@kernel.org>
+ - Philipp Zabel <p.zabel@pengutronix.de>
+ - Jitao Shi <jitao.shi@mediatek.com>
+ - Xinlei Lee <xinlei.lee@mediatek.com>
+
+description: |
+ The MediaTek DSI function block is a sink of the display subsystem and can
+ drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual-
+ channel output.
+
+allOf:
+ - $ref: /schemas/display/dsi-controller.yaml#
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt2701-dsi
+ - mediatek,mt7623-dsi
+ - mediatek,mt8167-dsi
+ - mediatek,mt8173-dsi
+ - mediatek,mt8183-dsi
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Engine Clock
+ - description: Digital Clock
+ - description: HS Clock
+
+ clock-names:
+ items:
+ - const: engine
+ - const: digital
+ - const: hs
+
+ resets:
+ maxItems: 1
+
+ phys:
+ maxItems: 1
+
+ phy-names:
+ items:
+ - const: dphy
+
+ port:
+ $ref: /schemas/graph.yaml#/properties/port
+ description:
+ Output port node. This port should be connected to the input
+ port of an attached DSI panel or DSI-to-eDP encoder chip.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - power-domains
+ - clocks
+ - clock-names
+ - phys
+ - phy-names
+ - port
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8183-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/power/mt8183-power.h>
+ #include <dt-bindings/phy/phy.h>
+ #include <dt-bindings/reset/mt8183-resets.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ dsi0: dsi@14014000 {
+ compatible = "mediatek,mt8183-dsi";
+ reg = <0 0x14014000 0 0x1000>;
+ interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_LOW>;
+ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_DSI0_MM>,
+ <&mmsys CLK_MM_DSI0_IF>,
+ <&mipi_tx0>;
+ clock-names = "engine", "digital", "hs";
+ resets = <&mmsys MT8183_MMSYS_SW0_RST_B_DISP_DSI0>;
+ phys = <&mipi_tx0>;
+ phy-names = "dphy";
+ port {
+ dsi0_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ };
+ };
+
+...
--
2.18.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v6 2/4] dt-bindings: display: mediatek: dsi: Add compatible for MediaTek MT8186
2022-05-04 9:19 [PATCH v6 0/4] Add mt8186 dsi compatoble & Convert dsi_dtbinding to .yaml Rex-BC Chen
2022-05-04 9:19 ` [PATCH v6 1/4] dt-bindings: display: mediatek: dsi: " Rex-BC Chen
@ 2022-05-04 9:19 ` Rex-BC Chen
2022-05-18 4:27 ` CK Hu
2022-05-04 9:19 ` [PATCH v6 3/4] drm/mediatek: Add mt8186 dsi compatible to mtk_dsi.c Rex-BC Chen
2022-05-04 9:19 ` [PATCH v6 4/4] drm/mediatek: Add MT8186 DSI compatible for mtk_drm_drv.c Rex-BC Chen
3 siblings, 1 reply; 13+ messages in thread
From: Rex-BC Chen @ 2022-05-04 9:19 UTC (permalink / raw)
To: robh+dt, krzysztof.kozlowski+dt, chunkuang.hu, p.zabel
Cc: devicetree, jitao.shi, xinlei.lee, airlied, linux-kernel,
dri-devel, Project_Global_Chrome_Upstream_Group, linux-mediatek,
matthias.bgg, linux-arm-kernel
From: Xinlei Lee <xinlei.lee@mediatek.com>
Add dt-binding documentation of dsi for MediaTek MT8186 SoC.
Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/display/mediatek/mediatek,dsi.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
index fa5bdf28668a..b18d6a57c6e1 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
@@ -28,6 +28,7 @@ properties:
- mediatek,mt8167-dsi
- mediatek,mt8173-dsi
- mediatek,mt8183-dsi
+ - mediatek,mt8186-dsi
reg:
maxItems: 1
--
2.18.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v6 3/4] drm/mediatek: Add mt8186 dsi compatible to mtk_dsi.c
2022-05-04 9:19 [PATCH v6 0/4] Add mt8186 dsi compatoble & Convert dsi_dtbinding to .yaml Rex-BC Chen
2022-05-04 9:19 ` [PATCH v6 1/4] dt-bindings: display: mediatek: dsi: " Rex-BC Chen
2022-05-04 9:19 ` [PATCH v6 2/4] dt-bindings: display: mediatek: dsi: Add compatible for MediaTek MT8186 Rex-BC Chen
@ 2022-05-04 9:19 ` Rex-BC Chen
2022-05-18 4:31 ` CK Hu
2022-05-04 9:19 ` [PATCH v6 4/4] drm/mediatek: Add MT8186 DSI compatible for mtk_drm_drv.c Rex-BC Chen
3 siblings, 1 reply; 13+ messages in thread
From: Rex-BC Chen @ 2022-05-04 9:19 UTC (permalink / raw)
To: robh+dt, krzysztof.kozlowski+dt, chunkuang.hu, p.zabel
Cc: devicetree, jitao.shi, xinlei.lee, airlied, linux-kernel,
dri-devel, Project_Global_Chrome_Upstream_Group, linux-mediatek,
matthias.bgg, linux-arm-kernel
From: Xinlei Lee <xinlei.lee@mediatek.com>
Add the compatible because use different cmdq addresses in mt8186.
Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
index ccb0511b9cd5..b13fd0317e96 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -1155,6 +1155,12 @@ static const struct mtk_dsi_driver_data mt8183_dsi_driver_data = {
.has_size_ctl = true,
};
+static const struct mtk_dsi_driver_data mt8186_dsi_driver_data = {
+ .reg_cmdq_off = 0xd00,
+ .has_shadow_ctl = true,
+ .has_size_ctl = true,
+};
+
static const struct of_device_id mtk_dsi_of_match[] = {
{ .compatible = "mediatek,mt2701-dsi",
.data = &mt2701_dsi_driver_data },
@@ -1162,6 +1168,8 @@ static const struct of_device_id mtk_dsi_of_match[] = {
.data = &mt8173_dsi_driver_data },
{ .compatible = "mediatek,mt8183-dsi",
.data = &mt8183_dsi_driver_data },
+ { .compatible = "mediatek,mt8186-dsi",
+ .data = &mt8186_dsi_driver_data },
{ },
};
MODULE_DEVICE_TABLE(of, mtk_dsi_of_match);
--
2.18.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v6 4/4] drm/mediatek: Add MT8186 DSI compatible for mtk_drm_drv.c
2022-05-04 9:19 [PATCH v6 0/4] Add mt8186 dsi compatoble & Convert dsi_dtbinding to .yaml Rex-BC Chen
` (2 preceding siblings ...)
2022-05-04 9:19 ` [PATCH v6 3/4] drm/mediatek: Add mt8186 dsi compatible to mtk_dsi.c Rex-BC Chen
@ 2022-05-04 9:19 ` Rex-BC Chen
2022-05-18 4:34 ` CK Hu
3 siblings, 1 reply; 13+ messages in thread
From: Rex-BC Chen @ 2022-05-04 9:19 UTC (permalink / raw)
To: robh+dt, krzysztof.kozlowski+dt, chunkuang.hu, p.zabel
Cc: devicetree, jitao.shi, xinlei.lee, airlied, linux-kernel,
dri-devel, Project_Global_Chrome_Upstream_Group, Rex-BC Chen,
linux-mediatek, matthias.bgg, linux-arm-kernel
The compatible "mediatek,mt8186-dsi" is used by MT8186 DSI, so
add it to mtk_ddp_comp_dt_ids in mtk_drm_drv.c.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index 6abe6bcacbdc..0104283767ad 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
@@ -544,6 +544,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
.data = (void *)MTK_DSI },
{ .compatible = "mediatek,mt8183-dsi",
.data = (void *)MTK_DSI },
+ { .compatible = "mediatek,mt8186-dsi",
+ .data = (void *)MTK_DSI },
{ }
};
--
2.18.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v6 1/4] dt-bindings: display: mediatek: dsi: Convert dsi_dtbinding to .yaml
2022-05-04 9:19 ` [PATCH v6 1/4] dt-bindings: display: mediatek: dsi: " Rex-BC Chen
@ 2022-05-11 7:24 ` Rex-BC Chen
2022-05-11 14:36 ` Rob Herring
2022-05-11 14:30 ` Rob Herring
2022-05-18 4:24 ` CK Hu
2 siblings, 1 reply; 13+ messages in thread
From: Rex-BC Chen @ 2022-05-11 7:24 UTC (permalink / raw)
To: robh+dt, krzysztof.kozlowski+dt, chunkuang.hu, p.zabel
Cc: devicetree, jitao.shi, xinlei.lee, airlied, linux-kernel,
dri-devel, Project_Global_Chrome_Upstream_Group, linux-mediatek,
matthias.bgg, linux-arm-kernel
On Wed, 2022-05-04 at 17:19 +0800, Rex-BC Chen wrote:
> From: Xinlei Lee <xinlei.lee@mediatek.com>
>
> Convert mediatek,dsi.txt to mediatek,dsi.yaml format
>
> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> ---
> .../display/mediatek/mediatek,dsi.txt | 62 ----------
> .../display/mediatek/mediatek,dsi.yaml | 115
> ++++++++++++++++++
> 2 files changed, 115 insertions(+), 62 deletions(-)
> delete mode 100644
> Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> create mode 100644
> Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
>
> diff --git
> a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> deleted file mode 100644
> index 36b01458f45c..000000000000
> ---
> a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> +++ /dev/null
> @@ -1,62 +0,0 @@
> -Mediatek DSI Device
> -===================
> -
> -The Mediatek DSI function block is a sink of the display subsystem
> and can
> -drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for
> dual-
> -channel output.
> -
> -Required properties:
> -- compatible: "mediatek,<chip>-dsi"
> -- the supported chips are mt2701, mt7623, mt8167, mt8173 and mt8183.
> -- reg: Physical base address and length of the controller's
> registers
> -- interrupts: The interrupt signal from the function block.
> -- clocks: device clocks
> - See Documentation/devicetree/bindings/clock/clock-bindings.txt for
> details.
> -- clock-names: must contain "engine", "digital", and "hs"
> -- phys: phandle link to the MIPI D-PHY controller.
> -- phy-names: must contain "dphy"
> -- port: Output port node with endpoint definitions as described in
> - Documentation/devicetree/bindings/graph.txt. This port should be
> connected
> - to the input port of an attached DSI panel or DSI-to-eDP encoder
> chip.
> -
> -Optional properties:
> -- resets: list of phandle + reset specifier pair, as described in
> [1].
> -
> -[1] Documentation/devicetree/bindings/reset/reset.txt
> -
> -MIPI TX Configuration Module
> -============================
> -
> -See phy/mediatek,dsi-phy.yaml
> -
> -Example:
> -
> -mipi_tx0: mipi-dphy@10215000 {
> - compatible = "mediatek,mt8173-mipi-tx";
> - reg = <0 0x10215000 0 0x1000>;
> - clocks = <&clk26m>;
> - clock-output-names = "mipi_tx0_pll";
> - #clock-cells = <0>;
> - #phy-cells = <0>;
> - drive-strength-microamp = <4600>;
> - nvmem-cells= <&mipi_tx_calibration>;
> - nvmem-cell-names = "calibration-data";
> -};
> -
> -dsi0: dsi@1401b000 {
> - compatible = "mediatek,mt8173-dsi";
> - reg = <0 0x1401b000 0 0x1000>;
> - interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_LOW>;
> - clocks = <&mmsys MM_DSI0_ENGINE>, <&mmsys MM_DSI0_DIGITAL>,
> - <&mipi_tx0>;
> - clock-names = "engine", "digital", "hs";
> - resets = <&mmsys MT8173_MMSYS_SW0_RST_B_DISP_DSI0>;
> - phys = <&mipi_tx0>;
> - phy-names = "dphy";
> -
> - port {
> - dsi0_out: endpoint {
> - remote-endpoint = <&panel_in>;
> - };
> - };
> -};
> diff --git
> a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yam
> l
> b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yam
> l
> new file mode 100644
> index 000000000000..fa5bdf28668a
> --- /dev/null
> +++
> b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yam
> l
> @@ -0,0 +1,115 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id:
> http://devicetree.org/schemas/display/mediatek/mediatek,dsi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek DSI Controller Device Tree Bindings
> +
> +maintainers:
> + - Chun-Kuang Hu <chunkuang.hu@kernel.org>
> + - Philipp Zabel <p.zabel@pengutronix.de>
> + - Jitao Shi <jitao.shi@mediatek.com>
> + - Xinlei Lee <xinlei.lee@mediatek.com>
> +
> +description: |
> + The MediaTek DSI function block is a sink of the display subsystem
> and can
> + drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized
> for dual-
> + channel output.
> +
> +allOf:
> + - $ref: /schemas/display/dsi-controller.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - mediatek,mt2701-dsi
> + - mediatek,mt7623-dsi
> + - mediatek,mt8167-dsi
> + - mediatek,mt8173-dsi
> + - mediatek,mt8183-dsi
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + power-domains:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: Engine Clock
> + - description: Digital Clock
> + - description: HS Clock
> +
> + clock-names:
> + items:
> + - const: engine
> + - const: digital
> + - const: hs
> +
> + resets:
> + maxItems: 1
> +
> + phys:
> + maxItems: 1
> +
> + phy-names:
> + items:
> + - const: dphy
> +
> + port:
> + $ref: /schemas/graph.yaml#/properties/port
> + description:
> + Output port node. This port should be connected to the input
> + port of an attached DSI panel or DSI-to-eDP encoder chip.
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - power-domains
> + - clocks
> + - clock-names
> + - phys
> + - phy-names
> + - port
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/mt8183-clk.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/power/mt8183-power.h>
> + #include <dt-bindings/phy/phy.h>
> + #include <dt-bindings/reset/mt8183-resets.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + dsi0: dsi@14014000 {
> + compatible = "mediatek,mt8183-dsi";
> + reg = <0 0x14014000 0 0x1000>;
> + interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_LOW>;
> + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
> + clocks = <&mmsys CLK_MM_DSI0_MM>,
> + <&mmsys CLK_MM_DSI0_IF>,
> + <&mipi_tx0>;
> + clock-names = "engine", "digital", "hs";
> + resets = <&mmsys MT8183_MMSYS_SW0_RST_B_DISP_DSI0>;
> + phys = <&mipi_tx0>;
> + phy-names = "dphy";
> + port {
> + dsi0_out: endpoint {
> + remote-endpoint = <&panel_in>;
> + };
> + };
> + };
> + };
> +
> +...
Hello Rob and Krzysztof,
Can you give us some suggestions for this conversion patch?
Thanks!
BRs,
Rex
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v6 1/4] dt-bindings: display: mediatek: dsi: Convert dsi_dtbinding to .yaml
2022-05-04 9:19 ` [PATCH v6 1/4] dt-bindings: display: mediatek: dsi: " Rex-BC Chen
2022-05-11 7:24 ` Rex-BC Chen
@ 2022-05-11 14:30 ` Rob Herring
2022-05-18 4:24 ` CK Hu
2 siblings, 0 replies; 13+ messages in thread
From: Rob Herring @ 2022-05-11 14:30 UTC (permalink / raw)
To: Rex-BC Chen
Cc: chunkuang.hu, jitao.shi, krzysztof.kozlowski+dt, devicetree,
airlied, linux-kernel, dri-devel,
Project_Global_Chrome_Upstream_Group, robh+dt, linux-mediatek,
matthias.bgg, linux-arm-kernel, xinlei.lee
On Wed, 04 May 2022 17:19:20 +0800, Rex-BC Chen wrote:
> From: Xinlei Lee <xinlei.lee@mediatek.com>
>
> Convert mediatek,dsi.txt to mediatek,dsi.yaml format
>
> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> ---
> .../display/mediatek/mediatek,dsi.txt | 62 ----------
> .../display/mediatek/mediatek,dsi.yaml | 115 ++++++++++++++++++
> 2 files changed, 115 insertions(+), 62 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v6 1/4] dt-bindings: display: mediatek: dsi: Convert dsi_dtbinding to .yaml
2022-05-11 7:24 ` Rex-BC Chen
@ 2022-05-11 14:36 ` Rob Herring
2022-05-12 2:17 ` Rex-BC Chen
0 siblings, 1 reply; 13+ messages in thread
From: Rob Herring @ 2022-05-11 14:36 UTC (permalink / raw)
To: Rex-BC Chen
Cc: Chun-Kuang Hu, Jitao Shi, xinlei.lee, Krzysztof Kozlowski,
devicetree, David Airlie, linux-kernel, dri-devel,
Project_Global_Chrome_Upstream_Group,
moderated list:ARM/Mediatek SoC support, Matthias Brugger,
linux-arm-kernel
On Wed, May 11, 2022 at 2:24 AM Rex-BC Chen <rex-bc.chen@mediatek.com> wrote:
>
> On Wed, 2022-05-04 at 17:19 +0800, Rex-BC Chen wrote:
> > From: Xinlei Lee <xinlei.lee@mediatek.com>
> >
> > Convert mediatek,dsi.txt to mediatek,dsi.yaml format
> >
> > Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> > Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> > ---
> > .../display/mediatek/mediatek,dsi.txt | 62 ----------
> > .../display/mediatek/mediatek,dsi.yaml | 115
> > ++++++++++++++++++
> > 2 files changed, 115 insertions(+), 62 deletions(-)
> > delete mode 100644
> > Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> > create mode 100644
> > Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
[...]
> Hello Rob and Krzysztof,
>
> Can you give us some suggestions for this conversion patch?
> Thanks!
You can check status for yourself by looking at PW[1] where you will
see the review queue is currently ~120 patches and goes back to 5/3.
If it is in the queue, I will get to it.
Rob
[1] https://patchwork.ozlabs.org/project/devicetree-bindings/list/
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v6 1/4] dt-bindings: display: mediatek: dsi: Convert dsi_dtbinding to .yaml
2022-05-11 14:36 ` Rob Herring
@ 2022-05-12 2:17 ` Rex-BC Chen
0 siblings, 0 replies; 13+ messages in thread
From: Rex-BC Chen @ 2022-05-12 2:17 UTC (permalink / raw)
To: Rob Herring
Cc: Chun-Kuang Hu, Jitao Shi, xinlei.lee, Krzysztof Kozlowski,
devicetree, David Airlie, linux-kernel, dri-devel,
Project_Global_Chrome_Upstream_Group,
moderated list:ARM/Mediatek SoC support, Matthias Brugger,
linux-arm-kernel
On Wed, 2022-05-11 at 09:36 -0500, Rob Herring wrote:
> On Wed, May 11, 2022 at 2:24 AM Rex-BC Chen <rex-bc.chen@mediatek.com
> > wrote:
> >
> > On Wed, 2022-05-04 at 17:19 +0800, Rex-BC Chen wrote:
> > > From: Xinlei Lee <xinlei.lee@mediatek.com>
> > >
> > > Convert mediatek,dsi.txt to mediatek,dsi.yaml format
> > >
> > > Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> > > Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> > > ---
> > > .../display/mediatek/mediatek,dsi.txt | 62 ----------
> > > .../display/mediatek/mediatek,dsi.yaml | 115
> > > ++++++++++++++++++
> > > 2 files changed, 115 insertions(+), 62 deletions(-)
> > > delete mode 100644
> > > Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.t
> > > xt
> > > create mode 100644
> > > Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.y
> > > aml
>
> [...]
>
> > Hello Rob and Krzysztof,
> >
> > Can you give us some suggestions for this conversion patch?
> > Thanks!
>
> You can check status for yourself by looking at PW[1] where you will
> see the review queue is currently ~120 patches and goes back to 5/3.
> If it is in the queue, I will get to it.
>
> Rob
>
> [1] https://patchwork.ozlabs.org/project/devicetree-bindings/list/
Hello Rob,
Got it.
Thanks for your effort.
I will look at this next time before I send remind mail.
BRs,
Rex
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v6 1/4] dt-bindings: display: mediatek: dsi: Convert dsi_dtbinding to .yaml
2022-05-04 9:19 ` [PATCH v6 1/4] dt-bindings: display: mediatek: dsi: " Rex-BC Chen
2022-05-11 7:24 ` Rex-BC Chen
2022-05-11 14:30 ` Rob Herring
@ 2022-05-18 4:24 ` CK Hu
2 siblings, 0 replies; 13+ messages in thread
From: CK Hu @ 2022-05-18 4:24 UTC (permalink / raw)
To: Rex-BC Chen, robh+dt, krzysztof.kozlowski+dt, chunkuang.hu, p.zabel
Cc: devicetree, jitao.shi, xinlei.lee, airlied, linux-kernel,
dri-devel, Project_Global_Chrome_Upstream_Group, linux-mediatek,
matthias.bgg, linux-arm-kernel
Hi, Rex:
On Wed, 2022-05-04 at 17:19 +0800, Rex-BC Chen wrote:
> From: Xinlei Lee <xinlei.lee@mediatek.com>
>
> Convert mediatek,dsi.txt to mediatek,dsi.yaml format
Reviewed-by: CK Hu <ck.hu@mediatek.com>
>
> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> ---
> .../display/mediatek/mediatek,dsi.txt | 62 ----------
> .../display/mediatek/mediatek,dsi.yaml | 115
> ++++++++++++++++++
> 2 files changed, 115 insertions(+), 62 deletions(-)
> delete mode 100644
> Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> create mode 100644
> Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
>
> diff --git
> a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> deleted file mode 100644
> index 36b01458f45c..000000000000
> ---
> a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> +++ /dev/null
> @@ -1,62 +0,0 @@
> -Mediatek DSI Device
> -===================
> -
> -The Mediatek DSI function block is a sink of the display subsystem
> and can
> -drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for
> dual-
> -channel output.
> -
> -Required properties:
> -- compatible: "mediatek,<chip>-dsi"
> -- the supported chips are mt2701, mt7623, mt8167, mt8173 and mt8183.
> -- reg: Physical base address and length of the controller's
> registers
> -- interrupts: The interrupt signal from the function block.
> -- clocks: device clocks
> - See Documentation/devicetree/bindings/clock/clock-bindings.txt for
> details.
> -- clock-names: must contain "engine", "digital", and "hs"
> -- phys: phandle link to the MIPI D-PHY controller.
> -- phy-names: must contain "dphy"
> -- port: Output port node with endpoint definitions as described in
> - Documentation/devicetree/bindings/graph.txt. This port should be
> connected
> - to the input port of an attached DSI panel or DSI-to-eDP encoder
> chip.
> -
> -Optional properties:
> -- resets: list of phandle + reset specifier pair, as described in
> [1].
> -
> -[1] Documentation/devicetree/bindings/reset/reset.txt
> -
> -MIPI TX Configuration Module
> -============================
> -
> -See phy/mediatek,dsi-phy.yaml
> -
> -Example:
> -
> -mipi_tx0: mipi-dphy@10215000 {
> - compatible = "mediatek,mt8173-mipi-tx";
> - reg = <0 0x10215000 0 0x1000>;
> - clocks = <&clk26m>;
> - clock-output-names = "mipi_tx0_pll";
> - #clock-cells = <0>;
> - #phy-cells = <0>;
> - drive-strength-microamp = <4600>;
> - nvmem-cells= <&mipi_tx_calibration>;
> - nvmem-cell-names = "calibration-data";
> -};
> -
> -dsi0: dsi@1401b000 {
> - compatible = "mediatek,mt8173-dsi";
> - reg = <0 0x1401b000 0 0x1000>;
> - interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_LOW>;
> - clocks = <&mmsys MM_DSI0_ENGINE>, <&mmsys MM_DSI0_DIGITAL>,
> - <&mipi_tx0>;
> - clock-names = "engine", "digital", "hs";
> - resets = <&mmsys MT8173_MMSYS_SW0_RST_B_DISP_DSI0>;
> - phys = <&mipi_tx0>;
> - phy-names = "dphy";
> -
> - port {
> - dsi0_out: endpoint {
> - remote-endpoint = <&panel_in>;
> - };
> - };
> -};
> diff --git
> a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yam
> l
> b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yam
> l
> new file mode 100644
> index 000000000000..fa5bdf28668a
> --- /dev/null
> +++
> b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yam
> l
> @@ -0,0 +1,115 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id:
> https://urldefense.com/v3/__http://devicetree.org/schemas/display/mediatek/mediatek,dsi.yaml*__;Iw!!CTRNKA9wMg0ARbw!zKJCSsOqM0Bn_efj50JX_HvOItJ8ZUdgh54drCoUdMkmnmVb5pH4pd-gj5RZUQ$
>
> +$schema:
> https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!zKJCSsOqM0Bn_efj50JX_HvOItJ8ZUdgh54drCoUdMkmnmVb5pH4pd8zHOMcVQ$
>
> +
> +title: MediaTek DSI Controller Device Tree Bindings
> +
> +maintainers:
> + - Chun-Kuang Hu <chunkuang.hu@kernel.org>
> + - Philipp Zabel <p.zabel@pengutronix.de>
> + - Jitao Shi <jitao.shi@mediatek.com>
> + - Xinlei Lee <xinlei.lee@mediatek.com>
> +
> +description: |
> + The MediaTek DSI function block is a sink of the display subsystem
> and can
> + drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized
> for dual-
> + channel output.
> +
> +allOf:
> + - $ref: /schemas/display/dsi-controller.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - mediatek,mt2701-dsi
> + - mediatek,mt7623-dsi
> + - mediatek,mt8167-dsi
> + - mediatek,mt8173-dsi
> + - mediatek,mt8183-dsi
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + power-domains:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: Engine Clock
> + - description: Digital Clock
> + - description: HS Clock
> +
> + clock-names:
> + items:
> + - const: engine
> + - const: digital
> + - const: hs
> +
> + resets:
> + maxItems: 1
> +
> + phys:
> + maxItems: 1
> +
> + phy-names:
> + items:
> + - const: dphy
> +
> + port:
> + $ref: /schemas/graph.yaml#/properties/port
> + description:
> + Output port node. This port should be connected to the input
> + port of an attached DSI panel or DSI-to-eDP encoder chip.
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - power-domains
> + - clocks
> + - clock-names
> + - phys
> + - phy-names
> + - port
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/mt8183-clk.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/power/mt8183-power.h>
> + #include <dt-bindings/phy/phy.h>
> + #include <dt-bindings/reset/mt8183-resets.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + dsi0: dsi@14014000 {
> + compatible = "mediatek,mt8183-dsi";
> + reg = <0 0x14014000 0 0x1000>;
> + interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_LOW>;
> + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
> + clocks = <&mmsys CLK_MM_DSI0_MM>,
> + <&mmsys CLK_MM_DSI0_IF>,
> + <&mipi_tx0>;
> + clock-names = "engine", "digital", "hs";
> + resets = <&mmsys MT8183_MMSYS_SW0_RST_B_DISP_DSI0>;
> + phys = <&mipi_tx0>;
> + phy-names = "dphy";
> + port {
> + dsi0_out: endpoint {
> + remote-endpoint = <&panel_in>;
> + };
> + };
> + };
> + };
> +
> +...
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v6 2/4] dt-bindings: display: mediatek: dsi: Add compatible for MediaTek MT8186
2022-05-04 9:19 ` [PATCH v6 2/4] dt-bindings: display: mediatek: dsi: Add compatible for MediaTek MT8186 Rex-BC Chen
@ 2022-05-18 4:27 ` CK Hu
0 siblings, 0 replies; 13+ messages in thread
From: CK Hu @ 2022-05-18 4:27 UTC (permalink / raw)
To: Rex-BC Chen, robh+dt, krzysztof.kozlowski+dt, chunkuang.hu, p.zabel
Cc: devicetree, jitao.shi, xinlei.lee, airlied, linux-kernel,
dri-devel, Project_Global_Chrome_Upstream_Group, linux-mediatek,
matthias.bgg, linux-arm-kernel
Hi, Rex:
On Wed, 2022-05-04 at 17:19 +0800, Rex-BC Chen wrote:
> From: Xinlei Lee <xinlei.lee@mediatek.com>
>
> Add dt-binding documentation of dsi for MediaTek MT8186 SoC.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
>
> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@collabora.com>
> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> Acked-by: Rob Herring <robh@kernel.org>
> ---
> .../devicetree/bindings/display/mediatek/mediatek,dsi.yaml | 1
> +
> 1 file changed, 1 insertion(+)
>
> diff --git
> a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yam
> l
> b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yam
> l
> index fa5bdf28668a..b18d6a57c6e1 100644
> ---
> a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yam
> l
> +++
> b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yam
> l
> @@ -28,6 +28,7 @@ properties:
> - mediatek,mt8167-dsi
> - mediatek,mt8173-dsi
> - mediatek,mt8183-dsi
> + - mediatek,mt8186-dsi
>
> reg:
> maxItems: 1
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v6 3/4] drm/mediatek: Add mt8186 dsi compatible to mtk_dsi.c
2022-05-04 9:19 ` [PATCH v6 3/4] drm/mediatek: Add mt8186 dsi compatible to mtk_dsi.c Rex-BC Chen
@ 2022-05-18 4:31 ` CK Hu
0 siblings, 0 replies; 13+ messages in thread
From: CK Hu @ 2022-05-18 4:31 UTC (permalink / raw)
To: Rex-BC Chen, robh+dt, krzysztof.kozlowski+dt, chunkuang.hu, p.zabel
Cc: devicetree, jitao.shi, xinlei.lee, airlied, linux-kernel,
dri-devel, Project_Global_Chrome_Upstream_Group, linux-mediatek,
matthias.bgg, linux-arm-kernel
Hi, Rex:
On Wed, 2022-05-04 at 17:19 +0800, Rex-BC Chen wrote:
> From: Xinlei Lee <xinlei.lee@mediatek.com>
>
> Add the compatible because use different cmdq addresses in mt8186.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
>
> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@collabora.com>
> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_dsi.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
> b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index ccb0511b9cd5..b13fd0317e96 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -1155,6 +1155,12 @@ static const struct mtk_dsi_driver_data
> mt8183_dsi_driver_data = {
> .has_size_ctl = true,
> };
>
> +static const struct mtk_dsi_driver_data mt8186_dsi_driver_data = {
> + .reg_cmdq_off = 0xd00,
> + .has_shadow_ctl = true,
> + .has_size_ctl = true,
> +};
> +
> static const struct of_device_id mtk_dsi_of_match[] = {
> { .compatible = "mediatek,mt2701-dsi",
> .data = &mt2701_dsi_driver_data },
> @@ -1162,6 +1168,8 @@ static const struct of_device_id
> mtk_dsi_of_match[] = {
> .data = &mt8173_dsi_driver_data },
> { .compatible = "mediatek,mt8183-dsi",
> .data = &mt8183_dsi_driver_data },
> + { .compatible = "mediatek,mt8186-dsi",
> + .data = &mt8186_dsi_driver_data },
> { },
> };
> MODULE_DEVICE_TABLE(of, mtk_dsi_of_match);
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v6 4/4] drm/mediatek: Add MT8186 DSI compatible for mtk_drm_drv.c
2022-05-04 9:19 ` [PATCH v6 4/4] drm/mediatek: Add MT8186 DSI compatible for mtk_drm_drv.c Rex-BC Chen
@ 2022-05-18 4:34 ` CK Hu
0 siblings, 0 replies; 13+ messages in thread
From: CK Hu @ 2022-05-18 4:34 UTC (permalink / raw)
To: Rex-BC Chen, robh+dt, krzysztof.kozlowski+dt, chunkuang.hu, p.zabel
Cc: devicetree, jitao.shi, xinlei.lee, airlied, linux-kernel,
dri-devel, Project_Global_Chrome_Upstream_Group, linux-mediatek,
matthias.bgg, linux-arm-kernel
Hi, Rex:
On Wed, 2022-05-04 at 17:19 +0800, Rex-BC Chen wrote:
> The compatible "mediatek,mt8186-dsi" is used by MT8186 DSI, so
> add it to mtk_ddp_comp_dt_ids in mtk_drm_drv.c.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@collabora.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> index 6abe6bcacbdc..0104283767ad 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> @@ -544,6 +544,8 @@ static const struct of_device_id
> mtk_ddp_comp_dt_ids[] = {
> .data = (void *)MTK_DSI },
> { .compatible = "mediatek,mt8183-dsi",
> .data = (void *)MTK_DSI },
> + { .compatible = "mediatek,mt8186-dsi",
> + .data = (void *)MTK_DSI },
> { }
> };
>
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2022-05-18 4:34 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-04 9:19 [PATCH v6 0/4] Add mt8186 dsi compatoble & Convert dsi_dtbinding to .yaml Rex-BC Chen
2022-05-04 9:19 ` [PATCH v6 1/4] dt-bindings: display: mediatek: dsi: " Rex-BC Chen
2022-05-11 7:24 ` Rex-BC Chen
2022-05-11 14:36 ` Rob Herring
2022-05-12 2:17 ` Rex-BC Chen
2022-05-11 14:30 ` Rob Herring
2022-05-18 4:24 ` CK Hu
2022-05-04 9:19 ` [PATCH v6 2/4] dt-bindings: display: mediatek: dsi: Add compatible for MediaTek MT8186 Rex-BC Chen
2022-05-18 4:27 ` CK Hu
2022-05-04 9:19 ` [PATCH v6 3/4] drm/mediatek: Add mt8186 dsi compatible to mtk_dsi.c Rex-BC Chen
2022-05-18 4:31 ` CK Hu
2022-05-04 9:19 ` [PATCH v6 4/4] drm/mediatek: Add MT8186 DSI compatible for mtk_drm_drv.c Rex-BC Chen
2022-05-18 4:34 ` CK Hu
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