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* [PATCH v2 08/11] dt-bindings: display: convert PL110/PL111 to DT schema
       [not found] <20220506140533.3566431-1-andre.przywara@arm.com>
@ 2022-05-06 14:05 ` Andre Przywara
  2022-05-06 22:39   ` Rob Herring
  2022-05-06 14:05 ` [PATCH v2 09/11] dt-bindings: display: convert Arm HDLCD " Andre Przywara
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 11+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski
  Cc: devicetree, David Airlie, Will Deacon, Liviu Dudau, dri-devel,
	Robin Murphy, linux-arm-kernel

The Arm PL110 and PL111 are IP blocks that provide a display engine with
an LCD interface, being able to drive a variety of LC panels.

Convert the binding over to DT schema, to the DTs can be automatically
checked.
This still contains the deprecated "arm,pl11x,tft-r0g0b0-pads" property,
because this is used by several DTs in the tree.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 .../devicetree/bindings/display/arm,pl11x.txt | 110 -----------
 .../bindings/display/arm,pl11x.yaml           | 174 ++++++++++++++++++
 2 files changed, 174 insertions(+), 110 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.txt
 create mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.yaml

diff --git a/Documentation/devicetree/bindings/display/arm,pl11x.txt b/Documentation/devicetree/bindings/display/arm,pl11x.txt
deleted file mode 100644
index 3f977e72a2005..0000000000000
--- a/Documentation/devicetree/bindings/display/arm,pl11x.txt
+++ /dev/null
@@ -1,110 +0,0 @@
-* ARM PrimeCell Color LCD Controller PL110/PL111
-
-See also Documentation/devicetree/bindings/arm/primecell.yaml
-
-Required properties:
-
-- compatible: must be one of:
-	"arm,pl110", "arm,primecell"
-	"arm,pl111", "arm,primecell"
-
-- reg: base address and size of the control registers block
-
-- interrupt-names: either the single entry "combined" representing a
-	combined interrupt output (CLCDINTR), or the four entries
-	"mbe", "vcomp", "lnbu", "fuf" representing the individual
-	CLCDMBEINTR, CLCDVCOMPINTR, CLCDLNBUINTR, CLCDFUFINTR interrupts
-
-- interrupts: contains an interrupt specifier for each entry in
-	interrupt-names
-
-- clock-names: should contain "clcdclk" and "apb_pclk"
-
-- clocks: contains phandle and clock specifier pairs for the entries
-	in the clock-names property. See
-	Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Optional properties:
-
-- memory-region: phandle to a node describing memory (see
-	Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
-	to be used for the framebuffer; if not present, the framebuffer
-	may be located anywhere in the memory
-
-- max-memory-bandwidth: maximum bandwidth in bytes per second that the
-	cell's memory interface can handle; if not present, the memory
-	interface is fast enough to handle all possible video modes
-
-Required sub-nodes:
-
-- port: describes LCD panel signals, following the common binding
-	for video transmitter interfaces; see
-	Documentation/devicetree/bindings/media/video-interfaces.txt
-
-Deprecated properties:
-	The port's endbpoint subnode had this, now deprecated property
-	in the past. Drivers should be able to survive without it:
-
-	- arm,pl11x,tft-r0g0b0-pads: an array of three 32-bit values,
-		defining the way CLD pads are wired up; first value
-		contains index of the "CLD" external pin (pad) used
-		as R0 (first bit of the red component), second value
-	        index of the pad used as G0, third value index of the
-		pad used as B0, see also "LCD panel signal multiplexing
-		details" paragraphs in the PL110/PL111 Technical
-		Reference Manuals; this implicitly defines available
-		color modes, for example:
-		- PL111 TFT 4:4:4 panel:
-			arm,pl11x,tft-r0g0b0-pads = <4 15 20>;
-		- PL110 TFT (1:)5:5:5 panel:
-			arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
-		- PL111 TFT (1:)5:5:5 panel:
-			arm,pl11x,tft-r0g0b0-pads = <3 11 19>;
-		- PL111 TFT 5:6:5 panel:
-			arm,pl11x,tft-r0g0b0-pads = <3 10 19>;
-		- PL110 and PL111 TFT 8:8:8 panel:
-			arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
-		- PL110 and PL111 TFT 8:8:8 panel, R & B components swapped:
-			arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
-
-
-Example:
-
-	clcd@10020000 {
-		compatible = "arm,pl111", "arm,primecell";
-		reg = <0x10020000 0x1000>;
-		interrupt-names = "combined";
-		interrupts = <0 44 4>;
-		clocks = <&oscclk1>, <&oscclk2>;
-		clock-names = "clcdclk", "apb_pclk";
-		max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */
-
-		port {
-			clcd_pads: endpoint {
-				remote-endpoint = <&clcd_panel>;
-			};
-		};
-
-	};
-
-	panel {
-		compatible = "panel-dpi";
-
-		port {
-			clcd_panel: endpoint {
-				remote-endpoint = <&clcd_pads>;
-			};
-		};
-
-		panel-timing {
-			clock-frequency = <25175000>;
-			hactive = <640>;
-			hback-porch = <40>;
-			hfront-porch = <24>;
-			hsync-len = <96>;
-			vactive = <480>;
-			vback-porch = <32>;
-			vfront-porch = <11>;
-			vsync-len = <2>;
-		};
-	};
diff --git a/Documentation/devicetree/bindings/display/arm,pl11x.yaml b/Documentation/devicetree/bindings/display/arm,pl11x.yaml
new file mode 100644
index 0000000000000..c17838c197da8
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/arm,pl11x.yaml
@@ -0,0 +1,174 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/arm,pl11x.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm PrimeCell Color LCD Controller PL110/PL111
+
+maintainers:
+  - Liviu Dudau <Liviu.Dudau@arm.com>
+  - Andre Przywara <andre.przywara@arm.com>
+
+description:
+  The Arm Primcell PL010/PL111 is an LCD controller IP, than scans out
+  a framebuffer region in system memory, and creates timed signals for
+  a variety of LCD panels.
+
+# We need a select here so we don't match all nodes with 'arm,primecell'
+select:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - arm,pl110
+          - arm,pl111
+  required:
+    - compatible
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - arm,pl110
+          - arm,pl111
+      - const: arm,primecell
+
+  reg:
+    maxItems: 1
+
+  interrupt-names:
+    oneOf:
+      - const: combined
+        description:
+          The IP provides four individual interrupt lines, but also one
+          combined line. If the integration only connects this line to the
+          interrupt controller, this single interrupt is noted here.
+      - items:
+          - const: mbe        # CLCDMBEINTR
+          - const: vcomp      # CLCDVCOMPINTR
+          - const: lnbu       # CLCDLNBUINTR
+          - const: fuf        # CLCDFUFINTR
+
+  interrupts:
+    minItems: 1
+    maxItems: 4
+
+  clock-names:
+    items:
+      - const: clcdclk
+      - const: apb_pclk
+
+  clocks:
+    items:
+      - description: The CLCDCLK reference clock for the controller.
+      - description: The HCLK AHB slave clock for the register access.
+
+  memory-region:
+    maxItems: 1
+    description:
+      Phandle to a node describing memory to be used for the framebuffer.
+      If not present, the framebuffer may be located anywhere in memory.
+
+  max-memory-bandwidth:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Maximum bandwidth in bytes per second that the cell's memory interface
+      can handle.
+      If not present, the memory interface is fast enough to handle all
+      possible video modes.
+
+  port:
+    $ref: /schemas/graph.yaml#/$defs/port-base
+    additionalProperties: false
+
+    description:
+      Output endpoint of the controller, connecting the LCD panel signals.
+
+    properties:
+      endpoint:
+        $ref: /schemas/graph.yaml#/$defs/endpoint-base
+        unevaluatedProperties: false
+
+        properties:
+          arm,pl11x,tft-r0g0b0-pads:
+            $ref: /schemas/types.yaml#/definitions/uint32-array
+            items:
+              - description: index of CLD pad used for first red bit (R0)
+              - description: index of CLD pad used for first green bit (G0)
+              - description: index of CLD pad used for first blue bit (G0)
+            deprecated: true
+            description: |
+              DEPRECATED. An array of three 32-bit values, defining the way
+              CLD[23:0] pads are wired up.
+              The first value contains the index of the "CLD" external pin (pad)
+              used as R0 (first bit of the red component), the second value for
+              green, the third value for blue.
+              See also "LCD panel signal multiplexing details" paragraphs in the
+              PL110/PL111 Technical Reference Manuals.
+              This implicitly defines available color modes, for example:
+              - PL111 TFT 4:4:4 panel:
+                  arm,pl11x,tft-r0g0b0-pads = <4 15 20>;
+              - PL110 TFT (1:)5:5:5 panel:
+                  arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
+              - PL111 TFT (1:)5:5:5 panel:
+                  arm,pl11x,tft-r0g0b0-pads = <3 11 19>;
+              - PL111 TFT 5:6:5 panel:
+                  arm,pl11x,tft-r0g0b0-pads = <3 10 19>;
+              - PL110 and PL111 TFT 8:8:8 panel:
+                  arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
+              - PL110 and PL111 TFT 8:8:8 panel, R & B components swapped:
+                  arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - interrupt-names
+  - interrupts
+  - clock-names
+  - clocks
+  - port
+
+examples:
+  - |
+    clcd@10020000 {
+        compatible = "arm,pl111", "arm,primecell";
+        reg = <0x10020000 0x1000>;
+        interrupt-names = "combined";
+        interrupts = <44>;
+        clocks = <&oscclk1>, <&oscclk2>;
+        clock-names = "clcdclk", "apb_pclk";
+        max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */
+
+        port {
+            clcd_pads: endpoint {
+                remote-endpoint = <&clcd_panel>;
+            };
+        };
+    };
+
+    panel {
+        compatible = "arm,rtsm-display", "panel-dpi";
+        power-supply = <&vcc_supply>;
+
+        port {
+            clcd_panel: endpoint {
+                remote-endpoint = <&clcd_pads>;
+            };
+        };
+
+        panel-timing {
+            clock-frequency = <25175000>;
+            hactive = <640>;
+            hback-porch = <40>;
+            hfront-porch = <24>;
+            hsync-len = <96>;
+            vactive = <480>;
+            vback-porch = <32>;
+            vfront-porch = <11>;
+            vsync-len = <2>;
+        };
+    };
+...
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH v2 09/11] dt-bindings: display: convert Arm HDLCD to DT schema
       [not found] <20220506140533.3566431-1-andre.przywara@arm.com>
  2022-05-06 14:05 ` [PATCH v2 08/11] dt-bindings: display: convert PL110/PL111 to DT schema Andre Przywara
@ 2022-05-06 14:05 ` Andre Przywara
  2022-05-06 22:39   ` Rob Herring
  2022-05-06 14:05 ` [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP " Andre Przywara
  2022-05-06 14:05 ` [PATCH v2 11/11] dt-bindings: display: convert Arm Komeda " Andre Przywara
  3 siblings, 1 reply; 11+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski
  Cc: devicetree, David Airlie, Will Deacon, Liviu Dudau, dri-devel,
	Robin Murphy, linux-arm-kernel

The Arm HDLCD is a display controller that scans out a framebuffer and
hands a signal to a digital encoder to generate a DVI or HDMI signal.

Convert the existing DT binding to DT schema.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 .../devicetree/bindings/display/arm,hdlcd.txt | 79 ----------------
 .../bindings/display/arm,hdlcd.yaml           | 89 +++++++++++++++++++
 2 files changed, 89 insertions(+), 79 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.txt
 create mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.yaml

diff --git a/Documentation/devicetree/bindings/display/arm,hdlcd.txt b/Documentation/devicetree/bindings/display/arm,hdlcd.txt
deleted file mode 100644
index 78bc24296f3e4..0000000000000
--- a/Documentation/devicetree/bindings/display/arm,hdlcd.txt
+++ /dev/null
@@ -1,79 +0,0 @@
-ARM HDLCD
-
-This is a display controller found on several development platforms produced
-by ARM Ltd and in more modern of its' Fast Models. The HDLCD is an RGB
-streamer that reads the data from a framebuffer and sends it to a single
-digital encoder (DVI or HDMI).
-
-Required properties:
-  - compatible: "arm,hdlcd"
-  - reg: Physical base address and length of the controller's registers.
-  - interrupts: One interrupt used by the display controller to notify the
-    interrupt controller when any of the interrupt sources programmed in
-    the interrupt mask register have activated.
-  - clocks: A list of phandle + clock-specifier pairs, one for each
-    entry in 'clock-names'.
-  - clock-names: A list of clock names. For HDLCD it should contain:
-      - "pxlclk" for the clock feeding the output PLL of the controller.
-
-Required sub-nodes:
-  - port: The HDLCD connection to an encoder chip. The connection is modeled
-    using the OF graph bindings specified in
-    Documentation/devicetree/bindings/graph.txt.
-
-Optional properties:
-  - memory-region: phandle to a node describing memory (see
-    Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) to be
-    used for the framebuffer; if not present, the framebuffer may be located
-    anywhere in memory.
-
-
-Example:
-
-/ {
-	...
-
-	hdlcd@2b000000 {
-		compatible = "arm,hdlcd";
-		reg = <0 0x2b000000 0 0x1000>;
-		interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&oscclk5>;
-		clock-names = "pxlclk";
-		port {
-			hdlcd_output: endpoint@0 {
-				remote-endpoint = <&hdmi_enc_input>;
-			};
-		};
-	};
-
-	/* HDMI encoder on I2C bus */
-	i2c@7ffa0000 {
-		....
-		hdmi-transmitter@70 {
-			compatible = ".....";
-			reg = <0x70>;
-			port@0 {
-				hdmi_enc_input: endpoint {
-					remote-endpoint = <&hdlcd_output>;
-				};
-
-				hdmi_enc_output: endpoint {
-					remote-endpoint = <&hdmi_1_port>;
-				};
-			};
-		};
-
-	};
-
-	hdmi1: connector@1 {
-		compatible = "hdmi-connector";
-		type = "a";
-		port {
-			hdmi_1_port: endpoint {
-				remote-endpoint = <&hdmi_enc_output>;
-			};
-		};
-	};
-
-	...
-};
diff --git a/Documentation/devicetree/bindings/display/arm,hdlcd.yaml b/Documentation/devicetree/bindings/display/arm,hdlcd.yaml
new file mode 100644
index 0000000000000..a2670258c48d3
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/arm,hdlcd.yaml
@@ -0,0 +1,89 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/arm,hdlcd.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm HDLCD display controller binding
+
+maintainers:
+  - Liviu Dudau <Liviu.Dudau@arm.com>
+  - Andre Przywara <andre.przywara@arm.com>
+
+description:
+  The Arm HDLCD is a display controller found on several development platforms
+  produced by ARM Ltd and in more modern of its Fast Models. The HDLCD is an
+  RGB streamer that reads the data from a framebuffer and sends it to a single
+  digital encoder (DVI or HDMI).
+
+properties:
+  compatible:
+    const: arm,hdlcd
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clock-names:
+    const: pxlclk
+
+  clocks:
+    maxItems: 1
+    description: The input reference for the pixel clock.
+
+  memory-region:
+    maxItems: 1
+    description:
+      Phandle to a node describing memory to be used for the framebuffer.
+      If not present, the framebuffer may be located anywhere in memory.
+
+  iommus:
+    maxItems: 1
+
+  port:
+    $ref: /schemas/graph.yaml#/properties/port
+    unevaluatedProperties: false
+    description:
+      Output endpoint of the controller, connecting the LCD panel signals.
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - port
+
+examples:
+  - |
+    hdlcd@2b000000 {
+        compatible = "arm,hdlcd";
+        reg = <0x2b000000 0x1000>;
+        interrupts = <0 85 4>;
+        clocks = <&oscclk5>;
+        clock-names = "pxlclk";
+        port {
+            hdlcd_output: endpoint {
+                remote-endpoint = <&hdmi_enc_input>;
+            };
+        };
+    };
+
+    /* HDMI encoder on I2C bus */
+    i2c {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        hdmi-transmitter@70 {
+            compatible = "nxp,tda998x";
+            reg = <0x70>;
+            port {
+                hdmi_enc_input: endpoint {
+                    remote-endpoint = <&hdlcd_output>;
+                };
+            };
+        };
+    };
+...
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
       [not found] <20220506140533.3566431-1-andre.przywara@arm.com>
  2022-05-06 14:05 ` [PATCH v2 08/11] dt-bindings: display: convert PL110/PL111 to DT schema Andre Przywara
  2022-05-06 14:05 ` [PATCH v2 09/11] dt-bindings: display: convert Arm HDLCD " Andre Przywara
@ 2022-05-06 14:05 ` Andre Przywara
  2022-05-06 22:39   ` Rob Herring
  2022-05-06 14:05 ` [PATCH v2 11/11] dt-bindings: display: convert Arm Komeda " Andre Przywara
  3 siblings, 1 reply; 11+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski
  Cc: devicetree, David Airlie, Will Deacon, Liviu Dudau, dri-devel,
	Robin Murphy, linux-arm-kernel

The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
out a framebuffer and hands the pixels over to a digital signal encoder.
It supports multiple layers, scaling and rotation.

Convert the existing DT binding to DT schema.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 .../bindings/display/arm,malidp.txt           |  68 ----------
 .../bindings/display/arm,malidp.yaml          | 116 ++++++++++++++++++
 2 files changed, 116 insertions(+), 68 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
 create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml

diff --git a/Documentation/devicetree/bindings/display/arm,malidp.txt b/Documentation/devicetree/bindings/display/arm,malidp.txt
deleted file mode 100644
index 7a97a2b48c2a2..0000000000000
--- a/Documentation/devicetree/bindings/display/arm,malidp.txt
+++ /dev/null
@@ -1,68 +0,0 @@
-ARM Mali-DP
-
-The following bindings apply to a family of Display Processors sold as
-licensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and
-DP650 processors that offer multiple composition layers, support for
-rotation and scaling output.
-
-Required properties:
-  - compatible: should be one of
-	"arm,mali-dp500"
-	"arm,mali-dp550"
-	"arm,mali-dp650"
-    depending on the particular implementation present in the hardware
-  - reg: Physical base address and size of the block of registers used by
-    the processor.
-  - interrupts: Interrupt list, as defined in ../interrupt-controller/interrupts.txt,
-    interrupt client nodes.
-  - interrupt-names: name of the engine inside the processor that will
-    use the corresponding interrupt. Should be one of "DE" or "SE".
-  - clocks: A list of phandle + clock-specifier pairs, one for each entry
-    in 'clock-names'
-  - clock-names: A list of clock names. It should contain:
-      - "pclk": for the APB interface clock
-      - "aclk": for the AXI interface clock
-      - "mclk": for the main processor clock
-      - "pxlclk": for the pixel clock feeding the output PLL of the processor.
-  - arm,malidp-output-port-lines: Array of u8 values describing the number
-    of output lines per channel (R, G and B).
-
-Required sub-nodes:
-  - port: The Mali DP connection to an encoder input port. The connection
-    is modelled using the OF graph bindings specified in
-    Documentation/devicetree/bindings/graph.txt
-
-Optional properties:
-  - memory-region: phandle to a node describing memory (see
-    Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
-    to be used for the framebuffer; if not present, the framebuffer may
-    be located anywhere in memory.
-  - arm,malidp-arqos-high-level: integer of u32 value describing the ARQoS
-    levels of DP500's QoS signaling.
-
-
-Example:
-
-/ {
-	...
-
-	dp0: malidp@6f200000 {
-		compatible = "arm,mali-dp650";
-		reg = <0 0x6f200000 0 0x20000>;
-		memory-region = <&display_reserved>;
-		interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>,
-			     <0 168 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "DE", "SE";
-		clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>;
-		clock-names = "pxlclk", "mclk", "aclk", "pclk";
-		arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
-		arm,malidp-arqos-high-level = <0xd000d000>;
-		port {
-			dp0_output: endpoint {
-				remote-endpoint = <&tda998x_2_input>;
-			};
-		};
-	};
-
-	...
-};
diff --git a/Documentation/devicetree/bindings/display/arm,malidp.yaml b/Documentation/devicetree/bindings/display/arm,malidp.yaml
new file mode 100644
index 0000000000000..ea7b7100548bf
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/arm,malidp.yaml
@@ -0,0 +1,116 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/arm,malidp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm Mali Display Processor (Mali-DP) binding
+
+maintainers:
+  - Liviu Dudau <Liviu.Dudau@arm.com>
+  - Andre Przywara <andre.przywara@arm.com>
+
+description:
+  The following bindings apply to a family of Display Processors sold as
+  licensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and
+  DP650 processors that offer multiple composition layers, support for
+  rotation and scaling output.
+
+properties:
+  compatible:
+    enum:
+      - arm,mali-dp500
+      - arm,mali-dp550
+      - arm,mali-dp650
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    items:
+      - description:
+          The interrupt used by the Display Engine (DE). Can be shared with
+          the interrupt for the Scaling Engine (SE), but it will have to be
+          listed individually.
+      - description:
+          The interrupt used by the Scaling Engine (SE). Can be shared with
+          the interrupt for the Display Engine (DE), but it will have to be
+          listed individually.
+
+  interrupt-names:
+    items:
+      - const: DE
+      - const: SE
+
+  clock-names:
+    items:
+      - const: pxlclk
+      - const: mclk
+      - const: aclk
+      - const: pclk
+
+  clocks:
+    items:
+      - description: the pixel clock feeding the output PLL of the processor
+      - description: the main processor clock
+      - description: the AXI interface clock
+      - description: the APB interface clock
+
+  memory-region:
+    maxItems: 1
+    description:
+      Phandle to a node describing memory to be used for the framebuffer.
+      If not present, the framebuffer may be located anywhere in memory.
+
+  arm,malidp-output-port-lines:
+    $ref: /schemas/types.yaml#/definitions/uint8-array
+    description:
+      Number of output lines/bits for each colour channel.
+    items:
+      - description: number of output lines for the red channel (R)
+      - description: number of output lines for the green channel (G)
+      - description: number of output lines for the blue channel (B)
+
+  arm,malidp-arqos-high-level:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      integer describing the ARQoS levels of DP500's QoS signaling
+
+  port:
+    $ref: /schemas/graph.yaml#/properties/port
+    unevaluatedProperties: false
+    description:
+      Output endpoint of the controller, connecting the LCD panel signals.
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - interrupt-names
+  - clocks
+  - clock-names
+  - port
+  - arm,malidp-output-port-lines
+
+examples:
+  - |
+    dp0: malidp@6f200000 {
+        compatible = "arm,mali-dp650";
+        reg = <0x6f200000 0x20000>;
+        memory-region = <&display_reserved>;
+        interrupts = <168>, <168>;
+        interrupt-names = "DE", "SE";
+        clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>;
+        clock-names = "pxlclk", "mclk", "aclk", "pclk";
+        arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
+        arm,malidp-arqos-high-level = <0xd000d000>;
+
+        port {
+            dp0_output: endpoint {
+                remote-endpoint = <&tda998x_2_input>;
+            };
+        };
+    };
+...
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH v2 11/11] dt-bindings: display: convert Arm Komeda to DT schema
       [not found] <20220506140533.3566431-1-andre.przywara@arm.com>
                   ` (2 preceding siblings ...)
  2022-05-06 14:05 ` [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP " Andre Przywara
@ 2022-05-06 14:05 ` Andre Przywara
  2022-05-13 10:42   ` Carsten Haitzler
  3 siblings, 1 reply; 11+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski
  Cc: devicetree, David Airlie, Will Deacon, Liviu Dudau, dri-devel,
	Robin Murphy, linux-arm-kernel

The Arm Komeda (aka Mali-D71) is a display controller that scans out a
framebuffer and hands a signal to a digital encoder to generate a DVI
or HDMI signal. It supports up to two pipelines, each frame can be
composed of up to four layers.

Convert the existing DT binding to DT schema.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 .../bindings/display/arm,komeda.txt           |  78 -----------
 .../bindings/display/arm,komeda.yaml          | 130 ++++++++++++++++++
 2 files changed, 130 insertions(+), 78 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/display/arm,komeda.txt
 create mode 100644 Documentation/devicetree/bindings/display/arm,komeda.yaml

diff --git a/Documentation/devicetree/bindings/display/arm,komeda.txt b/Documentation/devicetree/bindings/display/arm,komeda.txt
deleted file mode 100644
index 8513695ee47fe..0000000000000
--- a/Documentation/devicetree/bindings/display/arm,komeda.txt
+++ /dev/null
@@ -1,78 +0,0 @@
-Device Tree bindings for Arm Komeda display driver
-
-Required properties:
-- compatible: Should be "arm,mali-d71"
-- reg: Physical base address and length of the registers in the system
-- interrupts: the interrupt line number of the device in the system
-- clocks: A list of phandle + clock-specifier pairs, one for each entry
-    in 'clock-names'
-- clock-names: A list of clock names. It should contain:
-      - "aclk": for the main processor clock
-- #address-cells: Must be 1
-- #size-cells: Must be 0
-- iommus: configure the stream id to IOMMU, Must be configured if want to
-    enable iommu in display. for how to configure this node please reference
-        devicetree/bindings/iommu/arm,smmu-v3.txt,
-        devicetree/bindings/iommu/iommu.txt
-
-Required properties for sub-node: pipeline@nq
-Each device contains one or two pipeline sub-nodes (at least one), each
-pipeline node should provide properties:
-- reg: Zero-indexed identifier for the pipeline
-- clocks: A list of phandle + clock-specifier pairs, one for each entry
-    in 'clock-names'
-- clock-names: should contain:
-      - "pxclk": pixel clock
-
-- port: each pipeline connect to an encoder input port. The connection is
-    modeled using the OF graph bindings specified in
-    Documentation/devicetree/bindings/graph.txt
-
-Optional properties:
-  - memory-region: phandle to a node describing memory (see
-    Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
-    to be used for the framebuffer; if not present, the framebuffer may
-    be located anywhere in memory.
-
-Example:
-/ {
-	...
-
-	dp0: display@c00000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "arm,mali-d71";
-		reg = <0xc00000 0x20000>;
-		interrupts = <0 168 4>;
-		clocks = <&dpu_aclk>;
-		clock-names = "aclk";
-		iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
-			<&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
-			<&smmu 8>, <&smmu 9>;
-
-		dp0_pipe0: pipeline@0 {
-			clocks = <&fpgaosc2>;
-			clock-names = "pxclk";
-			reg = <0>;
-
-			port {
-				dp0_pipe0_out: endpoint {
-					remote-endpoint = <&db_dvi0_in>;
-				};
-			};
-		};
-
-		dp0_pipe1: pipeline@1 {
-			clocks = <&fpgaosc2>;
-			clock-names = "pxclk";
-			reg = <1>;
-
-			port {
-				dp0_pipe1_out: endpoint {
-					remote-endpoint = <&db_dvi1_in>;
-				};
-			};
-		};
-	};
-	...
-};
diff --git a/Documentation/devicetree/bindings/display/arm,komeda.yaml b/Documentation/devicetree/bindings/display/arm,komeda.yaml
new file mode 100644
index 0000000000000..9f4aade97f10a
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/arm,komeda.yaml
@@ -0,0 +1,130 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/arm,komeda.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm Komeda display processor
+
+maintainers:
+  - Liviu Dudau <Liviu.Dudau@arm.com>
+  - Andre Przywara <andre.przywara@arm.com>
+
+description:
+  The Arm Mali D71 display processor supports up to two displays with up
+  to a 4K resolution each. Each pipeline can be composed of up to four
+  layers. It is typically connected to a digital display connector like HDMI.
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - const: arm,mali-d32
+          - const: arm,mali-d71
+      - const: arm,mali-d71
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clock-names:
+    const: aclk
+
+  clocks:
+    maxItems: 1
+    description: The main DPU processor clock
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 0
+
+  memory-region:
+    maxItems: 1
+    description:
+      Phandle to a node describing memory to be used for the framebuffer.
+      If not present, the framebuffer may be located anywhere in memory.
+
+  iommus:
+    description:
+      The stream IDs for each of the used pipelines, each four IDs for the
+      four layers, plus one for the write-back stream.
+    minItems: 5
+    maxItems: 10
+
+patternProperties:
+  '^pipeline@[01]$':
+    type: object
+    description:
+      clocks
+
+    properties:
+      reg:
+        enum: [ 0, 1 ]
+
+      clock-names:
+        const: pxclk
+
+      clocks:
+        maxItems: 1
+        description: The input reference for the pixel clock.
+
+      port:
+        $ref: /schemas/graph.yaml#/$defs/port-base
+        unevaluatedProperties: false
+
+additionalProperties: false
+
+required:
+  - "#address-cells"
+  - "#size-cells"
+  - compatible
+  - reg
+  - interrupts
+  - clock-names
+  - clocks
+  - pipeline@0
+
+examples:
+  - |
+    display@c00000 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        compatible = "arm,mali-d71";
+        reg = <0xc00000 0x20000>;
+        interrupts = <168>;
+        clocks = <&dpu_aclk>;
+        clock-names = "aclk";
+        iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
+                 <&smmu 8>,
+                 <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
+                 <&smmu 9>;
+
+        dp0_pipe0: pipeline@0 {
+            clocks = <&fpgaosc2>;
+            clock-names = "pxclk";
+            reg = <0>;
+
+            port {
+                dp0_pipe0_out: endpoint {
+                    remote-endpoint = <&db_dvi0_in>;
+                };
+            };
+        };
+
+        dp0_pipe1: pipeline@1 {
+            clocks = <&fpgaosc2>;
+            clock-names = "pxclk";
+            reg = <1>;
+
+            port {
+                dp0_pipe1_out: endpoint {
+                    remote-endpoint = <&db_dvi1_in>;
+                };
+            };
+        };
+    };
+...
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* Re: [PATCH v2 09/11] dt-bindings: display: convert Arm HDLCD to DT schema
  2022-05-06 14:05 ` [PATCH v2 09/11] dt-bindings: display: convert Arm HDLCD " Andre Przywara
@ 2022-05-06 22:39   ` Rob Herring
  0 siblings, 0 replies; 11+ messages in thread
From: Rob Herring @ 2022-05-06 22:39 UTC (permalink / raw)
  To: Andre Przywara
  Cc: devicetree, David Airlie, Robin Murphy, Liviu Dudau, dri-devel,
	Rob Herring, Krzysztof Kozlowski, Will Deacon, linux-arm-kernel

On Fri, 06 May 2022 15:05:31 +0100, Andre Przywara wrote:
> The Arm HDLCD is a display controller that scans out a framebuffer and
> hands a signal to a digital encoder to generate a DVI or HDMI signal.
> 
> Convert the existing DT binding to DT schema.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  .../devicetree/bindings/display/arm,hdlcd.txt | 79 ----------------
>  .../bindings/display/arm,hdlcd.yaml           | 89 +++++++++++++++++++
>  2 files changed, 89 insertions(+), 79 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.txt
>  create mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.yaml
> 

Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.

Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.

Full log is available here: https://patchwork.ozlabs.org/patch/


hdlcd@2a110000: 'port' is a required property
	arch/arm/boot/dts/vexpress-v2p-ca5s.dtb

hdlcd@2b000000: 'port' is a required property
	arch/arm/boot/dts/vexpress-v2p-ca15_a7.dtb
	arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dtb


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v2 08/11] dt-bindings: display: convert PL110/PL111 to DT schema
  2022-05-06 14:05 ` [PATCH v2 08/11] dt-bindings: display: convert PL110/PL111 to DT schema Andre Przywara
@ 2022-05-06 22:39   ` Rob Herring
  0 siblings, 0 replies; 11+ messages in thread
From: Rob Herring @ 2022-05-06 22:39 UTC (permalink / raw)
  To: Andre Przywara
  Cc: devicetree, David Airlie, Will Deacon, Liviu Dudau, dri-devel,
	Rob Herring, Krzysztof Kozlowski, Robin Murphy, linux-arm-kernel

On Fri, 06 May 2022 15:05:30 +0100, Andre Przywara wrote:
> The Arm PL110 and PL111 are IP blocks that provide a display engine with
> an LCD interface, being able to drive a variety of LC panels.
> 
> Convert the binding over to DT schema, to the DTs can be automatically
> checked.
> This still contains the deprecated "arm,pl11x,tft-r0g0b0-pads" property,
> because this is used by several DTs in the tree.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  .../devicetree/bindings/display/arm,pl11x.txt | 110 -----------
>  .../bindings/display/arm,pl11x.yaml           | 174 ++++++++++++++++++
>  2 files changed, 174 insertions(+), 110 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.txt
>  create mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.yaml
> 

Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.

Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.

Full log is available here: https://patchwork.ozlabs.org/patch/


clcd@10020000: 'oneOf' conditional failed, one must be fixed:
	arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd-ctrevb.dtb
	arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd.dtb
	arch/arm/boot/dts/arm-realview-eb-11mp-ctrevb.dtb
	arch/arm/boot/dts/arm-realview-eb-11mp.dtb
	arch/arm/boot/dts/arm-realview-eb-a9mp-bbrevd.dtb
	arch/arm/boot/dts/arm-realview-eb-a9mp.dtb

clcd@31040000: 'interrupt-names' is a required property
	arch/arm/boot/dts/lpc3250-phy3250.dtb

clcd@60000000: 'clock-names' is a required property
	arch/arm/boot/dts/spear300-evb.dtb

clcd@60000000: 'clocks' is a required property
	arch/arm/boot/dts/spear300-evb.dtb

clcd@60000000: 'interrupt-names' is a required property
	arch/arm/boot/dts/spear300-evb.dtb

clcd@60000000: 'port' is a required property
	arch/arm/boot/dts/spear300-evb.dtb

clcd@90000000: 'clock-names' is a required property
	arch/arm/boot/dts/spear320-hmi.dtb

clcd@90000000: 'clocks' is a required property
	arch/arm/boot/dts/spear320-hmi.dtb

clcd@90000000: 'interrupt-names' is a required property
	arch/arm/boot/dts/spear320-hmi.dtb

clcd@90000000: 'port' is a required property
	arch/arm/boot/dts/spear320-hmi.dtb

clcd@c0000000: 'interrupt-names' is a required property
	arch/arm/boot/dts/integratorcp.dtb

clcd@c0000000: 'port@0' does not match any of the regexes: 'pinctrl-[0-9]+'
	arch/arm/boot/dts/integratorcp.dtb

clcd@c0000000: 'port' is a required property
	arch/arm/boot/dts/integratorcp.dtb

clcd@fc200000: 'clock-names' is a required property
	arch/arm/boot/dts/spear600-evb.dtb

clcd@fc200000: 'clocks' is a required property
	arch/arm/boot/dts/spear600-evb.dtb

clcd@fc200000: 'interrupt-names' is a required property
	arch/arm/boot/dts/spear600-evb.dtb

clcd@fc200000: 'port' is a required property
	arch/arm/boot/dts/spear600-evb.dtb

display@1000000: 'interrupt-names' is a required property
	arch/arm/boot/dts/integratorap-im-pd1.dtb

display@1000000: 'port@0' does not match any of the regexes: 'pinctrl-[0-9]+'
	arch/arm/boot/dts/integratorap-im-pd1.dtb

display@1000000: 'port' is a required property
	arch/arm/boot/dts/integratorap-im-pd1.dtb

display@10120000: 'interrupt-names' is a required property
	arch/arm/boot/dts/versatile-ab.dtb
	arch/arm/boot/dts/versatile-ab-ib2.dtb
	arch/arm/boot/dts/versatile-pb.dtb

display@10120000: 'port@0' does not match any of the regexes: 'pinctrl-[0-9]+'
	arch/arm/boot/dts/versatile-ab.dtb
	arch/arm/boot/dts/versatile-ab-ib2.dtb
	arch/arm/boot/dts/versatile-pb.dtb

display@10120000: 'port' is a required property
	arch/arm/boot/dts/versatile-ab.dtb
	arch/arm/boot/dts/versatile-ab-ib2.dtb
	arch/arm/boot/dts/versatile-pb.dtb

lcd@C0000000: 'interrupt-names' is a required property
	arch/arm/boot/dts/nspire-clp.dtb
	arch/arm/boot/dts/nspire-cx.dtb
	arch/arm/boot/dts/nspire-tp.dtb

lcd-controller@40008000: 'resets' does not match any of the regexes: 'pinctrl-[0-9]+'
	arch/arm/boot/dts/lpc4337-ciaa.dtb
	arch/arm/boot/dts/lpc4350-hitex-eval.dtb
	arch/arm/boot/dts/lpc4357-ea4357-devkit.dtb
	arch/arm/boot/dts/lpc4357-myd-lpc4357.dtb


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
  2022-05-06 14:05 ` [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP " Andre Przywara
@ 2022-05-06 22:39   ` Rob Herring
  2022-05-09 13:49     ` Andre Przywara
  0 siblings, 1 reply; 11+ messages in thread
From: Rob Herring @ 2022-05-06 22:39 UTC (permalink / raw)
  To: Andre Przywara
  Cc: devicetree, Krzysztof Kozlowski, David Airlie, Will Deacon,
	Liviu Dudau, dri-devel, Rob Herring, Robin Murphy,
	linux-arm-kernel

On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
> The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> out a framebuffer and hands the pixels over to a digital signal encoder.
> It supports multiple layers, scaling and rotation.
> 
> Convert the existing DT binding to DT schema.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  .../bindings/display/arm,malidp.txt           |  68 ----------
>  .../bindings/display/arm,malidp.yaml          | 116 ++++++++++++++++++
>  2 files changed, 116 insertions(+), 68 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
>  create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
> 

Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.

Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.

Full log is available here: https://patchwork.ozlabs.org/patch/


display@f080000: 'arm,malidp-arqos-value' does not match any of the regexes: 'pinctrl-[0-9]+'
	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb
	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb
	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb
	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb
	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb
	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb
	arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb
	arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
  2022-05-06 22:39   ` Rob Herring
@ 2022-05-09 13:49     ` Andre Przywara
  2022-05-11 12:03       ` Liviu Dudau
  0 siblings, 1 reply; 11+ messages in thread
From: Andre Przywara @ 2022-05-09 13:49 UTC (permalink / raw)
  To: Rob Herring
  Cc: devicetree, Krzysztof Kozlowski, David Airlie, Will Deacon,
	Liviu Dudau, dri-devel, Rob Herring, Robin Murphy,
	linux-arm-kernel

On Fri, 06 May 2022 17:39:53 -0500
Rob Herring <robh@kernel.org> wrote:

> On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
> > The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> > out a framebuffer and hands the pixels over to a digital signal encoder.
> > It supports multiple layers, scaling and rotation.
> > 
> > Convert the existing DT binding to DT schema.
> > 
> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > ---
> >  .../bindings/display/arm,malidp.txt           |  68 ----------
> >  .../bindings/display/arm,malidp.yaml          | 116 ++++++++++++++++++
> >  2 files changed, 116 insertions(+), 68 deletions(-)
> >  delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
> >  create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
> >   
> 
> Running 'make dtbs_check' with the schema in this patch gives the
> following warnings. Consider if they are expected or the schema is
> incorrect. These may not be new warnings.
> 
> Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> This will change in the future.
> 
> Full log is available here: https://patchwork.ozlabs.org/patch/
> 
> 
> display@f080000: 'arm,malidp-arqos-value' does not match any of the regexes: 'pinctrl-[0-9]+'
> 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb
> 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb
> 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb
> 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb
> 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb
> 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb
> 	arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb
> 	arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb

Ah, good point, I missed that directory when testing. I came up with the
following change on top:

==============================
diff --git a/Documentation/devicetree/bindings/display/arm,malidp.yaml b/Documentation/devicetree/bindings/display/arm,malidp.yaml
index ea7b7100548bf..bc0d3f3ab2b75 100644
--- a/Documentation/devicetree/bindings/display/arm,malidp.yaml
+++ b/Documentation/devicetree/bindings/display/arm,malidp.yaml
@@ -76,6 +76,14 @@ properties:
     description:
       integer describing the ARQoS levels of DP500's QoS signaling
 
+  arm,malidp-arqos-value:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Quality-of-Service value for the display engine FIFOs, to write
+      into the RQOS register of the DP500.
+      See the ARM Mali-DP500 TRM for details on the encoding.
+      If omitted, the RQOS register will not be changed.
+
   port:
     $ref: /schemas/graph.yaml#/properties/port
     unevaluatedProperties: false
==============================

Cheers,
Andre

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* Re: [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
  2022-05-09 13:49     ` Andre Przywara
@ 2022-05-11 12:03       ` Liviu Dudau
  2022-06-09 16:31         ` Andre Przywara
  0 siblings, 1 reply; 11+ messages in thread
From: Liviu Dudau @ 2022-05-11 12:03 UTC (permalink / raw)
  To: Andre Przywara
  Cc: devicetree, David Airlie, Robin Murphy, dri-devel, Rob Herring,
	Krzysztof Kozlowski, Will Deacon, linux-arm-kernel

On Mon, May 09, 2022 at 02:49:01PM +0100, Andre Przywara wrote:
> On Fri, 06 May 2022 17:39:53 -0500
> Rob Herring <robh@kernel.org> wrote:
> 
> > On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
> > > The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> > > out a framebuffer and hands the pixels over to a digital signal encoder.
> > > It supports multiple layers, scaling and rotation.
> > > 
> > > Convert the existing DT binding to DT schema.
> > > 
> > > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > > ---
> > >  .../bindings/display/arm,malidp.txt           |  68 ----------
> > >  .../bindings/display/arm,malidp.yaml          | 116 ++++++++++++++++++
> > >  2 files changed, 116 insertions(+), 68 deletions(-)
> > >  delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
> > >  create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
> > >   
> > 
> > Running 'make dtbs_check' with the schema in this patch gives the
> > following warnings. Consider if they are expected or the schema is
> > incorrect. These may not be new warnings.
> > 
> > Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> > This will change in the future.
> > 
> > Full log is available here: https://patchwork.ozlabs.org/patch/
> > 
> > 
> > display@f080000: 'arm,malidp-arqos-value' does not match any of the regexes: 'pinctrl-[0-9]+'
> > 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb
> > 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb
> > 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb
> > 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb
> > 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb
> > 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb
> > 	arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb
> > 	arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb
> 
> Ah, good point, I missed that directory when testing. I came up with the
> following change on top:
> 
> ==============================
> diff --git a/Documentation/devicetree/bindings/display/arm,malidp.yaml b/Documentation/devicetree/bindings/display/arm,malidp.yaml
> index ea7b7100548bf..bc0d3f3ab2b75 100644
> --- a/Documentation/devicetree/bindings/display/arm,malidp.yaml
> +++ b/Documentation/devicetree/bindings/display/arm,malidp.yaml
> @@ -76,6 +76,14 @@ properties:
>      description:
>        integer describing the ARQoS levels of DP500's QoS signaling
>  
> +  arm,malidp-arqos-value:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description:
> +      Quality-of-Service value for the display engine FIFOs, to write
> +      into the RQOS register of the DP500.
> +      See the ARM Mali-DP500 TRM for details on the encoding.
> +      If omitted, the RQOS register will not be changed.
> +

Actually, this needs to replace 'arm,malidp-arqos-high-level'. Commit ce6eb0253cba
("dt/bindings: display: Add optional property node define for Mali DP500") is
introducing the wrong property (it mentions 'arm,malidp-arqos-value' in the commit
message). There is no user of 'arm,malidp-arqos-high-level' in the kernel.

Appologies for signing off on the wrong patch content at that time.

Best regards,
Liviu

>    port:
>      $ref: /schemas/graph.yaml#/properties/port
>      unevaluatedProperties: false
> ==============================
> 
> Cheers,
> Andre

-- 
====================
| I would like to |
| fix the world,  |
| but they're not |
| giving me the   |
 \ source code!  /
  ---------------
    ¯\_(ツ)_/¯

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v2 11/11] dt-bindings: display: convert Arm Komeda to DT schema
  2022-05-06 14:05 ` [PATCH v2 11/11] dt-bindings: display: convert Arm Komeda " Andre Przywara
@ 2022-05-13 10:42   ` Carsten Haitzler
  0 siblings, 0 replies; 11+ messages in thread
From: Carsten Haitzler @ 2022-05-13 10:42 UTC (permalink / raw)
  To: Andre Przywara, Rob Herring, Krzysztof Kozlowski
  Cc: devicetree, David Airlie, Robin Murphy, Liviu Dudau, dri-devel,
	Will Deacon, linux-arm-kernel

That seems sensible to me. It matches the kind of DT content I know 
works. It's certainly more detailed now.

On 5/6/22 15:05, Andre Przywara wrote:
> The Arm Komeda (aka Mali-D71) is a display controller that scans out a
> framebuffer and hands a signal to a digital encoder to generate a DVI
> or HDMI signal. It supports up to two pipelines, each frame can be
> composed of up to four layers.
> 
> Convert the existing DT binding to DT schema.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>   .../bindings/display/arm,komeda.txt           |  78 -----------
>   .../bindings/display/arm,komeda.yaml          | 130 ++++++++++++++++++
>   2 files changed, 130 insertions(+), 78 deletions(-)
>   delete mode 100644 Documentation/devicetree/bindings/display/arm,komeda.txt
>   create mode 100644 Documentation/devicetree/bindings/display/arm,komeda.yaml
> 
> diff --git a/Documentation/devicetree/bindings/display/arm,komeda.txt b/Documentation/devicetree/bindings/display/arm,komeda.txt
> deleted file mode 100644
> index 8513695ee47fe..0000000000000
> --- a/Documentation/devicetree/bindings/display/arm,komeda.txt
> +++ /dev/null
> @@ -1,78 +0,0 @@
> -Device Tree bindings for Arm Komeda display driver
> -
> -Required properties:
> -- compatible: Should be "arm,mali-d71"
> -- reg: Physical base address and length of the registers in the system
> -- interrupts: the interrupt line number of the device in the system
> -- clocks: A list of phandle + clock-specifier pairs, one for each entry
> -    in 'clock-names'
> -- clock-names: A list of clock names. It should contain:
> -      - "aclk": for the main processor clock
> -- #address-cells: Must be 1
> -- #size-cells: Must be 0
> -- iommus: configure the stream id to IOMMU, Must be configured if want to
> -    enable iommu in display. for how to configure this node please reference
> -        devicetree/bindings/iommu/arm,smmu-v3.txt,
> -        devicetree/bindings/iommu/iommu.txt
> -
> -Required properties for sub-node: pipeline@nq
> -Each device contains one or two pipeline sub-nodes (at least one), each
> -pipeline node should provide properties:
> -- reg: Zero-indexed identifier for the pipeline
> -- clocks: A list of phandle + clock-specifier pairs, one for each entry
> -    in 'clock-names'
> -- clock-names: should contain:
> -      - "pxclk": pixel clock
> -
> -- port: each pipeline connect to an encoder input port. The connection is
> -    modeled using the OF graph bindings specified in
> -    Documentation/devicetree/bindings/graph.txt
> -
> -Optional properties:
> -  - memory-region: phandle to a node describing memory (see
> -    Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
> -    to be used for the framebuffer; if not present, the framebuffer may
> -    be located anywhere in memory.
> -
> -Example:
> -/ {
> -	...
> -
> -	dp0: display@c00000 {
> -		#address-cells = <1>;
> -		#size-cells = <0>;
> -		compatible = "arm,mali-d71";
> -		reg = <0xc00000 0x20000>;
> -		interrupts = <0 168 4>;
> -		clocks = <&dpu_aclk>;
> -		clock-names = "aclk";
> -		iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
> -			<&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
> -			<&smmu 8>, <&smmu 9>;
> -
> -		dp0_pipe0: pipeline@0 {
> -			clocks = <&fpgaosc2>;
> -			clock-names = "pxclk";
> -			reg = <0>;
> -
> -			port {
> -				dp0_pipe0_out: endpoint {
> -					remote-endpoint = <&db_dvi0_in>;
> -				};
> -			};
> -		};
> -
> -		dp0_pipe1: pipeline@1 {
> -			clocks = <&fpgaosc2>;
> -			clock-names = "pxclk";
> -			reg = <1>;
> -
> -			port {
> -				dp0_pipe1_out: endpoint {
> -					remote-endpoint = <&db_dvi1_in>;
> -				};
> -			};
> -		};
> -	};
> -	...
> -};
> diff --git a/Documentation/devicetree/bindings/display/arm,komeda.yaml b/Documentation/devicetree/bindings/display/arm,komeda.yaml
> new file mode 100644
> index 0000000000000..9f4aade97f10a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/arm,komeda.yaml
> @@ -0,0 +1,130 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/arm,komeda.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Arm Komeda display processor
> +
> +maintainers:
> +  - Liviu Dudau <Liviu.Dudau@arm.com>
> +  - Andre Przywara <andre.przywara@arm.com>
> +
> +description:
> +  The Arm Mali D71 display processor supports up to two displays with up
> +  to a 4K resolution each. Each pipeline can be composed of up to four
> +  layers. It is typically connected to a digital display connector like HDMI.
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - const: arm,mali-d32
> +          - const: arm,mali-d71
> +      - const: arm,mali-d71
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  clock-names:
> +    const: aclk
> +
> +  clocks:
> +    maxItems: 1
> +    description: The main DPU processor clock
> +
> +  "#address-cells":
> +    const: 1
> +
> +  "#size-cells":
> +    const: 0
> +
> +  memory-region:
> +    maxItems: 1
> +    description:
> +      Phandle to a node describing memory to be used for the framebuffer.
> +      If not present, the framebuffer may be located anywhere in memory.
> +
> +  iommus:
> +    description:
> +      The stream IDs for each of the used pipelines, each four IDs for the
> +      four layers, plus one for the write-back stream.
> +    minItems: 5
> +    maxItems: 10
> +
> +patternProperties:
> +  '^pipeline@[01]$':
> +    type: object
> +    description:
> +      clocks
> +
> +    properties:
> +      reg:
> +        enum: [ 0, 1 ]
> +
> +      clock-names:
> +        const: pxclk
> +
> +      clocks:
> +        maxItems: 1
> +        description: The input reference for the pixel clock.
> +
> +      port:
> +        $ref: /schemas/graph.yaml#/$defs/port-base
> +        unevaluatedProperties: false
> +
> +additionalProperties: false
> +
> +required:
> +  - "#address-cells"
> +  - "#size-cells"
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clock-names
> +  - clocks
> +  - pipeline@0
> +
> +examples:
> +  - |
> +    display@c00000 {
> +        #address-cells = <1>;
> +        #size-cells = <0>;
> +        compatible = "arm,mali-d71";
> +        reg = <0xc00000 0x20000>;
> +        interrupts = <168>;
> +        clocks = <&dpu_aclk>;
> +        clock-names = "aclk";
> +        iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
> +                 <&smmu 8>,
> +                 <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
> +                 <&smmu 9>;
> +
> +        dp0_pipe0: pipeline@0 {
> +            clocks = <&fpgaosc2>;
> +            clock-names = "pxclk";
> +            reg = <0>;
> +
> +            port {
> +                dp0_pipe0_out: endpoint {
> +                    remote-endpoint = <&db_dvi0_in>;
> +                };
> +            };
> +        };
> +
> +        dp0_pipe1: pipeline@1 {
> +            clocks = <&fpgaosc2>;
> +            clock-names = "pxclk";
> +            reg = <1>;
> +
> +            port {
> +                dp0_pipe1_out: endpoint {
> +                    remote-endpoint = <&db_dvi1_in>;
> +                };
> +            };
> +        };
> +    };
> +...

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
  2022-05-11 12:03       ` Liviu Dudau
@ 2022-06-09 16:31         ` Andre Przywara
  0 siblings, 0 replies; 11+ messages in thread
From: Andre Przywara @ 2022-06-09 16:31 UTC (permalink / raw)
  To: Liviu Dudau
  Cc: devicetree, David Airlie, Robin Murphy, dri-devel, Rob Herring,
	Krzysztof Kozlowski, Will Deacon, linux-arm-kernel

On Wed, 11 May 2022 13:03:36 +0100
Liviu Dudau <liviu.dudau@arm.com> wrote:

Hi Liviu,

> On Mon, May 09, 2022 at 02:49:01PM +0100, Andre Przywara wrote:
> > On Fri, 06 May 2022 17:39:53 -0500
> > Rob Herring <robh@kernel.org> wrote:
> >   
> > > On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:  
> > > > The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> > > > out a framebuffer and hands the pixels over to a digital signal encoder.
> > > > It supports multiple layers, scaling and rotation.
> > > > 
> > > > Convert the existing DT binding to DT schema.
> > > > 
> > > > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > > > ---
> > > >  .../bindings/display/arm,malidp.txt           |  68 ----------
> > > >  .../bindings/display/arm,malidp.yaml          | 116 ++++++++++++++++++
> > > >  2 files changed, 116 insertions(+), 68 deletions(-)
> > > >  delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
> > > >  create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
> > > >     
> > > 
> > > Running 'make dtbs_check' with the schema in this patch gives the
> > > following warnings. Consider if they are expected or the schema is
> > > incorrect. These may not be new warnings.
> > > 
> > > Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> > > This will change in the future.
> > > 
> > > Full log is available here: https://patchwork.ozlabs.org/patch/
> > > 
> > > 
> > > display@f080000: 'arm,malidp-arqos-value' does not match any of the regexes: 'pinctrl-[0-9]+'
> > > 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb
> > > 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb
> > > 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb
> > > 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb
> > > 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb
> > > 	arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb
> > > 	arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb
> > > 	arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb  
> > 
> > Ah, good point, I missed that directory when testing. I came up with the
> > following change on top:
> > 
> > ==============================
> > diff --git a/Documentation/devicetree/bindings/display/arm,malidp.yaml b/Documentation/devicetree/bindings/display/arm,malidp.yaml
> > index ea7b7100548bf..bc0d3f3ab2b75 100644
> > --- a/Documentation/devicetree/bindings/display/arm,malidp.yaml
> > +++ b/Documentation/devicetree/bindings/display/arm,malidp.yaml
> > @@ -76,6 +76,14 @@ properties:
> >      description:
> >        integer describing the ARQoS levels of DP500's QoS signaling
> >  
> > +  arm,malidp-arqos-value:
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    description:
> > +      Quality-of-Service value for the display engine FIFOs, to write
> > +      into the RQOS register of the DP500.
> > +      See the ARM Mali-DP500 TRM for details on the encoding.
> > +      If omitted, the RQOS register will not be changed.
> > +  
> 
> Actually, this needs to replace 'arm,malidp-arqos-high-level'. Commit ce6eb0253cba
> ("dt/bindings: display: Add optional property node define for Mali DP500") is
> introducing the wrong property (it mentions 'arm,malidp-arqos-value' in the commit
> message). There is no user of 'arm,malidp-arqos-high-level' in the kernel.

Ah, thanks for the report and the background, and sorry for the delay. I
verified that, and sent a patch[1], since this binding here was already
merged.

Cheers,
Andre

[1]
https://lore.kernel.org/linux-arm-kernel/20220609162729.1441760-1-andre.przywara@arm.com/T/#u

> 
> Appologies for signing off on the wrong patch content at that time.
> 
> Best regards,
> Liviu
> 
> >    port:
> >      $ref: /schemas/graph.yaml#/properties/port
> >      unevaluatedProperties: false
> > ==============================
> > 
> > Cheers,
> > Andre  
> 


^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2022-06-09 16:31 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
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2022-05-06 14:05 ` [PATCH v2 08/11] dt-bindings: display: convert PL110/PL111 to DT schema Andre Przywara
2022-05-06 22:39   ` Rob Herring
2022-05-06 14:05 ` [PATCH v2 09/11] dt-bindings: display: convert Arm HDLCD " Andre Przywara
2022-05-06 22:39   ` Rob Herring
2022-05-06 14:05 ` [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP " Andre Przywara
2022-05-06 22:39   ` Rob Herring
2022-05-09 13:49     ` Andre Przywara
2022-05-11 12:03       ` Liviu Dudau
2022-06-09 16:31         ` Andre Przywara
2022-05-06 14:05 ` [PATCH v2 11/11] dt-bindings: display: convert Arm Komeda " Andre Przywara
2022-05-13 10:42   ` Carsten Haitzler

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