From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Bo-Chen Chen <rex-bc.chen@mediatek.com>,
chunkuang.hu@kernel.org, p.zabel@pengutronix.de, daniel@ffwll.ch,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
mripard@kernel.org, tzimmermann@suse.de, matthias.bgg@gmail.com,
deller@gmx.de, airlied@linux.ie
Cc: devicetree@vger.kernel.org, linux-fbdev@vger.kernel.org,
granquet@baylibre.com, jitao.shi@mediatek.com,
liangxu.xu@mediatek.com, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org, msp@baylibre.com,
Project_Global_Chrome_Upstream_Group@mediatek.com,
linux-mediatek@lists.infradead.org, wenst@chromium.org,
linux-arm-kernel@lists.infradead.org,
angelogioacchino.delregno@collabora.com
Subject: Re: [PATCH v15 01/11] dt-bindings: mediatek,dp: Add Display Port binding
Date: Wed, 27 Jul 2022 09:23:34 +0200 [thread overview]
Message-ID: <aaa6b5d0-20e8-146f-ba37-8784dbfd6072@linaro.org> (raw)
In-Reply-To: <20220727045035.32225-2-rex-bc.chen@mediatek.com>
On 27/07/2022 06:50, Bo-Chen Chen wrote:
> From: Markus Schneider-Pargmann <msp@baylibre.com>
>
> This controller is present on several mediatek hardware. Currently
> mt8195 and mt8395 have this controller without a functional difference,
> so only one compatible field is added.
>
> The controller can have two forms, as a normal display port and as an
> embedded display port.
>
> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
> ---
> .../display/mediatek/mediatek,dp.yaml | 117 ++++++++++++++++++
> 1 file changed, 117 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
> new file mode 100644
> index 000000000000..fd68c6c08df3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
> @@ -0,0 +1,117 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek Display Port Controller
> +
> +maintainers:
> + - Chun-Kuang Hu <chunkuang.hu@kernel.org>
> + - Jitao shi <jitao.shi@mediatek.com>
> +
> +description: |
> + Device tree bindings for the MediaTek display port TX (DP) and
> + embedded display port TX (eDP) controller present on some MediaTek SoCs.
Drop entire sentence and just describe the hardware.
> + We just need to enable the power domain of DP. The clock of DP is
> + generated by itself and we are not using other PLL to generate clocks.
> + MediaTek DP and eDP are different hardwares and there are some features
> + which are not supported for eDP. For example, audio is not supported for
> + eDP. Therefore, we need to use two different compatibles to describe them.
> +
> +properties:
> + compatible:
> + enum:
> + - mediatek,mt8195-dp-tx
> + - mediatek,mt8195-edp-tx
> +
> + reg:
> + maxItems: 1
> +
> + nvmem-cells:
> + maxItems: 1
> + description: efuse data for display port calibration
> +
> + nvmem-cell-names:
> + const: dp_calibration_data
> +
> + power-domains:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Input endpoint of the controller, usually dp_intf
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description: Output endpoint of the controller
> + properties:
> + endpoint:
> + $ref: /schemas/media/video-interfaces.yaml#
> + unevaluatedProperties: false
> + properties:
> + data-lanes:
> + description: |
> + number of lanes supported by the hardware.
> + The possible values:
> + 0 - For 1 lane enabled in IP.
> + 0 1 - For 2 lanes enabled in IP.
> + 0 1 2 3 - For 4 lanes enabled in IP.
> + minItems: 1
> + maxItems: 4
> + required:
> + - data-lanes
> +
> + required:
> + - port@0
> + - port@1
> +
> + max-linkrate-mhz:
> + enum: [ 1620, 2700, 5400, 8100 ]
> + description: maximum link rate supported by the hardware.
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - ports
> + - max-linkrate-mhz
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/power/mt8195-power.h>
> + dp_tx@1c600000 {
No underscores in node names, so just "dp".
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-07-27 7:23 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-27 4:50 [PATCH v15 00/11] drm/mediatek: Add MT8195 DisplayPort driver Bo-Chen Chen
2022-07-27 4:50 ` [PATCH v15 01/11] dt-bindings: mediatek,dp: Add Display Port binding Bo-Chen Chen
2022-07-27 7:23 ` Krzysztof Kozlowski [this message]
2022-07-28 9:39 ` Rex-BC Chen
2022-07-27 4:50 ` [PATCH v15 02/11] drm/edid: Convert cea_sad helper struct to kernelDoc Bo-Chen Chen
2022-07-27 4:50 ` [PATCH v15 03/11] drm/edid: Add cea_sad helpers for freq/length Bo-Chen Chen
2022-07-27 9:34 ` AngeloGioacchino Del Regno
2022-08-02 14:11 ` Jani Nikula
2022-08-05 6:54 ` Rex-BC Chen
2022-08-05 7:54 ` Jani Nikula
2022-07-27 4:50 ` [PATCH v15 04/11] video/hdmi: Add audio_infoframe packing for DP Bo-Chen Chen
2022-07-27 9:35 ` AngeloGioacchino Del Regno
2022-07-27 4:50 ` [PATCH v15 05/11] drm/mediatek: Add MT8195 Embedded DisplayPort driver Bo-Chen Chen
2022-07-27 9:36 ` AngeloGioacchino Del Regno
2022-08-02 2:56 ` CK Hu
2022-08-02 5:09 ` CK Hu
2022-08-05 8:22 ` Rex-BC Chen
2022-08-02 7:57 ` CK Hu
2022-07-27 4:50 ` [PATCH v15 06/11] drm/mediatek: Add MT8195 External DisplayPort support Bo-Chen Chen
2022-07-27 9:38 ` AngeloGioacchino Del Regno
2022-08-02 2:37 ` CK Hu
2022-08-03 5:47 ` Rex-BC Chen
2022-07-27 4:50 ` [PATCH v15 07/11] drm/mediatek: Add retry to prevent misjudgment for sink devices Bo-Chen Chen
2022-07-27 9:40 ` AngeloGioacchino Del Regno
2022-07-28 9:40 ` Rex-BC Chen
2022-08-05 7:10 ` Rex-BC Chen
2022-07-27 4:50 ` [PATCH v15 08/11] drm/mediatek: add hpd debounce Bo-Chen Chen
2022-07-27 4:50 ` [PATCH v15 09/11] drm/mediatek: set monitor to DP_SET_POWER_D3 to avoid garbage Bo-Chen Chen
2022-07-27 4:50 ` [PATCH v15 10/11] drm/mediatek: DP audio support for MT8195 Bo-Chen Chen
2022-07-27 4:50 ` [PATCH v15 11/11] drm/mediatek: Use cached audio config when changing resolution Bo-Chen Chen
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