dri-devel.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: Kevin Strasser <kevin.strasser@intel.com>,
	dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: David Airlie <airlied@linux.ie>,
	Daniel Vetter <daniel.vetter@ffwll.ch>,
	Uma Shankar <uma.shankar@intel.com>
Subject: Re: [PATCH v6 3/3] drm/i915/icl: Implement half float formats
Date: Wed, 13 Mar 2019 08:25:51 +0100	[thread overview]
Message-ID: <acd0e198-c139-b2d5-7c71-74a80beac0f5@linux.intel.com> (raw)
In-Reply-To: <1552437513-22648-4-git-send-email-kevin.strasser@intel.com>

Op 13-03-2019 om 01:38 schreef Kevin Strasser:
> 64 bpp half float formats are supported on hdr planes only and are subject
> to the following restrictions:
>   * 90/270 rotation not supported
>   * Yf Tiling not supported
>   * Frame Buffer Compression not supported
>   * Color Keying not supported
>
> v2:
> - Drop handling pixel normalize register
> - Don't use icl_is_hdr_plane too early
>
> v3:
> - Use refactored icl_is_hdr_plane (Ville)
> - Use u32 instead of uint32_t (Ville)
>
> v6:
> - Rebase and fix merge conflicts
> - Reorganize switch statements to keep RGB grouped separately from YUV
>
> Cc: Uma Shankar <uma.shankar@intel.com>
> Cc: Shashank Sharma <shashank.sharma@intel.com>
> Cc: David Airlie <airlied@linux.ie>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: dri-devel@lists.freedesktop.org
> Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Reviewed-by: Adam Jackson <ajax@redhat.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 22 +++++++++++
>  drivers/gpu/drm/i915/intel_sprite.c  | 72 ++++++++++++++++++++++++++++++++++--
>  2 files changed, 91 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 60fbe3a..eaedf91 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2680,6 +2680,18 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
>  			return DRM_FORMAT_XBGR2101010;
>  		else
>  			return DRM_FORMAT_XRGB2101010;
> +	case PLANE_CTL_FORMAT_XRGB_16161616F:
> +		if (rgb_order) {
> +			if (alpha)
> +				return DRM_FORMAT_ABGR16161616F;
> +			else
> +				return DRM_FORMAT_XBGR16161616F;
> +		} else {
> +			if (alpha)
> +				return DRM_FORMAT_ARGB16161616F;
> +			else
> +				return DRM_FORMAT_XRGB16161616F;
> +		}
>  	}
>  }
>  
> @@ -3575,6 +3587,12 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
>  		return PLANE_CTL_FORMAT_XRGB_2101010;
>  	case DRM_FORMAT_XBGR2101010:
>  		return PLANE_CTL_ORDER_RGBX | PLANE_CTL_FORMAT_XRGB_2101010;
> +	case DRM_FORMAT_XBGR16161616F:
> +	case DRM_FORMAT_ABGR16161616F:
> +		return PLANE_CTL_FORMAT_XRGB_16161616F | PLANE_CTL_ORDER_RGBX;
> +	case DRM_FORMAT_XRGB16161616F:
> +	case DRM_FORMAT_ARGB16161616F:
> +		return PLANE_CTL_FORMAT_XRGB_16161616F;
>  	case DRM_FORMAT_YUYV:
>  		return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YUYV;
>  	case DRM_FORMAT_YVYU:
> @@ -5143,6 +5161,10 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
>  	case DRM_FORMAT_ARGB8888:
>  	case DRM_FORMAT_XRGB2101010:
>  	case DRM_FORMAT_XBGR2101010:
> +	case DRM_FORMAT_XBGR16161616F:
> +	case DRM_FORMAT_ABGR16161616F:
> +	case DRM_FORMAT_XRGB16161616F:
> +	case DRM_FORMAT_ARGB16161616F:
>  	case DRM_FORMAT_YUYV:
>  	case DRM_FORMAT_YVYU:
>  	case DRM_FORMAT_UYVY:
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 622669f..e00559d 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -1508,8 +1508,6 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
>  		/*
>  		 * 90/270 is not allowed with RGB64 16:16:16:16 and
>  		 * Indexed 8-bit. RGB 16-bit 5:6:5 is allowed gen11 onwards.
> -		 * TBD: Add RGB64 case once its added in supported format
> -		 * list.
>  		 */
>  		switch (fb->format->format) {
>  		case DRM_FORMAT_RGB565:
> @@ -1517,6 +1515,10 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
>  				break;
>  			/* fall through */
>  		case DRM_FORMAT_C8:
> +		case DRM_FORMAT_XRGB16161616F:
> +		case DRM_FORMAT_XBGR16161616F:
> +		case DRM_FORMAT_ARGB16161616F:
> +		case DRM_FORMAT_ABGR16161616F:
>  			DRM_DEBUG_KMS("Unsupported pixel format %s for 90/270!\n",
>  				      drm_get_format_name(fb->format->format,
>  							  &format_name));
> @@ -1837,6 +1839,31 @@ static const uint32_t icl_plane_formats[] = {
>  	DRM_FORMAT_Y416,
>  };
>  
> +static const uint32_t icl_hdr_plane_formats[] = {
> +	DRM_FORMAT_C8,
> +	DRM_FORMAT_RGB565,
> +	DRM_FORMAT_XRGB8888,
> +	DRM_FORMAT_XBGR8888,
> +	DRM_FORMAT_ARGB8888,
> +	DRM_FORMAT_ABGR8888,
> +	DRM_FORMAT_XRGB2101010,
> +	DRM_FORMAT_XBGR2101010,
> +	DRM_FORMAT_XRGB16161616F,
> +	DRM_FORMAT_XBGR16161616F,
> +	DRM_FORMAT_ARGB16161616F,
> +	DRM_FORMAT_ABGR16161616F,
> +	DRM_FORMAT_YUYV,
> +	DRM_FORMAT_YVYU,
> +	DRM_FORMAT_UYVY,
> +	DRM_FORMAT_VYUY,
> +	DRM_FORMAT_Y210,
> +	DRM_FORMAT_Y212,
> +	DRM_FORMAT_Y216,
> +	DRM_FORMAT_Y410,
> +	DRM_FORMAT_Y412,
> +	DRM_FORMAT_Y416,
> +};
> +
>  static const u32 skl_planar_formats[] = {
>  	DRM_FORMAT_C8,
>  	DRM_FORMAT_RGB565,
> @@ -1897,6 +1924,35 @@ static const uint32_t icl_planar_formats[] = {
>  	DRM_FORMAT_Y416,
>  };
>  
> +static const uint32_t icl_hdr_planar_formats[] = {
> +	DRM_FORMAT_C8,
> +	DRM_FORMAT_RGB565,
> +	DRM_FORMAT_XRGB8888,
> +	DRM_FORMAT_XBGR8888,
> +	DRM_FORMAT_ARGB8888,
> +	DRM_FORMAT_ABGR8888,
> +	DRM_FORMAT_XRGB2101010,
> +	DRM_FORMAT_XBGR2101010,
> +	DRM_FORMAT_XRGB16161616F,
> +	DRM_FORMAT_XBGR16161616F,
> +	DRM_FORMAT_ARGB16161616F,
> +	DRM_FORMAT_ABGR16161616F,
> +	DRM_FORMAT_YUYV,
> +	DRM_FORMAT_YVYU,
> +	DRM_FORMAT_UYVY,
> +	DRM_FORMAT_VYUY,
> +	DRM_FORMAT_NV12,
> +	DRM_FORMAT_P010,
> +	DRM_FORMAT_P012,
> +	DRM_FORMAT_P016,
> +	DRM_FORMAT_Y210,
> +	DRM_FORMAT_Y212,
> +	DRM_FORMAT_Y216,
> +	DRM_FORMAT_Y410,
> +	DRM_FORMAT_Y412,
> +	DRM_FORMAT_Y416,
> +};
> +
>  static const u64 skl_plane_format_modifiers_noccs[] = {
>  	I915_FORMAT_MOD_Yf_TILED,
>  	I915_FORMAT_MOD_Y_TILED,
> @@ -2049,6 +2105,10 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
>  			return true;
>  		/* fall through */
>  	case DRM_FORMAT_C8:
> +	case DRM_FORMAT_XBGR16161616F:
> +	case DRM_FORMAT_ABGR16161616F:
> +	case DRM_FORMAT_XRGB16161616F:
> +	case DRM_FORMAT_ARGB16161616F:
>  		if (modifier == DRM_FORMAT_MOD_LINEAR ||
>  		    modifier == I915_FORMAT_MOD_X_TILED ||
>  		    modifier == I915_FORMAT_MOD_Y_TILED)
> @@ -2185,7 +2245,10 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
>  		plane->update_slave = icl_update_slave;
>  
>  	if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {
> -		if (INTEL_GEN(dev_priv) >= 11) {
> +		if (icl_is_hdr_plane(dev_priv, plane_id)) {
> +			formats = icl_hdr_planar_formats;
> +			num_formats = ARRAY_SIZE(icl_hdr_planar_formats);
> +		} else if (INTEL_GEN(dev_priv) >= 11) {
>  			formats = icl_planar_formats;
>  			num_formats = ARRAY_SIZE(icl_planar_formats);
>  		} else if (INTEL_GEN(dev_priv) == 10 || IS_GEMINILAKE(dev_priv)) {
> @@ -2195,6 +2258,9 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
>  			formats = skl_planar_formats;
>  			num_formats = ARRAY_SIZE(skl_planar_formats);
>  		}
> +	} else if (icl_is_hdr_plane(dev_priv, plane_id)) {
> +		formats = icl_hdr_plane_formats;
> +		num_formats = ARRAY_SIZE(icl_hdr_plane_formats);

This hunk is unreachable because is_hdr_plane is a subset of skl_plane_has_planar, I will drop it and commit. :)

Thanks,

~Maarten

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  reply	other threads:[~2019-03-13  7:25 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-13  0:38 [PATCH v6 0/3] Support 64 bpp half float formats Kevin Strasser
2019-03-13  0:38 ` [PATCH v6 1/3] drm/fourcc: Add " Kevin Strasser
2019-03-13  0:38 ` [PATCH v6 2/3] drm/i915: Refactor icl_is_hdr_plane Kevin Strasser
2019-03-13  0:38 ` [PATCH v6 3/3] drm/i915/icl: Implement half float formats Kevin Strasser
2019-03-13  7:25   ` Maarten Lankhorst [this message]
2019-03-13 11:17     ` Maarten Lankhorst

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=acd0e198-c139-b2d5-7c71-74a80beac0f5@linux.intel.com \
    --to=maarten.lankhorst@linux.intel.com \
    --cc=airlied@linux.ie \
    --cc=daniel.vetter@ffwll.ch \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=kevin.strasser@intel.com \
    --cc=uma.shankar@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).