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From: Nirmoy <nirmodas@amd.com>
To: Gerd Hoffmann <kraxel@redhat.com>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [RFC PATCH 5/6] drm/qxl: don't use ttm bo->offset
Date: Fri, 14 Feb 2020 12:55:46 +0100	[thread overview]
Message-ID: <d9b1db92-7172-a55d-f04d-941f31687ecf@amd.com> (raw)
In-Reply-To: <20200214090856.46tmxbyukqwqitkx@sirius.home.kraxel.org>


On 2/14/20 10:08 AM, Gerd Hoffmann wrote:
>> -       if (bo->mem.mm_node)
>> -               bo->offset = (bo->mem.start << PAGE_SHIFT) +
>> -                   bdev->man[bo->mem.mem_type].gpu_offset;
>> -       else
>> -               bo->offset = 0;
>> -
>>
>>
>> My assumption is
>>
>>   (bo->tbo.offset - slot->gpu_offset + offset) == (bo->tbo.mem.start << PAGE_SHIFT) + bdev->man[bo->mem.mem_type].gpu_offset - slot->gpu_offset + offset)
>>
>> -> == (bo->tbo.mem.start << PAGE_SHIFT) + offset
> That looks better.
Thanks, I will use that.
>
>> and we loose  slot->gpu_offset so I thought it should be
>>
>> ((bo->tbo.mem.start << PAGE_SHIFT) + slot->gpu_offset + offset);
> No.

Yes  this doesn't work, qemu throws bunch of warnings. (tested without 
GUI, modprobe qxl)

[   10.691506] [drm] Device Version 0.0
[   10.691618] [drm] Compression level 0 log level 0
[   10.691759] [drm] 12286 io pages at offset 0x1000000
[   10.691897] [drm] 16777216 byte draw area at offset 0x0
[   10.692043] [drm] RAM header offset: 0x3ffe000
[   10.694823] [TTM] Zone  kernel: Available graphics memory: 240756 KiB
[   10.695055] [TTM] Initializing pool allocator
[   10.695294] [TTM] Initializing DMA pool allocator
[   10.695807] [drm] qxl: 16M of VRAM memory size
[   10.695933] [drm] qxl: 63M of IO pages memory ready (VRAM domain)
[   10.696093] [drm] qxl: 64M of Surface memory size
[   10.699969] [drm] slot 0 (main): base 0xf4000000, size 0x03ffe000, 
gpu_offset 0x0
[   10.700319] [drm] slot 1 (surfaces): base 0xf8000000, size 
0x04000000, gpu_offset 0x10000000000
[   10.707842] [drm] Initialized qxl 0.1.0 20120117 for 0000:00:02.0 on 
minor 0
id 0, group 0, virt start 0, virt end ffffffffffffffff, generation 0, 
delta 0
id 1, group 1, virt start 7f329f400000, virt end 7f32a33fe000, 
generation 0, delta 7f329f400000
id 2, group 1, virt start 7f329b000000, virt end 7f329f000000, 
generation 0, delta 7f329b000000
qemu-system-x86_64: warning: Spice: memslot.c:64:memslot_validate_virt: 
virtual address out of range    virt=0x80329b300000+0x4000 slot_id=2 
group_id=1
     slot=0x7f329b000000-0x7f329f000000 delta=0x7f329b000000
qemu-system-x86_64: warning: Spice: 
display-channel.c:2437:display_channel_validate_surface: canvas address 
is 0x7f32d989eb18 for 0 (and is NULL)
qemu-system-x86_64: warning: Spice: 
display-channel.c:2439:display_channel_validate_surface: failed on 0
qemu-system-x86_64: warning: Spice: 
display-channel.c:2437:display_channel_validate_surface: canvas address 
is 0x7f32d989eb18 for 0 (and is NULL)
qemu-system-x86_64: warning: Spice: 
display-channel.c:2439:display_channel_validate_surface: failed on 0
qemu-system-x86_64: warning: Spice: 
display-channel.c:2437:display_channel_validate_surface: canvas address 
is 0x7f32d989eb18 for 0 (and is NULL)
qemu-system-x86_64: warning: Spice: 
display-channel.c:2439:display_channel_validate_surface: failed on 0
qemu-system-x86_64: warning: Spice: 
red-worker.c:468:destroy_primary_surface: double destroy of primary surface
id 0, group 0, virt start 0, virt end ffffffffffffffff, generation 0, 
delta 0
id 1, group 1, virt start 7f329f400000, virt end 7f32a33fe000, 
generation 0, delta 7f329f400000
id 2, group 1, virt start 7f329b000000, virt end 7f329f000000, 
generation 0, delta 7f329b000000
qemu-system-x86_64: warning: Spice: memslot.c:64:memslot_validate_virt: 
virtual address out of range    virt=0x80329b304000+0x300000 slot_id=2 
group_id=1
     slot=0x7f329b000000-0x7f329f000000 delta=0x7f329b000000
qemu-system-x86_64: warning: Spice: 
display-channel.c:2437:display_channel_validate_surface: canvas address 
is 0x7f32d989eb18 for 0 (and is NULL)
qemu-system-x86_64: warning: Spice: 
display-channel.c:2439:display_channel_validate_surface: failed on 0
[   10.723939] fbcon: qxldrmfb (fb0) is primary device
[   10.749245] Console: switching to colour frame buffer device 128x48
[   10.775038] qxl 0000:00:02.0: fb0: qxldrmfb frame buffer device
qemu-system-x86_64: warning: Spice: 
display-channel.c:2437:display_channel_validate_surface: canvas address 
is 0x7f32d989eb18 for 0 (and is NULL)
qemu-system-x86_64: warning: Spice: 
display-channel.c:2439:display_channel_validate_surface: failed on 0

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  reply	other threads:[~2020-02-14 11:53 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-13 12:01 [RFC PATCH 0/6] do not store GPU address in TTM Nirmoy Das
2020-02-13 12:01 ` [RFC PATCH 1/6] drm/amdgpu: move ttm bo->offset to amdgpu_bo Nirmoy Das
2020-02-13 12:01 ` [RFC PATCH 2/6] drm/radeon: don't use ttm bo->offset Nirmoy Das
2020-02-13 12:18   ` Christian König
2020-02-13 12:31     ` Nirmoy
2020-02-13 13:00       ` Christian König
2020-02-13 13:28         ` Nirmoy
2020-02-14 14:12           ` Christian König
2020-02-13 13:30         ` Nirmoy
2020-02-13 12:02 ` [RFC PATCH 3/6] drm/vmwgfx: " Nirmoy Das
2020-02-13 12:02 ` [RFC PATCH 4/6] drm/nouveau: " Nirmoy Das
2020-02-13 12:02 ` [RFC PATCH 5/6] drm/qxl: " Nirmoy Das
2020-02-13 14:30   ` Gerd Hoffmann
2020-02-13 14:52     ` Nirmoy
2020-02-14  9:08       ` Gerd Hoffmann
2020-02-14 11:55         ` Nirmoy [this message]
2020-02-13 17:26     ` Christian König
2020-02-13 12:02 ` [RFC PATCH 6/6] drm/ttm: do not keep GPU dependent addresses Nirmoy Das
2020-02-13 12:19 ` [RFC PATCH 0/6] do not store GPU address in TTM Christian König
2020-02-13 14:35 ` Huang Rui
2020-02-14  9:19 ` Thomas Zimmermann
2020-02-14 10:29   ` Nirmoy

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