From: Josh Poimboeuf <jpoimboe@redhat.com> To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Juergen Gross <jgross@suse.com>, Andy Lutomirski <luto@kernel.org>, Linus Torvalds <torvalds@linux-foundation.org>, Sasha Levin <alexander.levin@verizon.com>, live-patching@vger.kernel.org, Jiri Slaby <jslaby@suse.cz>, Ingo Molnar <mingo@kernel.org>, "H. Peter Anvin" <hpa@zytor.com>, Peter Zijlstra <peterz@infradead.org>, Mike Galbraith <efault@gmx.de>, Chris Wright <chrisw@sous-sol.org>, Alok Kataria <akataria@vmware.com>, Rusty Russell <rusty@rustcorp.com.au>, virtualization@lists.linux-foundation.org, Boris Ostrovsky <boris.ostrovsky@oracle.com>, xen-devel@lists.xenproject.org, Thomas Gleixner <tglx@linutronix.de>, Borislav Petkov <bp@alien8.de> Subject: [PATCH 03/13] x86/paravirt: Convert native patch assembly code strings to macros Date: Wed, 4 Oct 2017 10:58:24 -0500 [thread overview] Message-ID: <e4cea2b8aa8ca23122d9c807784ca62ee6cbbff8.1507128293.git.jpoimboe@redhat.com> (raw) In-Reply-To: <cover.1507128293.git.jpoimboe@redhat.com> Convert the hard-coded native patch assembly code strings to macros to facilitate sharing common code between 32-bit and 64-bit. These macros will also be used by a future patch which requires the GCC extended asm syntax of two '%' characters instead of one when specifying a register name. Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com> --- arch/x86/include/asm/special_insns.h | 24 ++++++++++++++++++++++++ arch/x86/kernel/paravirt_patch_32.c | 21 +++++++++++---------- arch/x86/kernel/paravirt_patch_64.c | 29 +++++++++++++++-------------- 3 files changed, 50 insertions(+), 24 deletions(-) diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h index ac402c6fc24b..0549c5f2c1b3 100644 --- a/arch/x86/include/asm/special_insns.h +++ b/arch/x86/include/asm/special_insns.h @@ -6,6 +6,30 @@ #include <asm/nops.h> +#ifdef CONFIG_X86_64 +# define _REG_ARG1 "%rdi" +# define NATIVE_IDENTITY_32 "mov %edi, %eax" +# define NATIVE_USERGS_SYSRET64 "swapgs; sysretq" +#else +# define _REG_ARG1 "%eax" +#endif + +#define _REG_RET "%" _ASM_AX + +#define NATIVE_ZERO "xor " _REG_ARG1 ", " _REG_ARG1 +#define NATIVE_IDENTITY "mov " _REG_ARG1 ", " _REG_RET +#define NATIVE_SAVE_FL "pushf; pop " _REG_RET +#define NATIVE_RESTORE_FL "push " _REG_ARG1 "; popf" +#define NATIVE_IRQ_DISABLE "cli" +#define NATIVE_IRQ_ENABLE "sti" +#define NATIVE_READ_CR2 "mov %cr2, " _REG_RET +#define NATIVE_READ_CR3 "mov %cr3, " _REG_RET +#define NATIVE_WRITE_CR3 "mov " _REG_ARG1 ", %cr3" +#define NATIVE_FLUSH_TLB_SINGLE "invlpg (" _REG_ARG1 ")" +#define NATIVE_SWAPGS "swapgs" +#define NATIVE_IRET "iret" +#define NATIVE_QUEUED_SPIN_UNLOCK "movb $0, (" _REG_ARG1 ")" + /* * Volatile isn't enough to prevent the compiler from reordering the * read/write functions for the control registers and messing everything up. diff --git a/arch/x86/kernel/paravirt_patch_32.c b/arch/x86/kernel/paravirt_patch_32.c index 553acbbb4d32..c9c6106ae714 100644 --- a/arch/x86/kernel/paravirt_patch_32.c +++ b/arch/x86/kernel/paravirt_patch_32.c @@ -1,17 +1,18 @@ #include <asm/paravirt.h> +#include <asm/special_insns.h> -DEF_NATIVE(pv_irq_ops, irq_disable, "cli"); -DEF_NATIVE(pv_irq_ops, irq_enable, "sti"); -DEF_NATIVE(pv_irq_ops, restore_fl, "push %eax; popf"); -DEF_NATIVE(pv_irq_ops, save_fl, "pushf; pop %eax"); -DEF_NATIVE(pv_cpu_ops, iret, "iret"); -DEF_NATIVE(pv_mmu_ops, read_cr2, "mov %cr2, %eax"); -DEF_NATIVE(pv_mmu_ops, write_cr3, "mov %eax, %cr3"); -DEF_NATIVE(pv_mmu_ops, read_cr3, "mov %cr3, %eax"); +DEF_NATIVE(pv_irq_ops, save_fl, NATIVE_SAVE_FL); +DEF_NATIVE(pv_irq_ops, restore_fl, NATIVE_RESTORE_FL); +DEF_NATIVE(pv_irq_ops, irq_disable, NATIVE_IRQ_DISABLE); +DEF_NATIVE(pv_irq_ops, irq_enable, NATIVE_IRQ_ENABLE); +DEF_NATIVE(pv_cpu_ops, iret, NATIVE_IRET); +DEF_NATIVE(pv_mmu_ops, read_cr2, NATIVE_READ_CR2); +DEF_NATIVE(pv_mmu_ops, read_cr3, NATIVE_READ_CR3); +DEF_NATIVE(pv_mmu_ops, write_cr3, NATIVE_WRITE_CR3); #if defined(CONFIG_PARAVIRT_SPINLOCKS) -DEF_NATIVE(pv_lock_ops, queued_spin_unlock, "movb $0, (%eax)"); -DEF_NATIVE(pv_lock_ops, vcpu_is_preempted, "xor %eax, %eax"); +DEF_NATIVE(pv_lock_ops, queued_spin_unlock, NATIVE_QUEUED_SPIN_UNLOCK); +DEF_NATIVE(pv_lock_ops, vcpu_is_preempted, NATIVE_ZERO); #endif unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len) diff --git a/arch/x86/kernel/paravirt_patch_64.c b/arch/x86/kernel/paravirt_patch_64.c index 0a1ba3f80cbf..0aa232edd670 100644 --- a/arch/x86/kernel/paravirt_patch_64.c +++ b/arch/x86/kernel/paravirt_patch_64.c @@ -1,25 +1,26 @@ #include <asm/paravirt.h> #include <asm/asm-offsets.h> +#include <asm/special_insns.h> #include <linux/stringify.h> -DEF_NATIVE(pv_irq_ops, irq_disable, "cli"); -DEF_NATIVE(pv_irq_ops, irq_enable, "sti"); -DEF_NATIVE(pv_irq_ops, restore_fl, "pushq %rdi; popfq"); -DEF_NATIVE(pv_irq_ops, save_fl, "pushfq; popq %rax"); -DEF_NATIVE(pv_mmu_ops, read_cr2, "movq %cr2, %rax"); -DEF_NATIVE(pv_mmu_ops, read_cr3, "movq %cr3, %rax"); -DEF_NATIVE(pv_mmu_ops, write_cr3, "movq %rdi, %cr3"); -DEF_NATIVE(pv_mmu_ops, flush_tlb_single, "invlpg (%rdi)"); +DEF_NATIVE(pv_irq_ops, save_fl, NATIVE_SAVE_FL); +DEF_NATIVE(pv_irq_ops, restore_fl, NATIVE_RESTORE_FL); +DEF_NATIVE(pv_irq_ops, irq_disable, NATIVE_IRQ_DISABLE); +DEF_NATIVE(pv_irq_ops, irq_enable, NATIVE_IRQ_ENABLE); +DEF_NATIVE(pv_mmu_ops, read_cr2, NATIVE_READ_CR2); +DEF_NATIVE(pv_mmu_ops, read_cr3, NATIVE_READ_CR3); +DEF_NATIVE(pv_mmu_ops, write_cr3, NATIVE_WRITE_CR3); +DEF_NATIVE(pv_mmu_ops, flush_tlb_single, NATIVE_FLUSH_TLB_SINGLE); -DEF_NATIVE(pv_cpu_ops, usergs_sysret64, "swapgs; sysretq"); -DEF_NATIVE(pv_cpu_ops, swapgs, "swapgs"); +DEF_NATIVE(pv_cpu_ops, usergs_sysret64, NATIVE_USERGS_SYSRET64); +DEF_NATIVE(pv_cpu_ops, swapgs, NATIVE_SWAPGS); -DEF_NATIVE(, mov32, "mov %edi, %eax"); -DEF_NATIVE(, mov64, "mov %rdi, %rax"); +DEF_NATIVE(, mov32, NATIVE_IDENTITY_32); +DEF_NATIVE(, mov64, NATIVE_IDENTITY); #if defined(CONFIG_PARAVIRT_SPINLOCKS) -DEF_NATIVE(pv_lock_ops, queued_spin_unlock, "movb $0, (%rdi)"); -DEF_NATIVE(pv_lock_ops, vcpu_is_preempted, "xor %rax, %rax"); +DEF_NATIVE(pv_lock_ops, queued_spin_unlock, NATIVE_QUEUED_SPIN_UNLOCK); +DEF_NATIVE(pv_lock_ops, vcpu_is_preempted, NATIVE_ZERO); #endif unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len) -- 2.13.6
WARNING: multiple messages have this Message-ID (diff)
From: Josh Poimboeuf <jpoimboe@redhat.com> To: x86@kernel.org Cc: Juergen Gross <jgross@suse.com>, Rusty Russell <rusty@rustcorp.com.au>, xen-devel@lists.xenproject.org, Peter Zijlstra <peterz@infradead.org>, Jiri Slaby <jslaby@suse.cz>, Boris Ostrovsky <boris.ostrovsky@oracle.com>, Mike Galbraith <efault@gmx.de>, linux-kernel@vger.kernel.org, Sasha Levin <alexander.levin@verizon.com>, Chris Wright <chrisw@sous-sol.org>, Thomas Gleixner <tglx@linutronix.de>, Andy Lutomirski <luto@kernel.org>, "H. Peter Anvin" <hpa@zytor.com>, Borislav Petkov <bp@alien8.de>, live-patching@vger.kernel.org, Alok Kataria <akataria@vmware.com>, virtualization@lists.linux-foundation.org, Linus Torvalds <torvalds@linux-foundation.org>, Ingo Molnar <mingo@kernel.org> Subject: [PATCH 03/13] x86/paravirt: Convert native patch assembly code strings to macros Date: Wed, 4 Oct 2017 10:58:24 -0500 [thread overview] Message-ID: <e4cea2b8aa8ca23122d9c807784ca62ee6cbbff8.1507128293.git.jpoimboe@redhat.com> (raw) In-Reply-To: <cover.1507128293.git.jpoimboe@redhat.com> Convert the hard-coded native patch assembly code strings to macros to facilitate sharing common code between 32-bit and 64-bit. These macros will also be used by a future patch which requires the GCC extended asm syntax of two '%' characters instead of one when specifying a register name. Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com> --- arch/x86/include/asm/special_insns.h | 24 ++++++++++++++++++++++++ arch/x86/kernel/paravirt_patch_32.c | 21 +++++++++++---------- arch/x86/kernel/paravirt_patch_64.c | 29 +++++++++++++++-------------- 3 files changed, 50 insertions(+), 24 deletions(-) diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h index ac402c6fc24b..0549c5f2c1b3 100644 --- a/arch/x86/include/asm/special_insns.h +++ b/arch/x86/include/asm/special_insns.h @@ -6,6 +6,30 @@ #include <asm/nops.h> +#ifdef CONFIG_X86_64 +# define _REG_ARG1 "%rdi" +# define NATIVE_IDENTITY_32 "mov %edi, %eax" +# define NATIVE_USERGS_SYSRET64 "swapgs; sysretq" +#else +# define _REG_ARG1 "%eax" +#endif + +#define _REG_RET "%" _ASM_AX + +#define NATIVE_ZERO "xor " _REG_ARG1 ", " _REG_ARG1 +#define NATIVE_IDENTITY "mov " _REG_ARG1 ", " _REG_RET +#define NATIVE_SAVE_FL "pushf; pop " _REG_RET +#define NATIVE_RESTORE_FL "push " _REG_ARG1 "; popf" +#define NATIVE_IRQ_DISABLE "cli" +#define NATIVE_IRQ_ENABLE "sti" +#define NATIVE_READ_CR2 "mov %cr2, " _REG_RET +#define NATIVE_READ_CR3 "mov %cr3, " _REG_RET +#define NATIVE_WRITE_CR3 "mov " _REG_ARG1 ", %cr3" +#define NATIVE_FLUSH_TLB_SINGLE "invlpg (" _REG_ARG1 ")" +#define NATIVE_SWAPGS "swapgs" +#define NATIVE_IRET "iret" +#define NATIVE_QUEUED_SPIN_UNLOCK "movb $0, (" _REG_ARG1 ")" + /* * Volatile isn't enough to prevent the compiler from reordering the * read/write functions for the control registers and messing everything up. diff --git a/arch/x86/kernel/paravirt_patch_32.c b/arch/x86/kernel/paravirt_patch_32.c index 553acbbb4d32..c9c6106ae714 100644 --- a/arch/x86/kernel/paravirt_patch_32.c +++ b/arch/x86/kernel/paravirt_patch_32.c @@ -1,17 +1,18 @@ #include <asm/paravirt.h> +#include <asm/special_insns.h> -DEF_NATIVE(pv_irq_ops, irq_disable, "cli"); -DEF_NATIVE(pv_irq_ops, irq_enable, "sti"); -DEF_NATIVE(pv_irq_ops, restore_fl, "push %eax; popf"); -DEF_NATIVE(pv_irq_ops, save_fl, "pushf; pop %eax"); -DEF_NATIVE(pv_cpu_ops, iret, "iret"); -DEF_NATIVE(pv_mmu_ops, read_cr2, "mov %cr2, %eax"); -DEF_NATIVE(pv_mmu_ops, write_cr3, "mov %eax, %cr3"); -DEF_NATIVE(pv_mmu_ops, read_cr3, "mov %cr3, %eax"); +DEF_NATIVE(pv_irq_ops, save_fl, NATIVE_SAVE_FL); +DEF_NATIVE(pv_irq_ops, restore_fl, NATIVE_RESTORE_FL); +DEF_NATIVE(pv_irq_ops, irq_disable, NATIVE_IRQ_DISABLE); +DEF_NATIVE(pv_irq_ops, irq_enable, NATIVE_IRQ_ENABLE); +DEF_NATIVE(pv_cpu_ops, iret, NATIVE_IRET); +DEF_NATIVE(pv_mmu_ops, read_cr2, NATIVE_READ_CR2); +DEF_NATIVE(pv_mmu_ops, read_cr3, NATIVE_READ_CR3); +DEF_NATIVE(pv_mmu_ops, write_cr3, NATIVE_WRITE_CR3); #if defined(CONFIG_PARAVIRT_SPINLOCKS) -DEF_NATIVE(pv_lock_ops, queued_spin_unlock, "movb $0, (%eax)"); -DEF_NATIVE(pv_lock_ops, vcpu_is_preempted, "xor %eax, %eax"); +DEF_NATIVE(pv_lock_ops, queued_spin_unlock, NATIVE_QUEUED_SPIN_UNLOCK); +DEF_NATIVE(pv_lock_ops, vcpu_is_preempted, NATIVE_ZERO); #endif unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len) diff --git a/arch/x86/kernel/paravirt_patch_64.c b/arch/x86/kernel/paravirt_patch_64.c index 0a1ba3f80cbf..0aa232edd670 100644 --- a/arch/x86/kernel/paravirt_patch_64.c +++ b/arch/x86/kernel/paravirt_patch_64.c @@ -1,25 +1,26 @@ #include <asm/paravirt.h> #include <asm/asm-offsets.h> +#include <asm/special_insns.h> #include <linux/stringify.h> -DEF_NATIVE(pv_irq_ops, irq_disable, "cli"); -DEF_NATIVE(pv_irq_ops, irq_enable, "sti"); -DEF_NATIVE(pv_irq_ops, restore_fl, "pushq %rdi; popfq"); -DEF_NATIVE(pv_irq_ops, save_fl, "pushfq; popq %rax"); -DEF_NATIVE(pv_mmu_ops, read_cr2, "movq %cr2, %rax"); -DEF_NATIVE(pv_mmu_ops, read_cr3, "movq %cr3, %rax"); -DEF_NATIVE(pv_mmu_ops, write_cr3, "movq %rdi, %cr3"); -DEF_NATIVE(pv_mmu_ops, flush_tlb_single, "invlpg (%rdi)"); +DEF_NATIVE(pv_irq_ops, save_fl, NATIVE_SAVE_FL); +DEF_NATIVE(pv_irq_ops, restore_fl, NATIVE_RESTORE_FL); +DEF_NATIVE(pv_irq_ops, irq_disable, NATIVE_IRQ_DISABLE); +DEF_NATIVE(pv_irq_ops, irq_enable, NATIVE_IRQ_ENABLE); +DEF_NATIVE(pv_mmu_ops, read_cr2, NATIVE_READ_CR2); +DEF_NATIVE(pv_mmu_ops, read_cr3, NATIVE_READ_CR3); +DEF_NATIVE(pv_mmu_ops, write_cr3, NATIVE_WRITE_CR3); +DEF_NATIVE(pv_mmu_ops, flush_tlb_single, NATIVE_FLUSH_TLB_SINGLE); -DEF_NATIVE(pv_cpu_ops, usergs_sysret64, "swapgs; sysretq"); -DEF_NATIVE(pv_cpu_ops, swapgs, "swapgs"); +DEF_NATIVE(pv_cpu_ops, usergs_sysret64, NATIVE_USERGS_SYSRET64); +DEF_NATIVE(pv_cpu_ops, swapgs, NATIVE_SWAPGS); -DEF_NATIVE(, mov32, "mov %edi, %eax"); -DEF_NATIVE(, mov64, "mov %rdi, %rax"); +DEF_NATIVE(, mov32, NATIVE_IDENTITY_32); +DEF_NATIVE(, mov64, NATIVE_IDENTITY); #if defined(CONFIG_PARAVIRT_SPINLOCKS) -DEF_NATIVE(pv_lock_ops, queued_spin_unlock, "movb $0, (%rdi)"); -DEF_NATIVE(pv_lock_ops, vcpu_is_preempted, "xor %rax, %rax"); +DEF_NATIVE(pv_lock_ops, queued_spin_unlock, NATIVE_QUEUED_SPIN_UNLOCK); +DEF_NATIVE(pv_lock_ops, vcpu_is_preempted, NATIVE_ZERO); #endif unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len) -- 2.13.6 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org https://lists.xen.org/xen-devel
next prev parent reply other threads:[~2017-10-04 15:58 UTC|newest] Thread overview: 175+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-10-04 15:58 [PATCH 00/13] x86/paravirt: Make pv ops code generation more closely match reality Josh Poimboeuf 2017-10-04 15:58 ` [PATCH 01/13] x86/paravirt: remove wbinvd() paravirt interface Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-24 13:17 ` Juergen Gross 2017-10-24 13:17 ` Juergen Gross 2017-10-24 13:17 ` Juergen Gross 2017-11-17 14:39 ` Borislav Petkov 2017-11-17 14:39 ` Borislav Petkov 2017-11-17 14:39 ` Borislav Petkov 2017-10-04 15:58 ` [PATCH 02/13] x86/paravirt: Fix output constraint macro names Josh Poimboeuf 2017-10-25 9:33 ` Juergen Gross 2017-10-25 9:33 ` Juergen Gross 2017-11-16 20:50 ` Josh Poimboeuf 2017-11-16 20:50 ` Josh Poimboeuf 2017-11-16 20:50 ` Josh Poimboeuf 2017-11-17 6:55 ` Juergen Gross 2017-11-17 6:55 ` Juergen Gross 2017-11-17 6:55 ` Juergen Gross 2017-10-25 9:33 ` Juergen Gross 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf [this message] 2017-10-04 15:58 ` [PATCH 03/13] x86/paravirt: Convert native patch assembly code strings to macros Josh Poimboeuf 2017-10-25 9:46 ` Juergen Gross 2017-10-25 9:46 ` Juergen Gross 2017-10-25 9:46 ` Juergen Gross 2017-11-16 21:04 ` Josh Poimboeuf 2017-11-16 21:04 ` Josh Poimboeuf 2017-11-16 21:04 ` Josh Poimboeuf 2017-11-17 18:07 ` Borislav Petkov 2017-11-17 18:07 ` Borislav Petkov 2017-11-17 18:07 ` Borislav Petkov 2017-11-17 19:10 ` Juergen Gross 2017-11-17 19:10 ` Juergen Gross 2017-11-17 19:10 ` Juergen Gross 2017-11-17 19:42 ` Josh Poimboeuf 2017-11-17 19:42 ` Josh Poimboeuf 2017-11-18 10:20 ` Juergen Gross 2017-11-18 10:20 ` Juergen Gross 2017-11-18 13:17 ` Josh Poimboeuf 2017-11-18 13:17 ` Josh Poimboeuf 2017-11-18 13:17 ` Josh Poimboeuf 2017-11-18 10:20 ` Juergen Gross 2017-11-17 19:42 ` Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-04 15:58 ` [PATCH 04/13] x86/paravirt: Convert DEF_NATIVE macro to GCC extended asm syntax Josh Poimboeuf 2017-10-25 10:03 ` Juergen Gross 2017-10-25 10:03 ` Juergen Gross 2017-10-25 10:03 ` Juergen Gross 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-04 15:58 ` [PATCH 05/13] x86/paravirt: Move paravirt asm macros to paravirt-asm.h Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-25 10:32 ` Juergen Gross 2017-10-25 10:32 ` Juergen Gross 2017-10-25 10:32 ` Juergen Gross 2017-10-04 15:58 ` [PATCH 06/13] x86/paravirt: Clean up paravirt-asm.h Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-25 10:59 ` Juergen Gross 2017-10-25 10:59 ` Juergen Gross 2017-10-25 10:59 ` Juergen Gross 2017-10-04 15:58 ` [PATCH 07/13] x86/paravirt: Simplify ____PVOP_CALL() Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-25 11:01 ` Juergen Gross 2017-10-25 11:01 ` Juergen Gross 2017-10-25 11:01 ` Juergen Gross 2017-11-22 16:35 ` Borislav Petkov 2017-11-22 16:35 ` Borislav Petkov 2017-11-22 16:35 ` Borislav Petkov 2017-10-04 15:58 ` [PATCH 08/13] x86/paravirt: Clean up paravirt_types.h Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-25 11:08 ` Juergen Gross 2017-10-25 11:08 ` Juergen Gross 2017-10-25 11:08 ` Juergen Gross 2017-11-22 20:46 ` Borislav Petkov 2017-11-22 20:46 ` Borislav Petkov 2017-11-22 20:46 ` Borislav Petkov 2017-10-04 15:58 ` [PATCH 09/13] x86/asm: Convert ALTERNATIVE*() assembler macros to preprocessor macros Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-25 11:14 ` Juergen Gross 2017-10-25 11:14 ` Juergen Gross 2017-10-25 11:14 ` Juergen Gross 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-04 15:58 ` [PATCH 10/13] x86/alternative: Support indirect call replacement Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-25 11:25 ` Juergen Gross 2017-10-25 11:25 ` Juergen Gross 2017-10-25 11:25 ` Juergen Gross 2017-11-16 21:19 ` Josh Poimboeuf 2017-11-16 21:19 ` Josh Poimboeuf 2017-11-16 21:19 ` Josh Poimboeuf 2017-11-17 5:46 ` Juergen Gross 2017-11-17 5:46 ` Juergen Gross 2017-11-17 5:46 ` Juergen Gross 2017-11-17 19:52 ` H. Peter Anvin 2017-11-17 19:52 ` H. Peter Anvin 2017-11-17 19:52 ` H. Peter Anvin 2017-10-04 15:58 ` [PATCH 11/13] x86/paravirt: Add paravirt alternatives infrastructure Josh Poimboeuf 2017-10-05 20:35 ` Boris Ostrovsky 2017-10-05 20:35 ` Boris Ostrovsky 2017-10-06 14:32 ` Josh Poimboeuf 2017-10-06 15:29 ` Boris Ostrovsky 2017-10-06 15:29 ` Boris Ostrovsky 2017-10-06 16:30 ` Josh Poimboeuf 2017-10-06 16:30 ` Josh Poimboeuf 2017-10-06 16:30 ` Josh Poimboeuf 2017-10-06 15:29 ` Boris Ostrovsky 2017-10-12 19:11 ` Boris Ostrovsky 2017-10-12 19:11 ` Boris Ostrovsky 2017-10-12 19:11 ` Boris Ostrovsky 2017-10-12 19:27 ` Andrew Cooper 2017-10-12 19:27 ` [Xen-devel] " Andrew Cooper 2017-10-12 19:27 ` Andrew Cooper 2017-10-12 19:53 ` Boris Ostrovsky 2017-10-12 19:53 ` [Xen-devel] " Boris Ostrovsky 2017-10-12 19:53 ` Boris Ostrovsky 2017-10-16 18:18 ` Boris Ostrovsky 2017-10-16 18:18 ` [Xen-devel] " Boris Ostrovsky 2017-10-16 18:18 ` Boris Ostrovsky 2017-10-17 5:24 ` Josh Poimboeuf 2017-10-17 5:24 ` Josh Poimboeuf 2017-10-17 13:58 ` Boris Ostrovsky 2017-10-17 13:58 ` Boris Ostrovsky 2017-10-17 14:36 ` Josh Poimboeuf 2017-10-17 14:36 ` [Xen-devel] " Josh Poimboeuf 2017-10-17 14:36 ` Josh Poimboeuf 2017-10-17 15:36 ` Boris Ostrovsky 2017-10-17 15:36 ` [Xen-devel] " Boris Ostrovsky 2017-10-17 15:36 ` Boris Ostrovsky 2017-10-17 20:17 ` Josh Poimboeuf 2017-10-17 20:17 ` Josh Poimboeuf 2017-10-17 20:36 ` Boris Ostrovsky 2017-10-17 20:36 ` Boris Ostrovsky 2017-10-17 20:50 ` Josh Poimboeuf 2017-10-17 20:50 ` [Xen-devel] " Josh Poimboeuf 2017-10-17 20:59 ` Boris Ostrovsky 2017-10-17 20:59 ` Boris Ostrovsky 2017-10-17 21:03 ` Josh Poimboeuf 2017-10-17 21:03 ` [Xen-devel] " Josh Poimboeuf 2017-10-17 21:03 ` Josh Poimboeuf 2017-10-17 20:59 ` Boris Ostrovsky 2017-10-17 20:50 ` [Xen-devel] " Josh Poimboeuf 2017-10-17 20:36 ` Boris Ostrovsky 2017-10-17 20:17 ` Josh Poimboeuf 2017-10-17 13:58 ` Boris Ostrovsky 2017-10-17 5:24 ` Josh Poimboeuf 2017-10-17 13:10 ` [Xen-devel] " Brian Gerst 2017-10-17 13:10 ` Brian Gerst 2017-10-17 13:10 ` [Xen-devel] " Brian Gerst 2017-10-17 14:05 ` Boris Ostrovsky 2017-10-17 14:05 ` [Xen-devel] " Boris Ostrovsky 2017-10-17 14:05 ` Boris Ostrovsky 2017-10-06 14:32 ` Josh Poimboeuf 2017-10-06 14:32 ` Josh Poimboeuf 2017-10-05 20:35 ` Boris Ostrovsky 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-04 15:58 ` [PATCH 12/13] objtool: Add support for new .pv_altinstructions section Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-04 15:58 ` [PATCH 13/13] x86/paravirt: Convert natively patched pv ops to use paravirt alternatives Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-04 15:58 ` Josh Poimboeuf 2017-10-06 7:35 ` [Xen-devel] [PATCH 00/13] x86/paravirt: Make pv ops code generation more closely match reality Vitaly Kuznetsov 2017-10-06 7:35 ` Vitaly Kuznetsov 2017-10-06 14:36 ` Josh Poimboeuf 2017-10-06 14:36 ` Josh Poimboeuf 2017-10-06 14:36 ` [Xen-devel] " Josh Poimboeuf 2017-10-06 7:35 ` Vitaly Kuznetsov
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