From: "Arnd Bergmann" <arnd@arndb.de>
To: "Palmer Dabbelt" <palmer@dabbelt.com>,
"Andy Chiu" <andy.chiu@sifive.com>
Cc: linux-riscv@lists.infradead.org,
"Anup Patel" <anup@brainfault.org>,
"Atish Patra" <atishp@atishpatra.org>,
kvm-riscv@lists.infradead.org, kvm@vger.kernel.org,
"Vineet Gupta" <vineetg@rivosinc.com>,
"Greentime Hu" <greentime.hu@sifive.com>,
"Guo Ren" <guoren@linux.alibaba.com>,
"Vincent Chen" <vincent.chen@sifive.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Oleg Nesterov" <oleg@redhat.com>,
"Eric W. Biederman" <ebiederm@xmission.com>,
"Kees Cook" <keescook@chromium.org>,
heiko.stuebner@vrull.eu,
"Conor.Dooley" <conor.dooley@microchip.com>,
"Huacai Chen" <chenhuacai@kernel.org>,
"Janosch Frank" <frankja@linux.ibm.com>,
"Qing Zhang" <zhangqing@loongson.cn>,
eb@emlix.com
Subject: Re: [PATCH -next v20 12/26] riscv: Add ptrace vector support
Date: Wed, 24 May 2023 08:32:27 +0200 [thread overview]
Message-ID: <eb61b8c5-4c0a-4d64-b817-235db848995c@app.fastmail.com> (raw)
In-Reply-To: <mhng-f92fa24d-c8bd-4794-819d-7563c1193430@palmer-ri-x1c9a>
On Wed, May 24, 2023, at 02:49, Palmer Dabbelt wrote:
> On Thu, 18 May 2023 09:19:35 PDT (-0700), andy.chiu@sifive.com wrote:
>> static const struct user_regset_view riscv_user_native_view = {
>> diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h
>> index ac3da855fb19..7d8d9ae36615 100644
>> --- a/include/uapi/linux/elf.h
>> +++ b/include/uapi/linux/elf.h
>> @@ -440,6 +440,7 @@ typedef struct elf64_shdr {
>> #define NT_MIPS_DSP 0x800 /* MIPS DSP ASE registers */
>> #define NT_MIPS_FP_MODE 0x801 /* MIPS floating-point mode */
>> #define NT_MIPS_MSA 0x802 /* MIPS SIMD registers */
>> +#define NT_RISCV_VECTOR 0x900 /* RISC-V vector registers */
>
> IIUC we're OK to define note types here, as they're all sub-types of the
> "LINUX" note as per the comment? I'm not entirely sure, though.
>
> Maybe Arnd knows?
No idea. It looks like glibc has the master copy of this file[1], and
they pull in changes from the kernel version, so it's probably fine,
but I don't know if that's the way it's intended to go.
Arnd
[1] https://sourceware.org/git/?p=glibc.git;a=history;f=elf/elf.h
WARNING: multiple messages have this Message-ID (diff)
From: "Arnd Bergmann" <arnd@arndb.de>
To: "Palmer Dabbelt" <palmer@dabbelt.com>,
"Andy Chiu" <andy.chiu@sifive.com>
Cc: linux-riscv@lists.infradead.org,
"Anup Patel" <anup@brainfault.org>,
"Atish Patra" <atishp@atishpatra.org>,
kvm-riscv@lists.infradead.org, kvm@vger.kernel.org,
"Vineet Gupta" <vineetg@rivosinc.com>,
"Greentime Hu" <greentime.hu@sifive.com>,
"Guo Ren" <guoren@linux.alibaba.com>,
"Vincent Chen" <vincent.chen@sifive.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Oleg Nesterov" <oleg@redhat.com>,
"Eric W. Biederman" <ebiederm@xmission.com>,
"Kees Cook" <keescook@chromium.org>,
heiko.stuebner@vrull.eu,
"Conor.Dooley" <conor.dooley@microchip.com>,
"Huacai Chen" <chenhuacai@kernel.org>,
"Janosch Frank" <frankja@linux.ibm.com>,
"Qing Zhang" <zhangqing@loongson.cn>,
eb@emlix.com
Subject: Re: [PATCH -next v20 12/26] riscv: Add ptrace vector support
Date: Wed, 24 May 2023 08:32:27 +0200 [thread overview]
Message-ID: <eb61b8c5-4c0a-4d64-b817-235db848995c@app.fastmail.com> (raw)
In-Reply-To: <mhng-f92fa24d-c8bd-4794-819d-7563c1193430@palmer-ri-x1c9a>
On Wed, May 24, 2023, at 02:49, Palmer Dabbelt wrote:
> On Thu, 18 May 2023 09:19:35 PDT (-0700), andy.chiu@sifive.com wrote:
>> static const struct user_regset_view riscv_user_native_view = {
>> diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h
>> index ac3da855fb19..7d8d9ae36615 100644
>> --- a/include/uapi/linux/elf.h
>> +++ b/include/uapi/linux/elf.h
>> @@ -440,6 +440,7 @@ typedef struct elf64_shdr {
>> #define NT_MIPS_DSP 0x800 /* MIPS DSP ASE registers */
>> #define NT_MIPS_FP_MODE 0x801 /* MIPS floating-point mode */
>> #define NT_MIPS_MSA 0x802 /* MIPS SIMD registers */
>> +#define NT_RISCV_VECTOR 0x900 /* RISC-V vector registers */
>
> IIUC we're OK to define note types here, as they're all sub-types of the
> "LINUX" note as per the comment? I'm not entirely sure, though.
>
> Maybe Arnd knows?
No idea. It looks like glibc has the master copy of this file[1], and
they pull in changes from the kernel version, so it's probably fine,
but I don't know if that's the way it's intended to go.
Arnd
[1] https://sourceware.org/git/?p=glibc.git;a=history;f=elf/elf.h
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next prev parent reply other threads:[~2023-05-24 6:33 UTC|newest]
Thread overview: 116+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-18 16:19 [PATCH -next v20 00/26] riscv: Add vector ISA support Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 01/26] riscv: Rename __switch_to_aux() -> fpu Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 02/26] riscv: Extending cpufeature.c to detect V-extension Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 03/26] riscv: hwprobe: Add support for probing V in RISCV_HWPROBE_KEY_IMA_EXT_0 Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 17:28 ` Conor Dooley
2023-05-18 17:28 ` Conor Dooley
2023-05-19 16:50 ` Evan Green
2023-05-19 16:50 ` Evan Green
2023-05-24 0:48 ` Palmer Dabbelt
2023-05-24 0:48 ` Palmer Dabbelt
2023-06-01 4:46 ` Guo Ren
2023-06-01 4:46 ` Guo Ren
2023-05-18 16:19 ` [PATCH -next v20 04/26] riscv: Add new csr defines related to vector extension Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 05/26] riscv: Clear vector regfile on bootup Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 06/26] riscv: Disable Vector Instructions for kernel itself Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 07/26] riscv: Introduce Vector enable/disable helpers Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 08/26] riscv: Introduce riscv_v_vsize to record size of Vector context Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 09/26] riscv: Introduce struct/helpers to save/restore per-task Vector state Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-18 16:19 ` [PATCH -next v20 10/26] riscv: Add task switch support for vector Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-30 10:11 ` Andy Chiu
2023-05-30 10:11 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 11/26] riscv: Allocate user's vector context in the first-use trap Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 17:47 ` Conor Dooley
2023-05-18 17:47 ` Conor Dooley
2023-05-22 9:40 ` Andy Chiu
2023-05-22 9:40 ` Andy Chiu
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-24 14:21 ` Darius Rad
2023-05-24 14:21 ` Darius Rad
2023-05-30 16:51 ` Guo Ren
2023-05-30 16:51 ` Guo Ren
2023-05-18 16:19 ` [PATCH -next v20 12/26] riscv: Add ptrace vector support Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-24 6:32 ` Arnd Bergmann [this message]
2023-05-24 6:32 ` Arnd Bergmann
2023-05-24 7:50 ` Andreas Schwab
2023-05-24 7:50 ` Andreas Schwab
2023-05-18 16:19 ` [PATCH -next v20 13/26] riscv: signal: check fp-reserved words unconditionally Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 14/26] riscv: signal: Add sigcontext save/restore for vector Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 15/26] riscv: signal: Report signal frame size to userspace via auxv Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 16/26] riscv: signal: validate altstack to reflect Vector Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 17/26] riscv: prevent stack corruption by reserving task_pt_regs(p) early Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 18/26] riscv: kvm: Add V extension to KVM ISA Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 19/26] riscv: KVM: Add vector lazy save/restore support Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 20/26] riscv: Add prctl controls for userspace vector management Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-20 14:11 ` kernel test robot
2023-05-20 14:11 ` kernel test robot
2023-05-21 1:50 ` kernel test robot
2023-05-21 1:50 ` kernel test robot
2023-05-22 4:12 ` Andy Chiu
2023-05-21 5:38 ` Rémi Denis-Courmont
2023-05-21 5:38 ` Rémi Denis-Courmont
2023-05-22 8:28 ` Andy Chiu
2023-05-22 8:28 ` Andy Chiu
2023-05-22 9:58 ` Rémi Denis-Courmont
2023-05-24 0:18 ` Palmer Dabbelt
2023-05-24 0:18 ` Palmer Dabbelt
2023-05-24 9:25 ` Andy Chiu
2023-05-24 9:25 ` Andy Chiu
2023-05-24 16:16 ` Rémi Denis-Courmont
2023-05-24 16:16 ` Rémi Denis-Courmont
2023-05-30 14:14 ` Andy Chiu
2023-05-30 14:14 ` Andy Chiu
2023-05-24 16:13 ` Rémi Denis-Courmont
2023-05-24 16:13 ` Rémi Denis-Courmont
2023-05-23 13:56 ` Björn Töpel
2023-05-23 13:56 ` Björn Töpel
2023-05-18 16:19 ` [PATCH -next v20 21/26] riscv: Add sysctl to set the default vector rule for new processes Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-23 13:45 ` Björn Töpel
2023-05-23 13:45 ` Björn Töpel
2023-05-18 16:19 ` [PATCH -next v20 22/26] riscv: detect assembler support for .option arch Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 23/26] riscv: Enable Vector code to be built Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 17:31 ` Conor Dooley
2023-05-18 17:31 ` Conor Dooley
2023-05-24 0:22 ` Palmer Dabbelt
2023-05-24 0:22 ` Palmer Dabbelt
2023-05-18 16:19 ` [PATCH -next v20 24/26] riscv: Add documentation for Vector Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-19 8:09 ` Bagas Sanjaya
2023-05-19 8:09 ` Bagas Sanjaya
2023-05-21 5:20 ` Rémi Denis-Courmont
2023-05-21 5:20 ` Rémi Denis-Courmont
2023-05-18 16:19 ` [PATCH -next v20 25/26] selftests: Test RISC-V Vector prctl interface Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 26/26] selftests: add .gitignore file for RISC-V hwprobe Andy Chiu
2023-05-18 16:19 ` Andy Chiu
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