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From: Marc Zyngier <maz@kernel.org>
To: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Keqian Zhu <zhukeqian1@huawei.com>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
	Thomas Gleixner <tglx@linutronix.de>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Sean Christopherson <sean.j.christopherson@intel.com>,
	Julien Thierry <julien.thierry.kdev@gmail.com>,
	Mark Brown <broonie@kernel.org>,
	Andrew Morton <akpm@linux-foundation.org>,
	Alexios Zavras <alexios.zavras@intel.com>,
	wanghaibin.wang@huawei.com
Subject: Re: [PATCH v3 2/2] clocksource: arm_arch_timer: Correct fault programming of CNTKCTL_EL1.EVNTI
Date: Sat, 05 Dec 2020 18:22:04 +0000	[thread overview]
Message-ID: <ef43679b6710fc4320203975bc2bde98@kernel.org> (raw)
In-Reply-To: <a82cf9ff-f18d-ce0a-f7a2-82a56cbbec40@linaro.org>

Hi Daniel,

On 2020-12-05 11:15, Daniel Lezcano wrote:
> Hi Marc,
> 
> are you fine with this patch ?

I am, although there still isn't any justification for the pos/lsb
rework in the commit message (and calling that variable lsb is somewhat
confusing). If you are going to apply it, please consider adding
the additional comment below.

> 
> 
> On 04/12/2020 08:31, Keqian Zhu wrote:
>> ARM virtual counter supports event stream, it can only trigger an 
>> event
>> when the trigger bit (the value of CNTKCTL_EL1.EVNTI) of CNTVCT_EL0 
>> changes,
>> so the actual period of event stream is 2^(cntkctl_evnti + 1). For 
>> example,
>> when the trigger bit is 0, then virtual counter trigger an event for 
>> every
>> two cycles.

"While we're at it, rework the way we compute the trigger bit position 
by
  making it more obvious that when bits [n:n-1] are both set (with n 
being
  the most significant bit), we pick bit (n + 1)."

With that:

Acked-by: Marc Zyngier <maz@kernel.org>

Thanks,

         M.
-- 
Jazz is not dead. It just smells funny...

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Andrew Morton <akpm@linux-foundation.org>,
	kvm@vger.kernel.org, Catalin Marinas <catalin.marinas@arm.com>,
	linux-kernel@vger.kernel.org,
	Sean Christopherson <sean.j.christopherson@intel.com>,
	Alexios Zavras <alexios.zavras@intel.com>,
	Will Deacon <will@kernel.org>, Mark Brown <broonie@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 2/2] clocksource: arm_arch_timer: Correct fault programming of CNTKCTL_EL1.EVNTI
Date: Sat, 05 Dec 2020 18:22:04 +0000	[thread overview]
Message-ID: <ef43679b6710fc4320203975bc2bde98@kernel.org> (raw)
In-Reply-To: <a82cf9ff-f18d-ce0a-f7a2-82a56cbbec40@linaro.org>

Hi Daniel,

On 2020-12-05 11:15, Daniel Lezcano wrote:
> Hi Marc,
> 
> are you fine with this patch ?

I am, although there still isn't any justification for the pos/lsb
rework in the commit message (and calling that variable lsb is somewhat
confusing). If you are going to apply it, please consider adding
the additional comment below.

> 
> 
> On 04/12/2020 08:31, Keqian Zhu wrote:
>> ARM virtual counter supports event stream, it can only trigger an 
>> event
>> when the trigger bit (the value of CNTKCTL_EL1.EVNTI) of CNTVCT_EL0 
>> changes,
>> so the actual period of event stream is 2^(cntkctl_evnti + 1). For 
>> example,
>> when the trigger bit is 0, then virtual counter trigger an event for 
>> every
>> two cycles.

"While we're at it, rework the way we compute the trigger bit position 
by
  making it more obvious that when bits [n:n-1] are both set (with n 
being
  the most significant bit), we pick bit (n + 1)."

With that:

Acked-by: Marc Zyngier <maz@kernel.org>

Thanks,

         M.
-- 
Jazz is not dead. It just smells funny...
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Andrew Morton <akpm@linux-foundation.org>,
	kvm@vger.kernel.org, Suzuki K Poulose <suzuki.poulose@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	linux-kernel@vger.kernel.org,
	Sean Christopherson <sean.j.christopherson@intel.com>,
	Alexios Zavras <alexios.zavras@intel.com>,
	Will Deacon <will@kernel.org>, Mark Brown <broonie@kernel.org>,
	James Morse <james.morse@arm.com>,
	Julien Thierry <julien.thierry.kdev@gmail.com>,
	wanghaibin.wang@huawei.com, Thomas Gleixner <tglx@linutronix.de>,
	Keqian Zhu <zhukeqian1@huawei.com>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 2/2] clocksource: arm_arch_timer: Correct fault programming of CNTKCTL_EL1.EVNTI
Date: Sat, 05 Dec 2020 18:22:04 +0000	[thread overview]
Message-ID: <ef43679b6710fc4320203975bc2bde98@kernel.org> (raw)
In-Reply-To: <a82cf9ff-f18d-ce0a-f7a2-82a56cbbec40@linaro.org>

Hi Daniel,

On 2020-12-05 11:15, Daniel Lezcano wrote:
> Hi Marc,
> 
> are you fine with this patch ?

I am, although there still isn't any justification for the pos/lsb
rework in the commit message (and calling that variable lsb is somewhat
confusing). If you are going to apply it, please consider adding
the additional comment below.

> 
> 
> On 04/12/2020 08:31, Keqian Zhu wrote:
>> ARM virtual counter supports event stream, it can only trigger an 
>> event
>> when the trigger bit (the value of CNTKCTL_EL1.EVNTI) of CNTVCT_EL0 
>> changes,
>> so the actual period of event stream is 2^(cntkctl_evnti + 1). For 
>> example,
>> when the trigger bit is 0, then virtual counter trigger an event for 
>> every
>> two cycles.

"While we're at it, rework the way we compute the trigger bit position 
by
  making it more obvious that when bits [n:n-1] are both set (with n 
being
  the most significant bit), we pick bit (n + 1)."

With that:

Acked-by: Marc Zyngier <maz@kernel.org>

Thanks,

         M.
-- 
Jazz is not dead. It just smells funny...

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-12-05 18:23 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-04  7:31 [PATCH v3 0/2] clocksource: arm_arch_timer: Some fixes Keqian Zhu
2020-12-04  7:31 ` Keqian Zhu
2020-12-04  7:31 ` Keqian Zhu
2020-12-04  7:31 ` [PATCH v3 1/2] clocksource: arm_arch_timer: Use stable count reader in erratum sne Keqian Zhu
2020-12-04  7:31   ` Keqian Zhu
2020-12-04  7:31   ` Keqian Zhu
2020-12-12 12:58   ` [tip: timers/core] clocksource/drivers/arm_arch_timer: " tip-bot2 for Keqian Zhu
2020-12-04  7:31 ` [PATCH v3 2/2] clocksource: arm_arch_timer: Correct fault programming of CNTKCTL_EL1.EVNTI Keqian Zhu
2020-12-04  7:31   ` Keqian Zhu
2020-12-04  7:31   ` Keqian Zhu
2020-12-05 11:15   ` Daniel Lezcano
2020-12-05 11:15     ` Daniel Lezcano
2020-12-05 11:15     ` Daniel Lezcano
2020-12-05 18:22     ` Marc Zyngier [this message]
2020-12-05 18:22       ` Marc Zyngier
2020-12-05 18:22       ` Marc Zyngier
2020-12-05 18:30       ` Daniel Lezcano
2020-12-05 18:30         ` Daniel Lezcano
2020-12-05 18:30         ` Daniel Lezcano
2020-12-12 12:58   ` [tip: timers/core] clocksource/drivers/arm_arch_timer: " tip-bot2 for Keqian Zhu

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