Re: [PATCH v8 2/7] drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask

From: Animesh Manna <animesh.manna@intel.com>
To: Anshuman Gupta <anshuman.gupta@intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com
Subject: Re: [PATCH v8 2/7] drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask
Date: Mon, 16 Sep 2019 18:55:11 +0530	[thread overview]
Message-ID: <fec661bb-3f96-7ac6-87d0-1f0e489c9ec0@intel.com> (raw)
In-Reply-To: <20190913082339.1785-3-anshuman.gupta@intel.com>

On 9/13/2019 1:53 PM, Anshuman Gupta wrote:
> Enable dc3co state in enable_dc module param and add dc3co
> enable mask to allowed_dc_mask and gen9_dc_mask.
>
> v1: Adding enable_dc=3,4 options to enable DC3CO with DC5 and DC6
>      independently. [Animesh]
> v2: Using a switch statement for cleaner code. [Animesh]
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Animesh Manna <animesh.manna@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>   .../drm/i915/display/intel_display_power.c    | 29 +++++++++++++++----
>   drivers/gpu/drm/i915/i915_params.c            |  3 +-
>   2 files changed, 25 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index ce88a27229ef..24cd9320ad4c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -698,7 +698,11 @@ static u32 gen9_dc_mask(struct drm_i915_private *dev_priv)
>   	u32 mask;
>   
>   	mask = DC_STATE_EN_UPTO_DC5;
> -	if (INTEL_GEN(dev_priv) >= 11)
> +
> +	if (INTEL_GEN(dev_priv) >= 12)
> +		mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC6
> +					  | DC_STATE_EN_DC9;
> +	else if (IS_GEN(dev_priv, 11))
>   		mask |= DC_STATE_EN_UPTO_DC6 | DC_STATE_EN_DC9;
>   	else if (IS_GEN9_LP(dev_priv))
>   		mask |= DC_STATE_EN_DC9;
> @@ -3927,14 +3931,17 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
>   	int requested_dc;
>   	int max_dc;
>   
> -	if (INTEL_GEN(dev_priv) >= 11) {
> -		max_dc = 2;
> +	if (INTEL_GEN(dev_priv) >= 12) {
> +		max_dc = 4;
>   		/*
>   		 * DC9 has a separate HW flow from the rest of the DC states,
>   		 * not depending on the DMC firmware. It's needed by system
>   		 * suspend/resume, so allow it unconditionally.
>   		 */
>   		mask = DC_STATE_EN_DC9;
> +	} else if (IS_GEN(dev_priv, 11)) {
> +		max_dc = 2;
> +		mask = DC_STATE_EN_DC9;
>   	} else if (IS_GEN(dev_priv, 10) || IS_GEN9_BC(dev_priv)) {
>   		max_dc = 2;
>   		mask = 0;
> @@ -3953,7 +3960,7 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
>   		requested_dc = enable_dc;
>   	} else if (enable_dc == -1) {
>   		requested_dc = max_dc;
> -	} else if (enable_dc > max_dc && enable_dc <= 2) {
> +	} else if (enable_dc > max_dc && enable_dc <= 4) {
>   		DRM_DEBUG_KMS("Adjusting requested max DC state (%d->%d)\n",
>   			      enable_dc, max_dc);
>   		requested_dc = max_dc;
> @@ -3962,10 +3969,20 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
>   		requested_dc = max_dc;
>   	}
>   
> -	if (requested_dc > 1)
> +	switch (requested_dc) {
> +	case 4:
> +		mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC6;
> +		break;
> +	case 3:
> +		mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC5;
> +		break;
> +	case 2:
>   		mask |= DC_STATE_EN_UPTO_DC6;
> -	if (requested_dc > 0)
> +		break;
> +	case 1:
>   		mask |= DC_STATE_EN_UPTO_DC5;
> +		break;
> +	}
>   
>   	DRM_DEBUG_KMS("Allowed DC state mask %02x\n", mask);
>   
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index 296452f9efe4..4f1806f65040 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -46,7 +46,8 @@ i915_param_named(modeset, int, 0400,
>   
>   i915_param_named_unsafe(enable_dc, int, 0400,
>   	"Enable power-saving display C-states. "
> -	"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6)");
> +	"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
> +	"3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
>   
>   i915_param_named_unsafe(enable_fbc, int, 0600,
>   	"Enable frame buffer compression for power savings "

Changes looks ok to me.
Can add Reviewed-by: Animesh Manna <animesh.manna@intel.com>

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