Re: [PATCH 3/4] V8 more sampling fun 3

[Thomas Gleixner <tglx@linutronix.de>]

speck for Borislav Petkov <speck@linutronix.de> writes:
> On Thu, Apr 16, 2020 at 12:17:23PM -0500, speck for Josh Poimboeuf wrote:
>
> While it is present on all affected CPU models, the microcode mitigation
> is not needed on models that enumerate ARCH_CAPABILITIES[MDS_NO] in the
> cases where TSX is not supported or has been disabled with TSX_CTRL.

If the CPU has does not expose TSX_CTRL and has FEATURE_RTM disabled (BIOS
or fused off) then we declare it as non vulnerable.

If the CPU exposes TSX_CTRL then we declare it vulnerable and decide in
the mitigation selection whether it is vulnerable or not depending on
the RTM state. If RTM is off, we say: "Mitigation: TSX disabled".

IMO the whole tsx_fused_off() logic is pointless. It does not matter
whether TSX got fused off or disabled in BIOS or disabled via
TSX_CTRL. The CPU model is affected but the problem is mitigated because
TSX is disabled.

Aside of that the tsx_fused_off() logic depends on the non-availability
of TSX_CTRL. TSX_CTRL is available even on CPUs which enumerate TAA_NO,
but I don't see any check for TAA_NO or BUG_TAA anywhere.

Is SBRDS on MDS_NO parts independent of TAA, i.e. does it solely depend
on the fact that RTM is on?

Thanks,

        tglx