From: Adam Jackson <ajax@redhat.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/gen4: Fix interrupt setup ordering
Date: Thu, 03 Jun 2010 17:31:22 -0400 [thread overview]
Message-ID: <1275600683.14943.21.camel@atropine.boston.devel.redhat.com> (raw)
In-Reply-To: <1274995605-4035-1-git-send-email-ajax@redhat.com>
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On Thu, 2010-05-27 at 17:26 -0400, Adam Jackson wrote:
> Unmask, then enable interrupts, then enable interrupt sources; matches
> PCH ordering. The old way (sources, enable, unmask) gives a window
> during which interrupt conditions would appear in ISR but would never
> reach IIR and thus never raise an IRQ. Since interrupts only trigger
> on rising edges in ISR, this would lead to conditions where (for
> example) output hotplugging would never fire an interrupt because it
> was already stuck on in ISR.
>
> Also, since we know IIR and PIPExSTAT have been cleared during
> irq_preinstall, don't clear them again during irq_postinstall, nothing
> good can come of that.
>
> Signed-off-by: Adam Jackson <ajax@redhat.com>
Just to follow up, I've tested this (combined with the already-merged
VGA paranoia patch) on GM45. Output hotplug still works and I'm no
longer seeing stuck bits in ISR.
- ajax
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next prev parent reply other threads:[~2010-06-03 21:31 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-05-27 21:26 [PATCH] drm/i915/gen4: Fix interrupt setup ordering Adam Jackson
2010-06-03 21:31 ` Adam Jackson [this message]
2010-06-04 18:01 ` Eric Anholt
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