[PATCH v5 0/4] Haswell HDMI/DP audio enable

[PATCH v5 0/4] Haswell HDMI/DP audio enable

[Wang Xingchao]

This patch series enable HDMI audio on Haswell platform, not DP audio.
The DP enablement will come after the DP patches are upstream.

I tested this patch on Sharkbay machine and i could hear clear sound from
HDMI port.

V2 patches fixed one warning and some type errors.

V3 patches changes:
- change some registers definitions
- use macro for IBX/CPT/HSW to get registers
- remove some unused variable intended to use in TODO list.

v4 patches changes:
- remove alsa related hack patch

v5 patches changes:
- change comments stype
- split IBX/CTP registers patch into seperate one
- remove unused register definition

Here're some notes useful for you to test the patches on Sharkbay machine:
I> please make sure your branch include below three commits in Takashi's 
sound tree, othersiwe there's no proper Haswell ID and HDMI ID.  

For the upstream tree, please refer to sound git tree

   git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
You can just pull for-linus branch.
The all commits above are found in 3.6-rc1.

e926f2c850c472f813f9bab486c68a3fe0b03ae4
1c76684d2752b3a24bb7da183cc18e5d126dbcc9
bdbe34dece4942f4d8df9865dba7785bb813366a

II> No sound from HDMI/DP.
we found it's not stable in current stage, sometimes you may not heard sound
from HDMI or DP port, but most of the time you can heard clear sound. After
some investigation, we suspect the HDA verb didnot really make codec 
change,and we regard the GPU register as the right one. (see III explanation)
the easy way is to use intel_audio_dump to compare related registers, and make
sure the port is enabled and unmute, otherwise there's no sound.
intel_audio_tools has no support on Haswell yet, i wrote patches to make that
happen, if you need the patches, please feel free to let me know. Here's part
of the snapshot about port enable and mute status from intel_audio_dump:

AUD_PORT_EN_HD_CFG  Port_B_Out_Enable			1
AUD_PORT_EN_HD_CFG  Port_C_Out_Enable			1
AUD_PORT_EN_HD_CFG  Port_D_Out_Enable			1
AUD_PORT_EN_HD_CFG  Port_B_Amp_Mute_Status		1
AUD_PORT_EN_HD_CFG  Port_C_Amp_Mute_Status		0
AUD_PORT_EN_HD_CFG  Port_D_Amp_Mute_Status		1

you can see from above message, the Port C is enabled and unmute, that's what
we expect.

III> HDA Codec dependency. When you found there's no sound from HDMI, please
use intel_audio_dump to check Port enable/mute status in II and also check
related Pipe/Transcoder/DDI port status. Sometimes the pipe and transcoder was
disabled in dpms and will not work anymore, that results in the HDMI port no
sound. HDA codec's three converters are somehow hardwired to audio Pipes and
if you choose the pipe, that means the regarding Codec converter should be
enabled too, and only one digital Pin's HDA verbs could work, that depends on
whehter your Pin select the converter as input. Here's one example about the
Pipe/Transcoder/DDI port(Pipe B, DDI Port C):

DDI_BUF_CTL_A         0x00000080  DDI Buffer Controler A
DDI_BUF_CTL_B         0x00000000  DDI Buffer Controler B
DDI_BUF_CTL_C         0x80000000  DDI Buffer Controler C
DDI_BUF_CTL_D         0x00000000  DDI Buffer Controler D
DDI_BUF_CTL_E         0x80000002  DDI Buffer Controler E
PIPE_CONF_A           0xc0000000  PIPE Configuration A
PIPE_CONF_B           0xc0000000  PIPE Configuration B
PIPE_CONF_C           0x00000000  PIPE Configuration C
PIPE_CONF_EDP         0x00000000  PIPE Configuration EDP
PIPE_DDI_FUNC_CTL_A   0xc4034002  PIPE DDI Function Control A
PIPE_DDI_FUNC_CTL_B   0xa0035000  PIPE DDI Function Control B
PIPE_DDI_FUNC_CTL_C   0x00030000  PIPE DDI Function Control C
PIPE_DDI_FUNC_CTL_EDP 0x00030000  PIPE DDI Function Control EDP

Wang Xingchao (3):

Wang Xingchao (4):
  drm/i915: HSW audio registers definition
  drm/i915: write eld info for HDMI audio
  drm/i915: Haswell HDMI audio enable
  drm/i915: use _PIPE macro for IBX/CPT register definition

 drivers/gpu/drm/i915/i915_reg.h      |   71 ++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_ddi.c     |    6 ++-
 drivers/gpu/drm/i915/intel_display.c |   52 ++++++++++++++++++++-----
 3 files changed, 118 insertions(+), 11 deletions(-)

-- 
1.7.9.5

[PATCH v5 0/4] Haswell HDMI/DP audio enable

[Wang Xingchao]

This patch series enable HDMI audio on Haswell platform, not DP audio.
The DP enablement will come after the DP patches are upstream.

I tested this patch on Sharkbay machine and i could hear clear sound from
HDMI port.

V2 patches fixed one warning and some type errors.

V3 patches changes:
- change some registers definitions
- use macro for IBX/CPT/HSW to get registers
- remove some unused variable intended to use in TODO list.

v4 patches changes:
- remove alsa related hack patch

v5 patches changes:
- change comments stype
- split IBX/CTP registers patch into seperate one
- remove unused register definition

Here're some notes useful for you to test the patches on Sharkbay machine:
I> please make sure your branch include below three patches in Takashi's 
sound tree, othersiwe there's no proper Haswell ID and HDMI ID.  
http://git.alsa-project.org/?p=alsa-kmirror.git;a=commitdiff;h=79fc901301d6115b11457e8240ed6abc4b3f5c65
http://git.alsa-project.org/?p=alsa-kmirror.git;a=commitdiff;h=e269cee227a2b2297b79bfc71094c709b9387061
http://git.alsa-project.org/?p=alsa-kmirror.git;a=commitdiff;h=cb192625233496ac3d96cce667ebf4e322dab678

II> No sound from HDMI/DP.
we found it's not stable in current stage, sometimes you may not heard sound
from HDMI or DP port, but most of the time you can heard clear sound. After
some investigation, we suspect the HDA verb didnot really make codec 
change,and we regard the GPU register as the right one. (see III explanation)
the easy way is to use intel_audio_dump to compare related registers, and make
sure the port is enabled and unmute, otherwise there's no sound.
intel_audio_tools has no support on Haswell yet, i wrote patches to make that
happen, if you need the patches, please feel free to let me know. Here's part
of the snapshot about port enable and mute status from intel_audio_dump:

AUD_PORT_EN_HD_CFG  Port_B_Out_Enable			1
AUD_PORT_EN_HD_CFG  Port_C_Out_Enable			1
AUD_PORT_EN_HD_CFG  Port_D_Out_Enable			1
AUD_PORT_EN_HD_CFG  Port_B_Amp_Mute_Status		1
AUD_PORT_EN_HD_CFG  Port_C_Amp_Mute_Status		0
AUD_PORT_EN_HD_CFG  Port_D_Amp_Mute_Status		1

you can see from above message, the Port C is enabled and unmute, that's what
we expect.

III> HDA Codec dependency. When you found there's no sound from HDMI, please
use intel_audio_dump to check Port enable/mute status in II and also check
related Pipe/Transcoder/DDI port status. Sometimes the pipe and transcoder was
disabled in dpms and will not work anymore, that results in the HDMI port no
sound. HDA codec's three converters are somehow hardwired to audio Pipes and
if you choose the pipe, that means the regarding Codec converter should be
enabled too, and only one digital Pin's HDA verbs could work, that depends on
whehter your Pin select the converter as input. Here's one example about the
Pipe/Transcoder/DDI port(Pipe B, DDI Port C):

DDI_BUF_CTL_A         0x00000080  DDI Buffer Controler A
DDI_BUF_CTL_B         0x00000000  DDI Buffer Controler B
DDI_BUF_CTL_C         0x80000000  DDI Buffer Controler C
DDI_BUF_CTL_D         0x00000000  DDI Buffer Controler D
DDI_BUF_CTL_E         0x80000002  DDI Buffer Controler E
PIPE_CONF_A           0xc0000000  PIPE Configuration A
PIPE_CONF_B           0xc0000000  PIPE Configuration B
PIPE_CONF_C           0x00000000  PIPE Configuration C
PIPE_CONF_EDP         0x00000000  PIPE Configuration EDP
PIPE_DDI_FUNC_CTL_A   0xc4034002  PIPE DDI Function Control A
PIPE_DDI_FUNC_CTL_B   0xa0035000  PIPE DDI Function Control B
PIPE_DDI_FUNC_CTL_C   0x00030000  PIPE DDI Function Control C
PIPE_DDI_FUNC_CTL_EDP 0x00030000  PIPE DDI Function Control EDP

Wang Xingchao (3):

Wang Xingchao (4):
  drm/i915: HSW audio registers definition
  drm/i915: write eld info for HDMI audio
  drm/i915: Haswell HDMI audio enable
  drm/i915: use _PIPE macro for IBX/CPT register definition

 drivers/gpu/drm/i915/i915_reg.h      |   71 ++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_ddi.c     |    6 ++-
 drivers/gpu/drm/i915/intel_display.c |   52 ++++++++++++++++++++-----
 3 files changed, 118 insertions(+), 11 deletions(-)

-- 
1.7.9.5

[PATCH v5 1/4] drm/i915: HSW audio registers definition

[Wang Xingchao]

Add hsw audio registers definition

Signed-off-by: Wang Xingchao <xingchao.wang@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h |   47 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1310caa..0cf09ad 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4277,6 +4277,53 @@
 #define   AUD_CONFIG_PIXEL_CLOCK_HDMI		(0xf << 16)
 #define   AUD_CONFIG_DISABLE_NCTS		(1 << 3)
 
+/* HSW Audio */
+#define   HSW_AUD_CONFIG_A		0x65000 /* Audio Configuration Transcoder A */
+#define   HSW_AUD_CONFIG_B		0x65100 /* Audio Configuration Transcoder B */
+#define   HSW_AUD_CFG(pipe) _PIPE(pipe, \
+					HSW_AUD_CONFIG_A, \
+					HSW_AUD_CONFIG_B)
+
+#define   HSW_AUD_MISC_CTRL_A		0x65010 /* Audio Misc Control Convert 1 */
+#define   HSW_AUD_MISC_CTRL_B		0x65110 /* Audio Misc Control Convert 2 */
+#define   HSW_AUD_MISC_CTRL(pipe) _PIPE(pipe, \
+					HSW_AUD_MISC_CTRL_A, \
+					HSW_AUD_MISC_CTRL_B)
+
+#define   HSW_AUD_DIP_ELD_CTRL_ST_A	0x650b4 /* Audio DIP and ELD Control State Transcoder A */
+#define   HSW_AUD_DIP_ELD_CTRL_ST_B	0x651b4 /* Audio DIP and ELD Control State Transcoder B */
+#define   HSW_AUD_DIP_ELD_CTRL(pipe) _PIPE(pipe, \
+					HSW_AUD_DIP_ELD_CTRL_ST_A, \
+					HSW_AUD_DIP_ELD_CTRL_ST_B)
+
+/* Audio Digital Converter */
+#define   HSW_AUD_DIG_CNVT_1		0x65080 /* Audio Converter 1 */
+#define   HSW_AUD_DIG_CNVT_2		0x65180 /* Audio Converter 1 */
+#define   AUD_DIG_CNVT(pipe) _PIPE(pipe, \
+					HSW_AUD_DIG_CNVT_1, \
+					HSW_AUD_DIG_CNVT_2)
+
+#define   HSW_AUD_EDID_DATA_A		0x65050
+#define   HSW_AUD_EDID_DATA_B		0x65150
+#define   HSW_AUD_EDID_DATA(pipe) _PIPE(pipe, \
+					HSW_AUD_EDID_DATA_A, \
+					HSW_AUD_EDID_DATA_B)
+
+#define   HSW_AUD_PIPE_CONV_CFG		0x6507c /* Audio pipe and converter configs */
+#define   HSW_AUD_PIN_ELD_CP_VLD	0x650c0 /* Audio ELD and CP Ready Status */
+#define   AUDIO_INACTIVE_C		(1<<11)
+#define   AUDIO_INACTIVE_B		(1<<7)
+#define   AUDIO_INACTIVE_A		(1<<3)
+#define   AUDIO_OUTPUT_ENABLE_A		(1<<2)
+#define   AUDIO_OUTPUT_ENABLE_B		(1<<6)
+#define   AUDIO_OUTPUT_ENABLE_C		(1<<10)
+#define   AUDIO_ELD_VALID_A		(1<<0)
+#define   AUDIO_ELD_VALID_B		(1<<4)
+#define   AUDIO_ELD_VALID_C		(1<<8)
+#define   AUDIO_CP_READY_A		(1<<1)
+#define   AUDIO_CP_READY_B		(1<<5)
+#define   AUDIO_CP_READY_C		(1<<9)
+
 /* HSW Power Wells */
 #define HSW_PWR_WELL_CTL1		0x45400		/* BIOS */
 #define HSW_PWR_WELL_CTL2		0x45404		/* Driver */
-- 
1.7.9.5

[PATCH v5 2/4] drm/i915: write eld info for HDMI audio

[Wang Xingchao]

HDMI audio related registers will be configured in write_eld callback.

Signed-off-by: Wang Xingchao <xingchao.wang@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c |    6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 32604ac..4c12371 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -718,8 +718,12 @@ void intel_ddi_mode_set(struct drm_encoder *encoder,
 		/* Proper support for digital audio needs a new logic and a new set
 		 * of registers, so we leave it for future patch bombing.
 		 */
-		DRM_DEBUG_DRIVER("HDMI audio on pipe %c not yet supported on DDI\n",
+		DRM_DEBUG_DRIVER("HDMI audio on pipe %c on DDI\n",
 				 pipe_name(intel_crtc->pipe));
+
+		/* write eld */
+		DRM_DEBUG_DRIVER("HDMI audio: write eld information\n");
+		intel_write_eld(encoder, adjusted_mode);
 	}
 
 	/* Enable PIPE_DDI_FUNC_CTL for the pipe to work in HDMI mode */
-- 
1.7.9.5

[PATCH v5 3/4] drm/i915: Haswell HDMI audio enable

[Wang Xingchao]

Initialize Haswell HDMI audio registers to generate an unsolicited
response to the audio controller driver to indicate that the controller
sequence should start.

Signed-off-by: Wang Xingchao <xingchao.wang@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |   37 ++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 17020cd..b635bf6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5071,6 +5071,7 @@ static void ironlake_write_eld(struct drm_connector *connector,
 				     struct drm_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = connector->dev->dev_private;
+	struct drm_device *dev = crtc->dev;
 	uint8_t *eld = connector->eld;
 	uint32_t eldv;
 	uint32_t i;
@@ -5079,12 +5080,18 @@ static void ironlake_write_eld(struct drm_connector *connector,
 	int aud_config;
 	int aud_cntl_st;
 	int aud_cntrl_st2;
+	int pipe = to_intel_crtc(crtc)->pipe;
 
 	if (HAS_PCH_IBX(connector->dev)) {
 		hdmiw_hdmiedid = IBX_HDMIW_HDMIEDID_A;
 		aud_config = IBX_AUD_CONFIG_A;
 		aud_cntl_st = IBX_AUD_CNTL_ST_A;
 		aud_cntrl_st2 = IBX_AUD_CNTL_ST2;
+	} else if (IS_HASWELL(dev)) {
+		hdmiw_hdmiedid = HSW_AUD_EDID_DATA(pipe);
+		aud_cntl_st = HSW_AUD_DIP_ELD_CTRL(pipe);
+		aud_config = HSW_AUD_CFG(pipe);
+		aud_cntrl_st2 = HSW_AUD_PIN_ELD_CP_VLD;
 	} else {
 		hdmiw_hdmiedid = CPT_HDMIW_HDMIEDID_A;
 		aud_config = CPT_AUD_CONFIG_A;
@@ -5092,6 +5099,34 @@ static void ironlake_write_eld(struct drm_connector *connector,
 		aud_cntrl_st2 = CPT_AUD_CNTRL_ST2;
 	}
 
+	if (IS_HASWELL(dev)) {
+		int tmp;
+		int aud_vld = HSW_AUD_PIN_ELD_CP_VLD;
+
+		DRM_DEBUG_DRIVER("HDMI: Haswell Audio initialize....\n");
+
+		/* Audio output enable */
+		DRM_DEBUG_DRIVER("HDMI audio: enable codec\n");
+		tmp = I915_READ(aud_vld);
+		tmp |= (AUDIO_OUTPUT_ENABLE_A | AUDIO_OUTPUT_ENABLE_B | AUDIO_OUTPUT_ENABLE_C);
+		I915_WRITE(aud_vld, tmp);
+
+		/* Set ELD valid state */
+		tmp = I915_READ(aud_vld);
+		DRM_DEBUG_DRIVER("HDMI audio: pin eld vld status=0x%8x\n", tmp);
+		tmp |= (AUDIO_ELD_VALID_A | AUDIO_ELD_VALID_B | AUDIO_ELD_VALID_C);
+		I915_WRITE(aud_vld, tmp);
+		tmp = I915_READ(aud_vld);
+		DRM_DEBUG_DRIVER("HDMI audio: eld vld status=0x%8x\n", tmp);
+
+		/* Enable HDMI mode */
+		tmp = I915_READ(aud_config);
+		DRM_DEBUG_DRIVER("HDMI audio: audio conf: 0x%8x\n", tmp);
+		/* clear N_programing_enable and N_value_index */
+		tmp &= ~(AUD_CONFIG_N_VALUE_INDEX | AUD_CONFIG_N_PROG_ENABLE);
+		I915_WRITE(aud_config, tmp);
+	}
+
 	i = to_intel_crtc(crtc)->pipe;
 	hdmiw_hdmiedid += i * 0x100;
 	aud_cntl_st += i * 0x100;
@@ -5135,6 +5170,8 @@ static void ironlake_write_eld(struct drm_connector *connector,
 	i = I915_READ(aud_cntl_st);
 	i &= ~IBX_ELD_ADDRESS;
 	I915_WRITE(aud_cntl_st, i);
+	i = (i >> 29) & 0x3;		/* DIP_Port_Select, 0x1 = PortB */
+	DRM_DEBUG_DRIVER("port num:%d\n", i);
 
 	len = min_t(uint8_t, eld[2], 21);	/* 84 bytes of hw ELD buffer */
 	DRM_DEBUG_DRIVER("ELD size %d\n", len);
-- 
1.7.9.5

[PATCH v5 4/4] drm/i915: use _PIPE macro for IBX/CPT register definition

[Wang Xingchao]

Use _PIPE macro to get correct register definition for IBX/CPT, discard
old variable "i" way.

Signed-off-by: Wang Xingchao <xingchao.wang@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h      |   24 ++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_display.c |   17 ++++++-----------
 2 files changed, 30 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0cf09ad..3d7a6a4 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4247,7 +4247,15 @@
 #define G4X_HDMIW_HDMIEDID		0x6210C
 
 #define IBX_HDMIW_HDMIEDID_A		0xE2050
+#define IBX_HDMIW_HDMIEDID_B		0xE2150
+#define IBX_HDMIW_HDMIEDID(pipe) _PIPE(pipe, \
+					IBX_HDMIW_HDMIEDID_A, \
+					IBX_HDMIW_HDMIEDID_B)
 #define IBX_AUD_CNTL_ST_A		0xE20B4
+#define IBX_AUD_CNTL_ST_B		0xE21B4
+#define IBX_AUD_CNTL_ST(pipe) _PIPE(pipe, \
+					IBX_AUD_CNTL_ST_A, \
+					IBX_AUD_CNTL_ST_B)
 #define IBX_ELD_BUFFER_SIZE		(0x1f << 10)
 #define IBX_ELD_ADDRESS			(0x1f << 5)
 #define IBX_ELD_ACK			(1 << 4)
@@ -4256,7 +4264,15 @@
 #define IBX_CP_READYB			(1 << 1)
 
 #define CPT_HDMIW_HDMIEDID_A		0xE5050
+#define CPT_HDMIW_HDMIEDID_B		0xE5150
+#define CPT_HDMIW_HDMIEDID(pipe) _PIPE(pipe, \
+					CPT_HDMIW_HDMIEDID_A, \
+					CPT_HDMIW_HDMIEDID_B)
 #define CPT_AUD_CNTL_ST_A		0xE50B4
+#define CPT_AUD_CNTL_ST_B		0xE51B4
+#define CPT_AUD_CNTL_ST(pipe) _PIPE(pipe, \
+					CPT_AUD_CNTL_ST_A, \
+					CPT_AUD_CNTL_ST_B)
 #define CPT_AUD_CNTRL_ST2		0xE50C0
 
 /* These are the 4 32-bit write offset registers for each stream
@@ -4266,7 +4282,15 @@
 #define GEN7_SO_WRITE_OFFSET(n)		(0x5280 + (n) * 4)
 
 #define IBX_AUD_CONFIG_A			0xe2000
+#define IBX_AUD_CONFIG_B			0xe2100
+#define IBX_AUD_CFG(pipe) _PIPE(pipe, \
+					IBX_AUD_CONFIG_A, \
+					IBX_AUD_CONFIG_B)
 #define CPT_AUD_CONFIG_A			0xe5000
+#define CPT_AUD_CONFIG_B			0xe5100
+#define CPT_AUD_CFG(pipe) _PIPE(pipe, \
+					CPT_AUD_CONFIG_A, \
+					CPT_AUD_CONFIG_B)
 #define   AUD_CONFIG_N_VALUE_INDEX		(1 << 29)
 #define   AUD_CONFIG_N_PROG_ENABLE		(1 << 28)
 #define   AUD_CONFIG_UPPER_N_SHIFT		20
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b635bf6..103de56 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5083,9 +5083,9 @@ static void ironlake_write_eld(struct drm_connector *connector,
 	int pipe = to_intel_crtc(crtc)->pipe;
 
 	if (HAS_PCH_IBX(connector->dev)) {
-		hdmiw_hdmiedid = IBX_HDMIW_HDMIEDID_A;
-		aud_config = IBX_AUD_CONFIG_A;
-		aud_cntl_st = IBX_AUD_CNTL_ST_A;
+		hdmiw_hdmiedid = IBX_HDMIW_HDMIEDID(pipe);
+		aud_config = IBX_AUD_CFG(pipe);
+		aud_cntl_st = IBX_AUD_CNTL_ST(pipe);
 		aud_cntrl_st2 = IBX_AUD_CNTL_ST2;
 	} else if (IS_HASWELL(dev)) {
 		hdmiw_hdmiedid = HSW_AUD_EDID_DATA(pipe);
@@ -5093,9 +5093,9 @@ static void ironlake_write_eld(struct drm_connector *connector,
 		aud_config = HSW_AUD_CFG(pipe);
 		aud_cntrl_st2 = HSW_AUD_PIN_ELD_CP_VLD;
 	} else {
-		hdmiw_hdmiedid = CPT_HDMIW_HDMIEDID_A;
-		aud_config = CPT_AUD_CONFIG_A;
-		aud_cntl_st = CPT_AUD_CNTL_ST_A;
+		hdmiw_hdmiedid = CPT_HDMIW_HDMIEDID(pipe);
+		aud_config = CPT_AUD_CFG(pipe);
+		aud_cntl_st = CPT_AUD_CNTL_ST(pipe);
 		aud_cntrl_st2 = CPT_AUD_CNTRL_ST2;
 	}
 
@@ -5127,11 +5127,6 @@ static void ironlake_write_eld(struct drm_connector *connector,
 		I915_WRITE(aud_config, tmp);
 	}
 
-	i = to_intel_crtc(crtc)->pipe;
-	hdmiw_hdmiedid += i * 0x100;
-	aud_cntl_st += i * 0x100;
-	aud_config += i * 0x100;
-
 	DRM_DEBUG_DRIVER("ELD on pipe %c\n", pipe_name(i));
 
 	i = I915_READ(aud_cntl_st);
-- 
1.7.9.5

Re: [PATCH v5 0/4] Haswell HDMI/DP audio enable

[Paul Menzel]

[-- Attachment #1.1: Type: text/plain, Size: 4709 bytes --]

Dear Wang,


first is Wang your first name?

Am Mittwoch, den 08.08.2012, 11:03 +0800 schrieb Wang Xingchao:
> This patch series enable HDMI audio on Haswell platform, not DP audio.
> The DP enablement will come after the DP patches are upstream.
> 
> I tested this patch on Sharkbay machine and i could hear clear sound from
> HDMI port.

Could you please add if that was a TV or a receiver?

> V2 patches fixed one warning and some type errors.
> 
> V3 patches changes:
> - change some registers definitions
> - use macro for IBX/CPT/HSW to get registers
> - remove some unused variable intended to use in TODO list.
> 
> v4 patches changes:
> - remove alsa related hack patch
> 
> v5 patches changes:
> - change comments stype
> - split IBX/CTP registers patch into seperate one

• sep*a*rate

> - remove unused register definition
> 
> Here're some notes useful for you to test the patches on Sharkbay machine:
> I> please make sure your branch include below three commits in Takashi's 
> sound tree, othersiwe there's no proper Haswell ID and HDMI ID.  

• White space at the end.
• other*wise*

> For the upstream tree, please refer to sound git tree
> 
>    git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
> You can just pull for-linus branch.
> The all commits above are found in 3.6-rc1.
> 
> e926f2c850c472f813f9bab486c68a3fe0b03ae4
> 1c76684d2752b3a24bb7da183cc18e5d126dbcc9
> bdbe34dece4942f4d8df9865dba7785bb813366a
> 
> II> No sound from HDMI/DP.
> we found it's not stable in current stage, sometimes you may not heard sound
> from HDMI or DP port, but most of the time you can heard clear sound. After
> some investigation, we suspect the HDA verb didnot really make codec 

did not

> change,and we regard the GPU register as the right one. (see III explanation)
> the easy way is to use intel_audio_dump to compare related registers, and make
> sure the port is enabled and unmute, otherwise there's no sound.
> intel_audio_tools has no support on Haswell yet, i wrote patches to make that
> happen, if you need the patches, please feel free to let me know. Here's part
> of the snapshot about port enable and mute status from intel_audio_dump:
> 
> AUD_PORT_EN_HD_CFG  Port_B_Out_Enable			1
> AUD_PORT_EN_HD_CFG  Port_C_Out_Enable			1
> AUD_PORT_EN_HD_CFG  Port_D_Out_Enable			1
> AUD_PORT_EN_HD_CFG  Port_B_Amp_Mute_Status		1
> AUD_PORT_EN_HD_CFG  Port_C_Amp_Mute_Status		0
> AUD_PORT_EN_HD_CFG  Port_D_Amp_Mute_Status		1
> 
> you can see from above message, the Port C is enabled and unmute, that's what
> we expect.
> 
> III> HDA Codec dependency. When you found there's no sound from HDMI, please
> use intel_audio_dump to check Port enable/mute status in II and also check
> related Pipe/Transcoder/DDI port status. Sometimes the pipe and transcoder was
> disabled in dpms and will not work anymore, that results in the HDMI port no
> sound. HDA codec's three converters are somehow hardwired to audio Pipes and
> if you choose the pipe, that means the regarding Codec converter should be
> enabled too, and only one digital Pin's HDA verbs could work, that depends on
> whehter your Pin select the converter as input. Here's one example about the

whe*th*er

> Pipe/Transcoder/DDI port(Pipe B, DDI Port C):
> 
> DDI_BUF_CTL_A         0x00000080  DDI Buffer Controler A
> DDI_BUF_CTL_B         0x00000000  DDI Buffer Controler B
> DDI_BUF_CTL_C         0x80000000  DDI Buffer Controler C
> DDI_BUF_CTL_D         0x00000000  DDI Buffer Controler D
> DDI_BUF_CTL_E         0x80000002  DDI Buffer Controler E
> PIPE_CONF_A           0xc0000000  PIPE Configuration A
> PIPE_CONF_B           0xc0000000  PIPE Configuration B
> PIPE_CONF_C           0x00000000  PIPE Configuration C
> PIPE_CONF_EDP         0x00000000  PIPE Configuration EDP
> PIPE_DDI_FUNC_CTL_A   0xc4034002  PIPE DDI Function Control A
> PIPE_DDI_FUNC_CTL_B   0xa0035000  PIPE DDI Function Control B
> PIPE_DDI_FUNC_CTL_C   0x00030000  PIPE DDI Function Control C
> PIPE_DDI_FUNC_CTL_EDP 0x00030000  PIPE DDI Function Control EDP
> 
> Wang Xingchao (3):

The line above should be removed.

> Wang Xingchao (4):
>   drm/i915: HSW audio registers definition
>   drm/i915: write eld info for HDMI audio
>   drm/i915: Haswell HDMI audio enable
>   drm/i915: use _PIPE macro for IBX/CPT register definition
> 
>  drivers/gpu/drm/i915/i915_reg.h      |   71 ++++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_ddi.c     |    6 ++-
>  drivers/gpu/drm/i915/intel_display.c |   52 ++++++++++++++++++++-----
>  3 files changed, 118 insertions(+), 11 deletions(-)


Thanks,

Paul

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Re: [PATCH v5 0/4] Haswell HDMI/DP audio enable

[Wang, Xingchao]

> -----Original Message-----
> From: Paul Menzel [mailto:paulepanter@users.sourceforge.net]
> Sent: Wednesday, August 08, 2012 3:15 PM
> To: Wang, Xingchao
> Cc: intel-gfx@lists.freedesktop.org; tiwai@suse.de; Fu, Michael; Wu,
> Fengguang
> Subject: Re: [Intel-gfx] [PATCH v5 0/4] Haswell HDMI/DP audio enable
> 
> Dear Wang,
> 
> 
> first is Wang your first name?
> 
Yes. :)

> Am Mittwoch, den 08.08.2012, 11:03 +0800 schrieb Wang Xingchao:
> > This patch series enable HDMI audio on Haswell platform, not DP audio.
> > The DP enablement will come after the DP patches are upstream.
> >
> > I tested this patch on Sharkbay machine and i could hear clear sound
> > from HDMI port.
> 
> Could you please add if that was a TV or a receiver?
> 

I tested the patch on Haswell Based Machine with a monitor hasing HDMI ports, this is the eld information from the monitor:
cat /proc/asound/card0/eld#0.*
monitor_present         0
eld_valid               0
monitor_present         1
eld_valid               1
monitor_name            DELL 2408WFP
connection_type         HDMI
eld_version             [0x2] CEA-861D or below
edid_version            [0x3] CEA-861-B, C or D
manufacture_id          0xac10
product_id              0xa02c
port_id                 0x0
support_hdcp            0
support_ai              1
audio_sync_delay        0
speakers                [0x1] FL/FR
sad_count               1
sad0_coding_type        [0x1] LPCM
sad0_channels           2
sad0_rates              [0xe0] 32000 44100 48000
sad0_bits               [0xe0000] 16 20 24
monitor_present         0
eld_valid               0

> > V2 patches fixed one warning and some type errors.
> >
> > V3 patches changes:
> > - change some registers definitions
> > - use macro for IBX/CPT/HSW to get registers
> > - remove some unused variable intended to use in TODO list.
> >
> > v4 patches changes:
> > - remove alsa related hack patch
> >
> > v5 patches changes:
> > - change comments stype
> > - split IBX/CTP registers patch into seperate one
> 
> • sep*a*rate
> 
> > - remove unused register definition
> >
> > Here're some notes useful for you to test the patches on Sharkbay machine:
> > I> please make sure your branch include below three commits in
> > I> Takashi's
> > sound tree, othersiwe there's no proper Haswell ID and HDMI ID.
> 
> • White space at the end.
> • other*wise*
> 
> > For the upstream tree, please refer to sound git tree
> >
> >    git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
> > You can just pull for-linus branch.
> > The all commits above are found in 3.6-rc1.
> >
> > e926f2c850c472f813f9bab486c68a3fe0b03ae4
> > 1c76684d2752b3a24bb7da183cc18e5d126dbcc9
> > bdbe34dece4942f4d8df9865dba7785bb813366a
> >
> > II> No sound from HDMI/DP.
> > we found it's not stable in current stage, sometimes you may not heard
> > sound from HDMI or DP port, but most of the time you can heard clear
> > sound. After some investigation, we suspect the HDA verb didnot really
> > make codec
> 
> did not
> 
> > change,and we regard the GPU register as the right one. (see III
> > explanation) the easy way is to use intel_audio_dump to compare
> > related registers, and make sure the port is enabled and unmute, otherwise
> there's no sound.
> > intel_audio_tools has no support on Haswell yet, i wrote patches to
> > make that happen, if you need the patches, please feel free to let me
> > know. Here's part of the snapshot about port enable and mute status from
> intel_audio_dump:
> >
> > AUD_PORT_EN_HD_CFG  Port_B_Out_Enable			1
> > AUD_PORT_EN_HD_CFG  Port_C_Out_Enable			1
> > AUD_PORT_EN_HD_CFG  Port_D_Out_Enable			1
> > AUD_PORT_EN_HD_CFG  Port_B_Amp_Mute_Status		1
> > AUD_PORT_EN_HD_CFG  Port_C_Amp_Mute_Status		0
> > AUD_PORT_EN_HD_CFG  Port_D_Amp_Mute_Status		1
> >
> > you can see from above message, the Port C is enabled and unmute,
> > that's what we expect.
> >
> > III> HDA Codec dependency. When you found there's no sound from HDMI,
> > III> please
> > use intel_audio_dump to check Port enable/mute status in II and also
> > check related Pipe/Transcoder/DDI port status. Sometimes the pipe and
> > transcoder was disabled in dpms and will not work anymore, that
> > results in the HDMI port no sound. HDA codec's three converters are
> > somehow hardwired to audio Pipes and if you choose the pipe, that
> > means the regarding Codec converter should be enabled too, and only
> > one digital Pin's HDA verbs could work, that depends on whehter your
> > Pin select the converter as input. Here's one example about the
> 
> whe*th*er
> 
> > Pipe/Transcoder/DDI port(Pipe B, DDI Port C):
> >
> > DDI_BUF_CTL_A         0x00000080  DDI Buffer Controler A
> > DDI_BUF_CTL_B         0x00000000  DDI Buffer Controler B
> > DDI_BUF_CTL_C         0x80000000  DDI Buffer Controler C
> > DDI_BUF_CTL_D         0x00000000  DDI Buffer Controler D
> > DDI_BUF_CTL_E         0x80000002  DDI Buffer Controler E
> > PIPE_CONF_A           0xc0000000  PIPE Configuration A
> > PIPE_CONF_B           0xc0000000  PIPE Configuration B
> > PIPE_CONF_C           0x00000000  PIPE Configuration C
> > PIPE_CONF_EDP         0x00000000  PIPE Configuration EDP
> > PIPE_DDI_FUNC_CTL_A   0xc4034002  PIPE DDI Function Control A
> > PIPE_DDI_FUNC_CTL_B   0xa0035000  PIPE DDI Function Control B
> > PIPE_DDI_FUNC_CTL_C   0x00030000  PIPE DDI Function Control C
> > PIPE_DDI_FUNC_CTL_EDP 0x00030000  PIPE DDI Function Control EDP
> >
> > Wang Xingchao (3):
> 
> The line above should be removed.
> 
> > Wang Xingchao (4):
> >   drm/i915: HSW audio registers definition
> >   drm/i915: write eld info for HDMI audio
> >   drm/i915: Haswell HDMI audio enable
> >   drm/i915: use _PIPE macro for IBX/CPT register definition
> >
> >  drivers/gpu/drm/i915/i915_reg.h      |   71
> ++++++++++++++++++++++++++++++++++
> >  drivers/gpu/drm/i915/intel_ddi.c     |    6 ++-
> >  drivers/gpu/drm/i915/intel_display.c |   52 ++++++++++++++++++++-----
> >  3 files changed, 118 insertions(+), 11 deletions(-)
> 
> 
> Thanks,
> 
> Paul

Thanks your review Paul, I fixed the type error.

--xingchao
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