[PATCH 1/2] intel_gtt: Harden against changes to kernel mappings of the GTT

[PATCH 1/2] intel_gtt: Harden against changes to kernel mappings of the GTT

[Chris Wilson]

Rather than use the common mmio segment which will be in future
restricted to just the registers and so exclude the GTT portion on all
architectures, explicitly mmap the GTT ourselves. Repeat this mmapping
with a couple of flags until we matching the existing kernel mapping.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tools/intel_gtt.c |   46 ++++++++++++++++++++++++++++++----------------
 1 file changed, 30 insertions(+), 16 deletions(-)

diff --git a/tools/intel_gtt.c b/tools/intel_gtt.c
index c246fda..05d36d7 100644
--- a/tools/intel_gtt.c
+++ b/tools/intel_gtt.c
@@ -45,33 +45,47 @@ int main(int argc, char **argv)
 	int start, aper_size;
 	unsigned char *gtt;
 	uint32_t devid;
+	int flag[] = {
+		PCI_DEV_MAP_FLAG_WRITE_COMBINE,
+		PCI_DEV_MAP_FLAG_WRITABLE,
+		0
+	}, f;
 
 	pci_dev = intel_get_pci_device();
 	devid = pci_dev->device_id;
-	intel_get_mmio(pci_dev);
 
 	if (IS_GEN2(devid)) {
 		printf("Unsupported chipset for gtt dumper\n");
 		exit(1);
 	}
 
-	if (IS_G4X(devid) || IS_GEN5(devid))
-		gtt = ((unsigned char *)mmio + MB(2));
-	else if (IS_965(devid))
-		gtt = ((unsigned char *)mmio + KB(512));
-	else {
-		/* 915/945 chips has GTT range in bar 3 */
-		int err;
-		err = pci_device_map_range(pci_dev,
-					   pci_dev->regions[3].base_addr,
-					   pci_dev->regions[3].size,
-					   PCI_DEV_MAP_FLAG_WRITABLE,
-					   (void **)&gtt);
-		if (err != 0) {
-			fprintf(stderr, "mapping GTT bar failed\n");
-			exit(1);
+	for (f = 0; flag[f] != 0; f++) {
+		if (IS_GEN3(devid)) {
+			/* 915/945 chips has GTT range in bar 3 */
+			if (pci_device_map_range(pci_dev,
+						 pci_dev->regions[3].base_addr,
+						 pci_dev->regions[3].size,
+						 flag[f],
+						 (void **)&gtt) == 0)
+				break;
+		} else {
+			int offset;
+			if (IS_G4X(devid) || IS_GEN5(devid))
+				offset = MB(2);
+			else
+				offset = KB(512);
+			if (pci_device_map_range(pci_dev,
+						 pci_dev->regions[0].base_addr + offset,
+						 offset,
+						 flag[f],
+						 (void **)&gtt) == 0)
+				break;
 		}
 	}
+	if (flag[f] == 0) {
+		printf("Failed to map gtt\n");
+		exit(1);
+	}
 
 	aper_size = pci_dev->regions[2].size;
 
-- 
1.7.10.4

[PATCH 2/2] mmio: Limit the uc- mapping to only map the registers

[Chris Wilson]

In the future, we may like to enable wc mapping of at least the GATT,
and so causing a conflict if we attempt to map the entire bar as uc-
here. Obviously we need a better fallback plan, but for the moment only
attempt to map the portion of the pci space that we use for register
access.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/intel_mmio.c |   20 ++++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/lib/intel_mmio.c b/lib/intel_mmio.c
index b266847..ecb049b 100644
--- a/lib/intel_mmio.c
+++ b/lib/intel_mmio.c
@@ -80,8 +80,8 @@ intel_map_file(char *file)
 void
 intel_get_mmio(struct pci_device *pci_dev)
 {
-	uint32_t devid;
-	int mmio_bar;
+	uint32_t devid, gen;
+	int mmio_bar, mmio_size;
 	int error;
 
 	devid = pci_dev->device_id;
@@ -90,11 +90,19 @@ intel_get_mmio(struct pci_device *pci_dev)
 	else
 		mmio_bar = 0;
 
+	gen = intel_gen(devid);
+	if (gen < 3)
+		mmio_size = 64*1024;
+	else if (gen < 5)
+		mmio_size = 512*1024;
+	else
+		mmio_size = 2*1024*1024;
+
 	error = pci_device_map_range (pci_dev,
-				    pci_dev->regions[mmio_bar].base_addr,
-				    pci_dev->regions[mmio_bar].size,
-				    PCI_DEV_MAP_FLAG_WRITABLE,
-				    &mmio);
+				      pci_dev->regions[mmio_bar].base_addr,
+				      mmio_size,
+				      PCI_DEV_MAP_FLAG_WRITABLE,
+				      &mmio);
 
 	if (error != 0) {
 		fprintf(stderr, "Couldn't map MMIO region: %s\n",
-- 
1.7.10.4

Re: [PATCH 2/2] mmio: Limit the uc- mapping to only map the registers

[Daniel Vetter]

On Sun, Aug 26, 2012 at 09:22:15PM +0100, Chris Wilson wrote:
> In the future, we may like to enable wc mapping of at least the GATT,
> and so causing a conflict if we attempt to map the entire bar as uc-
> here. Obviously we need a better fallback plan, but for the moment only
> attempt to map the portion of the pci space that we use for register
> access.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Both applied, thanks for the patches.
-Daniel
-- 
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48