[PATCH] drm/i915: Reduce memory pressure during shrinker by preallocating swizzle pages

[PATCH] drm/i915: Reduce memory pressure during shrinker by preallocating swizzle pages

[Chris Wilson]

On a machine with bit17 swizzling, we need to store the bit17 of the
physical page address in put-pages. This requires a memory allocation,
on average less than a page, which may be difficult to satisfy is the
request to put-pages is on behalf of the shrinker. We could allow that
allocation to pull from the reserved memory pools, but it seems much
safer to preallocate the array for tiled objects on affected machines.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_gem_tiling.c |   14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 8e59bb5..140ef6b 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -351,6 +351,20 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
 	/* we have to maintain this existing ABI... */
 	args->stride = obj->stride;
 	args->tiling_mode = obj->tiling_mode;
+
+	/* Try to preallocate memory required to save swizzling on put-pages */
+	if (dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17) {
+		if (obj->tiling_mode) {
+			if (obj->bit_17 == NULL) {
+				obj->bit_17 = kmalloc(BITS_TO_LONGS(obj->base.size >> PAGE_SHIFT) *
+						      sizeof(long), GFP_KERNEL);
+			}
+		} else {
+			kfree(obj->bit_17);
+			obj->bit_17 = NULL;
+		}
+	}
+
 	drm_gem_object_unreference(&obj->base);
 	mutex_unlock(&dev->struct_mutex);
 
-- 
1.7.10.4

Re: [PATCH] drm/i915: Reduce memory pressure during shrinker by preallocating swizzle pages

[Daniel Vetter]

On Mon, Dec 03, 2012 at 04:30:59PM +0000, Chris Wilson wrote:
> On a machine with bit17 swizzling, we need to store the bit17 of the
> physical page address in put-pages. This requires a memory allocation,
> on average less than a page, which may be difficult to satisfy is the
> request to put-pages is on behalf of the shrinker. We could allow that
> allocation to pull from the reserved memory pools, but it seems much
> safer to preallocate the array for tiled objects on affected machines.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/i915_gem_tiling.c |   14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
> index 8e59bb5..140ef6b 100644
> --- a/drivers/gpu/drm/i915/i915_gem_tiling.c
> +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
> @@ -351,6 +351,20 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
>  	/* we have to maintain this existing ABI... */
>  	args->stride = obj->stride;
>  	args->tiling_mode = obj->tiling_mode;
> +
> +	/* Try to preallocate memory required to save swizzling on put-pages */
> +	if (dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17) {
> +		if (obj->tiling_mode) {

i915_gem_object_needs_bit17_swizzle not suitable?
-Daniel

> +			if (obj->bit_17 == NULL) {
> +				obj->bit_17 = kmalloc(BITS_TO_LONGS(obj->base.size >> PAGE_SHIFT) *
> +						      sizeof(long), GFP_KERNEL);
> +			}
> +		} else {
> +			kfree(obj->bit_17);
> +			obj->bit_17 = NULL;
> +		}
> +	}
> +
>  	drm_gem_object_unreference(&obj->base);
>  	mutex_unlock(&dev->struct_mutex);
>  
> -- 
> 1.7.10.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

Re: [PATCH] drm/i915: Reduce memory pressure during shrinker by preallocating swizzle pages

[Chris Wilson]

On Mon, 3 Dec 2012 18:29:30 +0100, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Mon, Dec 03, 2012 at 04:30:59PM +0000, Chris Wilson wrote:
> > On a machine with bit17 swizzling, we need to store the bit17 of the
> > physical page address in put-pages. This requires a memory allocation,
> > on average less than a page, which may be difficult to satisfy is the
> > request to put-pages is on behalf of the shrinker. We could allow that
> > allocation to pull from the reserved memory pools, but it seems much
> > safer to preallocate the array for tiled objects on affected machines.
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > ---
> >  drivers/gpu/drm/i915/i915_gem_tiling.c |   14 ++++++++++++++
> >  1 file changed, 14 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
> > index 8e59bb5..140ef6b 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_tiling.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
> > @@ -351,6 +351,20 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
> >  	/* we have to maintain this existing ABI... */
> >  	args->stride = obj->stride;
> >  	args->tiling_mode = obj->tiling_mode;
> > +
> > +	/* Try to preallocate memory required to save swizzling on put-pages */
> > +	if (dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17) {
> > +		if (obj->tiling_mode) {
> 
> i915_gem_object_needs_bit17_swizzle not suitable?

No, it takes the current obj->tiling_mode. Well, originally this was
using args->tiling_mode, but that fell by the wayside. Still I thought
it would be useful to be able to discard the memory allocated when we
release the tiling.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

Re: [PATCH] drm/i915: Reduce memory pressure during shrinker by preallocating swizzle pages

[Daniel Vetter]

On Mon, Dec 03, 2012 at 09:03:14PM +0000, Chris Wilson wrote:
> On a machine with bit17 swizzling, we need to store the bit17 of the
> physical page address in put-pages. This requires a memory allocation,
> on average less than a page, which may be difficult to satisfy is the
> request to put-pages is on behalf of the shrinker. We could allow that
> allocation to pull from the reserved memory pools, but it seems much
> safer to preallocate the array for tiled objects on affected machines.
> 
> v2: Export i915_gem_object_needs_bit17_swizzle() for reuse.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Missed this one here buried in another thread. Queued for -next, thanks
for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

[PATCH] drm/i915: Reduce memory pressure during shrinker by preallocating swizzle pages

[Chris Wilson]

On a machine with bit17 swizzling, we need to store the bit17 of the
physical page address in put-pages. This requires a memory allocation,
on average less than a page, which may be difficult to satisfy is the
request to put-pages is on behalf of the shrinker. We could allow that
allocation to pull from the reserved memory pools, but it seems much
safer to preallocate the array for tiled objects on affected machines.

v2: Export i915_gem_object_needs_bit17_swizzle() for reuse.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_drv.h        |   10 ++++++++++
 drivers/gpu/drm/i915/i915_gem.c        |    8 --------
 drivers/gpu/drm/i915/i915_gem_tiling.c |   12 ++++++++++++
 3 files changed, 22 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d4a3595..656775c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -30,6 +30,8 @@
 #ifndef _I915_DRV_H_
 #define _I915_DRV_H_
 
+#include <uapi/drm/i915_drm.h>
+
 #include "i915_reg.h"
 #include "intel_bios.h"
 #include "intel_ringbuffer.h"
@@ -1648,6 +1650,14 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
 void i915_gem_object_release_stolen(struct drm_i915_gem_object *obj);
 
 /* i915_gem_tiling.c */
+inline static bool i915_gem_object_needs_bit17_swizzle(struct drm_i915_gem_object *obj)
+{
+	drm_i915_private_t *dev_priv = obj->base.dev->dev_private;
+
+	return dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17 &&
+		obj->tiling_mode != I915_TILING_NONE;
+}
+
 void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);
 void i915_gem_object_do_bit_17_swizzle(struct drm_i915_gem_object *obj);
 void i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index b00e55f..569d40e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -261,14 +261,6 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data,
 			       args->size, &args->handle);
 }
 
-static int i915_gem_object_needs_bit17_swizzle(struct drm_i915_gem_object *obj)
-{
-	drm_i915_private_t *dev_priv = obj->base.dev->dev_private;
-
-	return dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17 &&
-		obj->tiling_mode != I915_TILING_NONE;
-}
-
 static inline int
 __copy_to_user_swizzled(char __user *cpu_vaddr,
 			const char *gpu_vaddr, int gpu_offset,
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 8e59bb5..78a7565 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -351,6 +351,18 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
 	/* we have to maintain this existing ABI... */
 	args->stride = obj->stride;
 	args->tiling_mode = obj->tiling_mode;
+
+	/* Try to preallocate memory required to save swizzling on put-pages */
+	if (i915_gem_object_needs_bit17_swizzle(obj)) {
+		if (obj->bit_17 == NULL) {
+			obj->bit_17 = kmalloc(BITS_TO_LONGS(obj->base.size >> PAGE_SHIFT) *
+					      sizeof(long), GFP_KERNEL);
+		}
+	} else {
+		kfree(obj->bit_17);
+		obj->bit_17 = NULL;
+	}
+
 	drm_gem_object_unreference(&obj->base);
 	mutex_unlock(&dev->struct_mutex);
 
-- 
1.7.10.4