[PATCH] drm/i915: Implement WaVSRefCountFullforceMissDisable

[PATCH] drm/i915: Implement WaVSRefCountFullforceMissDisable

[Ben Widawsky]

Implements WaVSRefCountFullforceMissDisable as documented in the BSpec
3D workarounds chapter.

Cc: Paulo Zanoni <przanoni@gmail.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_reg.h | 1 +
 drivers/gpu/drm/i915/intel_pm.c | 4 ++++
 2 files changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a18218c..0c89cf5 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -741,6 +741,7 @@
 #define   GEN7_FF_TS_SCHED_HS0		(0x3<<16)
 #define   GEN7_FF_TS_SCHED_LOAD_BALANCE	(0x1<<16)
 #define   GEN7_FF_TS_SCHED_HW		(0x0<<16) /* Default */
+#define   GEN7_FF_VS_REF_CNT_FFME	(1 << 15)
 #define   GEN7_FF_VS_SCHED_HS1		(0x5<<12)
 #define   GEN7_FF_VS_SCHED_HS0		(0x3<<12)
 #define   GEN7_FF_VS_SCHED_LOAD_BALANCE	(0x1<<12) /* Default */
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index c97714e..64d65f5 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3680,6 +3680,10 @@ static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv)
 	reg |= GEN7_FF_VS_SCHED_HW;
 	reg |= GEN7_FF_DS_SCHED_HW;
 
+	/* WaVSRefCountFullforceMissDisable */
+	if (IS_HASWELL(dev_priv->dev))
+		reg &= ~GEN7_FF_VS_REF_CNT_FFME;
+
 	I915_WRITE(GEN7_FF_THREAD_MODE, reg);
 }
 
-- 
1.8.1.1

Re: [PATCH] drm/i915: Implement WaVSRefCountFullforceMissDisable

[Ville Syrjälä]

On Sat, Jan 26, 2013 at 11:52:00AM -0800, Ben Widawsky wrote:
> Implements WaVSRefCountFullforceMissDisable as documented in the BSpec
> 3D workarounds chapter.
> 
> Cc: Paulo Zanoni <przanoni@gmail.com>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_reg.h | 1 +
>  drivers/gpu/drm/i915/intel_pm.c | 4 ++++
>  2 files changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index a18218c..0c89cf5 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -741,6 +741,7 @@
>  #define   GEN7_FF_TS_SCHED_HS0		(0x3<<16)
>  #define   GEN7_FF_TS_SCHED_LOAD_BALANCE	(0x1<<16)
>  #define   GEN7_FF_TS_SCHED_HW		(0x0<<16) /* Default */
> +#define   GEN7_FF_VS_REF_CNT_FFME	(1 << 15)
>  #define   GEN7_FF_VS_SCHED_HS1		(0x5<<12)
>  #define   GEN7_FF_VS_SCHED_HS0		(0x3<<12)
>  #define   GEN7_FF_VS_SCHED_LOAD_BALANCE	(0x1<<12) /* Default */
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index c97714e..64d65f5 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3680,6 +3680,10 @@ static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv)
>  	reg |= GEN7_FF_VS_SCHED_HW;
>  	reg |= GEN7_FF_DS_SCHED_HW;
>  
> +	/* WaVSRefCountFullforceMissDisable */
> +	if (IS_HASWELL(dev_priv->dev))
> +		reg &= ~GEN7_FF_VS_REF_CNT_FFME;
> +
>  	I915_WRITE(GEN7_FF_THREAD_MODE, reg);
>  }
>  
> -- 
> 1.8.1.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC

Re: [PATCH] drm/i915: Implement WaVSRefCountFullforceMissDisable

[Daniel Vetter]

On Mon, Jan 28, 2013 at 03:42:44PM +0200, Ville Syrjälä wrote:
> On Sat, Jan 26, 2013 at 11:52:00AM -0800, Ben Widawsky wrote:
> > Implements WaVSRefCountFullforceMissDisable as documented in the BSpec
> > 3D workarounds chapter.
> > 
> > Cc: Paulo Zanoni <przanoni@gmail.com>
> > Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch