* [Intel-gfx] [PATCH] drm/i915/guc: Update to GuC FW v40
@ 2020-01-15 2:40 John.C.Harrison
2020-01-15 3:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
` (11 more replies)
0 siblings, 12 replies; 18+ messages in thread
From: John.C.Harrison @ 2020-01-15 2:40 UTC (permalink / raw)
To: Intel-GFX
From: Matthew Brost <matthew.brost@intel.com>
The GuC major version has jumped from 35 to 40. This is because this
FW includes a significant re-write of the API that completely breaks
backwards compatibility for command submission. This patch is
sufficient to enable loading of the GuC and hence authentication of
the HuC. Support of command submission will follow in a much larger
patch series.
The changes required to load v40 FW are:
* An additional data structure and associated 'private_data' pointer
are now required to be setup by the driver. This is basically a
scratch area of memory that the GuC owns. The size is read from the
CSS header.
* A physical to logical engine mapping table is required to be
provided in the GuC additional data structure. This is initialized
with a 1 to 1 mapping.
* GUC_CTL_CTXINFO has been removed from the initialization params.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
CC: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 18 ------------
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 29 +++++++++++++++++++-
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 22 +++++++--------
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 21 ++++++++------
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 2 ++
drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h | 6 +++-
6 files changed, 57 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 5d00a3b2d914..e3ef742aac4a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -213,23 +213,6 @@ static u32 guc_ctl_feature_flags(struct intel_guc *guc)
return flags;
}
-static u32 guc_ctl_ctxinfo_flags(struct intel_guc *guc)
-{
- u32 flags = 0;
-
- if (intel_guc_is_submission_supported(guc)) {
- u32 ctxnum, base;
-
- base = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
- ctxnum = GUC_MAX_STAGE_DESCRIPTORS / 16;
-
- base >>= PAGE_SHIFT;
- flags |= (base << GUC_CTL_BASE_ADDR_SHIFT) |
- (ctxnum << GUC_CTL_CTXNUM_IN16_SHIFT);
- }
- return flags;
-}
-
static u32 guc_ctl_log_params_flags(struct intel_guc *guc)
{
u32 offset = intel_guc_ggtt_offset(guc, guc->log.vma) >> PAGE_SHIFT;
@@ -291,7 +274,6 @@ static void guc_init_params(struct intel_guc *guc)
BUILD_BUG_ON(sizeof(guc->params) != GUC_CTL_MAX_DWORDS * sizeof(u32));
- params[GUC_CTL_CTXINFO] = guc_ctl_ctxinfo_flags(guc);
params[GUC_CTL_LOG_PARAMS] = guc_ctl_log_params_flags(guc);
params[GUC_CTL_FEATURE] = guc_ctl_feature_flags(guc);
params[GUC_CTL_DEBUG] = guc_ctl_debug_flags(guc);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 101728006ae9..1d84cf1d8710 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -48,6 +48,20 @@ static void guc_ct_pool_entries_init(struct guc_ct_pool_entry *pool, u32 num)
memset(pool, 0, num * sizeof(*pool));
}
+static void guc_mapping_table_init(struct guc_gt_system_info *system_info)
+{
+ unsigned int i, j;
+
+ /*
+ * Initializing the physical to logical engine mapping table with a
+ * 1 to 1 mapping. This allows the firmware to load on all platforms as
+ * all engines are logical exposed to the user.
+ */
+ for (i = 0; i < GUC_MAX_ENGINE_CLASSES; ++i)
+ for (j = 0; j < GUC_MAX_INSTANCES_PER_CLASS; ++j)
+ system_info->mapping_table[i][j] = j;
+}
+
/*
* The first 80 dwords of the register state context, containing the
* execlists and ppgtt registers.
@@ -107,6 +121,8 @@ static void __guc_ads_init(struct intel_guc *guc)
blob->system_info.vebox_enable_mask = VEBOX_MASK(dev_priv);
blob->system_info.vdbox_sfc_support_mask = RUNTIME_INFO(dev_priv)->vdbox_sfc_access;
+ guc_mapping_table_init(&blob->system_info);
+
base = intel_guc_ggtt_offset(guc, guc->ads_vma);
/* Clients info */
@@ -123,6 +139,10 @@ static void __guc_ads_init(struct intel_guc *guc)
blob->ads.gt_system_info = base + ptr_offset(blob, system_info);
blob->ads.clients_info = base + ptr_offset(blob, clients_info);
+ /* Private Data */
+ blob->ads.private_data = base +
+ PAGE_ALIGN(sizeof(struct __guc_ads_blob));
+
i915_gem_object_flush_map(guc->ads_vma->obj);
}
@@ -135,11 +155,13 @@ static void __guc_ads_init(struct intel_guc *guc)
*/
int intel_guc_ads_create(struct intel_guc *guc)
{
- const u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
+ u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
int ret;
GEM_BUG_ON(guc->ads_vma);
+ size += PAGE_ALIGN(guc->fw.private_data_size);
+
ret = intel_guc_allocate_and_map_vma(guc, size, &guc->ads_vma,
(void **)&guc->ads_blob);
@@ -169,4 +191,9 @@ void intel_guc_ads_reset(struct intel_guc *guc)
if (!guc->ads_vma)
return;
__guc_ads_init(guc);
+
+ if (guc->fw.private_data_size)
+ memset((void *)guc->ads_blob +
+ PAGE_ALIGN(sizeof(struct __guc_ads_blob)), 0,
+ PAGE_ALIGN(guc->fw.private_data_size));
}
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index a6b733c146c9..0389fad4e61f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -62,12 +62,7 @@
#define GUC_STAGE_DESC_ATTR_PCH BIT(6)
#define GUC_STAGE_DESC_ATTR_TERMINATED BIT(7)
-/* New GuC control data */
-#define GUC_CTL_CTXINFO 0
-#define GUC_CTL_CTXNUM_IN16_SHIFT 0
-#define GUC_CTL_BASE_ADDR_SHIFT 12
-
-#define GUC_CTL_LOG_PARAMS 1
+#define GUC_CTL_LOG_PARAMS 0
#define GUC_LOG_VALID (1 << 0)
#define GUC_LOG_NOTIFY_ON_HALF_FULL (1 << 1)
#define GUC_LOG_ALLOC_IN_MEGABYTE (1 << 3)
@@ -79,11 +74,11 @@
#define GUC_LOG_ISR_MASK (0x7 << GUC_LOG_ISR_SHIFT)
#define GUC_LOG_BUF_ADDR_SHIFT 12
-#define GUC_CTL_WA 2
-#define GUC_CTL_FEATURE 3
+#define GUC_CTL_WA 1
+#define GUC_CTL_FEATURE 2
#define GUC_CTL_DISABLE_SCHEDULER (1 << 14)
-#define GUC_CTL_DEBUG 4
+#define GUC_CTL_DEBUG 3
#define GUC_LOG_VERBOSITY_SHIFT 0
#define GUC_LOG_VERBOSITY_LOW (0 << GUC_LOG_VERBOSITY_SHIFT)
#define GUC_LOG_VERBOSITY_MED (1 << GUC_LOG_VERBOSITY_SHIFT)
@@ -97,7 +92,7 @@
#define GUC_LOG_DISABLED (1 << 6)
#define GUC_PROFILE_ENABLED (1 << 7)
-#define GUC_CTL_ADS 5
+#define GUC_CTL_ADS 4
#define GUC_ADS_ADDR_SHIFT 1
#define GUC_ADS_ADDR_MASK (0xFFFFF << GUC_ADS_ADDR_SHIFT)
@@ -369,7 +364,9 @@ struct guc_gt_system_info {
u32 vdbox_enable_mask;
u32 vdbox_sfc_support_mask;
u32 vebox_enable_mask;
- u32 reserved[9];
+ u32 reserved1;
+ u8 mapping_table[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
+ u32 reserved2[8];
} __packed;
/* Clients info */
@@ -398,7 +395,8 @@ struct guc_ads {
u32 control_data;
u32 golden_context_lrca[GUC_MAX_ENGINE_CLASSES];
u32 eng_state_size[GUC_MAX_ENGINE_CLASSES];
- u32 reserved[16];
+ u32 private_data;
+ u32 reserved[15];
} __packed;
/* GuC logging structures */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 8ee0a0c7f447..791edd6db6bc 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -43,15 +43,15 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
* features.
*/
#define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
- fw_def(TIGERLAKE, 0, guc_def(tgl, 35, 2, 0), huc_def(tgl, 7, 0, 3)) \
- fw_def(ELKHARTLAKE, 0, guc_def(ehl, 33, 0, 4), huc_def(ehl, 9, 0, 0)) \
- fw_def(ICELAKE, 0, guc_def(icl, 33, 0, 0), huc_def(icl, 9, 0, 0)) \
- fw_def(COFFEELAKE, 5, guc_def(cml, 33, 0, 0), huc_def(cml, 4, 0, 0)) \
- fw_def(COFFEELAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4, 0, 0)) \
- fw_def(GEMINILAKE, 0, guc_def(glk, 33, 0, 0), huc_def(glk, 4, 0, 0)) \
- fw_def(KABYLAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4, 0, 0)) \
- fw_def(BROXTON, 0, guc_def(bxt, 33, 0, 0), huc_def(bxt, 2, 0, 0)) \
- fw_def(SKYLAKE, 0, guc_def(skl, 33, 0, 0), huc_def(skl, 2, 0, 0))
+ fw_def(TIGERLAKE, 0, guc_def(tgl, 40, 0, 0), huc_def(tgl, 7, 0, 3)) \
+ fw_def(ELKHARTLAKE, 0, guc_def(ehl, 40, 0, 0), huc_def(ehl, 9, 0, 0)) \
+ fw_def(ICELAKE, 0, guc_def(icl, 40, 0, 0), huc_def(icl, 9, 0, 0)) \
+ fw_def(COFFEELAKE, 5, guc_def(cml, 40, 0, 0), huc_def(cml, 4, 0, 0)) \
+ fw_def(COFFEELAKE, 0, guc_def(kbl, 40, 0, 0), huc_def(kbl, 4, 0, 0)) \
+ fw_def(GEMINILAKE, 0, guc_def(glk, 40, 0, 0), huc_def(glk, 4, 0, 0)) \
+ fw_def(KABYLAKE, 0, guc_def(kbl, 40, 0, 0), huc_def(kbl, 4, 0, 0)) \
+ fw_def(BROXTON, 0, guc_def(bxt, 40, 0, 0), huc_def(bxt, 2, 0, 0)) \
+ fw_def(SKYLAKE, 0, guc_def(skl, 40, 0, 0), huc_def(skl, 2, 0, 0))
#define __MAKE_UC_FW_PATH(prefix_, name_, major_, minor_, patch_) \
"i915/" \
@@ -362,6 +362,9 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw)
}
}
+ if (uc_fw->type == INTEL_UC_FW_TYPE_GUC)
+ uc_fw->private_data_size = css->private_data_size;
+
obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size);
if (IS_ERR(obj)) {
err = PTR_ERR(obj);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
index 1f30543d0d2d..7e6a21847660 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
@@ -84,6 +84,8 @@ struct intel_uc_fw {
u32 rsa_size;
u32 ucode_size;
+
+ u32 private_data_size;
};
#ifdef CONFIG_DRM_I915_DEBUG_GUC
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
index 029214cdedd5..e41ffc7a7fbc 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
@@ -69,7 +69,11 @@ struct uc_css_header {
#define CSS_SW_VERSION_UC_MAJOR (0xFF << 16)
#define CSS_SW_VERSION_UC_MINOR (0xFF << 8)
#define CSS_SW_VERSION_UC_PATCH (0xFF << 0)
- u32 reserved[14];
+ u32 reserved0[13];
+ union {
+ u32 private_data_size; /* only applies to GuC */
+ u32 reserved1;
+ };
u32 header_info;
} __packed;
static_assert(sizeof(struct uc_css_header) == 128);
--
2.21.0.5.gaeb582a983
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Update to GuC FW v40
2020-01-15 2:40 [Intel-gfx] [PATCH] drm/i915/guc: Update to GuC FW v40 John.C.Harrison
@ 2020-01-15 3:24 ` Patchwork
2020-01-15 3:24 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
` (10 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2020-01-15 3:24 UTC (permalink / raw)
To: John.C.Harrison; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/guc: Update to GuC FW v40
URL : https://patchwork.freedesktop.org/series/72032/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7746 -> Patchwork_16104
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/index.html
Known issues
------------
Here are the changes found in Patchwork_16104 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_module_load@reload-with-fault-injection:
- fi-skl-6700k2: [PASS][1] -> [DMESG-WARN][2] ([i915#889])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/fi-skl-6700k2/igt@i915_module_load@reload-with-fault-injection.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/fi-skl-6700k2/igt@i915_module_load@reload-with-fault-injection.html
- fi-kbl-x1275: [PASS][3] -> [INCOMPLETE][4] ([i915#879])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/fi-kbl-x1275/igt@i915_module_load@reload-with-fault-injection.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/fi-kbl-x1275/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pm_rpm@module-reload:
- fi-skl-6700k2: [PASS][5] -> [INCOMPLETE][6] ([i915#151])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/fi-skl-6700k2/igt@i915_pm_rpm@module-reload.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/fi-skl-6700k2/igt@i915_pm_rpm@module-reload.html
- fi-skl-lmem: [PASS][7] -> [DMESG-WARN][8] ([i915#889]) +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/fi-skl-lmem/igt@i915_pm_rpm@module-reload.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/fi-skl-lmem/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live_execlists:
- fi-kbl-soraka: [PASS][9] -> [DMESG-FAIL][10] ([i915#656])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
* igt@i915_selftest@live_sanitycheck:
- fi-skl-lmem: [PASS][11] -> [INCOMPLETE][12] ([i915#198])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/fi-skl-lmem/igt@i915_selftest@live_sanitycheck.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/fi-skl-lmem/igt@i915_selftest@live_sanitycheck.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][13] -> [FAIL][14] ([fdo#111096] / [i915#323])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
#### Possible fixes ####
* igt@gem_close_race@basic-threads:
- fi-byt-n2820: [TIMEOUT][15] ([fdo#112271] / [i915#816]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/fi-byt-n2820/igt@gem_close_race@basic-threads.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/fi-byt-n2820/igt@gem_close_race@basic-threads.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770: [DMESG-FAIL][17] ([i915#770]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/fi-hsw-4770/igt@i915_selftest@live_blt.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/fi-hsw-4770/igt@i915_selftest@live_blt.html
* igt@kms_chamelium@hdmi-crc-fast:
- fi-icl-u2: [FAIL][19] ([fdo#109635]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/fi-icl-u2/igt@kms_chamelium@hdmi-crc-fast.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/fi-icl-u2/igt@kms_chamelium@hdmi-crc-fast.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109635]: https://bugs.freedesktop.org/show_bug.cgi?id=109635
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
[i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
[i915#770]: https://gitlab.freedesktop.org/drm/intel/issues/770
[i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
[i915#879]: https://gitlab.freedesktop.org/drm/intel/issues/879
[i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889
[i915#937]: https://gitlab.freedesktop.org/drm/intel/issues/937
Participating hosts (42 -> 44)
------------------------------
Additional (9): fi-glk-dsi fi-bsw-kefka fi-elk-e7500 fi-pnv-d510 fi-icl-y fi-icl-guc fi-icl-dsi fi-bsw-nick fi-snb-2600
Missing (7): fi-hsw-4770r fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-tgl-y
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7746 -> Patchwork_16104
CI-20190529: 20190529
CI_DRM_7746: 84d16aa256204bccaaf382504a69fe0822e67ba0 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5365: e9ec0ed63b25c86861ffac3c8601cc4d1b910b65 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16104: de48c2fe7caafa728dea69252f8ee998131c43eb @ git://anongit.freedesktop.org/gfx-ci/linux
== Kernel 32bit build ==
Warning: Kernel 32bit buildtest failed:
https://intel-gfx-ci.01.org/Patchwork_16104/build_32bit.log
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready (#1)
Building modules, stage 2.
MODPOST 122 modules
ERROR: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
scripts/Makefile.modpost:93: recipe for target '__modpost' failed
make[1]: *** [__modpost] Error 1
Makefile:1282: recipe for target 'modules' failed
make: *** [modules] Error 2
== Linux commits ==
de48c2fe7caa drm/i915/guc: Update to GuC FW v40
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915/guc: Update to GuC FW v40
2020-01-15 2:40 [Intel-gfx] [PATCH] drm/i915/guc: Update to GuC FW v40 John.C.Harrison
2020-01-15 3:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
@ 2020-01-15 3:24 ` Patchwork
2020-01-15 19:45 ` [Intel-gfx] [PATCH] " Daniele Ceraolo Spurio
` (9 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2020-01-15 3:24 UTC (permalink / raw)
To: John.C.Harrison; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/guc: Update to GuC FW v40
URL : https://patchwork.freedesktop.org/series/72032/
State : warning
== Summary ==
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready (#1)
Building modules, stage 2.
MODPOST 122 modules
ERROR: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
scripts/Makefile.modpost:93: recipe for target '__modpost' failed
make[1]: *** [__modpost] Error 1
Makefile:1282: recipe for target 'modules' failed
make: *** [modules] Error 2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/build_32bit.log
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/guc: Update to GuC FW v40
2020-01-15 2:40 [Intel-gfx] [PATCH] drm/i915/guc: Update to GuC FW v40 John.C.Harrison
2020-01-15 3:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-01-15 3:24 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
@ 2020-01-15 19:45 ` Daniele Ceraolo Spurio
2020-01-15 19:49 ` John Harrison
2020-01-15 20:37 ` [Intel-gfx] [PATCH v2] " John.C.Harrison
` (8 subsequent siblings)
11 siblings, 1 reply; 18+ messages in thread
From: Daniele Ceraolo Spurio @ 2020-01-15 19:45 UTC (permalink / raw)
To: John.C.Harrison, Intel-GFX
On 1/14/20 6:40 PM, John.C.Harrison@Intel.com wrote:
> From: Matthew Brost <matthew.brost@intel.com>
>
> The GuC major version has jumped from 35 to 40. This is because this
> FW includes a significant re-write of the API that completely breaks
> backwards compatibility for command submission. This patch is
> sufficient to enable loading of the GuC and hence authentication of
> the HuC. Support of command submission will follow in a much larger
> patch series.
>
> The changes required to load v40 FW are:
> * An additional data structure and associated 'private_data' pointer
> are now required to be setup by the driver. This is basically a
> scratch area of memory that the GuC owns. The size is read from the
> CSS header.
>
> * A physical to logical engine mapping table is required to be
> provided in the GuC additional data structure. This is initialized
> with a 1 to 1 mapping.
>
> * GUC_CTL_CTXINFO has been removed from the initialization params.
>
You're missing the removal of ads.reg_state_buffer, which is several
page of memory we can now save. Michal has floated a patch for that
internally.
Daniele
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> CC: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 18 ------------
> drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 29 +++++++++++++++++++-
> drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 22 +++++++--------
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 21 ++++++++------
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 2 ++
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h | 6 +++-
> 6 files changed, 57 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 5d00a3b2d914..e3ef742aac4a 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -213,23 +213,6 @@ static u32 guc_ctl_feature_flags(struct intel_guc *guc)
> return flags;
> }
>
> -static u32 guc_ctl_ctxinfo_flags(struct intel_guc *guc)
> -{
> - u32 flags = 0;
> -
> - if (intel_guc_is_submission_supported(guc)) {
> - u32 ctxnum, base;
> -
> - base = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
> - ctxnum = GUC_MAX_STAGE_DESCRIPTORS / 16;
> -
> - base >>= PAGE_SHIFT;
> - flags |= (base << GUC_CTL_BASE_ADDR_SHIFT) |
> - (ctxnum << GUC_CTL_CTXNUM_IN16_SHIFT);
> - }
> - return flags;
> -}
> -
> static u32 guc_ctl_log_params_flags(struct intel_guc *guc)
> {
> u32 offset = intel_guc_ggtt_offset(guc, guc->log.vma) >> PAGE_SHIFT;
> @@ -291,7 +274,6 @@ static void guc_init_params(struct intel_guc *guc)
>
> BUILD_BUG_ON(sizeof(guc->params) != GUC_CTL_MAX_DWORDS * sizeof(u32));
>
> - params[GUC_CTL_CTXINFO] = guc_ctl_ctxinfo_flags(guc);
> params[GUC_CTL_LOG_PARAMS] = guc_ctl_log_params_flags(guc);
> params[GUC_CTL_FEATURE] = guc_ctl_feature_flags(guc);
> params[GUC_CTL_DEBUG] = guc_ctl_debug_flags(guc);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> index 101728006ae9..1d84cf1d8710 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> @@ -48,6 +48,20 @@ static void guc_ct_pool_entries_init(struct guc_ct_pool_entry *pool, u32 num)
> memset(pool, 0, num * sizeof(*pool));
> }
>
> +static void guc_mapping_table_init(struct guc_gt_system_info *system_info)
> +{
> + unsigned int i, j;
> +
> + /*
> + * Initializing the physical to logical engine mapping table with a
> + * 1 to 1 mapping. This allows the firmware to load on all platforms as
> + * all engines are logical exposed to the user.
> + */
> + for (i = 0; i < GUC_MAX_ENGINE_CLASSES; ++i)
> + for (j = 0; j < GUC_MAX_INSTANCES_PER_CLASS; ++j)
> + system_info->mapping_table[i][j] = j;
> +}
> +
> /*
> * The first 80 dwords of the register state context, containing the
> * execlists and ppgtt registers.
> @@ -107,6 +121,8 @@ static void __guc_ads_init(struct intel_guc *guc)
> blob->system_info.vebox_enable_mask = VEBOX_MASK(dev_priv);
> blob->system_info.vdbox_sfc_support_mask = RUNTIME_INFO(dev_priv)->vdbox_sfc_access;
>
> + guc_mapping_table_init(&blob->system_info);
> +
> base = intel_guc_ggtt_offset(guc, guc->ads_vma);
>
> /* Clients info */
> @@ -123,6 +139,10 @@ static void __guc_ads_init(struct intel_guc *guc)
> blob->ads.gt_system_info = base + ptr_offset(blob, system_info);
> blob->ads.clients_info = base + ptr_offset(blob, clients_info);
>
> + /* Private Data */
> + blob->ads.private_data = base +
> + PAGE_ALIGN(sizeof(struct __guc_ads_blob));
> +
> i915_gem_object_flush_map(guc->ads_vma->obj);
> }
>
> @@ -135,11 +155,13 @@ static void __guc_ads_init(struct intel_guc *guc)
> */
> int intel_guc_ads_create(struct intel_guc *guc)
> {
> - const u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
> + u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
> int ret;
>
> GEM_BUG_ON(guc->ads_vma);
>
> + size += PAGE_ALIGN(guc->fw.private_data_size);
> +
> ret = intel_guc_allocate_and_map_vma(guc, size, &guc->ads_vma,
> (void **)&guc->ads_blob);
>
> @@ -169,4 +191,9 @@ void intel_guc_ads_reset(struct intel_guc *guc)
> if (!guc->ads_vma)
> return;
> __guc_ads_init(guc);
> +
> + if (guc->fw.private_data_size)
> + memset((void *)guc->ads_blob +
> + PAGE_ALIGN(sizeof(struct __guc_ads_blob)), 0,
> + PAGE_ALIGN(guc->fw.private_data_size));
> }
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> index a6b733c146c9..0389fad4e61f 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> @@ -62,12 +62,7 @@
> #define GUC_STAGE_DESC_ATTR_PCH BIT(6)
> #define GUC_STAGE_DESC_ATTR_TERMINATED BIT(7)
>
> -/* New GuC control data */
> -#define GUC_CTL_CTXINFO 0
> -#define GUC_CTL_CTXNUM_IN16_SHIFT 0
> -#define GUC_CTL_BASE_ADDR_SHIFT 12
> -
> -#define GUC_CTL_LOG_PARAMS 1
> +#define GUC_CTL_LOG_PARAMS 0
> #define GUC_LOG_VALID (1 << 0)
> #define GUC_LOG_NOTIFY_ON_HALF_FULL (1 << 1)
> #define GUC_LOG_ALLOC_IN_MEGABYTE (1 << 3)
> @@ -79,11 +74,11 @@
> #define GUC_LOG_ISR_MASK (0x7 << GUC_LOG_ISR_SHIFT)
> #define GUC_LOG_BUF_ADDR_SHIFT 12
>
> -#define GUC_CTL_WA 2
> -#define GUC_CTL_FEATURE 3
> +#define GUC_CTL_WA 1
> +#define GUC_CTL_FEATURE 2
> #define GUC_CTL_DISABLE_SCHEDULER (1 << 14)
>
> -#define GUC_CTL_DEBUG 4
> +#define GUC_CTL_DEBUG 3
> #define GUC_LOG_VERBOSITY_SHIFT 0
> #define GUC_LOG_VERBOSITY_LOW (0 << GUC_LOG_VERBOSITY_SHIFT)
> #define GUC_LOG_VERBOSITY_MED (1 << GUC_LOG_VERBOSITY_SHIFT)
> @@ -97,7 +92,7 @@
> #define GUC_LOG_DISABLED (1 << 6)
> #define GUC_PROFILE_ENABLED (1 << 7)
>
> -#define GUC_CTL_ADS 5
> +#define GUC_CTL_ADS 4
> #define GUC_ADS_ADDR_SHIFT 1
> #define GUC_ADS_ADDR_MASK (0xFFFFF << GUC_ADS_ADDR_SHIFT)
>
> @@ -369,7 +364,9 @@ struct guc_gt_system_info {
> u32 vdbox_enable_mask;
> u32 vdbox_sfc_support_mask;
> u32 vebox_enable_mask;
> - u32 reserved[9];
> + u32 reserved1;
> + u8 mapping_table[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
> + u32 reserved2[8];
> } __packed;
>
> /* Clients info */
> @@ -398,7 +395,8 @@ struct guc_ads {
> u32 control_data;
> u32 golden_context_lrca[GUC_MAX_ENGINE_CLASSES];
> u32 eng_state_size[GUC_MAX_ENGINE_CLASSES];
> - u32 reserved[16];
> + u32 private_data;
> + u32 reserved[15];
> } __packed;
>
> /* GuC logging structures */
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index 8ee0a0c7f447..791edd6db6bc 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -43,15 +43,15 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
> * features.
> */
> #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
> - fw_def(TIGERLAKE, 0, guc_def(tgl, 35, 2, 0), huc_def(tgl, 7, 0, 3)) \
> - fw_def(ELKHARTLAKE, 0, guc_def(ehl, 33, 0, 4), huc_def(ehl, 9, 0, 0)) \
> - fw_def(ICELAKE, 0, guc_def(icl, 33, 0, 0), huc_def(icl, 9, 0, 0)) \
> - fw_def(COFFEELAKE, 5, guc_def(cml, 33, 0, 0), huc_def(cml, 4, 0, 0)) \
> - fw_def(COFFEELAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4, 0, 0)) \
> - fw_def(GEMINILAKE, 0, guc_def(glk, 33, 0, 0), huc_def(glk, 4, 0, 0)) \
> - fw_def(KABYLAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4, 0, 0)) \
> - fw_def(BROXTON, 0, guc_def(bxt, 33, 0, 0), huc_def(bxt, 2, 0, 0)) \
> - fw_def(SKYLAKE, 0, guc_def(skl, 33, 0, 0), huc_def(skl, 2, 0, 0))
> + fw_def(TIGERLAKE, 0, guc_def(tgl, 40, 0, 0), huc_def(tgl, 7, 0, 3)) \
> + fw_def(ELKHARTLAKE, 0, guc_def(ehl, 40, 0, 0), huc_def(ehl, 9, 0, 0)) \
> + fw_def(ICELAKE, 0, guc_def(icl, 40, 0, 0), huc_def(icl, 9, 0, 0)) \
> + fw_def(COFFEELAKE, 5, guc_def(cml, 40, 0, 0), huc_def(cml, 4, 0, 0)) \
> + fw_def(COFFEELAKE, 0, guc_def(kbl, 40, 0, 0), huc_def(kbl, 4, 0, 0)) \
> + fw_def(GEMINILAKE, 0, guc_def(glk, 40, 0, 0), huc_def(glk, 4, 0, 0)) \
> + fw_def(KABYLAKE, 0, guc_def(kbl, 40, 0, 0), huc_def(kbl, 4, 0, 0)) \
> + fw_def(BROXTON, 0, guc_def(bxt, 40, 0, 0), huc_def(bxt, 2, 0, 0)) \
> + fw_def(SKYLAKE, 0, guc_def(skl, 40, 0, 0), huc_def(skl, 2, 0, 0))
>
> #define __MAKE_UC_FW_PATH(prefix_, name_, major_, minor_, patch_) \
> "i915/" \
> @@ -362,6 +362,9 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw)
> }
> }
>
> + if (uc_fw->type == INTEL_UC_FW_TYPE_GUC)
> + uc_fw->private_data_size = css->private_data_size;
> +
> obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size);
> if (IS_ERR(obj)) {
> err = PTR_ERR(obj);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
> index 1f30543d0d2d..7e6a21847660 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
> @@ -84,6 +84,8 @@ struct intel_uc_fw {
>
> u32 rsa_size;
> u32 ucode_size;
> +
> + u32 private_data_size;
> };
>
> #ifdef CONFIG_DRM_I915_DEBUG_GUC
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
> index 029214cdedd5..e41ffc7a7fbc 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
> @@ -69,7 +69,11 @@ struct uc_css_header {
> #define CSS_SW_VERSION_UC_MAJOR (0xFF << 16)
> #define CSS_SW_VERSION_UC_MINOR (0xFF << 8)
> #define CSS_SW_VERSION_UC_PATCH (0xFF << 0)
> - u32 reserved[14];
> + u32 reserved0[13];
> + union {
> + u32 private_data_size; /* only applies to GuC */
> + u32 reserved1;
> + };
> u32 header_info;
> } __packed;
> static_assert(sizeof(struct uc_css_header) == 128);
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/guc: Update to GuC FW v40
2020-01-15 19:45 ` [Intel-gfx] [PATCH] " Daniele Ceraolo Spurio
@ 2020-01-15 19:49 ` John Harrison
0 siblings, 0 replies; 18+ messages in thread
From: John Harrison @ 2020-01-15 19:49 UTC (permalink / raw)
To: Daniele Ceraolo Spurio, Intel-GFX
On 1/15/2020 11:45, Daniele Ceraolo Spurio wrote:
> On 1/14/20 6:40 PM, John.C.Harrison@Intel.com wrote:
>> From: Matthew Brost <matthew.brost@intel.com>
>>
>> The GuC major version has jumped from 35 to 40. This is because this
>> FW includes a significant re-write of the API that completely breaks
>> backwards compatibility for command submission. This patch is
>> sufficient to enable loading of the GuC and hence authentication of
>> the HuC. Support of command submission will follow in a much larger
>> patch series.
>>
>> The changes required to load v40 FW are:
>> * An additional data structure and associated 'private_data' pointer
>> are now required to be setup by the driver. This is basically a
>> scratch area of memory that the GuC owns. The size is read from the
>> CSS header.
>>
>> * A physical to logical engine mapping table is required to be
>> provided in the GuC additional data structure. This is initialized
>> with a 1 to 1 mapping.
>>
>> * GUC_CTL_CTXINFO has been removed from the initialization params.
>>
>
> You're missing the removal of ads.reg_state_buffer, which is several
> page of memory we can now save. Michal has floated a patch for that
> internally.
>
> Daniele
>
Yes, I just noticed that a little earlier. Already in the process of
squashing it in.
John.
_______________________________________________
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^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH v2] drm/i915/guc: Update to GuC FW v40
2020-01-15 2:40 [Intel-gfx] [PATCH] drm/i915/guc: Update to GuC FW v40 John.C.Harrison
` (2 preceding siblings ...)
2020-01-15 19:45 ` [Intel-gfx] [PATCH] " Daniele Ceraolo Spurio
@ 2020-01-15 20:37 ` John.C.Harrison
2020-01-21 18:29 ` Daniele Ceraolo Spurio
2020-01-15 21:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Update to GuC FW v40 (rev2) Patchwork
` (7 subsequent siblings)
11 siblings, 1 reply; 18+ messages in thread
From: John.C.Harrison @ 2020-01-15 20:37 UTC (permalink / raw)
To: Intel-GFX
From: Michal Wajdeczko <michal.wajdeczko@intel.com>
The GuC major version has jumped from 35 to 40. This is because this
FW includes a significant re-write of the API that completely breaks
backwards compatibility for command submission. This patch is
sufficient to enable loading of the GuC and hence authentication of
the HuC. Support of command submission will follow in a much larger
patch series.
The changes required to load v40 FW are:
* An additional data structure and associated 'private_data' pointer
are now required to be setup by the driver. This is basically a
scratch area of memory that the GuC owns. The size is read from the
CSS header.
* A physical to logical engine mapping table is required to be
provided in the GuC additional data structure. This is initialized
with a 1 to 1 mapping.
* GUC_CTL_CTXINFO has been removed from the initialization params.
* The reg_state_buffer has been removed from the GuC ADS.
v2: Folded in removal of reg_state_buffer from Michal.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
CC: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 18 ------------
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 31 ++++++++++++++++++--
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 24 +++++++--------
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 21 +++++++------
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 2 ++
drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h | 6 +++-
6 files changed, 58 insertions(+), 44 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 5d00a3b2d914..e3ef742aac4a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -213,23 +213,6 @@ static u32 guc_ctl_feature_flags(struct intel_guc *guc)
return flags;
}
-static u32 guc_ctl_ctxinfo_flags(struct intel_guc *guc)
-{
- u32 flags = 0;
-
- if (intel_guc_is_submission_supported(guc)) {
- u32 ctxnum, base;
-
- base = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
- ctxnum = GUC_MAX_STAGE_DESCRIPTORS / 16;
-
- base >>= PAGE_SHIFT;
- flags |= (base << GUC_CTL_BASE_ADDR_SHIFT) |
- (ctxnum << GUC_CTL_CTXNUM_IN16_SHIFT);
- }
- return flags;
-}
-
static u32 guc_ctl_log_params_flags(struct intel_guc *guc)
{
u32 offset = intel_guc_ggtt_offset(guc, guc->log.vma) >> PAGE_SHIFT;
@@ -291,7 +274,6 @@ static void guc_init_params(struct intel_guc *guc)
BUILD_BUG_ON(sizeof(guc->params) != GUC_CTL_MAX_DWORDS * sizeof(u32));
- params[GUC_CTL_CTXINFO] = guc_ctl_ctxinfo_flags(guc);
params[GUC_CTL_LOG_PARAMS] = guc_ctl_log_params_flags(guc);
params[GUC_CTL_FEATURE] = guc_ctl_feature_flags(guc);
params[GUC_CTL_DEBUG] = guc_ctl_debug_flags(guc);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 101728006ae9..ba4cf89e6338 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -48,6 +48,20 @@ static void guc_ct_pool_entries_init(struct guc_ct_pool_entry *pool, u32 num)
memset(pool, 0, num * sizeof(*pool));
}
+static void guc_mapping_table_init(struct guc_gt_system_info *system_info)
+{
+ unsigned int i, j;
+
+ /*
+ * Initializing the physical to logical engine mapping table with a
+ * 1 to 1 mapping. This allows the firmware to load on all platforms as
+ * all engines are logical exposed to the user.
+ */
+ for (i = 0; i < GUC_MAX_ENGINE_CLASSES; ++i)
+ for (j = 0; j < GUC_MAX_INSTANCES_PER_CLASS; ++j)
+ system_info->mapping_table[i][j] = j;
+}
+
/*
* The first 80 dwords of the register state context, containing the
* execlists and ppgtt registers.
@@ -62,7 +76,6 @@ struct __guc_ads_blob {
struct guc_gt_system_info system_info;
struct guc_clients_info clients_info;
struct guc_ct_pool_entry ct_pool[GUC_CT_POOL_SIZE];
- u8 reg_state_buffer[GUC_S3_SAVE_SPACE_PAGES * PAGE_SIZE];
} __packed;
static void __guc_ads_init(struct intel_guc *guc)
@@ -107,6 +120,8 @@ static void __guc_ads_init(struct intel_guc *guc)
blob->system_info.vebox_enable_mask = VEBOX_MASK(dev_priv);
blob->system_info.vdbox_sfc_support_mask = RUNTIME_INFO(dev_priv)->vdbox_sfc_access;
+ guc_mapping_table_init(&blob->system_info);
+
base = intel_guc_ggtt_offset(guc, guc->ads_vma);
/* Clients info */
@@ -118,11 +133,14 @@ static void __guc_ads_init(struct intel_guc *guc)
/* ADS */
blob->ads.scheduler_policies = base + ptr_offset(blob, policies);
- blob->ads.reg_state_buffer = base + ptr_offset(blob, reg_state_buffer);
blob->ads.reg_state_addr = base + ptr_offset(blob, reg_state);
blob->ads.gt_system_info = base + ptr_offset(blob, system_info);
blob->ads.clients_info = base + ptr_offset(blob, clients_info);
+ /* Private Data */
+ blob->ads.private_data = base +
+ PAGE_ALIGN(sizeof(struct __guc_ads_blob));
+
i915_gem_object_flush_map(guc->ads_vma->obj);
}
@@ -135,11 +153,13 @@ static void __guc_ads_init(struct intel_guc *guc)
*/
int intel_guc_ads_create(struct intel_guc *guc)
{
- const u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
+ u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
int ret;
GEM_BUG_ON(guc->ads_vma);
+ size += PAGE_ALIGN(guc->fw.private_data_size);
+
ret = intel_guc_allocate_and_map_vma(guc, size, &guc->ads_vma,
(void **)&guc->ads_blob);
@@ -169,4 +189,9 @@ void intel_guc_ads_reset(struct intel_guc *guc)
if (!guc->ads_vma)
return;
__guc_ads_init(guc);
+
+ if (guc->fw.private_data_size)
+ memset((void *)guc->ads_blob +
+ PAGE_ALIGN(sizeof(struct __guc_ads_blob)), 0,
+ PAGE_ALIGN(guc->fw.private_data_size));
}
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index a6b733c146c9..48f77b67de8f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -62,12 +62,7 @@
#define GUC_STAGE_DESC_ATTR_PCH BIT(6)
#define GUC_STAGE_DESC_ATTR_TERMINATED BIT(7)
-/* New GuC control data */
-#define GUC_CTL_CTXINFO 0
-#define GUC_CTL_CTXNUM_IN16_SHIFT 0
-#define GUC_CTL_BASE_ADDR_SHIFT 12
-
-#define GUC_CTL_LOG_PARAMS 1
+#define GUC_CTL_LOG_PARAMS 0
#define GUC_LOG_VALID (1 << 0)
#define GUC_LOG_NOTIFY_ON_HALF_FULL (1 << 1)
#define GUC_LOG_ALLOC_IN_MEGABYTE (1 << 3)
@@ -79,11 +74,11 @@
#define GUC_LOG_ISR_MASK (0x7 << GUC_LOG_ISR_SHIFT)
#define GUC_LOG_BUF_ADDR_SHIFT 12
-#define GUC_CTL_WA 2
-#define GUC_CTL_FEATURE 3
+#define GUC_CTL_WA 1
+#define GUC_CTL_FEATURE 2
#define GUC_CTL_DISABLE_SCHEDULER (1 << 14)
-#define GUC_CTL_DEBUG 4
+#define GUC_CTL_DEBUG 3
#define GUC_LOG_VERBOSITY_SHIFT 0
#define GUC_LOG_VERBOSITY_LOW (0 << GUC_LOG_VERBOSITY_SHIFT)
#define GUC_LOG_VERBOSITY_MED (1 << GUC_LOG_VERBOSITY_SHIFT)
@@ -97,7 +92,7 @@
#define GUC_LOG_DISABLED (1 << 6)
#define GUC_PROFILE_ENABLED (1 << 7)
-#define GUC_CTL_ADS 5
+#define GUC_CTL_ADS 4
#define GUC_ADS_ADDR_SHIFT 1
#define GUC_ADS_ADDR_MASK (0xFFFFF << GUC_ADS_ADDR_SHIFT)
@@ -369,7 +364,9 @@ struct guc_gt_system_info {
u32 vdbox_enable_mask;
u32 vdbox_sfc_support_mask;
u32 vebox_enable_mask;
- u32 reserved[9];
+ u32 reserved1;
+ u8 mapping_table[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
+ u32 reserved2[8];
} __packed;
/* Clients info */
@@ -391,14 +388,15 @@ struct guc_clients_info {
/* GuC Additional Data Struct */
struct guc_ads {
u32 reg_state_addr;
- u32 reg_state_buffer;
+ u32 reserved0;
u32 scheduler_policies;
u32 gt_system_info;
u32 clients_info;
u32 control_data;
u32 golden_context_lrca[GUC_MAX_ENGINE_CLASSES];
u32 eng_state_size[GUC_MAX_ENGINE_CLASSES];
- u32 reserved[16];
+ u32 private_data;
+ u32 reserved[15];
} __packed;
/* GuC logging structures */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 8ee0a0c7f447..791edd6db6bc 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -43,15 +43,15 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
* features.
*/
#define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
- fw_def(TIGERLAKE, 0, guc_def(tgl, 35, 2, 0), huc_def(tgl, 7, 0, 3)) \
- fw_def(ELKHARTLAKE, 0, guc_def(ehl, 33, 0, 4), huc_def(ehl, 9, 0, 0)) \
- fw_def(ICELAKE, 0, guc_def(icl, 33, 0, 0), huc_def(icl, 9, 0, 0)) \
- fw_def(COFFEELAKE, 5, guc_def(cml, 33, 0, 0), huc_def(cml, 4, 0, 0)) \
- fw_def(COFFEELAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4, 0, 0)) \
- fw_def(GEMINILAKE, 0, guc_def(glk, 33, 0, 0), huc_def(glk, 4, 0, 0)) \
- fw_def(KABYLAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4, 0, 0)) \
- fw_def(BROXTON, 0, guc_def(bxt, 33, 0, 0), huc_def(bxt, 2, 0, 0)) \
- fw_def(SKYLAKE, 0, guc_def(skl, 33, 0, 0), huc_def(skl, 2, 0, 0))
+ fw_def(TIGERLAKE, 0, guc_def(tgl, 40, 0, 0), huc_def(tgl, 7, 0, 3)) \
+ fw_def(ELKHARTLAKE, 0, guc_def(ehl, 40, 0, 0), huc_def(ehl, 9, 0, 0)) \
+ fw_def(ICELAKE, 0, guc_def(icl, 40, 0, 0), huc_def(icl, 9, 0, 0)) \
+ fw_def(COFFEELAKE, 5, guc_def(cml, 40, 0, 0), huc_def(cml, 4, 0, 0)) \
+ fw_def(COFFEELAKE, 0, guc_def(kbl, 40, 0, 0), huc_def(kbl, 4, 0, 0)) \
+ fw_def(GEMINILAKE, 0, guc_def(glk, 40, 0, 0), huc_def(glk, 4, 0, 0)) \
+ fw_def(KABYLAKE, 0, guc_def(kbl, 40, 0, 0), huc_def(kbl, 4, 0, 0)) \
+ fw_def(BROXTON, 0, guc_def(bxt, 40, 0, 0), huc_def(bxt, 2, 0, 0)) \
+ fw_def(SKYLAKE, 0, guc_def(skl, 40, 0, 0), huc_def(skl, 2, 0, 0))
#define __MAKE_UC_FW_PATH(prefix_, name_, major_, minor_, patch_) \
"i915/" \
@@ -362,6 +362,9 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw)
}
}
+ if (uc_fw->type == INTEL_UC_FW_TYPE_GUC)
+ uc_fw->private_data_size = css->private_data_size;
+
obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size);
if (IS_ERR(obj)) {
err = PTR_ERR(obj);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
index 1f30543d0d2d..7e6a21847660 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
@@ -84,6 +84,8 @@ struct intel_uc_fw {
u32 rsa_size;
u32 ucode_size;
+
+ u32 private_data_size;
};
#ifdef CONFIG_DRM_I915_DEBUG_GUC
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
index 029214cdedd5..e41ffc7a7fbc 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
@@ -69,7 +69,11 @@ struct uc_css_header {
#define CSS_SW_VERSION_UC_MAJOR (0xFF << 16)
#define CSS_SW_VERSION_UC_MINOR (0xFF << 8)
#define CSS_SW_VERSION_UC_PATCH (0xFF << 0)
- u32 reserved[14];
+ u32 reserved0[13];
+ union {
+ u32 private_data_size; /* only applies to GuC */
+ u32 reserved1;
+ };
u32 header_info;
} __packed;
static_assert(sizeof(struct uc_css_header) == 128);
--
2.21.0.5.gaeb582a983
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Update to GuC FW v40 (rev2)
2020-01-15 2:40 [Intel-gfx] [PATCH] drm/i915/guc: Update to GuC FW v40 John.C.Harrison
` (3 preceding siblings ...)
2020-01-15 20:37 ` [Intel-gfx] [PATCH v2] " John.C.Harrison
@ 2020-01-15 21:23 ` Patchwork
2020-01-15 21:23 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
` (6 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2020-01-15 21:23 UTC (permalink / raw)
To: John.C.Harrison; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/guc: Update to GuC FW v40 (rev2)
URL : https://patchwork.freedesktop.org/series/72032/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7751 -> Patchwork_16117
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/index.html
Known issues
------------
Here are the changes found in Patchwork_16117 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_parallel@basic:
- fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([i915#402]) +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-tgl-y/igt@gem_exec_parallel@basic.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/fi-tgl-y/igt@gem_exec_parallel@basic.html
* igt@gem_exec_suspend@basic-s3:
- fi-cml-s: [PASS][3] -> [DMESG-WARN][4] ([fdo#111764])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-cml-s/igt@gem_exec_suspend@basic-s3.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/fi-cml-s/igt@gem_exec_suspend@basic-s3.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770: [PASS][5] -> [DMESG-FAIL][6] ([i915#725])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-hsw-4770/igt@i915_selftest@live_blt.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/fi-hsw-4770/igt@i915_selftest@live_blt.html
* igt@i915_selftest@live_execlists:
- fi-apl-guc: [PASS][7] -> [TIMEOUT][8] ([fdo#112271] / [i915#529])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-apl-guc/igt@i915_selftest@live_execlists.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/fi-apl-guc/igt@i915_selftest@live_execlists.html
#### Possible fixes ####
* igt@gem_close_race@basic-threads:
- fi-byt-j1900: [TIMEOUT][9] ([fdo#112271] / [i915#816]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-byt-j1900/igt@gem_close_race@basic-threads.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/fi-byt-j1900/igt@gem_close_race@basic-threads.html
* igt@i915_module_load@reload-with-fault-injection:
- fi-cfl-8700k: [DMESG-WARN][11] ([i915#889]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-cfl-8700k/igt@i915_module_load@reload-with-fault-injection.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/fi-cfl-8700k/igt@i915_module_load@reload-with-fault-injection.html
- fi-skl-6770hq: [DMESG-WARN][13] ([i915#889]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-skl-6770hq/igt@i915_module_load@reload-with-fault-injection.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/fi-skl-6770hq/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_selftest@live_execlists:
- fi-kbl-soraka: [DMESG-FAIL][15] ([i915#656]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
* igt@prime_self_import@basic-llseek-size:
- fi-tgl-y: [DMESG-WARN][17] ([i915#402]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-tgl-y/igt@prime_self_import@basic-llseek-size.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/fi-tgl-y/igt@prime_self_import@basic-llseek-size.html
#### Warnings ####
* igt@i915_pm_rpm@basic-rte:
- fi-kbl-guc: [SKIP][19] ([fdo#109271]) -> [FAIL][20] ([i915#579])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html
* igt@i915_pm_rpm@module-reload:
- fi-skl-6770hq: [INCOMPLETE][21] ([i915#151]) -> [FAIL][22] ([i915#178])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111764]: https://bugs.freedesktop.org/show_bug.cgi?id=111764
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
[i915#178]: https://gitlab.freedesktop.org/drm/intel/issues/178
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#529]: https://gitlab.freedesktop.org/drm/intel/issues/529
[i915#579]: https://gitlab.freedesktop.org/drm/intel/issues/579
[i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
[i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889
[i915#937]: https://gitlab.freedesktop.org/drm/intel/issues/937
Participating hosts (46 -> 37)
------------------------------
Additional (4): fi-hsw-4770r fi-byt-n2820 fi-hsw-peppy fi-snb-2520m
Missing (13): fi-ilk-m540 fi-bdw-5557u fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-kbl-7500u fi-whl-u fi-gdg-551 fi-ivb-3770 fi-skl-lmem fi-byt-clapper fi-skl-6600u fi-snb-2600
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7751 -> Patchwork_16117
CI-20190529: 20190529
CI_DRM_7751: bffb5bf41a2e3d84ee5043dcccad49578656a012 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5367: 94af6de4f07487b93c4f5008f3ed04b5fc045200 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16117: d9ad0ee5cbb2843eef7aedbc0d04c9ac07668dba @ git://anongit.freedesktop.org/gfx-ci/linux
== Kernel 32bit build ==
Warning: Kernel 32bit buildtest failed:
https://intel-gfx-ci.01.org/Patchwork_16117/build_32bit.log
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready (#1)
Building modules, stage 2.
MODPOST 122 modules
ERROR: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
scripts/Makefile.modpost:93: recipe for target '__modpost' failed
make[1]: *** [__modpost] Error 1
Makefile:1282: recipe for target 'modules' failed
make: *** [modules] Error 2
== Linux commits ==
d9ad0ee5cbb2 drm/i915/guc: Update to GuC FW v40
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915/guc: Update to GuC FW v40 (rev2)
2020-01-15 2:40 [Intel-gfx] [PATCH] drm/i915/guc: Update to GuC FW v40 John.C.Harrison
` (4 preceding siblings ...)
2020-01-15 21:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Update to GuC FW v40 (rev2) Patchwork
@ 2020-01-15 21:23 ` Patchwork
2020-01-17 10:12 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: Update to GuC FW v40 Patchwork
` (5 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2020-01-15 21:23 UTC (permalink / raw)
To: John.C.Harrison; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/guc: Update to GuC FW v40 (rev2)
URL : https://patchwork.freedesktop.org/series/72032/
State : warning
== Summary ==
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready (#1)
Building modules, stage 2.
MODPOST 122 modules
ERROR: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
scripts/Makefile.modpost:93: recipe for target '__modpost' failed
make[1]: *** [__modpost] Error 1
Makefile:1282: recipe for target 'modules' failed
make: *** [modules] Error 2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/build_32bit.log
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: Update to GuC FW v40
2020-01-15 2:40 [Intel-gfx] [PATCH] drm/i915/guc: Update to GuC FW v40 John.C.Harrison
` (5 preceding siblings ...)
2020-01-15 21:23 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
@ 2020-01-17 10:12 ` Patchwork
2020-01-18 9:25 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Update to GuC FW v40 (rev2) Patchwork
` (4 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2020-01-17 10:12 UTC (permalink / raw)
To: John.C.Harrison; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/guc: Update to GuC FW v40
URL : https://patchwork.freedesktop.org/series/72032/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7746_full -> Patchwork_16104_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_16104_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_busy@busy-vcs1:
- shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#112080]) +10 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-iclb1/igt@gem_busy@busy-vcs1.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-iclb5/igt@gem_busy@busy-vcs1.html
* igt@gem_ctx_create@basic-files:
- shard-tglb: [PASS][3] -> [INCOMPLETE][4] ([fdo#111735])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-tglb2/igt@gem_ctx_create@basic-files.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-tglb3/igt@gem_ctx_create@basic-files.html
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: [PASS][5] -> [DMESG-WARN][6] ([i915#180]) +6 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-kbl1/igt@gem_ctx_isolation@rcs0-s3.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-kbl3/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_ctx_isolation@vcs1-none:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#109276] / [fdo#112080]) +2 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-iclb1/igt@gem_ctx_isolation@vcs1-none.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-iclb6/igt@gem_ctx_isolation@vcs1-none.html
* igt@gem_ctx_persistence@rcs0-mixed-process:
- shard-glk: [PASS][9] -> [FAIL][10] ([i915#679])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-glk4/igt@gem_ctx_persistence@rcs0-mixed-process.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-glk4/igt@gem_ctx_persistence@rcs0-mixed-process.html
* igt@gem_eio@reset-stress:
- shard-snb: [PASS][11] -> [FAIL][12] ([i915#232])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-snb4/igt@gem_eio@reset-stress.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-snb7/igt@gem_eio@reset-stress.html
* igt@gem_exec_schedule@pi-shared-iova-bsd:
- shard-iclb: [PASS][13] -> [SKIP][14] ([i915#677])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-iclb5/igt@gem_exec_schedule@pi-shared-iova-bsd.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-iclb2/igt@gem_exec_schedule@pi-shared-iova-bsd.html
* igt@gem_exec_schedule@preempt-queue-contexts-chain-render:
- shard-tglb: [PASS][15] -> [INCOMPLETE][16] ([fdo#111677] / [i915#472])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-tglb2/igt@gem_exec_schedule@preempt-queue-contexts-chain-render.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-tglb6/igt@gem_exec_schedule@preempt-queue-contexts-chain-render.html
* igt@gem_exec_schedule@smoketest-bsd1:
- shard-tglb: [PASS][17] -> [INCOMPLETE][18] ([i915#463] / [i915#472])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-tglb8/igt@gem_exec_schedule@smoketest-bsd1.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-tglb6/igt@gem_exec_schedule@smoketest-bsd1.html
* igt@gem_exec_schedule@wide-bsd:
- shard-iclb: [PASS][19] -> [SKIP][20] ([fdo#112146]) +2 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-iclb8/igt@gem_exec_schedule@wide-bsd.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-iclb2/igt@gem_exec_schedule@wide-bsd.html
* igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive:
- shard-kbl: [PASS][21] -> [TIMEOUT][22] ([fdo#112271] / [i915#530])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-kbl2/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-kbl6/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
* igt@gem_persistent_relocs@forked-interruptible-thrash-inactive:
- shard-tglb: [PASS][23] -> [TIMEOUT][24] ([fdo#112126] / [fdo#112271] / [i915#530])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-tglb3/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-tglb3/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
* igt@gem_persistent_relocs@forked-interruptible-thrashing:
- shard-apl: [PASS][25] -> [TIMEOUT][26] ([fdo#112271] / [i915#530])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-apl1/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-apl8/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
* igt@gem_persistent_relocs@forked-thrashing:
- shard-kbl: [PASS][27] -> [INCOMPLETE][28] ([fdo#103665] / [i915#530])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-kbl1/igt@gem_persistent_relocs@forked-thrashing.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-kbl3/igt@gem_persistent_relocs@forked-thrashing.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-skl: [PASS][29] -> [FAIL][30] ([i915#644])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-skl3/igt@gem_ppgtt@flink-and-close-vma-leak.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-skl9/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gem_softpin@noreloc-s3:
- shard-skl: [PASS][31] -> [INCOMPLETE][32] ([i915#69])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-skl1/igt@gem_softpin@noreloc-s3.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-skl4/igt@gem_softpin@noreloc-s3.html
* igt@gem_sync@basic-many-each:
- shard-tglb: [PASS][33] -> [INCOMPLETE][34] ([i915#472] / [i915#707])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-tglb5/igt@gem_sync@basic-many-each.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-tglb5/igt@gem_sync@basic-many-each.html
* igt@i915_pm_rps@reset:
- shard-iclb: [PASS][35] -> [FAIL][36] ([i915#413]) +1 similar issue
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-iclb1/igt@i915_pm_rps@reset.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-iclb5/igt@i915_pm_rps@reset.html
* igt@kms_color@pipe-c-ctm-blue-to-red:
- shard-kbl: [PASS][37] -> [DMESG-WARN][38] ([i915#62] / [i915#92]) +32 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-kbl1/igt@kms_color@pipe-c-ctm-blue-to-red.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-kbl4/igt@kms_color@pipe-c-ctm-blue-to-red.html
* igt@kms_flip@flip-vs-suspend:
- shard-skl: [PASS][39] -> [INCOMPLETE][40] ([i915#221]) +1 similar issue
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-skl4/igt@kms_flip@flip-vs-suspend.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-skl3/igt@kms_flip@flip-vs-suspend.html
* igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
- shard-tglb: [PASS][41] -> [FAIL][42] ([i915#49]) +2 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-stridechange.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-stridechange.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-apl: [PASS][43] -> [DMESG-WARN][44] ([i915#180]) +1 similar issue
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-apl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-apl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [PASS][45] -> [FAIL][46] ([fdo#108145]) +1 similar issue
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [PASS][47] -> [SKIP][48] ([fdo#109642] / [fdo#111068])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-iclb6/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@no_drrs:
- shard-iclb: [PASS][49] -> [FAIL][50] ([i915#173])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-iclb2/igt@kms_psr@no_drrs.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-iclb1/igt@kms_psr@no_drrs.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [PASS][51] -> [SKIP][52] ([fdo#109441]) +3 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-iclb6/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][53] -> [FAIL][54] ([i915#31])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-apl6/igt@kms_setmode@basic.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-apl7/igt@kms_setmode@basic.html
* igt@prime_busy@hang-bsd2:
- shard-iclb: [PASS][55] -> [SKIP][56] ([fdo#109276]) +19 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-iclb4/igt@prime_busy@hang-bsd2.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-iclb6/igt@prime_busy@hang-bsd2.html
#### Possible fixes ####
* igt@drm_import_export@prime:
- shard-hsw: [INCOMPLETE][57] ([CI#80] / [i915#61]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-hsw5/igt@drm_import_export@prime.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-hsw2/igt@drm_import_export@prime.html
* igt@gem_busy@close-race:
- shard-hsw: [TIMEOUT][59] ([fdo#112271]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-hsw5/igt@gem_busy@close-race.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-hsw5/igt@gem_busy@close-race.html
* igt@gem_ctx_persistence@bcs0-mixed-process:
- shard-apl: [FAIL][61] ([i915#679]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-apl3/igt@gem_ctx_persistence@bcs0-mixed-process.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-apl8/igt@gem_ctx_persistence@bcs0-mixed-process.html
- shard-skl: [FAIL][63] ([i915#679]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-skl9/igt@gem_ctx_persistence@bcs0-mixed-process.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-skl6/igt@gem_ctx_persistence@bcs0-mixed-process.html
* igt@gem_ctx_persistence@vcs1-mixed:
- shard-iclb: [SKIP][65] ([fdo#109276] / [fdo#112080]) -> [PASS][66] +1 similar issue
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-iclb5/igt@gem_ctx_persistence@vcs1-mixed.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-iclb1/igt@gem_ctx_persistence@vcs1-mixed.html
* igt@gem_ctx_shared@exec-single-timeline-bsd:
- shard-iclb: [SKIP][67] ([fdo#110841]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-iclb4/igt@gem_ctx_shared@exec-single-timeline-bsd.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-iclb6/igt@gem_ctx_shared@exec-single-timeline-bsd.html
* igt@gem_exec_parallel@contexts:
- shard-tglb: [INCOMPLETE][69] ([i915#470] / [i915#472]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-tglb8/igt@gem_exec_parallel@contexts.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-tglb5/igt@gem_exec_parallel@contexts.html
* igt@gem_exec_parallel@vcs1-fds:
- shard-iclb: [SKIP][71] ([fdo#112080]) -> [PASS][72] +11 similar issues
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-iclb8/igt@gem_exec_parallel@vcs1-fds.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-iclb2/igt@gem_exec_parallel@vcs1-fds.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [SKIP][73] ([fdo#112146]) -> [PASS][74] +7 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-iclb4/igt@gem_exec_schedule@preempt-other-chain-bsd.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-iclb6/igt@gem_exec_schedule@preempt-other-chain-bsd.html
* igt@gem_exec_schedule@preempt-queue-bsd1:
- shard-tglb: [INCOMPLETE][75] ([fdo#111677] / [i915#472]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-tglb8/igt@gem_exec_schedule@preempt-queue-bsd1.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-tglb4/igt@gem_exec_schedule@preempt-queue-bsd1.html
* igt@gem_exec_schedule@preempt-queue-chain-blt:
- shard-tglb: [INCOMPLETE][77] ([fdo#111606] / [fdo#111677] / [i915#472]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-tglb6/igt@gem_exec_schedule@preempt-queue-chain-blt.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-tglb5/igt@gem_exec_schedule@preempt-queue-chain-blt.html
* igt@gem_exec_suspend@basic-s3:
- shard-kbl: [DMESG-WARN][79] ([i915#180]) -> [PASS][80] +4 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-kbl6/igt@gem_exec_suspend@basic-s3.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-kbl2/igt@gem_exec_suspend@basic-s3.html
* igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing:
- shard-apl: [TIMEOUT][81] ([fdo#112271] / [i915#530]) -> [PASS][82]
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-apl2/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-apl1/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
* igt@gem_persistent_relocs@forked-interruptible-thrash-inactive:
- shard-hsw: [TIMEOUT][83] ([fdo#112271] / [i915#530]) -> [PASS][84]
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-hsw7/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-hsw5/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
* igt@gem_persistent_relocs@forked-interruptible-thrashing:
- shard-skl: [TIMEOUT][85] ([fdo#112271] / [i915#530]) -> [PASS][86]
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-skl5/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-skl4/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-apl: [FAIL][87] ([i915#644]) -> [PASS][88]
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-apl3/igt@gem_ppgtt@flink-and-close-vma-leak.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-apl2/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gen9_exec_parse@allowed-all:
- shard-kbl: [DMESG-WARN][89] ([i915#716]) -> [PASS][90]
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-kbl7/igt@gen9_exec_parse@allowed-all.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-kbl3/igt@gen9_exec_parse@allowed-all.html
* igt@i915_selftest@live_hangcheck:
- shard-tglb: [INCOMPLETE][91] -> [PASS][92]
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-tglb5/igt@i915_selftest@live_hangcheck.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-tglb8/igt@i915_selftest@live_hangcheck.html
* igt@kms_color@pipe-b-ctm-0-75:
- shard-skl: [DMESG-WARN][93] ([i915#109]) -> [PASS][94]
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-skl4/igt@kms_color@pipe-b-ctm-0-75.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-skl6/igt@kms_color@pipe-b-ctm-0-75.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-apl: [DMESG-WARN][95] ([i915#180]) -> [PASS][96] +2 similar issues
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-apl8/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-apl6/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
- shard-glk: [FAIL][97] ([i915#72]) -> [PASS][98]
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-glk8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-glk3/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-glk: [FAIL][99] ([i915#79]) -> [PASS][100]
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: [FAIL][101] ([i915#79]) -> [PASS][102]
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-skl8/igt@kms_flip@flip-vs-expired-vblank.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-skl7/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-blt:
- shard-tglb: [FAIL][103] ([i915#49]) -> [PASS][104]
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-tglb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-blt.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-tglb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_plane@plane-position-covered-pipe-c-planes:
- shard-skl: [FAIL][105] ([i915#247]) -> [PASS][106]
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-skl8/igt@kms_plane@plane-position-covered-pipe-c-planes.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-skl1/igt@kms_plane@plane-position-covered-pipe-c-planes.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [FAIL][107] ([fdo#108145] / [i915#265]) -> [PASS][108]
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr@psr2_basic:
- shard-iclb: [SKIP][109] ([fdo#109441]) -> [PASS][110] +1 similar issue
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-iclb8/igt@kms_psr@psr2_basic.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-iclb2/igt@kms_psr@psr2_basic.html
* igt@prime_vgem@fence-wait-bsd2:
- shard-iclb: [SKIP][111] ([fdo#109276]) -> [PASS][112] +22 similar issues
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-iclb8/igt@prime_vgem@fence-wait-bsd2.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-iclb1/igt@prime_vgem@fence-wait-bsd2.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv:
- shard-iclb: [FAIL][113] ([IGT#28]) -> [SKIP][114] ([fdo#109276] / [fdo#112080])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-iclb6/igt@gem_ctx_isolation@vcs1-nonpriv.html
* igt@i915_pm_dc@dc6-psr:
- shard-tglb: [SKIP][115] ([i915#468]) -> [FAIL][116] ([i915#454])
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-tglb6/igt@i915_pm_dc@dc6-psr.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-tglb4/igt@i915_pm_dc@dc6-psr.html
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: [DMESG-WARN][117] ([fdo#107724]) -> [SKIP][118] ([fdo#109349])
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-iclb6/igt@kms_dp_dsc@basic-dsc-enable-edp.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-7efc:
- shard-kbl: [FAIL][119] ([fdo#108145]) -> [DMESG-FAIL][120] ([fdo#108145] / [i915#62])
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-kbl6/igt@kms_plane_alpha_blend@pipe-b-alpha-7efc.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-kbl4/igt@kms_plane_alpha_blend@pipe-b-alpha-7efc.html
* igt@kms_vblank@pipe-c-ts-continuation-suspend:
- shard-kbl: [DMESG-WARN][121] ([i915#180]) -> [INCOMPLETE][122] ([fdo#103665])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7746/shard-kbl7/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/shard-kbl6/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
[CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80
[IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111606]: https://bugs.freedesktop.org/show_bug.cgi?id=111606
[fdo#111677]: https://bugs.freedesktop.org/show_bug.cgi?id=111677
[fdo#111735]: https://bugs.freedesktop.org/show_bug.cgi?id=111735
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112126]: https://bugs.freedesktop.org/show_bug.cgi?id=112126
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109
[i915#173]: https://gitlab.freedesktop.org/drm/intel/issues/173
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#221]: https://gitlab.freedesktop.org/drm/intel/issues/221
[i915#232]: https://gitlab.freedesktop.org/drm/intel/issues/232
[i915#247]: https://gitlab.freedesktop.org/drm/intel/issues/247
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#463]: https://gitlab.freedesktop.org/drm/intel/issues/463
[i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
[i915#470]: https://gitlab.freedesktop.org/drm/intel/issues/470
[i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#530]: https://gitlab.freedesktop.org/drm/intel/issues/530
[i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679
[i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
[i915#707]: https://gitlab.freedesktop.org/drm/intel/issues/707
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7746 -> Patchwork_16104
CI-20190529: 20190529
CI_DRM_7746: 84d16aa256204bccaaf382504a69fe0822e67ba0 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5365: e9ec0ed63b25c86861ffac3c8601cc4d1b910b65 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16104: de48c2fe7caafa728dea69252f8ee998131c43eb @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16104/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Update to GuC FW v40 (rev2)
2020-01-15 2:40 [Intel-gfx] [PATCH] drm/i915/guc: Update to GuC FW v40 John.C.Harrison
` (6 preceding siblings ...)
2020-01-17 10:12 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: Update to GuC FW v40 Patchwork
@ 2020-01-18 9:25 ` Patchwork
2020-01-21 19:09 ` [Intel-gfx] [CI v2 1/2] drm/i915/guc: Update to GuC FW v40 John.C.Harrison
` (3 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2020-01-18 9:25 UTC (permalink / raw)
To: John.C.Harrison; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/guc: Update to GuC FW v40 (rev2)
URL : https://patchwork.freedesktop.org/series/72032/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7751_full -> Patchwork_16117_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_16117_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_16117_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_16117_full:
### IGT changes ###
#### Possible regressions ####
* igt@runner@aborted:
- shard-kbl: NOTRUN -> [FAIL][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-kbl4/igt@runner@aborted.html
Known issues
------------
Here are the changes found in Patchwork_16117_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_busy@close-race:
- shard-tglb: [PASS][2] -> [INCOMPLETE][3] ([i915#472] / [i915#977])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb7/igt@gem_busy@close-race.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-tglb3/igt@gem_busy@close-race.html
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: [PASS][4] -> [DMESG-WARN][5] ([i915#180]) +5 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-kbl3/igt@gem_ctx_isolation@rcs0-s3.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-kbl7/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_ctx_persistence@vcs1-queued:
- shard-iclb: [PASS][6] -> [SKIP][7] ([fdo#109276] / [fdo#112080]) +5 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb1/igt@gem_ctx_persistence@vcs1-queued.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb5/igt@gem_ctx_persistence@vcs1-queued.html
* igt@gem_ctx_shared@q-smoketest-all:
- shard-tglb: [PASS][8] -> [INCOMPLETE][9] ([fdo#111735] / [i915#472])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb5/igt@gem_ctx_shared@q-smoketest-all.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-tglb1/igt@gem_ctx_shared@q-smoketest-all.html
* igt@gem_exec_parallel@basic:
- shard-tglb: [PASS][10] -> [INCOMPLETE][11] ([i915#472] / [i915#476]) +1 similar issue
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb7/igt@gem_exec_parallel@basic.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-tglb6/igt@gem_exec_parallel@basic.html
* igt@gem_exec_schedule@preempt-queue-bsd1:
- shard-iclb: [PASS][12] -> [SKIP][13] ([fdo#109276]) +24 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb4/igt@gem_exec_schedule@preempt-queue-bsd1.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb5/igt@gem_exec_schedule@preempt-queue-bsd1.html
* igt@gem_exec_schedule@preempt-queue-render:
- shard-tglb: [PASS][14] -> [INCOMPLETE][15] ([fdo#111606] / [fdo#111677] / [i915#472])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb8/igt@gem_exec_schedule@preempt-queue-render.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-tglb3/igt@gem_exec_schedule@preempt-queue-render.html
* igt@gem_exec_schedule@reorder-wide-bsd:
- shard-iclb: [PASS][16] -> [SKIP][17] ([fdo#112146]) +8 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb8/igt@gem_exec_schedule@reorder-wide-bsd.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html
* igt@gem_persistent_relocs@forked-faulting-reloc-thrashing:
- shard-apl: [PASS][18] -> [INCOMPLETE][19] ([fdo#103927] / [i915#530])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-apl6/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-apl3/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html
* igt@gem_persistent_relocs@forked-interruptible-thrash-inactive:
- shard-glk: [PASS][20] -> [TIMEOUT][21] ([fdo#112271] / [i915#530])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-glk4/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-glk2/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
- shard-kbl: [PASS][22] -> [TIMEOUT][23] ([fdo#112271])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-kbl6/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-kbl4/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
- shard-hsw: [PASS][24] -> [TIMEOUT][25] ([fdo#112271] / [i915#530])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-hsw5/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-hsw5/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
* igt@gem_persistent_relocs@forked-interruptible-thrashing:
- shard-apl: [PASS][26] -> [TIMEOUT][27] ([fdo#112271] / [i915#530])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-apl1/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-apl2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-glk: [PASS][28] -> [FAIL][29] ([i915#644])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-glk9/igt@gem_ppgtt@flink-and-close-vma-leak.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-glk8/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gem_sync@basic-store-all:
- shard-tglb: [PASS][30] -> [INCOMPLETE][31] ([i915#472]) +3 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb1/igt@gem_sync@basic-store-all.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-tglb5/igt@gem_sync@basic-store-all.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [PASS][32] -> [FAIL][33] ([i915#454])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb2/igt@i915_pm_dc@dc6-psr.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb4/igt@i915_pm_dc@dc6-psr.html
* igt@i915_pm_rps@reset:
- shard-iclb: [PASS][34] -> [FAIL][35] ([i915#413])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb2/igt@i915_pm_rps@reset.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb4/igt@i915_pm_rps@reset.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt:
- shard-tglb: [PASS][36] -> [FAIL][37] ([i915#49])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-apl: [PASS][38] -> [DMESG-WARN][39] ([i915#180])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-apl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [PASS][40] -> [SKIP][41] ([fdo#109642] / [fdo#111068])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb2/igt@kms_psr2_su@page_flip.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb8/igt@kms_psr2_su@page_flip.html
* igt@kms_psr@psr2_cursor_render:
- shard-iclb: [PASS][42] -> [SKIP][43] ([fdo#109441])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb4/igt@kms_psr@psr2_cursor_render.html
* igt@kms_setmode@basic:
- shard-skl: [PASS][44] -> [FAIL][45] ([i915#31])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-skl1/igt@kms_setmode@basic.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-skl10/igt@kms_setmode@basic.html
* igt@perf_pmu@busy-vcs1:
- shard-iclb: [PASS][46] -> [SKIP][47] ([fdo#112080]) +14 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb1/igt@perf_pmu@busy-vcs1.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb6/igt@perf_pmu@busy-vcs1.html
#### Possible fixes ####
* igt@gem_ctx_isolation@vcs1-none:
- shard-iclb: [SKIP][48] ([fdo#109276] / [fdo#112080]) -> [PASS][49] +1 similar issue
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb5/igt@gem_ctx_isolation@vcs1-none.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb1/igt@gem_ctx_isolation@vcs1-none.html
* igt@gem_ctx_persistence@vecs0-mixed-process:
- shard-apl: [FAIL][50] ([i915#679]) -> [PASS][51]
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-apl4/igt@gem_ctx_persistence@vecs0-mixed-process.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-apl7/igt@gem_ctx_persistence@vecs0-mixed-process.html
* igt@gem_ctx_shared@exec-single-timeline-bsd:
- shard-iclb: [SKIP][52] ([fdo#110841]) -> [PASS][53]
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb4/igt@gem_ctx_shared@exec-single-timeline-bsd.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb6/igt@gem_ctx_shared@exec-single-timeline-bsd.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [SKIP][54] ([fdo#110854]) -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb6/igt@gem_exec_balancer@smoke.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb4/igt@gem_exec_balancer@smoke.html
* igt@gem_exec_nop@basic-sequential:
- shard-tglb: [INCOMPLETE][56] ([i915#472]) -> [PASS][57] +2 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb5/igt@gem_exec_nop@basic-sequential.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-tglb8/igt@gem_exec_nop@basic-sequential.html
* igt@gem_exec_parallel@vcs1-fds:
- shard-iclb: [SKIP][58] ([fdo#112080]) -> [PASS][59] +17 similar issues
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb5/igt@gem_exec_parallel@vcs1-fds.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb1/igt@gem_exec_parallel@vcs1-fds.html
* igt@gem_exec_schedule@pi-distinct-iova-bsd:
- shard-iclb: [SKIP][60] ([i915#677]) -> [PASS][61] +1 similar issue
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb1/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb5/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
* igt@gem_exec_schedule@preempt-bsd:
- shard-iclb: [SKIP][62] ([fdo#112146]) -> [PASS][63] +5 similar issues
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb1/igt@gem_exec_schedule@preempt-bsd.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb5/igt@gem_exec_schedule@preempt-bsd.html
* igt@gem_exec_schedule@preempt-queue-contexts-bsd1:
- shard-tglb: [INCOMPLETE][64] ([fdo#111606] / [fdo#111677] / [i915#472]) -> [PASS][65]
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb3/igt@gem_exec_schedule@preempt-queue-contexts-bsd1.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-tglb4/igt@gem_exec_schedule@preempt-queue-contexts-bsd1.html
* igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing:
- shard-kbl: [TIMEOUT][66] ([fdo#112271] / [i915#530]) -> [PASS][67]
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-kbl1/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-kbl2/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
* igt@gem_persistent_relocs@forked-interruptible-thrash-inactive:
- shard-skl: [TIMEOUT][68] ([fdo#112271] / [i915#530]) -> [PASS][69]
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-skl6/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-skl4/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
- shard-snb: [TIMEOUT][70] ([fdo#112271] / [i915#530]) -> [PASS][71]
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-snb7/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-snb5/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
* igt@gem_persistent_relocs@forked-thrash-inactive:
- shard-kbl: [INCOMPLETE][72] ([fdo#103665] / [i915#530]) -> [PASS][73]
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-kbl4/igt@gem_persistent_relocs@forked-thrash-inactive.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-kbl3/igt@gem_persistent_relocs@forked-thrash-inactive.html
* igt@gem_workarounds@suspend-resume:
- shard-apl: [DMESG-WARN][74] ([i915#180]) -> [PASS][75] +1 similar issue
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-apl6/igt@gem_workarounds@suspend-resume.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-apl6/igt@gem_workarounds@suspend-resume.html
* igt@kms_color@pipe-a-ctm-0-75:
- shard-skl: [DMESG-WARN][76] ([i915#109]) -> [PASS][77]
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-skl2/igt@kms_color@pipe-a-ctm-0-75.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-skl7/igt@kms_color@pipe-a-ctm-0-75.html
* igt@kms_cursor_crc@pipe-b-cursor-suspend:
- shard-skl: [INCOMPLETE][78] ([i915#300]) -> [PASS][79]
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
* igt@kms_frontbuffer_tracking@fbc-stridechange:
- shard-tglb: [FAIL][80] ([i915#49]) -> [PASS][81] +1 similar issue
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-stridechange.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-tglb5/igt@kms_frontbuffer_tracking@fbc-stridechange.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [FAIL][82] ([fdo#108145]) -> [PASS][83] +1 similar issue
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
- shard-skl: [DMESG-WARN][84] ([IGT#6]) -> [PASS][85]
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-skl2/igt@kms_plane_multiple@atomic-pipe-b-tiling-y.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-skl2/igt@kms_plane_multiple@atomic-pipe-b-tiling-y.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [SKIP][86] ([fdo#109642] / [fdo#111068]) -> [PASS][87]
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb8/igt@kms_psr2_su@frontbuffer.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_sprite_mmap_gtt:
- shard-iclb: [SKIP][88] ([fdo#109441]) -> [PASS][89] +2 similar issues
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb8/igt@kms_psr@psr2_sprite_mmap_gtt.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-kbl: [DMESG-WARN][90] ([i915#180]) -> [PASS][91] +5 similar issues
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-kbl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@prime_busy@hang-bsd2:
- shard-iclb: [SKIP][92] ([fdo#109276]) -> [PASS][93] +27 similar issues
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb8/igt@prime_busy@hang-bsd2.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb2/igt@prime_busy@hang-bsd2.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv:
- shard-iclb: [FAIL][94] ([IGT#28]) -> [SKIP][95] ([fdo#109276] / [fdo#112080])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb5/igt@gem_ctx_isolation@vcs1-nonpriv.html
* igt@gem_ctx_isolation@vcs1-nonpriv-switch:
- shard-iclb: [SKIP][96] ([fdo#109276] / [fdo#112080]) -> [FAIL][97] ([IGT#28])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb5/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
* igt@gem_eio@kms:
- shard-snb: [INCOMPLETE][98] ([i915#82]) -> [DMESG-WARN][99] ([i915#444])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-snb5/igt@gem_eio@kms.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-snb1/igt@gem_eio@kms.html
* igt@gem_persistent_relocs@forked-interruptible-thrashing:
- shard-iclb: [FAIL][100] ([i915#520]) -> [TIMEOUT][101] ([fdo#112271])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb8/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-iclb2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
* igt@i915_pm_dc@dc6-dpms:
- shard-tglb: [SKIP][102] ([i915#468]) -> [FAIL][103] ([i915#454])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb3/igt@i915_pm_dc@dc6-dpms.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-tglb4/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_dc@dc6-psr:
- shard-tglb: [FAIL][104] ([i915#454]) -> [SKIP][105] ([i915#468])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb5/igt@i915_pm_dc@dc6-psr.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-tglb1/igt@i915_pm_dc@dc6-psr.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-kbl: [DMESG-WARN][106] ([i915#56]) -> [DMESG-WARN][107] ([i915#180])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-kbl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
[IGT#6]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
[fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111606]: https://bugs.freedesktop.org/show_bug.cgi?id=111606
[fdo#111677]: https://bugs.freedesktop.org/show_bug.cgi?id=111677
[fdo#111735]: https://bugs.freedesktop.org/show_bug.cgi?id=111735
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#300]: https://gitlab.freedesktop.org/drm/intel/issues/300
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
[i915#444]: https://gitlab.freedesktop.org/drm/intel/issues/444
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
[i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
[i915#476]: https://gitlab.freedesktop.org/drm/intel/issues/476
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#520]: https://gitlab.freedesktop.org/drm/intel/issues/520
[i915#530]: https://gitlab.freedesktop.org/drm/intel/issues/530
[i915#56]: https://gitlab.freedesktop.org/drm/intel/issues/56
[i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679
[i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
[i915#977]: https://gitlab.freedesktop.org/drm/intel/issues/977
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7751 -> Patchwork_16117
CI-20190529: 20190529
CI_DRM_7751: bffb5bf41a2e3d84ee5043dcccad49578656a012 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5367: 94af6de4f07487b93c4f5008f3ed04b5fc045200 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16117: d9ad0ee5cbb2843eef7aedbc0d04c9ac07668dba @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16117/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915/guc: Update to GuC FW v40
2020-01-15 20:37 ` [Intel-gfx] [PATCH v2] " John.C.Harrison
@ 2020-01-21 18:29 ` Daniele Ceraolo Spurio
2020-01-21 18:40 ` John Harrison
0 siblings, 1 reply; 18+ messages in thread
From: Daniele Ceraolo Spurio @ 2020-01-21 18:29 UTC (permalink / raw)
To: John.C.Harrison, Intel-GFX
On 1/15/20 12:37 PM, John.C.Harrison@Intel.com wrote:
> From: Michal Wajdeczko <michal.wajdeczko@intel.com>
v1 was from Matt, now it is from Michal?
>
> The GuC major version has jumped from 35 to 40. This is because this
> FW includes a significant re-write of the API that completely breaks
> backwards compatibility for command submission. This patch is
> sufficient to enable loading of the GuC and hence authentication of
> the HuC. Support of command submission will follow in a much larger
> patch series.
>
> The changes required to load v40 FW are:
> * An additional data structure and associated 'private_data' pointer
> are now required to be setup by the driver. This is basically a
> scratch area of memory that the GuC owns. The size is read from the
> CSS header.
>
> * A physical to logical engine mapping table is required to be
> provided in the GuC additional data structure. This is initialized
> with a 1 to 1 mapping.
>
> * GUC_CTL_CTXINFO has been removed from the initialization params.
>
> * The reg_state_buffer has been removed from the GuC ADS.
>
> v2: Folded in removal of reg_state_buffer from Michal.
>
There are some changes in the suspend/resume protocol, but the impact
should only be around GuC submission so it should be ok to do those
later. With the patch ownership sorted out:
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Can you resend with enable_guc=2 to trigger a guc-enabled shards run on
all sharded platforms?
Daniele
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> CC: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 18 ------------
> drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 31 ++++++++++++++++++--
> drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 24 +++++++--------
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 21 +++++++------
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 2 ++
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h | 6 +++-
> 6 files changed, 58 insertions(+), 44 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 5d00a3b2d914..e3ef742aac4a 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -213,23 +213,6 @@ static u32 guc_ctl_feature_flags(struct intel_guc *guc)
> return flags;
> }
>
> -static u32 guc_ctl_ctxinfo_flags(struct intel_guc *guc)
> -{
> - u32 flags = 0;
> -
> - if (intel_guc_is_submission_supported(guc)) {
> - u32 ctxnum, base;
> -
> - base = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
> - ctxnum = GUC_MAX_STAGE_DESCRIPTORS / 16;
> -
> - base >>= PAGE_SHIFT;
> - flags |= (base << GUC_CTL_BASE_ADDR_SHIFT) |
> - (ctxnum << GUC_CTL_CTXNUM_IN16_SHIFT);
> - }
> - return flags;
> -}
> -
> static u32 guc_ctl_log_params_flags(struct intel_guc *guc)
> {
> u32 offset = intel_guc_ggtt_offset(guc, guc->log.vma) >> PAGE_SHIFT;
> @@ -291,7 +274,6 @@ static void guc_init_params(struct intel_guc *guc)
>
> BUILD_BUG_ON(sizeof(guc->params) != GUC_CTL_MAX_DWORDS * sizeof(u32));
>
> - params[GUC_CTL_CTXINFO] = guc_ctl_ctxinfo_flags(guc);
> params[GUC_CTL_LOG_PARAMS] = guc_ctl_log_params_flags(guc);
> params[GUC_CTL_FEATURE] = guc_ctl_feature_flags(guc);
> params[GUC_CTL_DEBUG] = guc_ctl_debug_flags(guc);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> index 101728006ae9..ba4cf89e6338 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> @@ -48,6 +48,20 @@ static void guc_ct_pool_entries_init(struct guc_ct_pool_entry *pool, u32 num)
> memset(pool, 0, num * sizeof(*pool));
> }
>
> +static void guc_mapping_table_init(struct guc_gt_system_info *system_info)
> +{
> + unsigned int i, j;
> +
> + /*
> + * Initializing the physical to logical engine mapping table with a
> + * 1 to 1 mapping. This allows the firmware to load on all platforms as
> + * all engines are logical exposed to the user.
> + */
> + for (i = 0; i < GUC_MAX_ENGINE_CLASSES; ++i)
> + for (j = 0; j < GUC_MAX_INSTANCES_PER_CLASS; ++j)
> + system_info->mapping_table[i][j] = j;
> +}
> +
> /*
> * The first 80 dwords of the register state context, containing the
> * execlists and ppgtt registers.
> @@ -62,7 +76,6 @@ struct __guc_ads_blob {
> struct guc_gt_system_info system_info;
> struct guc_clients_info clients_info;
> struct guc_ct_pool_entry ct_pool[GUC_CT_POOL_SIZE];
> - u8 reg_state_buffer[GUC_S3_SAVE_SPACE_PAGES * PAGE_SIZE];
> } __packed;
>
> static void __guc_ads_init(struct intel_guc *guc)
> @@ -107,6 +120,8 @@ static void __guc_ads_init(struct intel_guc *guc)
> blob->system_info.vebox_enable_mask = VEBOX_MASK(dev_priv);
> blob->system_info.vdbox_sfc_support_mask = RUNTIME_INFO(dev_priv)->vdbox_sfc_access;
>
> + guc_mapping_table_init(&blob->system_info);
> +
> base = intel_guc_ggtt_offset(guc, guc->ads_vma);
>
> /* Clients info */
> @@ -118,11 +133,14 @@ static void __guc_ads_init(struct intel_guc *guc)
>
> /* ADS */
> blob->ads.scheduler_policies = base + ptr_offset(blob, policies);
> - blob->ads.reg_state_buffer = base + ptr_offset(blob, reg_state_buffer);
> blob->ads.reg_state_addr = base + ptr_offset(blob, reg_state);
> blob->ads.gt_system_info = base + ptr_offset(blob, system_info);
> blob->ads.clients_info = base + ptr_offset(blob, clients_info);
>
> + /* Private Data */
> + blob->ads.private_data = base +
> + PAGE_ALIGN(sizeof(struct __guc_ads_blob));
> +
> i915_gem_object_flush_map(guc->ads_vma->obj);
> }
>
> @@ -135,11 +153,13 @@ static void __guc_ads_init(struct intel_guc *guc)
> */
> int intel_guc_ads_create(struct intel_guc *guc)
> {
> - const u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
> + u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
> int ret;
>
> GEM_BUG_ON(guc->ads_vma);
>
> + size += PAGE_ALIGN(guc->fw.private_data_size);
> +
> ret = intel_guc_allocate_and_map_vma(guc, size, &guc->ads_vma,
> (void **)&guc->ads_blob);
>
> @@ -169,4 +189,9 @@ void intel_guc_ads_reset(struct intel_guc *guc)
> if (!guc->ads_vma)
> return;
> __guc_ads_init(guc);
> +
> + if (guc->fw.private_data_size)
> + memset((void *)guc->ads_blob +
> + PAGE_ALIGN(sizeof(struct __guc_ads_blob)), 0,
> + PAGE_ALIGN(guc->fw.private_data_size));
> }
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> index a6b733c146c9..48f77b67de8f 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> @@ -62,12 +62,7 @@
> #define GUC_STAGE_DESC_ATTR_PCH BIT(6)
> #define GUC_STAGE_DESC_ATTR_TERMINATED BIT(7)
>
> -/* New GuC control data */
> -#define GUC_CTL_CTXINFO 0
> -#define GUC_CTL_CTXNUM_IN16_SHIFT 0
> -#define GUC_CTL_BASE_ADDR_SHIFT 12
> -
> -#define GUC_CTL_LOG_PARAMS 1
> +#define GUC_CTL_LOG_PARAMS 0
> #define GUC_LOG_VALID (1 << 0)
> #define GUC_LOG_NOTIFY_ON_HALF_FULL (1 << 1)
> #define GUC_LOG_ALLOC_IN_MEGABYTE (1 << 3)
> @@ -79,11 +74,11 @@
> #define GUC_LOG_ISR_MASK (0x7 << GUC_LOG_ISR_SHIFT)
> #define GUC_LOG_BUF_ADDR_SHIFT 12
>
> -#define GUC_CTL_WA 2
> -#define GUC_CTL_FEATURE 3
> +#define GUC_CTL_WA 1
> +#define GUC_CTL_FEATURE 2
> #define GUC_CTL_DISABLE_SCHEDULER (1 << 14)
>
> -#define GUC_CTL_DEBUG 4
> +#define GUC_CTL_DEBUG 3
> #define GUC_LOG_VERBOSITY_SHIFT 0
> #define GUC_LOG_VERBOSITY_LOW (0 << GUC_LOG_VERBOSITY_SHIFT)
> #define GUC_LOG_VERBOSITY_MED (1 << GUC_LOG_VERBOSITY_SHIFT)
> @@ -97,7 +92,7 @@
> #define GUC_LOG_DISABLED (1 << 6)
> #define GUC_PROFILE_ENABLED (1 << 7)
>
> -#define GUC_CTL_ADS 5
> +#define GUC_CTL_ADS 4
> #define GUC_ADS_ADDR_SHIFT 1
> #define GUC_ADS_ADDR_MASK (0xFFFFF << GUC_ADS_ADDR_SHIFT)
>
> @@ -369,7 +364,9 @@ struct guc_gt_system_info {
> u32 vdbox_enable_mask;
> u32 vdbox_sfc_support_mask;
> u32 vebox_enable_mask;
> - u32 reserved[9];
> + u32 reserved1;
> + u8 mapping_table[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
> + u32 reserved2[8];
> } __packed;
>
> /* Clients info */
> @@ -391,14 +388,15 @@ struct guc_clients_info {
> /* GuC Additional Data Struct */
> struct guc_ads {
> u32 reg_state_addr;
> - u32 reg_state_buffer;
> + u32 reserved0;
> u32 scheduler_policies;
> u32 gt_system_info;
> u32 clients_info;
> u32 control_data;
> u32 golden_context_lrca[GUC_MAX_ENGINE_CLASSES];
> u32 eng_state_size[GUC_MAX_ENGINE_CLASSES];
> - u32 reserved[16];
> + u32 private_data;
> + u32 reserved[15];
> } __packed;
>
> /* GuC logging structures */
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index 8ee0a0c7f447..791edd6db6bc 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -43,15 +43,15 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
> * features.
> */
> #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
> - fw_def(TIGERLAKE, 0, guc_def(tgl, 35, 2, 0), huc_def(tgl, 7, 0, 3)) \
> - fw_def(ELKHARTLAKE, 0, guc_def(ehl, 33, 0, 4), huc_def(ehl, 9, 0, 0)) \
> - fw_def(ICELAKE, 0, guc_def(icl, 33, 0, 0), huc_def(icl, 9, 0, 0)) \
> - fw_def(COFFEELAKE, 5, guc_def(cml, 33, 0, 0), huc_def(cml, 4, 0, 0)) \
> - fw_def(COFFEELAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4, 0, 0)) \
> - fw_def(GEMINILAKE, 0, guc_def(glk, 33, 0, 0), huc_def(glk, 4, 0, 0)) \
> - fw_def(KABYLAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4, 0, 0)) \
> - fw_def(BROXTON, 0, guc_def(bxt, 33, 0, 0), huc_def(bxt, 2, 0, 0)) \
> - fw_def(SKYLAKE, 0, guc_def(skl, 33, 0, 0), huc_def(skl, 2, 0, 0))
> + fw_def(TIGERLAKE, 0, guc_def(tgl, 40, 0, 0), huc_def(tgl, 7, 0, 3)) \
> + fw_def(ELKHARTLAKE, 0, guc_def(ehl, 40, 0, 0), huc_def(ehl, 9, 0, 0)) \
> + fw_def(ICELAKE, 0, guc_def(icl, 40, 0, 0), huc_def(icl, 9, 0, 0)) \
> + fw_def(COFFEELAKE, 5, guc_def(cml, 40, 0, 0), huc_def(cml, 4, 0, 0)) \
> + fw_def(COFFEELAKE, 0, guc_def(kbl, 40, 0, 0), huc_def(kbl, 4, 0, 0)) \
> + fw_def(GEMINILAKE, 0, guc_def(glk, 40, 0, 0), huc_def(glk, 4, 0, 0)) \
> + fw_def(KABYLAKE, 0, guc_def(kbl, 40, 0, 0), huc_def(kbl, 4, 0, 0)) \
> + fw_def(BROXTON, 0, guc_def(bxt, 40, 0, 0), huc_def(bxt, 2, 0, 0)) \
> + fw_def(SKYLAKE, 0, guc_def(skl, 40, 0, 0), huc_def(skl, 2, 0, 0))
>
> #define __MAKE_UC_FW_PATH(prefix_, name_, major_, minor_, patch_) \
> "i915/" \
> @@ -362,6 +362,9 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw)
> }
> }
>
> + if (uc_fw->type == INTEL_UC_FW_TYPE_GUC)
> + uc_fw->private_data_size = css->private_data_size;
> +
> obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size);
> if (IS_ERR(obj)) {
> err = PTR_ERR(obj);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
> index 1f30543d0d2d..7e6a21847660 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
> @@ -84,6 +84,8 @@ struct intel_uc_fw {
>
> u32 rsa_size;
> u32 ucode_size;
> +
> + u32 private_data_size;
> };
>
> #ifdef CONFIG_DRM_I915_DEBUG_GUC
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
> index 029214cdedd5..e41ffc7a7fbc 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
> @@ -69,7 +69,11 @@ struct uc_css_header {
> #define CSS_SW_VERSION_UC_MAJOR (0xFF << 16)
> #define CSS_SW_VERSION_UC_MINOR (0xFF << 8)
> #define CSS_SW_VERSION_UC_PATCH (0xFF << 0)
> - u32 reserved[14];
> + u32 reserved0[13];
> + union {
> + u32 private_data_size; /* only applies to GuC */
> + u32 reserved1;
> + };
> u32 header_info;
> } __packed;
> static_assert(sizeof(struct uc_css_header) == 128);
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915/guc: Update to GuC FW v40
2020-01-21 18:29 ` Daniele Ceraolo Spurio
@ 2020-01-21 18:40 ` John Harrison
0 siblings, 0 replies; 18+ messages in thread
From: John Harrison @ 2020-01-21 18:40 UTC (permalink / raw)
To: Daniele Ceraolo Spurio, Intel-GFX
On 1/21/2020 10:29, Daniele Ceraolo Spurio wrote:
> On 1/15/20 12:37 PM, John.C.Harrison@Intel.com wrote:
>> From: Michal Wajdeczko <michal.wajdeczko@intel.com>
>
> v1 was from Matt, now it is from Michal?
>
Grrr. That would be git being annoying. I squashed Michal's update on
top and it must have somehow decided to use his patch as the base!? I
can change it back. Or set it to myself? Not sure what is the official
way to handle patches with multiple authors?
>>
>> The GuC major version has jumped from 35 to 40. This is because this
>> FW includes a significant re-write of the API that completely breaks
>> backwards compatibility for command submission. This patch is
>> sufficient to enable loading of the GuC and hence authentication of
>> the HuC. Support of command submission will follow in a much larger
>> patch series.
>>
>> The changes required to load v40 FW are:
>> * An additional data structure and associated 'private_data' pointer
>> are now required to be setup by the driver. This is basically a
>> scratch area of memory that the GuC owns. The size is read from the
>> CSS header.
>>
>> * A physical to logical engine mapping table is required to be
>> provided in the GuC additional data structure. This is initialized
>> with a 1 to 1 mapping.
>>
>> * GUC_CTL_CTXINFO has been removed from the initialization params.
>>
>> * The reg_state_buffer has been removed from the GuC ADS.
>>
>> v2: Folded in removal of reg_state_buffer from Michal.
>>
>
> There are some changes in the suspend/resume protocol, but the impact
> should only be around GuC submission so it should be ok to do those
> later. With the patch ownership sorted out:
>
> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>
> Can you resend with enable_guc=2 to trigger a guc-enabled shards run
> on all sharded platforms?
>
Will do. Just to be pedantic for anyone that does know... Setting
enable_guc=2 is really 'huc enabled' not 'guc enabled'. Full GuC
submission is still not supported in upstream.
John.
> Daniele
>
>> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> CC: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> ---
>> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 18 ------------
>> drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 31 ++++++++++++++++++--
>> drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 24 +++++++--------
>> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 21 +++++++------
>> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 2 ++
>> drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h | 6 +++-
>> 6 files changed, 58 insertions(+), 44 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>> index 5d00a3b2d914..e3ef742aac4a 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>> @@ -213,23 +213,6 @@ static u32 guc_ctl_feature_flags(struct
>> intel_guc *guc)
>> return flags;
>> }
>> -static u32 guc_ctl_ctxinfo_flags(struct intel_guc *guc)
>> -{
>> - u32 flags = 0;
>> -
>> - if (intel_guc_is_submission_supported(guc)) {
>> - u32 ctxnum, base;
>> -
>> - base = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
>> - ctxnum = GUC_MAX_STAGE_DESCRIPTORS / 16;
>> -
>> - base >>= PAGE_SHIFT;
>> - flags |= (base << GUC_CTL_BASE_ADDR_SHIFT) |
>> - (ctxnum << GUC_CTL_CTXNUM_IN16_SHIFT);
>> - }
>> - return flags;
>> -}
>> -
>> static u32 guc_ctl_log_params_flags(struct intel_guc *guc)
>> {
>> u32 offset = intel_guc_ggtt_offset(guc, guc->log.vma) >>
>> PAGE_SHIFT;
>> @@ -291,7 +274,6 @@ static void guc_init_params(struct intel_guc *guc)
>> BUILD_BUG_ON(sizeof(guc->params) != GUC_CTL_MAX_DWORDS *
>> sizeof(u32));
>> - params[GUC_CTL_CTXINFO] = guc_ctl_ctxinfo_flags(guc);
>> params[GUC_CTL_LOG_PARAMS] = guc_ctl_log_params_flags(guc);
>> params[GUC_CTL_FEATURE] = guc_ctl_feature_flags(guc);
>> params[GUC_CTL_DEBUG] = guc_ctl_debug_flags(guc);
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
>> index 101728006ae9..ba4cf89e6338 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
>> @@ -48,6 +48,20 @@ static void guc_ct_pool_entries_init(struct
>> guc_ct_pool_entry *pool, u32 num)
>> memset(pool, 0, num * sizeof(*pool));
>> }
>> +static void guc_mapping_table_init(struct guc_gt_system_info
>> *system_info)
>> +{
>> + unsigned int i, j;
>> +
>> + /*
>> + * Initializing the physical to logical engine mapping table with a
>> + * 1 to 1 mapping. This allows the firmware to load on all
>> platforms as
>> + * all engines are logical exposed to the user.
>> + */
>> + for (i = 0; i < GUC_MAX_ENGINE_CLASSES; ++i)
>> + for (j = 0; j < GUC_MAX_INSTANCES_PER_CLASS; ++j)
>> + system_info->mapping_table[i][j] = j;
>> +}
>> +
>> /*
>> * The first 80 dwords of the register state context, containing the
>> * execlists and ppgtt registers.
>> @@ -62,7 +76,6 @@ struct __guc_ads_blob {
>> struct guc_gt_system_info system_info;
>> struct guc_clients_info clients_info;
>> struct guc_ct_pool_entry ct_pool[GUC_CT_POOL_SIZE];
>> - u8 reg_state_buffer[GUC_S3_SAVE_SPACE_PAGES * PAGE_SIZE];
>> } __packed;
>> static void __guc_ads_init(struct intel_guc *guc)
>> @@ -107,6 +120,8 @@ static void __guc_ads_init(struct intel_guc *guc)
>> blob->system_info.vebox_enable_mask = VEBOX_MASK(dev_priv);
>> blob->system_info.vdbox_sfc_support_mask =
>> RUNTIME_INFO(dev_priv)->vdbox_sfc_access;
>> + guc_mapping_table_init(&blob->system_info);
>> +
>> base = intel_guc_ggtt_offset(guc, guc->ads_vma);
>> /* Clients info */
>> @@ -118,11 +133,14 @@ static void __guc_ads_init(struct intel_guc *guc)
>> /* ADS */
>> blob->ads.scheduler_policies = base + ptr_offset(blob, policies);
>> - blob->ads.reg_state_buffer = base + ptr_offset(blob,
>> reg_state_buffer);
>> blob->ads.reg_state_addr = base + ptr_offset(blob, reg_state);
>> blob->ads.gt_system_info = base + ptr_offset(blob, system_info);
>> blob->ads.clients_info = base + ptr_offset(blob, clients_info);
>> + /* Private Data */
>> + blob->ads.private_data = base +
>> + PAGE_ALIGN(sizeof(struct __guc_ads_blob));
>> +
>> i915_gem_object_flush_map(guc->ads_vma->obj);
>> }
>> @@ -135,11 +153,13 @@ static void __guc_ads_init(struct intel_guc
>> *guc)
>> */
>> int intel_guc_ads_create(struct intel_guc *guc)
>> {
>> - const u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
>> + u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
>> int ret;
>> GEM_BUG_ON(guc->ads_vma);
>> + size += PAGE_ALIGN(guc->fw.private_data_size);
>> +
>> ret = intel_guc_allocate_and_map_vma(guc, size, &guc->ads_vma,
>> (void **)&guc->ads_blob);
>> @@ -169,4 +189,9 @@ void intel_guc_ads_reset(struct intel_guc *guc)
>> if (!guc->ads_vma)
>> return;
>> __guc_ads_init(guc);
>> +
>> + if (guc->fw.private_data_size)
>> + memset((void *)guc->ads_blob +
>> + PAGE_ALIGN(sizeof(struct __guc_ads_blob)), 0,
>> + PAGE_ALIGN(guc->fw.private_data_size));
>> }
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> index a6b733c146c9..48f77b67de8f 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> @@ -62,12 +62,7 @@
>> #define GUC_STAGE_DESC_ATTR_PCH BIT(6)
>> #define GUC_STAGE_DESC_ATTR_TERMINATED BIT(7)
>> -/* New GuC control data */
>> -#define GUC_CTL_CTXINFO 0
>> -#define GUC_CTL_CTXNUM_IN16_SHIFT 0
>> -#define GUC_CTL_BASE_ADDR_SHIFT 12
>> -
>> -#define GUC_CTL_LOG_PARAMS 1
>> +#define GUC_CTL_LOG_PARAMS 0
>> #define GUC_LOG_VALID (1 << 0)
>> #define GUC_LOG_NOTIFY_ON_HALF_FULL (1 << 1)
>> #define GUC_LOG_ALLOC_IN_MEGABYTE (1 << 3)
>> @@ -79,11 +74,11 @@
>> #define GUC_LOG_ISR_MASK (0x7 << GUC_LOG_ISR_SHIFT)
>> #define GUC_LOG_BUF_ADDR_SHIFT 12
>> -#define GUC_CTL_WA 2
>> -#define GUC_CTL_FEATURE 3
>> +#define GUC_CTL_WA 1
>> +#define GUC_CTL_FEATURE 2
>> #define GUC_CTL_DISABLE_SCHEDULER (1 << 14)
>> -#define GUC_CTL_DEBUG 4
>> +#define GUC_CTL_DEBUG 3
>> #define GUC_LOG_VERBOSITY_SHIFT 0
>> #define GUC_LOG_VERBOSITY_LOW (0 << GUC_LOG_VERBOSITY_SHIFT)
>> #define GUC_LOG_VERBOSITY_MED (1 << GUC_LOG_VERBOSITY_SHIFT)
>> @@ -97,7 +92,7 @@
>> #define GUC_LOG_DISABLED (1 << 6)
>> #define GUC_PROFILE_ENABLED (1 << 7)
>> -#define GUC_CTL_ADS 5
>> +#define GUC_CTL_ADS 4
>> #define GUC_ADS_ADDR_SHIFT 1
>> #define GUC_ADS_ADDR_MASK (0xFFFFF << GUC_ADS_ADDR_SHIFT)
>> @@ -369,7 +364,9 @@ struct guc_gt_system_info {
>> u32 vdbox_enable_mask;
>> u32 vdbox_sfc_support_mask;
>> u32 vebox_enable_mask;
>> - u32 reserved[9];
>> + u32 reserved1;
>> + u8
>> mapping_table[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
>> + u32 reserved2[8];
>> } __packed;
>> /* Clients info */
>> @@ -391,14 +388,15 @@ struct guc_clients_info {
>> /* GuC Additional Data Struct */
>> struct guc_ads {
>> u32 reg_state_addr;
>> - u32 reg_state_buffer;
>> + u32 reserved0;
>> u32 scheduler_policies;
>> u32 gt_system_info;
>> u32 clients_info;
>> u32 control_data;
>> u32 golden_context_lrca[GUC_MAX_ENGINE_CLASSES];
>> u32 eng_state_size[GUC_MAX_ENGINE_CLASSES];
>> - u32 reserved[16];
>> + u32 private_data;
>> + u32 reserved[15];
>> } __packed;
>> /* GuC logging structures */
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
>> b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
>> index 8ee0a0c7f447..791edd6db6bc 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
>> @@ -43,15 +43,15 @@ void intel_uc_fw_change_status(struct intel_uc_fw
>> *uc_fw,
>> * features.
>> */
>> #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
>> - fw_def(TIGERLAKE, 0, guc_def(tgl, 35, 2, 0), huc_def(tgl, 7,
>> 0, 3)) \
>> - fw_def(ELKHARTLAKE, 0, guc_def(ehl, 33, 0, 4), huc_def(ehl, 9,
>> 0, 0)) \
>> - fw_def(ICELAKE, 0, guc_def(icl, 33, 0, 0), huc_def(icl, 9,
>> 0, 0)) \
>> - fw_def(COFFEELAKE, 5, guc_def(cml, 33, 0, 0), huc_def(cml, 4,
>> 0, 0)) \
>> - fw_def(COFFEELAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4,
>> 0, 0)) \
>> - fw_def(GEMINILAKE, 0, guc_def(glk, 33, 0, 0), huc_def(glk, 4,
>> 0, 0)) \
>> - fw_def(KABYLAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4,
>> 0, 0)) \
>> - fw_def(BROXTON, 0, guc_def(bxt, 33, 0, 0), huc_def(bxt, 2,
>> 0, 0)) \
>> - fw_def(SKYLAKE, 0, guc_def(skl, 33, 0, 0), huc_def(skl, 2,
>> 0, 0))
>> + fw_def(TIGERLAKE, 0, guc_def(tgl, 40, 0, 0), huc_def(tgl, 7,
>> 0, 3)) \
>> + fw_def(ELKHARTLAKE, 0, guc_def(ehl, 40, 0, 0), huc_def(ehl, 9,
>> 0, 0)) \
>> + fw_def(ICELAKE, 0, guc_def(icl, 40, 0, 0), huc_def(icl, 9,
>> 0, 0)) \
>> + fw_def(COFFEELAKE, 5, guc_def(cml, 40, 0, 0), huc_def(cml, 4,
>> 0, 0)) \
>> + fw_def(COFFEELAKE, 0, guc_def(kbl, 40, 0, 0), huc_def(kbl, 4,
>> 0, 0)) \
>> + fw_def(GEMINILAKE, 0, guc_def(glk, 40, 0, 0), huc_def(glk, 4,
>> 0, 0)) \
>> + fw_def(KABYLAKE, 0, guc_def(kbl, 40, 0, 0), huc_def(kbl, 4,
>> 0, 0)) \
>> + fw_def(BROXTON, 0, guc_def(bxt, 40, 0, 0), huc_def(bxt, 2,
>> 0, 0)) \
>> + fw_def(SKYLAKE, 0, guc_def(skl, 40, 0, 0), huc_def(skl, 2,
>> 0, 0))
>> #define __MAKE_UC_FW_PATH(prefix_, name_, major_, minor_, patch_) \
>> "i915/" \
>> @@ -362,6 +362,9 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw)
>> }
>> }
>> + if (uc_fw->type == INTEL_UC_FW_TYPE_GUC)
>> + uc_fw->private_data_size = css->private_data_size;
>> +
>> obj = i915_gem_object_create_shmem_from_data(i915, fw->data,
>> fw->size);
>> if (IS_ERR(obj)) {
>> err = PTR_ERR(obj);
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
>> b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
>> index 1f30543d0d2d..7e6a21847660 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
>> @@ -84,6 +84,8 @@ struct intel_uc_fw {
>> u32 rsa_size;
>> u32 ucode_size;
>> +
>> + u32 private_data_size;
>> };
>> #ifdef CONFIG_DRM_I915_DEBUG_GUC
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
>> b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
>> index 029214cdedd5..e41ffc7a7fbc 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
>> @@ -69,7 +69,11 @@ struct uc_css_header {
>> #define CSS_SW_VERSION_UC_MAJOR (0xFF << 16)
>> #define CSS_SW_VERSION_UC_MINOR (0xFF << 8)
>> #define CSS_SW_VERSION_UC_PATCH (0xFF << 0)
>> - u32 reserved[14];
>> + u32 reserved0[13];
>> + union {
>> + u32 private_data_size; /* only applies to GuC */
>> + u32 reserved1;
>> + };
>> u32 header_info;
>> } __packed;
>> static_assert(sizeof(struct uc_css_header) == 128);
>>
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] [CI v2 1/2] drm/i915/guc: Update to GuC FW v40
2020-01-15 2:40 [Intel-gfx] [PATCH] drm/i915/guc: Update to GuC FW v40 John.C.Harrison
` (7 preceding siblings ...)
2020-01-18 9:25 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Update to GuC FW v40 (rev2) Patchwork
@ 2020-01-21 19:09 ` John.C.Harrison
2020-01-21 19:09 ` [Intel-gfx] [CI v2 2/2] Hack for CI: enable HuC loading by default John.C.Harrison
2020-01-21 19:57 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Update to GuC FW v40 (rev3) Patchwork
` (2 subsequent siblings)
11 siblings, 1 reply; 18+ messages in thread
From: John.C.Harrison @ 2020-01-21 19:09 UTC (permalink / raw)
To: Intel-GFX
From: Matthew Brost <matthew.brost@intel.com>
The GuC major version has jumped from 35 to 40. This is because this
FW includes a significant re-write of the API that completely breaks
backwards compatibility for command submission. This patch is
sufficient to enable loading of the GuC and hence authentication of
the HuC. Support of command submission will follow in a much larger
patch series.
The changes required to load v40 FW are:
* An additional data structure and associated 'private_data' pointer
are now required to be setup by the driver. This is basically a
scratch area of memory that the GuC owns. The size is read from the
CSS header.
* A physical to logical engine mapping table is required to be
provided in the GuC additional data structure. This is initialized
with a 1 to 1 mapping.
* GUC_CTL_CTXINFO has been removed from the initialization params.
* The reg_state_buffer has been removed from the GuC ADS.
v2: Folded in removal of reg_state_buffer from Michal.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
CC: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 18 ------------
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 31 ++++++++++++++++++--
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 24 +++++++--------
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 21 +++++++------
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 2 ++
drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h | 6 +++-
6 files changed, 58 insertions(+), 44 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 5d00a3b2d914..e3ef742aac4a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -213,23 +213,6 @@ static u32 guc_ctl_feature_flags(struct intel_guc *guc)
return flags;
}
-static u32 guc_ctl_ctxinfo_flags(struct intel_guc *guc)
-{
- u32 flags = 0;
-
- if (intel_guc_is_submission_supported(guc)) {
- u32 ctxnum, base;
-
- base = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
- ctxnum = GUC_MAX_STAGE_DESCRIPTORS / 16;
-
- base >>= PAGE_SHIFT;
- flags |= (base << GUC_CTL_BASE_ADDR_SHIFT) |
- (ctxnum << GUC_CTL_CTXNUM_IN16_SHIFT);
- }
- return flags;
-}
-
static u32 guc_ctl_log_params_flags(struct intel_guc *guc)
{
u32 offset = intel_guc_ggtt_offset(guc, guc->log.vma) >> PAGE_SHIFT;
@@ -291,7 +274,6 @@ static void guc_init_params(struct intel_guc *guc)
BUILD_BUG_ON(sizeof(guc->params) != GUC_CTL_MAX_DWORDS * sizeof(u32));
- params[GUC_CTL_CTXINFO] = guc_ctl_ctxinfo_flags(guc);
params[GUC_CTL_LOG_PARAMS] = guc_ctl_log_params_flags(guc);
params[GUC_CTL_FEATURE] = guc_ctl_feature_flags(guc);
params[GUC_CTL_DEBUG] = guc_ctl_debug_flags(guc);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 101728006ae9..ba4cf89e6338 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -48,6 +48,20 @@ static void guc_ct_pool_entries_init(struct guc_ct_pool_entry *pool, u32 num)
memset(pool, 0, num * sizeof(*pool));
}
+static void guc_mapping_table_init(struct guc_gt_system_info *system_info)
+{
+ unsigned int i, j;
+
+ /*
+ * Initializing the physical to logical engine mapping table with a
+ * 1 to 1 mapping. This allows the firmware to load on all platforms as
+ * all engines are logical exposed to the user.
+ */
+ for (i = 0; i < GUC_MAX_ENGINE_CLASSES; ++i)
+ for (j = 0; j < GUC_MAX_INSTANCES_PER_CLASS; ++j)
+ system_info->mapping_table[i][j] = j;
+}
+
/*
* The first 80 dwords of the register state context, containing the
* execlists and ppgtt registers.
@@ -62,7 +76,6 @@ struct __guc_ads_blob {
struct guc_gt_system_info system_info;
struct guc_clients_info clients_info;
struct guc_ct_pool_entry ct_pool[GUC_CT_POOL_SIZE];
- u8 reg_state_buffer[GUC_S3_SAVE_SPACE_PAGES * PAGE_SIZE];
} __packed;
static void __guc_ads_init(struct intel_guc *guc)
@@ -107,6 +120,8 @@ static void __guc_ads_init(struct intel_guc *guc)
blob->system_info.vebox_enable_mask = VEBOX_MASK(dev_priv);
blob->system_info.vdbox_sfc_support_mask = RUNTIME_INFO(dev_priv)->vdbox_sfc_access;
+ guc_mapping_table_init(&blob->system_info);
+
base = intel_guc_ggtt_offset(guc, guc->ads_vma);
/* Clients info */
@@ -118,11 +133,14 @@ static void __guc_ads_init(struct intel_guc *guc)
/* ADS */
blob->ads.scheduler_policies = base + ptr_offset(blob, policies);
- blob->ads.reg_state_buffer = base + ptr_offset(blob, reg_state_buffer);
blob->ads.reg_state_addr = base + ptr_offset(blob, reg_state);
blob->ads.gt_system_info = base + ptr_offset(blob, system_info);
blob->ads.clients_info = base + ptr_offset(blob, clients_info);
+ /* Private Data */
+ blob->ads.private_data = base +
+ PAGE_ALIGN(sizeof(struct __guc_ads_blob));
+
i915_gem_object_flush_map(guc->ads_vma->obj);
}
@@ -135,11 +153,13 @@ static void __guc_ads_init(struct intel_guc *guc)
*/
int intel_guc_ads_create(struct intel_guc *guc)
{
- const u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
+ u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob));
int ret;
GEM_BUG_ON(guc->ads_vma);
+ size += PAGE_ALIGN(guc->fw.private_data_size);
+
ret = intel_guc_allocate_and_map_vma(guc, size, &guc->ads_vma,
(void **)&guc->ads_blob);
@@ -169,4 +189,9 @@ void intel_guc_ads_reset(struct intel_guc *guc)
if (!guc->ads_vma)
return;
__guc_ads_init(guc);
+
+ if (guc->fw.private_data_size)
+ memset((void *)guc->ads_blob +
+ PAGE_ALIGN(sizeof(struct __guc_ads_blob)), 0,
+ PAGE_ALIGN(guc->fw.private_data_size));
}
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index a6b733c146c9..48f77b67de8f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -62,12 +62,7 @@
#define GUC_STAGE_DESC_ATTR_PCH BIT(6)
#define GUC_STAGE_DESC_ATTR_TERMINATED BIT(7)
-/* New GuC control data */
-#define GUC_CTL_CTXINFO 0
-#define GUC_CTL_CTXNUM_IN16_SHIFT 0
-#define GUC_CTL_BASE_ADDR_SHIFT 12
-
-#define GUC_CTL_LOG_PARAMS 1
+#define GUC_CTL_LOG_PARAMS 0
#define GUC_LOG_VALID (1 << 0)
#define GUC_LOG_NOTIFY_ON_HALF_FULL (1 << 1)
#define GUC_LOG_ALLOC_IN_MEGABYTE (1 << 3)
@@ -79,11 +74,11 @@
#define GUC_LOG_ISR_MASK (0x7 << GUC_LOG_ISR_SHIFT)
#define GUC_LOG_BUF_ADDR_SHIFT 12
-#define GUC_CTL_WA 2
-#define GUC_CTL_FEATURE 3
+#define GUC_CTL_WA 1
+#define GUC_CTL_FEATURE 2
#define GUC_CTL_DISABLE_SCHEDULER (1 << 14)
-#define GUC_CTL_DEBUG 4
+#define GUC_CTL_DEBUG 3
#define GUC_LOG_VERBOSITY_SHIFT 0
#define GUC_LOG_VERBOSITY_LOW (0 << GUC_LOG_VERBOSITY_SHIFT)
#define GUC_LOG_VERBOSITY_MED (1 << GUC_LOG_VERBOSITY_SHIFT)
@@ -97,7 +92,7 @@
#define GUC_LOG_DISABLED (1 << 6)
#define GUC_PROFILE_ENABLED (1 << 7)
-#define GUC_CTL_ADS 5
+#define GUC_CTL_ADS 4
#define GUC_ADS_ADDR_SHIFT 1
#define GUC_ADS_ADDR_MASK (0xFFFFF << GUC_ADS_ADDR_SHIFT)
@@ -369,7 +364,9 @@ struct guc_gt_system_info {
u32 vdbox_enable_mask;
u32 vdbox_sfc_support_mask;
u32 vebox_enable_mask;
- u32 reserved[9];
+ u32 reserved1;
+ u8 mapping_table[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
+ u32 reserved2[8];
} __packed;
/* Clients info */
@@ -391,14 +388,15 @@ struct guc_clients_info {
/* GuC Additional Data Struct */
struct guc_ads {
u32 reg_state_addr;
- u32 reg_state_buffer;
+ u32 reserved0;
u32 scheduler_policies;
u32 gt_system_info;
u32 clients_info;
u32 control_data;
u32 golden_context_lrca[GUC_MAX_ENGINE_CLASSES];
u32 eng_state_size[GUC_MAX_ENGINE_CLASSES];
- u32 reserved[16];
+ u32 private_data;
+ u32 reserved[15];
} __packed;
/* GuC logging structures */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 8ee0a0c7f447..791edd6db6bc 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -43,15 +43,15 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
* features.
*/
#define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
- fw_def(TIGERLAKE, 0, guc_def(tgl, 35, 2, 0), huc_def(tgl, 7, 0, 3)) \
- fw_def(ELKHARTLAKE, 0, guc_def(ehl, 33, 0, 4), huc_def(ehl, 9, 0, 0)) \
- fw_def(ICELAKE, 0, guc_def(icl, 33, 0, 0), huc_def(icl, 9, 0, 0)) \
- fw_def(COFFEELAKE, 5, guc_def(cml, 33, 0, 0), huc_def(cml, 4, 0, 0)) \
- fw_def(COFFEELAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4, 0, 0)) \
- fw_def(GEMINILAKE, 0, guc_def(glk, 33, 0, 0), huc_def(glk, 4, 0, 0)) \
- fw_def(KABYLAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4, 0, 0)) \
- fw_def(BROXTON, 0, guc_def(bxt, 33, 0, 0), huc_def(bxt, 2, 0, 0)) \
- fw_def(SKYLAKE, 0, guc_def(skl, 33, 0, 0), huc_def(skl, 2, 0, 0))
+ fw_def(TIGERLAKE, 0, guc_def(tgl, 40, 0, 0), huc_def(tgl, 7, 0, 3)) \
+ fw_def(ELKHARTLAKE, 0, guc_def(ehl, 40, 0, 0), huc_def(ehl, 9, 0, 0)) \
+ fw_def(ICELAKE, 0, guc_def(icl, 40, 0, 0), huc_def(icl, 9, 0, 0)) \
+ fw_def(COFFEELAKE, 5, guc_def(cml, 40, 0, 0), huc_def(cml, 4, 0, 0)) \
+ fw_def(COFFEELAKE, 0, guc_def(kbl, 40, 0, 0), huc_def(kbl, 4, 0, 0)) \
+ fw_def(GEMINILAKE, 0, guc_def(glk, 40, 0, 0), huc_def(glk, 4, 0, 0)) \
+ fw_def(KABYLAKE, 0, guc_def(kbl, 40, 0, 0), huc_def(kbl, 4, 0, 0)) \
+ fw_def(BROXTON, 0, guc_def(bxt, 40, 0, 0), huc_def(bxt, 2, 0, 0)) \
+ fw_def(SKYLAKE, 0, guc_def(skl, 40, 0, 0), huc_def(skl, 2, 0, 0))
#define __MAKE_UC_FW_PATH(prefix_, name_, major_, minor_, patch_) \
"i915/" \
@@ -362,6 +362,9 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw)
}
}
+ if (uc_fw->type == INTEL_UC_FW_TYPE_GUC)
+ uc_fw->private_data_size = css->private_data_size;
+
obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size);
if (IS_ERR(obj)) {
err = PTR_ERR(obj);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
index 1f30543d0d2d..7e6a21847660 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
@@ -84,6 +84,8 @@ struct intel_uc_fw {
u32 rsa_size;
u32 ucode_size;
+
+ u32 private_data_size;
};
#ifdef CONFIG_DRM_I915_DEBUG_GUC
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
index 029214cdedd5..e41ffc7a7fbc 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
@@ -69,7 +69,11 @@ struct uc_css_header {
#define CSS_SW_VERSION_UC_MAJOR (0xFF << 16)
#define CSS_SW_VERSION_UC_MINOR (0xFF << 8)
#define CSS_SW_VERSION_UC_PATCH (0xFF << 0)
- u32 reserved[14];
+ u32 reserved0[13];
+ union {
+ u32 private_data_size; /* only applies to GuC */
+ u32 reserved1;
+ };
u32 header_info;
} __packed;
static_assert(sizeof(struct uc_css_header) == 128);
--
2.21.0.5.gaeb582a983
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [CI v2 2/2] Hack for CI: enable HuC loading by default
2020-01-21 19:09 ` [Intel-gfx] [CI v2 1/2] drm/i915/guc: Update to GuC FW v40 John.C.Harrison
@ 2020-01-21 19:09 ` John.C.Harrison
0 siblings, 0 replies; 18+ messages in thread
From: John.C.Harrison @ 2020-01-21 19:09 UTC (permalink / raw)
To: Intel-GFX
From: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 947d0a38fa3c..b53dee57f69b 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -56,7 +56,7 @@ struct drm_printer;
param(int, disable_power_well, -1, 0400) \
param(int, enable_ips, 1, 0600) \
param(int, invert_brightness, 0, 0600) \
- param(int, enable_guc, 0, 0400) \
+ param(int, enable_guc, ENABLE_GUC_LOAD_HUC, 0400) \
param(int, guc_log_level, -1, 0400) \
param(char *, guc_firmware_path, NULL, 0400) \
param(char *, huc_firmware_path, NULL, 0400) \
--
2.21.0.5.gaeb582a983
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Update to GuC FW v40 (rev3)
2020-01-15 2:40 [Intel-gfx] [PATCH] drm/i915/guc: Update to GuC FW v40 John.C.Harrison
` (8 preceding siblings ...)
2020-01-21 19:09 ` [Intel-gfx] [CI v2 1/2] drm/i915/guc: Update to GuC FW v40 John.C.Harrison
@ 2020-01-21 19:57 ` Patchwork
2020-01-21 20:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-01-23 2:24 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
11 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2020-01-21 19:57 UTC (permalink / raw)
To: John.C.Harrison; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/guc: Update to GuC FW v40 (rev3)
URL : https://patchwork.freedesktop.org/series/72032/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
31a752e6b82c drm/i915/guc: Update to GuC FW v40
52f57a04ee86 Hack for CI: enable HuC loading by default
-:8: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:19: ERROR:MISSING_SIGN_OFF: Missing Signed-off-by: line(s)
total: 1 errors, 1 warnings, 0 checks, 8 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Update to GuC FW v40 (rev3)
2020-01-15 2:40 [Intel-gfx] [PATCH] drm/i915/guc: Update to GuC FW v40 John.C.Harrison
` (9 preceding siblings ...)
2020-01-21 19:57 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Update to GuC FW v40 (rev3) Patchwork
@ 2020-01-21 20:23 ` Patchwork
2020-01-23 2:24 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
11 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2020-01-21 20:23 UTC (permalink / raw)
To: John.C.Harrison; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/guc: Update to GuC FW v40 (rev3)
URL : https://patchwork.freedesktop.org/series/72032/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7786 -> Patchwork_16198
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/index.html
Known issues
------------
Here are the changes found in Patchwork_16198 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_module_load@reload-with-fault-injection:
- fi-cfl-guc: [PASS][1] -> [INCOMPLETE][2] ([i915#505] / [i915#671])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/fi-cfl-guc/igt@i915_module_load@reload-with-fault-injection.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/fi-cfl-guc/igt@i915_module_load@reload-with-fault-injection.html
- fi-cfl-8700k: [PASS][3] -> [INCOMPLETE][4] ([i915#505])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/fi-cfl-8700k/igt@i915_module_load@reload-with-fault-injection.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/fi-cfl-8700k/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_selftest@live_mman:
- fi-bxt-dsi: [PASS][5] -> [DMESG-WARN][6] ([i915#889]) +23 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/fi-bxt-dsi/igt@i915_selftest@live_mman.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/fi-bxt-dsi/igt@i915_selftest@live_mman.html
* igt@i915_selftest@live_reset:
- fi-bxt-dsi: [PASS][7] -> [DMESG-FAIL][8] ([i915#889]) +7 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/fi-bxt-dsi/igt@i915_selftest@live_reset.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/fi-bxt-dsi/igt@i915_selftest@live_reset.html
#### Possible fixes ####
* igt@i915_selftest@live_blt:
- fi-hsw-4770: [DMESG-FAIL][9] ([i915#563]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/fi-hsw-4770/igt@i915_selftest@live_blt.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/fi-hsw-4770/igt@i915_selftest@live_blt.html
#### Warnings ####
* igt@gem_exec_parallel@contexts:
- fi-byt-n2820: [INCOMPLETE][11] ([i915#45] / [i915#999]) -> [TIMEOUT][12] ([fdo#112271])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/fi-byt-n2820/igt@gem_exec_parallel@contexts.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/fi-byt-n2820/igt@gem_exec_parallel@contexts.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770r: [DMESG-FAIL][13] ([i915#770]) -> [DMESG-FAIL][14] ([i915#725])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/fi-hsw-4770r/igt@i915_selftest@live_blt.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/fi-hsw-4770r/igt@i915_selftest@live_blt.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-icl-u2: [DMESG-WARN][15] ([IGT#4] / [i915#263]) -> [FAIL][16] ([i915#217])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@vga-edid-read:
- fi-icl-u2: [SKIP][17] ([fdo#109309]) -> [FAIL][18] ([i915#217])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/fi-icl-u2/igt@kms_chamelium@vga-edid-read.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/fi-icl-u2/igt@kms_chamelium@vga-edid-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#4]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/4
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
[i915#263]: https://gitlab.freedesktop.org/drm/intel/issues/263
[i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
[i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505
[i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563
[i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#770]: https://gitlab.freedesktop.org/drm/intel/issues/770
[i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889
[i915#937]: https://gitlab.freedesktop.org/drm/intel/issues/937
[i915#999]: https://gitlab.freedesktop.org/drm/intel/issues/999
Participating hosts (45 -> 38)
------------------------------
Additional (4): fi-hsw-peppy fi-skl-lmem fi-blb-e6850 fi-elk-e7500
Missing (11): fi-ilk-m540 fi-bdw-5557u fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-gdg-551 fi-kbl-8809g fi-byt-clapper fi-skl-6700k2 fi-snb-2600
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7786 -> Patchwork_16198
CI-20190529: 20190529
CI_DRM_7786: 72275204176397fc718218335edabb840f520024 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5376: 5cf58d947a02379d2885d6dd4f8bb487cfc3eed2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16198: 52f57a04ee86bbb8f7ba2c823df1f438e89ed74f @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
52f57a04ee86 Hack for CI: enable HuC loading by default
31a752e6b82c drm/i915/guc: Update to GuC FW v40
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Update to GuC FW v40 (rev3)
2020-01-15 2:40 [Intel-gfx] [PATCH] drm/i915/guc: Update to GuC FW v40 John.C.Harrison
` (10 preceding siblings ...)
2020-01-21 20:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-01-23 2:24 ` Patchwork
2020-01-23 21:35 ` John Harrison
11 siblings, 1 reply; 18+ messages in thread
From: Patchwork @ 2020-01-23 2:24 UTC (permalink / raw)
To: John.C.Harrison; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/guc: Update to GuC FW v40 (rev3)
URL : https://patchwork.freedesktop.org/series/72032/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7786_full -> Patchwork_16198_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_16198_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_16198_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_16198_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_atomic_transition@5x-modeset-transitions-fencing:
- shard-tglb: NOTRUN -> [SKIP][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-tglb8/igt@kms_atomic_transition@5x-modeset-transitions-fencing.html
Known issues
------------
Here are the changes found in Patchwork_16198_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@vcs1-dirty-create:
- shard-iclb: [PASS][2] -> [SKIP][3] ([fdo#109276] / [fdo#112080]) +2 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-iclb4/igt@gem_ctx_isolation@vcs1-dirty-create.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-iclb7/igt@gem_ctx_isolation@vcs1-dirty-create.html
* igt@gem_exec_schedule@pi-distinct-iova-bsd:
- shard-iclb: [PASS][4] -> [SKIP][5] ([i915#677])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-iclb7/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-iclb4/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
* igt@gem_exec_schedule@wide-bsd:
- shard-iclb: [PASS][6] -> [SKIP][7] ([fdo#112146]) +5 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-iclb5/igt@gem_exec_schedule@wide-bsd.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-iclb2/igt@gem_exec_schedule@wide-bsd.html
* igt@gem_exec_whisper@normal:
- shard-glk: [PASS][8] -> [DMESG-WARN][9] ([i915#118] / [i915#95])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-glk7/igt@gem_exec_whisper@normal.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-glk4/igt@gem_exec_whisper@normal.html
* igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive:
- shard-hsw: [PASS][10] -> [TIMEOUT][11] ([fdo#112271] / [i915#530]) +1 similar issue
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-hsw2/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-hsw4/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
* igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing:
- shard-apl: [PASS][12] -> [TIMEOUT][13] ([fdo#112271] / [i915#530])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-apl2/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-apl6/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
* igt@gem_persistent_relocs@forked-interruptible-thrash-inactive:
- shard-kbl: [PASS][14] -> [TIMEOUT][15] ([fdo#112271] / [i915#530])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-kbl1/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-kbl7/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
* igt@gem_persistent_relocs@forked-interruptible-thrashing:
- shard-hsw: [PASS][16] -> [FAIL][17] ([i915#520])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-hsw7/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-hsw8/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
* igt@gem_tiled_blits@interruptible:
- shard-hsw: [PASS][18] -> [FAIL][19] ([i915#818])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-hsw4/igt@gem_tiled_blits@interruptible.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-hsw5/igt@gem_tiled_blits@interruptible.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [PASS][20] -> [DMESG-WARN][21] ([i915#716])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-skl4/igt@gen9_exec_parse@allowed-single.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-skl8/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [PASS][22] -> [FAIL][23] ([i915#454])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-iclb1/igt@i915_pm_dc@dc6-psr.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-iclb6/igt@i915_pm_dc@dc6-psr.html
* igt@i915_pm_rps@waitboost:
- shard-tglb: [PASS][24] -> [FAIL][25] ([i915#413])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-tglb7/igt@i915_pm_rps@waitboost.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-tglb6/igt@i915_pm_rps@waitboost.html
* igt@i915_selftest@mock_requests:
- shard-skl: [PASS][26] -> [INCOMPLETE][27] ([i915#198])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-skl3/igt@i915_selftest@mock_requests.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-skl8/igt@i915_selftest@mock_requests.html
* igt@kms_cursor_legacy@nonblocking-modeset-vs-cursor-atomic:
- shard-skl: [PASS][28] -> [DMESG-WARN][29] ([i915#88])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-skl1/igt@kms_cursor_legacy@nonblocking-modeset-vs-cursor-atomic.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-skl5/igt@kms_cursor_legacy@nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-skl: [PASS][30] -> [INCOMPLETE][31] ([i915#221])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-skl7/igt@kms_flip@flip-vs-suspend-interruptible.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-skl6/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt:
- shard-tglb: [PASS][32] -> [FAIL][33] ([i915#49])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-tglb3/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render:
- shard-skl: [PASS][34] -> [DMESG-WARN][35] ([i915#109])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-skl1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-skl6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [PASS][36] -> [FAIL][37] ([fdo#108145] / [i915#265])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [PASS][38] -> [SKIP][39] ([fdo#109642] / [fdo#111068])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-iclb1/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_cursor_render:
- shard-iclb: [PASS][40] -> [SKIP][41] ([fdo#109441]) +1 similar issue
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-iclb6/igt@kms_psr@psr2_cursor_render.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][42] -> [FAIL][43] ([i915#31])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-apl4/igt@kms_setmode@basic.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-apl1/igt@kms_setmode@basic.html
- shard-skl: [PASS][44] -> [FAIL][45] ([i915#31])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-skl7/igt@kms_setmode@basic.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-skl9/igt@kms_setmode@basic.html
* igt@perf_pmu@busy-no-semaphores-vcs1:
- shard-iclb: [PASS][46] -> [SKIP][47] ([fdo#112080]) +12 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-iclb1/igt@perf_pmu@busy-no-semaphores-vcs1.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-iclb6/igt@perf_pmu@busy-no-semaphores-vcs1.html
* igt@prime_vgem@fence-wait-bsd2:
- shard-iclb: [PASS][48] -> [SKIP][49] ([fdo#109276]) +18 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-iclb2/igt@prime_vgem@fence-wait-bsd2.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-iclb6/igt@prime_vgem@fence-wait-bsd2.html
#### Possible fixes ####
* igt@gem_busy@busy-vcs1:
- shard-iclb: [SKIP][50] ([fdo#112080]) -> [PASS][51] +9 similar issues
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-iclb5/igt@gem_busy@busy-vcs1.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-iclb2/igt@gem_busy@busy-vcs1.html
* igt@gem_ctx_persistence@processes:
- shard-skl: [FAIL][52] ([i915#570]) -> [PASS][53]
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-skl1/igt@gem_ctx_persistence@processes.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-skl6/igt@gem_ctx_persistence@processes.html
* igt@gem_ctx_persistence@vcs1-queued:
- shard-iclb: [SKIP][54] ([fdo#109276] / [fdo#112080]) -> [PASS][55] +1 similar issue
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-iclb7/igt@gem_ctx_persistence@vcs1-queued.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-iclb2/igt@gem_ctx_persistence@vcs1-queued.html
* igt@gem_exec_schedule@preempt-contexts-bsd2:
- shard-iclb: [SKIP][56] ([fdo#109276]) -> [PASS][57] +18 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-iclb7/igt@gem_exec_schedule@preempt-contexts-bsd2.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-iclb2/igt@gem_exec_schedule@preempt-contexts-bsd2.html
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-iclb: [SKIP][58] ([fdo#112146]) -> [PASS][59] +5 similar issues
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-iclb1/igt@gem_exec_schedule@preemptive-hang-bsd.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-iclb6/igt@gem_exec_schedule@preemptive-hang-bsd.html
* igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive:
- shard-kbl: [TIMEOUT][60] ([fdo#112271] / [i915#530]) -> [PASS][61]
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-kbl3/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-kbl6/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
* igt@gem_persistent_relocs@forked-interruptible-thrashing:
- shard-tglb: [TIMEOUT][62] ([fdo#112126] / [fdo#112271] / [i915#530]) -> [PASS][63]
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-tglb8/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-tglb1/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
* igt@gem_persistent_relocs@forked-thrash-inactive:
- shard-glk: [TIMEOUT][64] ([fdo#112271] / [i915#530]) -> [PASS][65]
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-glk6/igt@gem_persistent_relocs@forked-thrash-inactive.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-glk2/igt@gem_persistent_relocs@forked-thrash-inactive.html
* igt@i915_selftest@live_blt:
- shard-hsw: [DMESG-FAIL][66] ([i915#725]) -> [PASS][67]
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-hsw2/igt@i915_selftest@live_blt.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-hsw7/igt@i915_selftest@live_blt.html
* igt@i915_selftest@mock_requests:
- shard-snb: [INCOMPLETE][68] ([i915#82]) -> [PASS][69]
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-snb4/igt@i915_selftest@mock_requests.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-snb2/igt@i915_selftest@mock_requests.html
* igt@kms_color@pipe-a-ctm-0-75:
- shard-skl: [DMESG-WARN][70] ([i915#109]) -> [PASS][71]
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-skl8/igt@kms_color@pipe-a-ctm-0-75.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-skl7/igt@kms_color@pipe-a-ctm-0-75.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [DMESG-WARN][72] ([i915#180]) -> [PASS][73] +8 similar issues
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-kbl3/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-glk: [FAIL][74] ([i915#79]) -> [PASS][75]
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: [FAIL][76] ([i915#79]) -> [PASS][77]
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-skl1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-skl8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-apl: [DMESG-WARN][78] ([i915#180]) -> [PASS][79] +4 similar issues
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-skl: [FAIL][80] ([i915#34]) -> [PASS][81]
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-skl3/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-skl4/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc:
- shard-tglb: [FAIL][82] ([i915#49]) -> [PASS][83] +2 similar issues
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [FAIL][84] ([fdo#108145]) -> [PASS][85] +1 similar issue
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [SKIP][86] ([fdo#109441]) -> [PASS][87] +1 similar issue
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-iclb6/igt@kms_psr@psr2_primary_mmap_cpu.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@kms_sequence@get-forked-busy:
- shard-snb: [SKIP][88] ([fdo#109271]) -> [PASS][89]
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-snb2/igt@kms_sequence@get-forked-busy.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-snb2/igt@kms_sequence@get-forked-busy.html
* igt@perf_pmu@cpu-hotplug:
- shard-hsw: [INCOMPLETE][90] ([i915#61]) -> [PASS][91]
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-hsw4/igt@perf_pmu@cpu-hotplug.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-hsw5/igt@perf_pmu@cpu-hotplug.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv:
- shard-iclb: [SKIP][92] ([fdo#109276] / [fdo#112080]) -> [FAIL][93] ([IGT#28])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-iclb6/igt@gem_ctx_isolation@vcs1-nonpriv.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv.html
* igt@gem_ctx_isolation@vcs1-nonpriv-switch:
- shard-iclb: [FAIL][94] ([IGT#28]) -> [SKIP][95] ([fdo#109276] / [fdo#112080])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-iclb5/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
* igt@gem_exec_parallel@bcs0-fds:
- shard-hsw: [INCOMPLETE][96] ([i915#61]) -> [INCOMPLETE][97] ([CI#80] / [i915#61])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-hsw6/igt@gem_exec_parallel@bcs0-fds.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-hsw1/igt@gem_exec_parallel@bcs0-fds.html
* igt@i915_pm_rpm@modeset-pc8-residency-stress:
- shard-snb: [INCOMPLETE][98] ([i915#82]) -> [SKIP][99] ([fdo#109271])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7786/shard-snb2/igt@i915_pm_rpm@modeset-pc8-residency-stress.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-snb5/igt@i915_pm_rpm@modeset-pc8-residency-stress.html
[CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80
[IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112126]: https://bugs.freedesktop.org/show_bug.cgi?id=112126
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#221]: https://gitlab.freedesktop.org/drm/intel/issues/221
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
[i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#520]: https://gitlab.freedesktop.org/drm/intel/issues/520
[i915#530]: https://gitlab.freedesktop.org/drm/intel/issues/530
[i915#570]: https://gitlab.freedesktop.org/drm/intel/issues/570
[i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818
[i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
[i915#88]: https://gitlab.freedesktop.org/drm/intel/issues/88
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7786 -> Patchwork_16198
CI-20190529: 20190529
CI_DRM_7786: 72275204176397fc718218335edabb840f520024 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5376: 5cf58d947a02379d2885d6dd4f8bb487cfc3eed2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16198: 52f57a04ee86bbb8f7ba2c823df1f438e89ed74f @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Update to GuC FW v40 (rev3)
2020-01-23 2:24 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2020-01-23 21:35 ` John Harrison
0 siblings, 0 replies; 18+ messages in thread
From: John Harrison @ 2020-01-23 21:35 UTC (permalink / raw)
To: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 2301 bytes --]
On 1/22/2020 18:24, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/guc: Update to GuC FW v40 (rev3)
> URL : https://patchwork.freedesktop.org/series/72032/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_7786_full -> Patchwork_16198_full
> ====================================================
>
> Summary
> -------
>
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_16198_full absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_16198_full, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
>
>
> Possible new issues
> -------------------
>
> Here are the unknown changes that may have been introduced in Patchwork_16198_full:
>
> ### IGT changes ###
>
> #### Possible regressions ####
>
> * igt@kms_atomic_transition@5x-modeset-transitions-fencing:
> - shard-tglb: NOTRUN -> [SKIP][1]
> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16198/shard-tglb8/igt@kms_atomic_transition@5x-modeset-transitions-fencing.html
According to the log, this test failed because it ran on a device that
only had one display device attached and not the five required by the test:
IGT-Version: 1.24-g5cf58d947 (x86_64) (Linux: 5.5.0-rc7-CI-Patchwork_16198+ x86_64)
Starting subtest: 5x-modeset-transitions-fencing
Test requirement not met in function run_modeset_transition, file ../tests/kms_atomic_transition.c:887:
Test requirement: num_outputs >= requested_outputs
Should have at least 5 outputs, found 1
Subtest 5x-modeset-transitions-fencing: SKIP (0.000s)
I'm not sure how that could be called a regression in the GuC FW patch.
I also don't see any reason why the test would previously have been a
'NOTRUN' and now is being attempted. Changing the GuC FW should not
affect which KMS tests do or do not get run!
I don't have a system with five display devices so I can't actually run
the test myself either. However, I do not see how this could be affected
by changes to the GuC. Especially when the GuC is only being used for
HuC authentication.
So I think this definitely counts as an issue with CI not this patch.
John.
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2020-01-23 21:35 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-01-15 2:40 [Intel-gfx] [PATCH] drm/i915/guc: Update to GuC FW v40 John.C.Harrison
2020-01-15 3:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-01-15 3:24 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2020-01-15 19:45 ` [Intel-gfx] [PATCH] " Daniele Ceraolo Spurio
2020-01-15 19:49 ` John Harrison
2020-01-15 20:37 ` [Intel-gfx] [PATCH v2] " John.C.Harrison
2020-01-21 18:29 ` Daniele Ceraolo Spurio
2020-01-21 18:40 ` John Harrison
2020-01-15 21:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Update to GuC FW v40 (rev2) Patchwork
2020-01-15 21:23 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2020-01-17 10:12 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: Update to GuC FW v40 Patchwork
2020-01-18 9:25 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Update to GuC FW v40 (rev2) Patchwork
2020-01-21 19:09 ` [Intel-gfx] [CI v2 1/2] drm/i915/guc: Update to GuC FW v40 John.C.Harrison
2020-01-21 19:09 ` [Intel-gfx] [CI v2 2/2] Hack for CI: enable HuC loading by default John.C.Harrison
2020-01-21 19:57 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Update to GuC FW v40 (rev3) Patchwork
2020-01-21 20:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-01-23 2:24 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-01-23 21:35 ` John Harrison
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