* [Intel-gfx] [PATCH 1/2] drm/i915: Initialise basic fence before acquiring seqno
@ 2020-01-31 20:24 Chris Wilson
2020-01-31 20:24 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno Chris Wilson
2020-01-31 23:49 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Initialise basic fence before acquiring seqno Patchwork
0 siblings, 2 replies; 3+ messages in thread
From: Chris Wilson @ 2020-01-31 20:24 UTC (permalink / raw)
To: intel-gfx; +Cc: Matthew Auld
Inside the intel_timeline_get_seqno(), we currently track the retirement
of the old cachelines by listening to the new request. This requires
that the new request is ready to be used and so requires a minimum bit
of initialisation prior to getting the new seqno.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
---
drivers/gpu/drm/i915/i915_request.c | 21 ++++++++++++++-------
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 78a5f5d3c070..f56b046a32de 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -595,6 +595,8 @@ static void __i915_request_ctor(void *arg)
i915_sw_fence_init(&rq->submit, submit_notify);
i915_sw_fence_init(&rq->semaphore, semaphore_notify);
+ dma_fence_init(&rq->fence, &i915_fence_ops, &rq->lock, 0, 0);
+
rq->file_priv = NULL;
rq->capture_list = NULL;
@@ -653,25 +655,30 @@ __i915_request_create(struct intel_context *ce, gfp_t gfp)
}
}
- ret = intel_timeline_get_seqno(tl, rq, &seqno);
- if (ret)
- goto err_free;
-
rq->i915 = ce->engine->i915;
rq->context = ce;
rq->engine = ce->engine;
rq->ring = ce->ring;
rq->execution_mask = ce->engine->mask;
+ kref_init(&rq->fence.refcount);
+ rq->fence.flags = 0;
+ rq->fence.error = 0;
+ INIT_LIST_HEAD(&rq->fence.cb_list);
+
+ ret = intel_timeline_get_seqno(tl, rq, &seqno);
+ if (ret)
+ goto err_free;
+
+ rq->fence.context = tl->fence_context;
+ rq->fence.seqno = seqno;
+
RCU_INIT_POINTER(rq->timeline, tl);
RCU_INIT_POINTER(rq->hwsp_cacheline, tl->hwsp_cacheline);
rq->hwsp_seqno = tl->hwsp_seqno;
rq->rcustate = get_state_synchronize_rcu(); /* acts as smp_mb() */
- dma_fence_init(&rq->fence, &i915_fence_ops, &rq->lock,
- tl->fence_context, seqno);
-
/* We bump the ref for the fence chain */
i915_sw_fence_reinit(&i915_request_get(rq)->submit);
i915_sw_fence_reinit(&i915_request_get(rq)->semaphore);
--
2.25.0
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno
2020-01-31 20:24 [Intel-gfx] [PATCH 1/2] drm/i915: Initialise basic fence before acquiring seqno Chris Wilson
@ 2020-01-31 20:24 ` Chris Wilson
2020-01-31 23:49 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Initialise basic fence before acquiring seqno Patchwork
1 sibling, 0 replies; 3+ messages in thread
From: Chris Wilson @ 2020-01-31 20:24 UTC (permalink / raw)
To: intel-gfx
On seqno rollover, we need to allocate ourselves a new cacheline. This
might incur grabbing a new page and pinning it into the GGTT, with some
rather unfortunate lockdep implications.
To avoid a mutex, and more specifically pinning in the GGTT from inside
the kernel context being used to flush the GGTT in emergencies, we will
likely need to lift the next-cacheline allocation to a pre-reservation.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/gt/intel_timeline.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
index 465f87b65901..54e1e55f3c81 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -406,6 +406,8 @@ __intel_timeline_get_seqno(struct intel_timeline *tl,
void *vaddr;
int err;
+ might_lock(&tl->gt->ggtt->vm.mutex);
+
/*
* If there is an outstanding GPU reference to this cacheline,
* such as it being sampled by a HW semaphore on another timeline,
--
2.25.0
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^ permalink raw reply related [flat|nested] 3+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Initialise basic fence before acquiring seqno
2020-01-31 20:24 [Intel-gfx] [PATCH 1/2] drm/i915: Initialise basic fence before acquiring seqno Chris Wilson
2020-01-31 20:24 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno Chris Wilson
@ 2020-01-31 23:49 ` Patchwork
1 sibling, 0 replies; 3+ messages in thread
From: Patchwork @ 2020-01-31 23:49 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Initialise basic fence before acquiring seqno
URL : https://patchwork.freedesktop.org/series/72845/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7853 -> Patchwork_16365
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_16365 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_16365, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16365/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_16365:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live_workarounds:
- fi-kbl-7500u: [PASS][1] -> [TIMEOUT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-kbl-7500u/igt@i915_selftest@live_workarounds.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16365/fi-kbl-7500u/igt@i915_selftest@live_workarounds.html
Known issues
------------
Here are the changes found in Patchwork_16365 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rpm@module-reload:
- fi-skl-6770hq: [PASS][3] -> [FAIL][4] ([i915#178])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16365/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- fi-icl-u2: [FAIL][5] ([fdo#103375]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-icl-u2/igt@gem_exec_suspend@basic-s3.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16365/fi-icl-u2/igt@gem_exec_suspend@basic-s3.html
* igt@gem_exec_suspend@basic-s4-devices:
- fi-icl-u2: [FAIL][7] ([fdo#111550]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-icl-u2/igt@gem_exec_suspend@basic-s4-devices.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16365/fi-icl-u2/igt@gem_exec_suspend@basic-s4-devices.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770: [DMESG-FAIL][9] ([i915#563]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-hsw-4770/igt@i915_selftest@live_blt.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16365/fi-hsw-4770/igt@i915_selftest@live_blt.html
* igt@i915_selftest@live_execlists:
- fi-icl-y: [DMESG-FAIL][11] ([fdo#108569]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-icl-y/igt@i915_selftest@live_execlists.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16365/fi-icl-y/igt@i915_selftest@live_execlists.html
#### Warnings ####
* igt@gem_close_race@basic-threads:
- fi-byt-n2820: [TIMEOUT][13] ([fdo#112271] / [i915#1084] / [i915#816]) -> [TIMEOUT][14] ([fdo#112271] / [i915#816])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-byt-n2820/igt@gem_close_race@basic-threads.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16365/fi-byt-n2820/igt@gem_close_race@basic-threads.html
* igt@i915_pm_rpm@basic-rte:
- fi-kbl-guc: [FAIL][15] ([i915#579]) -> [SKIP][16] ([fdo#109271])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16365/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-icl-u2: [FAIL][17] ([fdo#103375]) -> [FAIL][18] ([i915#217])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7853/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16365/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111550]: https://bugs.freedesktop.org/show_bug.cgi?id=111550
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#1084]: https://gitlab.freedesktop.org/drm/intel/issues/1084
[i915#178]: https://gitlab.freedesktop.org/drm/intel/issues/178
[i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
[i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563
[i915#579]: https://gitlab.freedesktop.org/drm/intel/issues/579
[i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
Participating hosts (47 -> 40)
------------------------------
Additional (3): fi-skl-6700k2 fi-cfl-8109u fi-skl-6600u
Missing (10): fi-ilk-m540 fi-hsw-4200u fi-hsw-peppy fi-byt-squawks fi-bsw-cyan fi-skl-lmem fi-blb-e6850 fi-byt-clapper fi-bdw-samus fi-kbl-r
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7853 -> Patchwork_16365
CI-20190529: 20190529
CI_DRM_7853: 1df04205c16923e525efe9c26d6e98612d38c9b3 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5409: 93aefe6baa3fabf8c0cabe83e185f7b8f8d8753d @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16365: 91e3dfdea4b1c51b49e632c7fc4c179a6bc6ae77 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
91e3dfdea4b1 drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno
27e50c9b8f62 drm/i915: Initialise basic fence before acquiring seqno
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16365/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 3+ messages in thread
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2020-01-31 20:24 [Intel-gfx] [PATCH 1/2] drm/i915: Initialise basic fence before acquiring seqno Chris Wilson
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