Intel-GFX Archive on lore.kernel.org
 help / color / Atom feed
* [Intel-gfx] [PATCH v2 1/2] drm/i915/mst: Set intel_dp_set_m_n() for MST slaves
@ 2020-02-11 18:50 José Roberto de Souza
  2020-02-11 18:50 ` [Intel-gfx] [PATCH v2 2/2] drm/i915/display/tgl: Enable hotplug detection in TC5 and TC6 José Roberto de Souza
                   ` (4 more replies)
  0 siblings, 5 replies; 7+ messages in thread
From: José Roberto de Souza @ 2020-02-11 18:50 UTC (permalink / raw)
  To: intel-gfx; +Cc: Jani Nikula

Commit 1c9d2eb24153 ("drm/i915: move intel_dp_set_m_n() to encoder for
DDI platforms") moved the intel_dp_set_m_n() from hsw_crtc_enable()
to intel_ddi_pre_enable_dp() but it missed add it to
intel_mst_pre_enable_dp() causing MST slaves to not work.

v2: Not setting intel_ddi_set_dp_msa() twice for MST master

Fixes: 1c9d2eb24153 ("drm/i915: move intel_dp_set_m_n() to encoder for DDI platforms")
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c    | 5 +++--
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 ++
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 544e15603ef9..a1fd8fd67c85 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3615,10 +3615,11 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
 	/* MST will call a setting of MSA after an allocating of Virtual Channel
 	 * from MST encoder pre_enable callback.
 	 */
-	if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST))
+	if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)) {
 		intel_ddi_set_dp_msa(crtc_state, conn_state);
 
-	intel_dp_set_m_n(crtc_state, M1_N1);
+		intel_dp_set_m_n(crtc_state, M1_N1);
+	}
 }
 
 static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 9cd59141953d..d7bfa7c350e9 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -480,6 +480,8 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
 		intel_ddi_enable_pipe_clock(pipe_config);
 
 	intel_ddi_set_dp_msa(pipe_config, conn_state);
+
+	intel_dp_set_m_n(pipe_config, M1_N1);
 }
 
 static void intel_mst_enable_dp(struct intel_encoder *encoder,
-- 
2.25.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [Intel-gfx] [PATCH v2 2/2] drm/i915/display/tgl: Enable hotplug detection in TC5 and TC6
  2020-02-11 18:50 [Intel-gfx] [PATCH v2 1/2] drm/i915/mst: Set intel_dp_set_m_n() for MST slaves José Roberto de Souza
@ 2020-02-11 18:50 ` José Roberto de Souza
  2020-02-12 18:33   ` Matt Roper
  2020-02-12  9:08 ` [Intel-gfx] [PATCH v2 1/2] drm/i915/mst: Set intel_dp_set_m_n() for MST slaves Jani Nikula
                   ` (3 subsequent siblings)
  4 siblings, 1 reply; 7+ messages in thread
From: José Roberto de Souza @ 2020-02-11 18:50 UTC (permalink / raw)
  To: intel-gfx

The hotplug interruption detection was not being enabled for TC5 and
TC6 in the north detection side.

Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 3d0cd0960bd2..abd979ef75ec 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3051,6 +3051,9 @@ static void gen11_hpd_detection_setup(struct drm_i915_private *dev_priv)
 		   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC2) |
 		   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC3) |
 		   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4);
+	if (INTEL_GEN(dev_priv) >= 12)
+		hotplug |= GEN11_HOTPLUG_CTL_ENABLE(PORT_TC5) |
+			   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC6);
 	I915_WRITE(GEN11_TC_HOTPLUG_CTL, hotplug);
 
 	hotplug = I915_READ(GEN11_TBT_HOTPLUG_CTL);
@@ -3058,6 +3061,9 @@ static void gen11_hpd_detection_setup(struct drm_i915_private *dev_priv)
 		   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC2) |
 		   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC3) |
 		   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4);
+	if (INTEL_GEN(dev_priv) >= 12)
+		hotplug |= GEN11_HOTPLUG_CTL_ENABLE(PORT_TC5) |
+			   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC6);
 	I915_WRITE(GEN11_TBT_HOTPLUG_CTL, hotplug);
 }
 
-- 
2.25.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/mst: Set intel_dp_set_m_n() for MST slaves
  2020-02-11 18:50 [Intel-gfx] [PATCH v2 1/2] drm/i915/mst: Set intel_dp_set_m_n() for MST slaves José Roberto de Souza
  2020-02-11 18:50 ` [Intel-gfx] [PATCH v2 2/2] drm/i915/display/tgl: Enable hotplug detection in TC5 and TC6 José Roberto de Souza
@ 2020-02-12  9:08 ` Jani Nikula
  2020-02-12 23:55 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] " Patchwork
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 7+ messages in thread
From: Jani Nikula @ 2020-02-12  9:08 UTC (permalink / raw)
  To: José Roberto de Souza, intel-gfx

On Tue, 11 Feb 2020, José Roberto de Souza <jose.souza@intel.com> wrote:
> Commit 1c9d2eb24153 ("drm/i915: move intel_dp_set_m_n() to encoder for
> DDI platforms") moved the intel_dp_set_m_n() from hsw_crtc_enable()
> to intel_ddi_pre_enable_dp() but it missed add it to
> intel_mst_pre_enable_dp() causing MST slaves to not work.
>
> v2: Not setting intel_ddi_set_dp_msa() twice for MST master
>
> Fixes: 1c9d2eb24153 ("drm/i915: move intel_dp_set_m_n() to encoder for DDI platforms")
> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>

Thanks,

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c    | 5 +++--
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 ++
>  2 files changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 544e15603ef9..a1fd8fd67c85 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3615,10 +3615,11 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
>  	/* MST will call a setting of MSA after an allocating of Virtual Channel
>  	 * from MST encoder pre_enable callback.
>  	 */
> -	if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST))
> +	if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)) {
>  		intel_ddi_set_dp_msa(crtc_state, conn_state);
>  
> -	intel_dp_set_m_n(crtc_state, M1_N1);
> +		intel_dp_set_m_n(crtc_state, M1_N1);
> +	}
>  }
>  
>  static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 9cd59141953d..d7bfa7c350e9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -480,6 +480,8 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
>  		intel_ddi_enable_pipe_clock(pipe_config);
>  
>  	intel_ddi_set_dp_msa(pipe_config, conn_state);
> +
> +	intel_dp_set_m_n(pipe_config, M1_N1);
>  }
>  
>  static void intel_mst_enable_dp(struct intel_encoder *encoder,

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [Intel-gfx] [PATCH v2 2/2] drm/i915/display/tgl: Enable hotplug detection in TC5 and TC6
  2020-02-11 18:50 ` [Intel-gfx] [PATCH v2 2/2] drm/i915/display/tgl: Enable hotplug detection in TC5 and TC6 José Roberto de Souza
@ 2020-02-12 18:33   ` Matt Roper
  0 siblings, 0 replies; 7+ messages in thread
From: Matt Roper @ 2020-02-12 18:33 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx, Lucas De Marchi

On Tue, Feb 11, 2020 at 10:50:08AM -0800, José Roberto de Souza wrote:
> The hotplug interruption detection was not being enabled for TC5 and
> TC6 in the north detection side.

TC5 and TC6 would be ports H & I.  We're lacking handling in a few other
places as well (e.g., aux channels).  I sent patches to update some of
those areas a few months back, but Lucas suggested that we just remove
these ports completely since all TGL SKU's don't actually pin them out
for use.

For reference:
  https://lists.freedesktop.org/archives/intel-gfx/2019-October/217820.html

I don't have strong feelings either way, but we should probably all
agree on a direction and then handle it consistently everywhere in the
code.


Matt


> 
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 3d0cd0960bd2..abd979ef75ec 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -3051,6 +3051,9 @@ static void gen11_hpd_detection_setup(struct drm_i915_private *dev_priv)
>  		   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC2) |
>  		   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC3) |
>  		   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4);
> +	if (INTEL_GEN(dev_priv) >= 12)
> +		hotplug |= GEN11_HOTPLUG_CTL_ENABLE(PORT_TC5) |
> +			   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC6);
>  	I915_WRITE(GEN11_TC_HOTPLUG_CTL, hotplug);
>  
>  	hotplug = I915_READ(GEN11_TBT_HOTPLUG_CTL);
> @@ -3058,6 +3061,9 @@ static void gen11_hpd_detection_setup(struct drm_i915_private *dev_priv)
>  		   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC2) |
>  		   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC3) |
>  		   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4);
> +	if (INTEL_GEN(dev_priv) >= 12)
> +		hotplug |= GEN11_HOTPLUG_CTL_ENABLE(PORT_TC5) |
> +			   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC6);
>  	I915_WRITE(GEN11_TBT_HOTPLUG_CTL, hotplug);
>  }
>  
> -- 
> 2.25.0
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/mst: Set intel_dp_set_m_n() for MST slaves
  2020-02-11 18:50 [Intel-gfx] [PATCH v2 1/2] drm/i915/mst: Set intel_dp_set_m_n() for MST slaves José Roberto de Souza
  2020-02-11 18:50 ` [Intel-gfx] [PATCH v2 2/2] drm/i915/display/tgl: Enable hotplug detection in TC5 and TC6 José Roberto de Souza
  2020-02-12  9:08 ` [Intel-gfx] [PATCH v2 1/2] drm/i915/mst: Set intel_dp_set_m_n() for MST slaves Jani Nikula
@ 2020-02-12 23:55 ` " Patchwork
  2020-02-15  2:23 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
  2020-02-15  9:27 ` [Intel-gfx] [PATCH v2 1/2] " Jani Nikula
  4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2020-02-12 23:55 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v2,1/2] drm/i915/mst: Set intel_dp_set_m_n() for MST slaves
URL   : https://patchwork.freedesktop.org/series/73333/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7926 -> Patchwork_16536
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/index.html

Known issues
------------

  Here are the changes found in Patchwork_16536 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_gem_contexts:
    - fi-cfl-guc:         [PASS][1] -> [INCOMPLETE][2] ([CI#80] / [fdo#106070] / [i915#424])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html

  
  [CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80
  [fdo#106070]: https://bugs.freedesktop.org/show_bug.cgi?id=106070
  [i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424


Participating hosts (45 -> 40)
------------------------------

  Additional (8): fi-hsw-peppy fi-skl-6770hq fi-bdw-gvtdvm fi-glk-dsi fi-gdg-551 fi-bsw-kefka fi-kbl-7560u fi-kbl-r 
  Missing    (13): fi-ilk-m540 fi-bdw-samus fi-bsw-n3050 fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-kbl-7500u fi-ctg-p8600 fi-cfl-8109u fi-blb-e6850 fi-byt-clapper fi-skl-6600u fi-snb-2600 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7926 -> Patchwork_16536

  CI-20190529: 20190529
  CI_DRM_7926: 6b2fe829d300abf285e9db8b252ffacd216df3ed @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5437: ae42fedfd0c536c560e8e17b06d9c7b94a4e8f0c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16536: fd8890d26afc19e2b5953c7dfad3d1cf07b276b8 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

fd8890d26afc drm/i915/display/tgl: Enable hotplug detection in TC5 and TC6
bf8f5f0801d3 drm/i915/mst: Set intel_dp_set_m_n() for MST slaves

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915/mst: Set intel_dp_set_m_n() for MST slaves
  2020-02-11 18:50 [Intel-gfx] [PATCH v2 1/2] drm/i915/mst: Set intel_dp_set_m_n() for MST slaves José Roberto de Souza
                   ` (2 preceding siblings ...)
  2020-02-12 23:55 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] " Patchwork
@ 2020-02-15  2:23 ` " Patchwork
  2020-02-15  9:27 ` [Intel-gfx] [PATCH v2 1/2] " Jani Nikula
  4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2020-02-15  2:23 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v2,1/2] drm/i915/mst: Set intel_dp_set_m_n() for MST slaves
URL   : https://patchwork.freedesktop.org/series/73333/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7926_full -> Patchwork_16536_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_16536_full:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox}:
    - shard-skl:          [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl3/igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-skl9/igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox.html

  
Known issues
------------

  Here are the changes found in Patchwork_16536_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_busy@busy-vcs1:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#112080]) +8 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb4/igt@gem_busy@busy-vcs1.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-iclb6/igt@gem_busy@busy-vcs1.html

  * igt@gem_caching@read-writes:
    - shard-hsw:          [PASS][5] -> [FAIL][6] ([i915#694])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-hsw7/igt@gem_caching@read-writes.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-hsw6/igt@gem_caching@read-writes.html

  * igt@gem_exec_capture@capture-bsd2:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([fdo#109276]) +8 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb1/igt@gem_exec_capture@capture-bsd2.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-iclb6/igt@gem_exec_capture@capture-bsd2.html

  * igt@gem_exec_schedule@pi-distinct-iova-bsd:
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([i915#677])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb5/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-iclb4/igt@gem_exec_schedule@pi-distinct-iova-bsd.html

  * igt@gem_exec_schedule@reorder-wide-bsd:
    - shard-iclb:         [PASS][11] -> [SKIP][12] ([fdo#112146]) +4 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb7/igt@gem_exec_schedule@reorder-wide-bsd.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-iclb4/igt@gem_exec_schedule@reorder-wide-bsd.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-skl:          [PASS][13] -> [INCOMPLETE][14] ([i915#69]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl5/igt@gem_workarounds@suspend-resume-fd.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-skl8/igt@gem_workarounds@suspend-resume-fd.html

  * igt@i915_pm_rpm@modeset-stress-extra-wait:
    - shard-glk:          [PASS][15] -> [DMESG-WARN][16] ([i915#118] / [i915#95])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-glk6/igt@i915_pm_rpm@modeset-stress-extra-wait.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-glk8/igt@i915_pm_rpm@modeset-stress-extra-wait.html

  * igt@kms_color@pipe-a-gamma:
    - shard-tglb:         [PASS][17] -> [FAIL][18] ([i915#1149])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-tglb7/igt@kms_color@pipe-a-gamma.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-tglb6/igt@kms_color@pipe-a-gamma.html

  * igt@kms_cursor_crc@pipe-c-cursor-128x128-random:
    - shard-skl:          [PASS][19] -> [FAIL][20] ([i915#54])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl1/igt@kms_cursor_crc@pipe-c-cursor-128x128-random.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-skl10/igt@kms_cursor_crc@pipe-c-cursor-128x128-random.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
    - shard-glk:          [PASS][21] -> [FAIL][22] ([i915#72])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-glk1/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-glk3/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-skl:          [PASS][23] -> [FAIL][24] ([IGT#5])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-apl:          [PASS][25] -> [DMESG-WARN][26] ([i915#180]) +1 similar issue
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-apl1/igt@kms_fbcon_fbt@fbc-suspend.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-apl6/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@plain-flip-fb-recreate:
    - shard-skl:          [PASS][27] -> [FAIL][28] ([i915#34])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl1/igt@kms_flip@plain-flip-fb-recreate.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-skl2/igt@kms_flip@plain-flip-fb-recreate.html

  * igt@kms_frontbuffer_tracking@psr-suspend:
    - shard-skl:          [PASS][29] -> [INCOMPLETE][30] ([i915#123] / [i915#69])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl1/igt@kms_frontbuffer_tracking@psr-suspend.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-skl7/igt@kms_frontbuffer_tracking@psr-suspend.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          [PASS][31] -> [DMESG-WARN][32] ([i915#180]) +1 similar issue
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-kbl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-kbl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][33] -> [FAIL][34] ([fdo#108145] / [i915#265])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
    - shard-skl:          [PASS][35] -> [FAIL][36] ([fdo#108145])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
    - shard-skl:          [PASS][37] -> [DMESG-WARN][38] ([IGT#6])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl4/igt@kms_plane_multiple@atomic-pipe-b-tiling-y.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-skl3/igt@kms_plane_multiple@atomic-pipe-b-tiling-y.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [PASS][39] -> [SKIP][40] ([fdo#109642] / [fdo#111068])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-iclb6/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_sprite_render:
    - shard-iclb:         [PASS][41] -> [SKIP][42] ([fdo#109441]) +1 similar issue
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb2/igt@kms_psr@psr2_sprite_render.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-iclb7/igt@kms_psr@psr2_sprite_render.html

  
#### Possible fixes ####

  * igt@gem_busy@extended-parallel-vcs1:
    - shard-iclb:         [SKIP][43] ([fdo#112080]) -> [PASS][44] +12 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb8/igt@gem_busy@extended-parallel-vcs1.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-iclb2/igt@gem_busy@extended-parallel-vcs1.html

  * igt@gem_caching@reads:
    - shard-hsw:          [FAIL][45] ([i915#694]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-hsw6/igt@gem_caching@reads.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-hsw5/igt@gem_caching@reads.html

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [SKIP][47] ([fdo#110841]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb2/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-iclb7/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_exec_schedule@preempt-queue-bsd:
    - shard-iclb:         [SKIP][49] ([fdo#112146]) -> [PASS][50] +4 similar issues
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb2/igt@gem_exec_schedule@preempt-queue-bsd.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-iclb6/igt@gem_exec_schedule@preempt-queue-bsd.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-kbl:          [FAIL][51] ([i915#644]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-kbl1/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-kbl1/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-skl:          [INCOMPLETE][53] ([i915#716]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl9/igt@gen9_exec_parse@allowed-single.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-skl10/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_pm_rps@waitboost:
    - shard-iclb:         [FAIL][55] ([i915#413]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb3/igt@i915_pm_rps@waitboost.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-iclb5/igt@i915_pm_rps@waitboost.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][57] ([i915#180]) -> [PASS][58] +2 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-skl:          [FAIL][59] ([i915#79]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl4/igt@kms_flip@flip-vs-expired-vblank.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-skl3/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible:
    - shard-skl:          [FAIL][61] ([i915#34]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-skl7/igt@kms_flip@plain-flip-fb-recreate-interruptible.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-apl:          [DMESG-WARN][63] ([i915#180]) -> [PASS][64] +3 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-apl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-apl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html

  * igt@kms_psr@psr2_primary_blt:
    - shard-iclb:         [SKIP][65] ([fdo#109441]) -> [PASS][66] +1 similar issue
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb3/igt@kms_psr@psr2_primary_blt.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-iclb2/igt@kms_psr@psr2_primary_blt.html

  * igt@kms_setmode@basic:
    - shard-apl:          [FAIL][67] ([i915#31]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-apl7/igt@kms_setmode@basic.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-apl4/igt@kms_setmode@basic.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [SKIP][69] ([fdo#109276]) -> [PASS][70] +20 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb7/igt@prime_busy@hang-bsd2.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-iclb4/igt@prime_busy@hang-bsd2.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [SKIP][71] ([fdo#112080]) -> [FAIL][72] ([IGT#28])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb5/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_ctx_isolation@vcs1-nonpriv-switch:
    - shard-iclb:         [FAIL][73] ([IGT#28]) -> [SKIP][74] ([fdo#112080])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-iclb6/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html

  * igt@gem_tiled_blits@interruptible:
    - shard-hsw:          [FAIL][75] ([i915#818]) -> [FAIL][76] ([i915#694])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-hsw2/igt@gem_tiled_blits@interruptible.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/shard-hsw7/igt@gem_tiled_blits@interruptible.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
  [IGT#5]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/5
  [IGT#6]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [i915#1149]: https://gitlab.freedesktop.org/drm/intel/issues/1149
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#123]: https://gitlab.freedesktop.org/drm/intel/issues/123
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
  [i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679
  [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
  [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
  [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
  [i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7926 -> Patchwork_16536

  CI-20190529: 20190529
  CI_DRM_7926: 6b2fe829d300abf285e9db8b252ffacd216df3ed @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5437: ae42fedfd0c536c560e8e17b06d9c7b94a4e8f0c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16536: fd8890d26afc19e2b5953c7dfad3d1cf07b276b8 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16536/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/mst: Set intel_dp_set_m_n() for MST slaves
  2020-02-11 18:50 [Intel-gfx] [PATCH v2 1/2] drm/i915/mst: Set intel_dp_set_m_n() for MST slaves José Roberto de Souza
                   ` (3 preceding siblings ...)
  2020-02-15  2:23 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2020-02-15  9:27 ` " Jani Nikula
  4 siblings, 0 replies; 7+ messages in thread
From: Jani Nikula @ 2020-02-15  9:27 UTC (permalink / raw)
  To: José Roberto de Souza, intel-gfx

On Tue, 11 Feb 2020, José Roberto de Souza <jose.souza@intel.com> wrote:
> Commit 1c9d2eb24153 ("drm/i915: move intel_dp_set_m_n() to encoder for
> DDI platforms") moved the intel_dp_set_m_n() from hsw_crtc_enable()
> to intel_ddi_pre_enable_dp() but it missed add it to
> intel_mst_pre_enable_dp() causing MST slaves to not work.
>
> v2: Not setting intel_ddi_set_dp_msa() twice for MST master
>
> Fixes: 1c9d2eb24153 ("drm/i915: move intel_dp_set_m_n() to encoder for DDI platforms")
> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>

Pushed patch 1 to dinq, thanks for the fix.

BR,
Jani.

> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c    | 5 +++--
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 ++
>  2 files changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 544e15603ef9..a1fd8fd67c85 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3615,10 +3615,11 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
>  	/* MST will call a setting of MSA after an allocating of Virtual Channel
>  	 * from MST encoder pre_enable callback.
>  	 */
> -	if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST))
> +	if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)) {
>  		intel_ddi_set_dp_msa(crtc_state, conn_state);
>  
> -	intel_dp_set_m_n(crtc_state, M1_N1);
> +		intel_dp_set_m_n(crtc_state, M1_N1);
> +	}
>  }
>  
>  static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 9cd59141953d..d7bfa7c350e9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -480,6 +480,8 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
>  		intel_ddi_enable_pipe_clock(pipe_config);
>  
>  	intel_ddi_set_dp_msa(pipe_config, conn_state);
> +
> +	intel_dp_set_m_n(pipe_config, M1_N1);
>  }
>  
>  static void intel_mst_enable_dp(struct intel_encoder *encoder,

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, back to index

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-11 18:50 [Intel-gfx] [PATCH v2 1/2] drm/i915/mst: Set intel_dp_set_m_n() for MST slaves José Roberto de Souza
2020-02-11 18:50 ` [Intel-gfx] [PATCH v2 2/2] drm/i915/display/tgl: Enable hotplug detection in TC5 and TC6 José Roberto de Souza
2020-02-12 18:33   ` Matt Roper
2020-02-12  9:08 ` [Intel-gfx] [PATCH v2 1/2] drm/i915/mst: Set intel_dp_set_m_n() for MST slaves Jani Nikula
2020-02-12 23:55 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] " Patchwork
2020-02-15  2:23 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-02-15  9:27 ` [Intel-gfx] [PATCH v2 1/2] " Jani Nikula

Intel-GFX Archive on lore.kernel.org

Archives are clonable:
	git clone --mirror https://lore.kernel.org/intel-gfx/0 intel-gfx/git/0.git

	# If you have public-inbox 1.1+ installed, you may
	# initialize and index your mirror using the following commands:
	public-inbox-init -V2 intel-gfx intel-gfx/ https://lore.kernel.org/intel-gfx \
		intel-gfx@lists.freedesktop.org
	public-inbox-index intel-gfx

Example config snippet for mirrors

Newsgroup available over NNTP:
	nntp://nntp.lore.kernel.org/org.freedesktop.lists.intel-gfx


AGPL code for this site: git clone https://public-inbox.org/public-inbox.git