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end of thread, other threads:[~2020-03-13 16:05 UTC | newest]

Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
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     [not found] <20200311162300.1838847-1-matthew.d.roper@intel.com>
2020-03-12  1:11 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for Gen11 workarounds (rev2) Patchwork
2020-03-12  3:59   ` Matt Roper
2020-03-12  5:09 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for Gen11 workarounds (rev3) Patchwork
2020-03-12  6:05 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for Gen11 workarounds (rev4) Patchwork
     [not found] ` <20200311162300.1838847-2-matthew.d.roper@intel.com>
2020-03-12 16:25   ` [Intel-gfx] [PATCH v2 1/6] drm/i915: Handle all MCR ranges Mika Kuoppala
     [not found] ` <20200311162300.1838847-6-matthew.d.roper@intel.com>
2020-03-12 16:27   ` [Intel-gfx] [PATCH v2 5/6] drm/i915: Apply Wa_1406680159:icl, ehl as an engine workaround Mika Kuoppala
     [not found] ` <20200311162300.1838847-7-matthew.d.roper@intel.com>
2020-03-12 16:55   ` [Intel-gfx] [PATCH v2 6/6] drm/i915: Add Wa_1605460711 / Wa_1408767742 to ICL and EHL Mika Kuoppala
2020-03-12 18:49 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Gen11 workarounds (rev5) Patchwork
     [not found] ` <20200311162300.1838847-3-matthew.d.roper@intel.com>
2020-03-12 21:46   ` [Intel-gfx] [PATCH v2 2/6] drm/i915: Add Wa_1207131216:icl,ehl Souza, Jose
     [not found] ` <20200311162300.1838847-5-matthew.d.roper@intel.com>
2020-03-12 22:07   ` [Intel-gfx] [PATCH v2 4/6] drm/i915: Add Wa_1406306137:icl,ehl Souza, Jose
2020-03-12 22:30     ` Souza, Jose
     [not found] ` <20200311162300.1838847-4-matthew.d.roper@intel.com>
2020-03-12 22:38   ` [Intel-gfx] [PATCH v2 3/6] drm/i915: Add Wa_1604278689:icl,ehl Souza, Jose
2020-03-13  8:37 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for Gen11 workarounds (rev5) Patchwork
2020-03-13 16:05   ` Matt Roper

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