* [Intel-gfx] [PATCH] drm/i915/selftests: Refactor sibling selection
@ 2020-05-18 10:29 Chris Wilson
2020-05-18 10:38 ` Tvrtko Ursulin
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Chris Wilson @ 2020-05-18 10:29 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
Tvrtko spotted that some selftests were using 'break' not 'continue',
which will fail for discontiguous engine layouts such as on Icelake
(which may have vcs0 and vcs2).
Reported-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 68 ++++++++++----------------
1 file changed, 27 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 824f99c4cc7c..94854a467e66 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -3600,13 +3600,30 @@ static int nop_virtual_engine(struct intel_gt *gt,
return err;
}
+static unsigned int select_siblings(struct intel_gt *gt,
+ unsigned int class,
+ struct intel_engine_cs **siblings)
+{
+ unsigned int n = 0;
+ unsigned int inst;
+
+ for (inst = 0; inst <= MAX_ENGINE_INSTANCE; inst++) {
+ if (!gt->engine_class[class][inst])
+ continue;
+
+ siblings[n++] = gt->engine_class[class][inst];
+ }
+
+ return n;
+}
+
static int live_virtual_engine(void *arg)
{
struct intel_gt *gt = arg;
struct intel_engine_cs *siblings[MAX_ENGINE_INSTANCE + 1];
struct intel_engine_cs *engine;
enum intel_engine_id id;
- unsigned int class, inst;
+ unsigned int class;
int err;
if (intel_uc_uses_guc_submission(>->uc))
@@ -3624,13 +3641,7 @@ static int live_virtual_engine(void *arg)
for (class = 0; class <= MAX_ENGINE_CLASS; class++) {
int nsibling, n;
- nsibling = 0;
- for (inst = 0; inst <= MAX_ENGINE_INSTANCE; inst++) {
- if (!gt->engine_class[class][inst])
- continue;
-
- siblings[nsibling++] = gt->engine_class[class][inst];
- }
+ nsibling = select_siblings(gt, class, siblings);
if (nsibling < 2)
continue;
@@ -3739,7 +3750,7 @@ static int live_virtual_mask(void *arg)
{
struct intel_gt *gt = arg;
struct intel_engine_cs *siblings[MAX_ENGINE_INSTANCE + 1];
- unsigned int class, inst;
+ unsigned int class;
int err;
if (intel_uc_uses_guc_submission(>->uc))
@@ -3748,13 +3759,7 @@ static int live_virtual_mask(void *arg)
for (class = 0; class <= MAX_ENGINE_CLASS; class++) {
unsigned int nsibling;
- nsibling = 0;
- for (inst = 0; inst <= MAX_ENGINE_INSTANCE; inst++) {
- if (!gt->engine_class[class][inst])
- break;
-
- siblings[nsibling++] = gt->engine_class[class][inst];
- }
+ nsibling = select_siblings(gt, class, siblings);
if (nsibling < 2)
continue;
@@ -3876,7 +3881,7 @@ static int live_virtual_preserved(void *arg)
{
struct intel_gt *gt = arg;
struct intel_engine_cs *siblings[MAX_ENGINE_INSTANCE + 1];
- unsigned int class, inst;
+ unsigned int class;
/*
* Check that the context image retains non-privileged (user) registers
@@ -3894,13 +3899,7 @@ static int live_virtual_preserved(void *arg)
for (class = 0; class <= MAX_ENGINE_CLASS; class++) {
int nsibling, err;
- nsibling = 0;
- for (inst = 0; inst <= MAX_ENGINE_INSTANCE; inst++) {
- if (!gt->engine_class[class][inst])
- continue;
-
- siblings[nsibling++] = gt->engine_class[class][inst];
- }
+ nsibling = select_siblings(gt, class, siblings);
if (nsibling < 2)
continue;
@@ -4111,7 +4110,7 @@ static int live_virtual_bond(void *arg)
};
struct intel_gt *gt = arg;
struct intel_engine_cs *siblings[MAX_ENGINE_INSTANCE + 1];
- unsigned int class, inst;
+ unsigned int class;
int err;
if (intel_uc_uses_guc_submission(>->uc))
@@ -4121,14 +4120,7 @@ static int live_virtual_bond(void *arg)
const struct phase *p;
int nsibling;
- nsibling = 0;
- for (inst = 0; inst <= MAX_ENGINE_INSTANCE; inst++) {
- if (!gt->engine_class[class][inst])
- break;
-
- GEM_BUG_ON(nsibling == ARRAY_SIZE(siblings));
- siblings[nsibling++] = gt->engine_class[class][inst];
- }
+ nsibling = select_siblings(gt, class, siblings);
if (nsibling < 2)
continue;
@@ -4266,7 +4258,7 @@ static int live_virtual_reset(void *arg)
{
struct intel_gt *gt = arg;
struct intel_engine_cs *siblings[MAX_ENGINE_INSTANCE + 1];
- unsigned int class, inst;
+ unsigned int class;
/*
* Check that we handle a reset event within a virtual engine.
@@ -4284,13 +4276,7 @@ static int live_virtual_reset(void *arg)
for (class = 0; class <= MAX_ENGINE_CLASS; class++) {
int nsibling, err;
- nsibling = 0;
- for (inst = 0; inst <= MAX_ENGINE_INSTANCE; inst++) {
- if (!gt->engine_class[class][inst])
- continue;
-
- siblings[nsibling++] = gt->engine_class[class][inst];
- }
+ nsibling = select_siblings(gt, class, siblings);
if (nsibling < 2)
continue;
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/selftests: Refactor sibling selection
2020-05-18 10:29 [Intel-gfx] [PATCH] drm/i915/selftests: Refactor sibling selection Chris Wilson
@ 2020-05-18 10:38 ` Tvrtko Ursulin
2020-05-18 13:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-05-18 15:45 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Tvrtko Ursulin @ 2020-05-18 10:38 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On 18/05/2020 11:29, Chris Wilson wrote:
> Tvrtko spotted that some selftests were using 'break' not 'continue',
> which will fail for discontiguous engine layouts such as on Icelake
> (which may have vcs0 and vcs2).
>
> Reported-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> drivers/gpu/drm/i915/gt/selftest_lrc.c | 68 ++++++++++----------------
> 1 file changed, 27 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> index 824f99c4cc7c..94854a467e66 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> @@ -3600,13 +3600,30 @@ static int nop_virtual_engine(struct intel_gt *gt,
> return err;
> }
>
> +static unsigned int select_siblings(struct intel_gt *gt,
> + unsigned int class,
> + struct intel_engine_cs **siblings)
> +{
> + unsigned int n = 0;
> + unsigned int inst;
> +
> + for (inst = 0; inst <= MAX_ENGINE_INSTANCE; inst++) {
> + if (!gt->engine_class[class][inst])
> + continue;
> +
> + siblings[n++] = gt->engine_class[class][inst];
> + }
> +
> + return n;
> +}
> +
> static int live_virtual_engine(void *arg)
> {
> struct intel_gt *gt = arg;
> struct intel_engine_cs *siblings[MAX_ENGINE_INSTANCE + 1];
> struct intel_engine_cs *engine;
> enum intel_engine_id id;
> - unsigned int class, inst;
> + unsigned int class;
> int err;
>
> if (intel_uc_uses_guc_submission(>->uc))
> @@ -3624,13 +3641,7 @@ static int live_virtual_engine(void *arg)
> for (class = 0; class <= MAX_ENGINE_CLASS; class++) {
> int nsibling, n;
>
> - nsibling = 0;
> - for (inst = 0; inst <= MAX_ENGINE_INSTANCE; inst++) {
> - if (!gt->engine_class[class][inst])
> - continue;
> -
> - siblings[nsibling++] = gt->engine_class[class][inst];
> - }
> + nsibling = select_siblings(gt, class, siblings);
> if (nsibling < 2)
> continue;
>
> @@ -3739,7 +3750,7 @@ static int live_virtual_mask(void *arg)
> {
> struct intel_gt *gt = arg;
> struct intel_engine_cs *siblings[MAX_ENGINE_INSTANCE + 1];
> - unsigned int class, inst;
> + unsigned int class;
> int err;
>
> if (intel_uc_uses_guc_submission(>->uc))
> @@ -3748,13 +3759,7 @@ static int live_virtual_mask(void *arg)
> for (class = 0; class <= MAX_ENGINE_CLASS; class++) {
> unsigned int nsibling;
>
> - nsibling = 0;
> - for (inst = 0; inst <= MAX_ENGINE_INSTANCE; inst++) {
> - if (!gt->engine_class[class][inst])
> - break;
> -
> - siblings[nsibling++] = gt->engine_class[class][inst];
> - }
> + nsibling = select_siblings(gt, class, siblings);
> if (nsibling < 2)
> continue;
>
> @@ -3876,7 +3881,7 @@ static int live_virtual_preserved(void *arg)
> {
> struct intel_gt *gt = arg;
> struct intel_engine_cs *siblings[MAX_ENGINE_INSTANCE + 1];
> - unsigned int class, inst;
> + unsigned int class;
>
> /*
> * Check that the context image retains non-privileged (user) registers
> @@ -3894,13 +3899,7 @@ static int live_virtual_preserved(void *arg)
> for (class = 0; class <= MAX_ENGINE_CLASS; class++) {
> int nsibling, err;
>
> - nsibling = 0;
> - for (inst = 0; inst <= MAX_ENGINE_INSTANCE; inst++) {
> - if (!gt->engine_class[class][inst])
> - continue;
> -
> - siblings[nsibling++] = gt->engine_class[class][inst];
> - }
> + nsibling = select_siblings(gt, class, siblings);
> if (nsibling < 2)
> continue;
>
> @@ -4111,7 +4110,7 @@ static int live_virtual_bond(void *arg)
> };
> struct intel_gt *gt = arg;
> struct intel_engine_cs *siblings[MAX_ENGINE_INSTANCE + 1];
> - unsigned int class, inst;
> + unsigned int class;
> int err;
>
> if (intel_uc_uses_guc_submission(>->uc))
> @@ -4121,14 +4120,7 @@ static int live_virtual_bond(void *arg)
> const struct phase *p;
> int nsibling;
>
> - nsibling = 0;
> - for (inst = 0; inst <= MAX_ENGINE_INSTANCE; inst++) {
> - if (!gt->engine_class[class][inst])
> - break;
> -
> - GEM_BUG_ON(nsibling == ARRAY_SIZE(siblings));
> - siblings[nsibling++] = gt->engine_class[class][inst];
> - }
> + nsibling = select_siblings(gt, class, siblings);
> if (nsibling < 2)
> continue;
>
> @@ -4266,7 +4258,7 @@ static int live_virtual_reset(void *arg)
> {
> struct intel_gt *gt = arg;
> struct intel_engine_cs *siblings[MAX_ENGINE_INSTANCE + 1];
> - unsigned int class, inst;
> + unsigned int class;
>
> /*
> * Check that we handle a reset event within a virtual engine.
> @@ -4284,13 +4276,7 @@ static int live_virtual_reset(void *arg)
> for (class = 0; class <= MAX_ENGINE_CLASS; class++) {
> int nsibling, err;
>
> - nsibling = 0;
> - for (inst = 0; inst <= MAX_ENGINE_INSTANCE; inst++) {
> - if (!gt->engine_class[class][inst])
> - continue;
> -
> - siblings[nsibling++] = gt->engine_class[class][inst];
> - }
> + nsibling = select_siblings(gt, class, siblings);
> if (nsibling < 2)
> continue;
>
>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Refactor sibling selection
2020-05-18 10:29 [Intel-gfx] [PATCH] drm/i915/selftests: Refactor sibling selection Chris Wilson
2020-05-18 10:38 ` Tvrtko Ursulin
@ 2020-05-18 13:35 ` Patchwork
2020-05-18 15:45 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2020-05-18 13:35 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Refactor sibling selection
URL : https://patchwork.freedesktop.org/series/77352/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8494 -> Patchwork_17687
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/index.html
Known issues
------------
Here are the changes found in Patchwork_17687 that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@i915_selftest@live@execlists:
- fi-whl-u: [INCOMPLETE][1] ([i915#656]) -> [PASS][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/fi-whl-u/igt@i915_selftest@live@execlists.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/fi-whl-u/igt@i915_selftest@live@execlists.html
[i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
Participating hosts (51 -> 44)
------------------------------
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_8494 -> Patchwork_17687
CI-20190529: 20190529
CI_DRM_8494: 3d15348fde9b998e754da0b0655baf02b98e7f17 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5657: 649eae5c905a7460b44305800f95db83a6dd47cb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17687: bcaad47fab4cccc5491e27d972fbdd278ab68b4b @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
bcaad47fab4c drm/i915/selftests: Refactor sibling selection
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Refactor sibling selection
2020-05-18 10:29 [Intel-gfx] [PATCH] drm/i915/selftests: Refactor sibling selection Chris Wilson
2020-05-18 10:38 ` Tvrtko Ursulin
2020-05-18 13:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
@ 2020-05-18 15:45 ` Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2020-05-18 15:45 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Refactor sibling selection
URL : https://patchwork.freedesktop.org/series/77352/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8494_full -> Patchwork_17687_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_17687_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_workarounds@suspend-resume:
- shard-kbl: [PASS][1] -> [DMESG-WARN][2] ([i915#180]) +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-kbl3/igt@gem_workarounds@suspend-resume.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-kbl3/igt@gem_workarounds@suspend-resume.html
* igt@gen9_exec_parse@allowed-all:
- shard-skl: [PASS][3] -> [DMESG-WARN][4] ([i915#1436] / [i915#716])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-skl5/igt@gen9_exec_parse@allowed-all.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-skl8/igt@gen9_exec_parse@allowed-all.html
* igt@i915_selftest@live@execlists:
- shard-skl: [PASS][5] -> [INCOMPLETE][6] ([i915#1795] / [i915#1874])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-skl7/igt@i915_selftest@live@execlists.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-skl9/igt@i915_selftest@live@execlists.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [PASS][7] -> [FAIL][8] ([i915#1188]) +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-skl8/igt@kms_hdr@bpc-switch-dpms.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-skl8/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
- shard-skl: [PASS][9] -> [FAIL][10] ([fdo#108145] / [i915#265])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
* igt@kms_psr@psr2_sprite_blt:
- shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#109441])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-iclb3/igt@kms_psr@psr2_sprite_blt.html
#### Possible fixes ####
* {igt@gem_exec_schedule@pi-shared-iova@rcs0}:
- shard-tglb: [INCOMPLETE][13] ([i915#1193]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-tglb2/igt@gem_exec_schedule@pi-shared-iova@rcs0.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-tglb8/igt@gem_exec_schedule@pi-shared-iova@rcs0.html
* {igt@kms_atomic_transition@plane-all-transition-nonblocking@pipe-b}:
- shard-kbl: [DMESG-WARN][15] ([i915#78]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-kbl2/igt@kms_atomic_transition@plane-all-transition-nonblocking@pipe-b.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-kbl3/igt@kms_atomic_transition@plane-all-transition-nonblocking@pipe-b.html
* igt@kms_cursor_crc@pipe-b-cursor-128x42-offscreen:
- shard-tglb: [FAIL][17] ([i915#1897]) -> [PASS][18] +4 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-tglb1/igt@kms_cursor_crc@pipe-b-cursor-128x42-offscreen.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-tglb2/igt@kms_cursor_crc@pipe-b-cursor-128x42-offscreen.html
* igt@kms_cursor_crc@pipe-c-cursor-64x64-onscreen:
- shard-skl: [FAIL][19] ([i915#54]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-skl4/igt@kms_cursor_crc@pipe-c-cursor-64x64-onscreen.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-skl7/igt@kms_cursor_crc@pipe-c-cursor-64x64-onscreen.html
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: [SKIP][21] ([fdo#109349]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-iclb4/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
* {igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1}:
- shard-skl: [FAIL][23] ([i915#79]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-skl2/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* {igt@kms_flip@flip-vs-suspend-interruptible@c-dp1}:
- shard-apl: [DMESG-WARN][25] ([i915#180]) -> [PASS][26] +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-apl6/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu:
- shard-tglb: [FAIL][27] ([i915#1897] / [i915#402]) -> [PASS][28] +4 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu.html
* igt@kms_hdr@bpc-switch:
- shard-skl: [FAIL][29] ([i915#1188]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-skl9/igt@kms_hdr@bpc-switch.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-skl7/igt@kms_hdr@bpc-switch.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-kbl: [DMESG-WARN][31] ([i915#180]) -> [PASS][32] +8 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-kbl2/igt@kms_hdr@bpc-switch-suspend.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-kbl3/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [FAIL][33] ([fdo#108145] / [i915#265]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [SKIP][35] ([fdo#109642] / [fdo#111068]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-iclb1/igt@kms_psr2_su@frontbuffer.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_cursor_plane_onoff:
- shard-iclb: [SKIP][37] ([fdo#109441]) -> [PASS][38] +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-iclb4/igt@kms_psr@psr2_cursor_plane_onoff.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html
#### Warnings ####
* igt@i915_pm_dc@dc6-dpms:
- shard-tglb: [FAIL][39] ([i915#454]) -> [SKIP][40] ([i915#468])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-tglb5/igt@i915_pm_dc@dc6-dpms.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-tglb2/igt@i915_pm_dc@dc6-dpms.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-0:
- shard-tglb: [FAIL][41] ([i915#1172] / [i915#1897] / [i915#402]) -> [FAIL][42] ([i915#1172] / [i915#1897]) +1 similar issue
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-tglb8/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-tglb8/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html
* igt@kms_color@pipe-d-degamma:
- shard-tglb: [FAIL][43] ([i915#1149] / [i915#1897]) -> [FAIL][44] ([i915#1149] / [i915#1897] / [i915#402])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-tglb6/igt@kms_color@pipe-d-degamma.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-tglb6/igt@kms_color@pipe-d-degamma.html
* igt@kms_content_protection@lic:
- shard-apl: [DMESG-FAIL][45] ([fdo#110321]) -> [FAIL][46] ([fdo#110321])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-apl8/igt@kms_content_protection@lic.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-apl6/igt@kms_content_protection@lic.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt:
- shard-tglb: [FAIL][47] ([i915#1897]) -> [FAIL][48] ([i915#1897] / [i915#402]) +2 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt.html
* igt@kms_plane@plane-panning-top-left-pipe-d-planes:
- shard-tglb: [FAIL][49] ([i915#1897] / [i915#402]) -> [FAIL][50] ([i915#1897]) +2 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8494/shard-tglb5/igt@kms_plane@plane-panning-top-left-pipe-d-planes.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/shard-tglb1/igt@kms_plane@plane-panning-top-left-pipe-d-planes.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110321]: https://bugs.freedesktop.org/show_bug.cgi?id=110321
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[i915#1149]: https://gitlab.freedesktop.org/drm/intel/issues/1149
[i915#1172]: https://gitlab.freedesktop.org/drm/intel/issues/1172
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1193]: https://gitlab.freedesktop.org/drm/intel/issues/1193
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
[i915#1795]: https://gitlab.freedesktop.org/drm/intel/issues/1795
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1874]: https://gitlab.freedesktop.org/drm/intel/issues/1874
[i915#1883]: https://gitlab.freedesktop.org/drm/intel/issues/1883
[i915#1897]: https://gitlab.freedesktop.org/drm/intel/issues/1897
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#46]: https://gitlab.freedesktop.org/drm/intel/issues/46
[i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#78]: https://gitlab.freedesktop.org/drm/intel/issues/78
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_8494 -> Patchwork_17687
CI-20190529: 20190529
CI_DRM_8494: 3d15348fde9b998e754da0b0655baf02b98e7f17 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5657: 649eae5c905a7460b44305800f95db83a6dd47cb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17687: bcaad47fab4cccc5491e27d972fbdd278ab68b4b @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17687/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-05-18 15:45 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-05-18 10:29 [Intel-gfx] [PATCH] drm/i915/selftests: Refactor sibling selection Chris Wilson
2020-05-18 10:38 ` Tvrtko Ursulin
2020-05-18 13:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-05-18 15:45 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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