* [Intel-gfx] [PATCH v4 0/1] drm/i915/gt: Initialize reserved and unspecified MOCS indices
@ 2020-07-29 10:25 Ayaz A Siddiqui
2020-07-29 10:25 ` [Intel-gfx] [PATCH v4 1/1] " Ayaz A Siddiqui
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Ayaz A Siddiqui @ 2020-07-29 10:25 UTC (permalink / raw)
To: intel-gfx
In order to avoid functional breakage of mis-programmed applications that
have grown to depend on unused MOCS entries, we are programming
those entries to be equal to fully cached ("L3 + LLC") entry.
These reserved and unspecified entries should not be used as they may be
changed to less performant variants with better coherency in the future
if more entries are needed.
V2: As suggested by Lucas De Marchi to utilise __init_mocs_table for
programming default value, setting I915_MOCS_PTE index of tgl_mocs_table
with desired value.
Ayaz A Siddiqui (1):
drm/i915/gt: Initialize reserved and unspecified MOCS indices
drivers/gpu/drm/i915/gt/intel_mocs.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
--
2.26.2
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^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] [PATCH v4 1/1] drm/i915/gt: Initialize reserved and unspecified MOCS indices
2020-07-29 10:25 [Intel-gfx] [PATCH v4 0/1] drm/i915/gt: Initialize reserved and unspecified MOCS indices Ayaz A Siddiqui
@ 2020-07-29 10:25 ` Ayaz A Siddiqui
2020-07-31 7:23 ` Siddiqui, Ayaz A
2020-10-12 14:53 ` Joonas Lahtinen
2020-07-29 10:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Initialize reserved and unspecified MOCS indices (rev4) Patchwork
` (2 subsequent siblings)
3 siblings, 2 replies; 9+ messages in thread
From: Ayaz A Siddiqui @ 2020-07-29 10:25 UTC (permalink / raw)
To: intel-gfx
Cc: Spruit Neil R, Mathew Alwin, Zhou Cheng, Lucas De Marchi,
Chris Wilson, Benemelis Mike G, Mcguire Russell W
In order to avoid functional breakage of mis-programmed applications that
have grown to depend on unused MOCS entries, we are programming
those entries to be equal to fully cached ("L3 + LLC") entry.
These reserved and unspecified entries should not be used as they may be
changed to less performant variants with better coherency in the future
if more entries are needed.
V2: As suggested by Lucas De Marchi to utilise __init_mocs_table for
programming default value, setting I915_MOCS_PTE index of tgl_mocs_table
with desired value.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Tomasz Lis <tomasz.lis@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Francisco Jerez <currojerez@riseup.net>
Cc: Mathew Alwin <alwin.mathew@intel.com>
Cc: Mcguire Russell W <russell.w.mcguire@intel.com>
Cc: Spruit Neil R <neil.r.spruit@intel.com>
Cc: Zhou Cheng <cheng.zhou@intel.com>
Cc: Benemelis Mike G <mike.g.benemelis@intel.com>
Signed-off-by: Ayaz A Siddiqui <ayaz.siddiqui@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/gt/intel_mocs.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
index 632e08a4592b..f5dde723f612 100644
--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
@@ -234,11 +234,17 @@ static const struct drm_i915_mocs_entry broxton_mocs_table[] = {
L3_1_UC)
static const struct drm_i915_mocs_entry tgl_mocs_table[] = {
- /* Base - Error (Reserved for Non-Use) */
- MOCS_ENTRY(0, 0x0, 0x0),
- /* Base - Reserved */
- MOCS_ENTRY(1, 0x0, 0x0),
+ /* NOTE:
+ * Reserved and unspecified MOCS indices have been set to (L3 + LCC).
+ * These reserved entries should never be used, they may be changed
+ * to low performant variants with better coherency in the future if
+ * more entries are needed. We are programming index I915_MOCS_PTE(1)
+ * only, __init_mocs_table() take care to program unused index with
+ * this entry.
+ */
+ MOCS_ENTRY(1, LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),
+ L3_3_WB),
GEN11_MOCS_ENTRIES,
/* Implicitly enable L1 - HDC:L1 + L3 + LLC */
@@ -265,6 +271,7 @@ static const struct drm_i915_mocs_entry tgl_mocs_table[] = {
MOCS_ENTRY(61,
LE_1_UC | LE_TC_1_LLC,
L3_3_WB),
+
};
static const struct drm_i915_mocs_entry icl_mocs_table[] = {
--
2.26.2
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Initialize reserved and unspecified MOCS indices (rev4)
2020-07-29 10:25 [Intel-gfx] [PATCH v4 0/1] drm/i915/gt: Initialize reserved and unspecified MOCS indices Ayaz A Siddiqui
2020-07-29 10:25 ` [Intel-gfx] [PATCH v4 1/1] " Ayaz A Siddiqui
@ 2020-07-29 10:34 ` Patchwork
2020-07-29 13:09 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Initialize reserved and unspecified MOCS indices (rev5) Patchwork
2020-07-29 13:29 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
3 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2020-07-29 10:34 UTC (permalink / raw)
To: Ayaz A Siddiqui; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/gt: Initialize reserved and unspecified MOCS indices (rev4)
URL : https://patchwork.freedesktop.org/series/78012/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.0
Fast mode used, each commit won't be checked separately.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Initialize reserved and unspecified MOCS indices (rev5)
2020-07-29 10:25 [Intel-gfx] [PATCH v4 0/1] drm/i915/gt: Initialize reserved and unspecified MOCS indices Ayaz A Siddiqui
2020-07-29 10:25 ` [Intel-gfx] [PATCH v4 1/1] " Ayaz A Siddiqui
2020-07-29 10:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Initialize reserved and unspecified MOCS indices (rev4) Patchwork
@ 2020-07-29 13:09 ` Patchwork
2020-07-29 13:29 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
3 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2020-07-29 13:09 UTC (permalink / raw)
To: Ayaz A Siddiqui; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/gt: Initialize reserved and unspecified MOCS indices (rev5)
URL : https://patchwork.freedesktop.org/series/78012/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.0
Fast mode used, each commit won't be checked separately.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Initialize reserved and unspecified MOCS indices (rev5)
2020-07-29 10:25 [Intel-gfx] [PATCH v4 0/1] drm/i915/gt: Initialize reserved and unspecified MOCS indices Ayaz A Siddiqui
` (2 preceding siblings ...)
2020-07-29 13:09 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Initialize reserved and unspecified MOCS indices (rev5) Patchwork
@ 2020-07-29 13:29 ` Patchwork
3 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2020-07-29 13:29 UTC (permalink / raw)
To: Ayaz A Siddiqui; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 6899 bytes --]
== Series Details ==
Series: drm/i915/gt: Initialize reserved and unspecified MOCS indices (rev5)
URL : https://patchwork.freedesktop.org/series/78012/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8814 -> Patchwork_18266
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_18266 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_18266, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18266/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_18266:
### IGT changes ###
#### Possible regressions ####
* igt@kms_frontbuffer_tracking@basic:
- fi-tgl-u2: NOTRUN -> [FAIL][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18266/fi-tgl-u2/igt@kms_frontbuffer_tracking@basic.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_frontbuffer_tracking@basic:
- {fi-tgl-dsi}: [PASS][2] -> [FAIL][3]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-tgl-dsi/igt@kms_frontbuffer_tracking@basic.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18266/fi-tgl-dsi/igt@kms_frontbuffer_tracking@basic.html
Known issues
------------
Here are the changes found in Patchwork_18266 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_module_load@reload:
- fi-byt-j1900: [PASS][4] -> [DMESG-WARN][5] ([i915#1982])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-byt-j1900/igt@i915_module_load@reload.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18266/fi-byt-j1900/igt@i915_module_load@reload.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-legacy:
- fi-icl-u2: [PASS][6] -> [DMESG-WARN][7] ([i915#1982])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18266/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html
#### Possible fixes ####
* igt@debugfs_test@read_all_entries:
- {fi-kbl-7560u}: [INCOMPLETE][8] ([i915#2175]) -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18266/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: [DMESG-WARN][10] ([i915#1982]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18266/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-byt-j1900: [DMESG-WARN][12] ([i915#1982]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18266/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- fi-icl-u2: [DMESG-WARN][14] ([i915#1982]) -> [PASS][15]
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18266/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
#### Warnings ####
* igt@gem_exec_suspend@basic-s0:
- fi-kbl-x1275: [DMESG-WARN][16] ([i915#1982] / [i915#62] / [i915#92]) -> [DMESG-WARN][17] ([i915#62] / [i915#92])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18266/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html
* igt@i915_module_load@reload:
- fi-icl-u2: [DMESG-WARN][18] ([i915#289]) -> [DMESG-WARN][19] ([i915#1982] / [i915#289])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-icl-u2/igt@i915_module_load@reload.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18266/fi-icl-u2/igt@i915_module_load@reload.html
* igt@kms_flip@basic-flip-vs-dpms@a-dp1:
- fi-kbl-x1275: [DMESG-WARN][20] ([i915#62] / [i915#92]) -> [DMESG-WARN][21] ([i915#62] / [i915#92] / [i915#95])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-dpms@a-dp1.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18266/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-dpms@a-dp1.html
* igt@kms_force_connector_basic@force-edid:
- fi-kbl-x1275: [DMESG-WARN][22] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][23] ([i915#62] / [i915#92]) +2 similar issues
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-kbl-x1275/igt@kms_force_connector_basic@force-edid.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18266/fi-kbl-x1275/igt@kms_force_connector_basic@force-edid.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2175]: https://gitlab.freedesktop.org/drm/intel/issues/2175
[i915#289]: https://gitlab.freedesktop.org/drm/intel/issues/289
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (39 -> 36)
------------------------------
Additional (1): fi-tgl-u2
Missing (4): fi-byt-clapper fi-byt-squawks fi-bsw-cyan fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_8814 -> Patchwork_18266
CI-20190529: 20190529
CI_DRM_8814: c3d46022808ab0325db29918a829ac7fa02a4314 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5750: 95d906bf458634850626f7e5d6a707191022279f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18266: 2415991b5aebda9e650476867a26e1af8f6f9f14 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
2415991b5aeb drm/i915/gt: Initialize reserved and unspecified MOCS indices
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18266/index.html
[-- Attachment #1.2: Type: text/html, Size: 9006 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH v4 1/1] drm/i915/gt: Initialize reserved and unspecified MOCS indices
2020-07-29 10:25 ` [Intel-gfx] [PATCH v4 1/1] " Ayaz A Siddiqui
@ 2020-07-31 7:23 ` Siddiqui, Ayaz A
2020-10-12 16:55 ` Lucas De Marchi
2020-10-12 14:53 ` Joonas Lahtinen
1 sibling, 1 reply; 9+ messages in thread
From: Siddiqui, Ayaz A @ 2020-07-31 7:23 UTC (permalink / raw)
To: intel-gfx
Cc: Spruit, Neil R, Mathew, Alwin, Zhou, Cheng, De Marchi, Lucas,
Chris Wilson, Benemelis, Mike G, Mcguire, Russell W
> -----Original Message-----
> From: Siddiqui, Ayaz A <ayaz.siddiqui@intel.com>
> Sent: Wednesday, July 29, 2020 3:56 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Siddiqui, Ayaz A <ayaz.siddiqui@intel.com>; Chris Wilson <chris@chris-
> wilson.co.uk>; De Marchi, Lucas <lucas.demarchi@intel.com>; Lis, Tomasz
> <tomasz.lis@intel.com>; Roper, Matthew D <matthew.d.roper@intel.com>;
> Joonas Lahtinen <joonas.lahtinen@linux.intel.com>; Francisco Jerez
> <currojerez@riseup.net>; Mathew, Alwin <alwin.mathew@intel.com>; Mcguire,
> Russell W <russell.w.mcguire@intel.com>; Spruit, Neil R
> <neil.r.spruit@intel.com>; Zhou, Cheng <cheng.zhou@intel.com>; Benemelis,
> Mike G <mike.g.benemelis@intel.com>
> Subject: [PATCH v4 1/1] drm/i915/gt: Initialize reserved and unspecified MOCS
> indices
>
> In order to avoid functional breakage of mis-programmed applications that have
> grown to depend on unused MOCS entries, we are programming those entries to
> be equal to fully cached ("L3 + LLC") entry.
>
> These reserved and unspecified entries should not be used as they may be
> changed to less performant variants with better coherency in the future if more
> entries are needed.
>
> V2: As suggested by Lucas De Marchi to utilise __init_mocs_table for
> programming default value, setting I915_MOCS_PTE index of tgl_mocs_table
> with desired value.
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Tomasz Lis <tomasz.lis@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Francisco Jerez <currojerez@riseup.net>
> Cc: Mathew Alwin <alwin.mathew@intel.com>
> Cc: Mcguire Russell W <russell.w.mcguire@intel.com>
> Cc: Spruit Neil R <neil.r.spruit@intel.com>
> Cc: Zhou Cheng <cheng.zhou@intel.com>
> Cc: Benemelis Mike G <mike.g.benemelis@intel.com>
>
> Signed-off-by: Ayaz A Siddiqui <ayaz.siddiqui@intel.com>
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_mocs.c | 15 +++++++++++----
> 1 file changed, 11 insertions(+), 4 deletions(-)
>
I'm getting a false failure with this patch , which I tested locally and its passing
with this patch. I think that this failure is blocking merge of this patch.
Can Someone please let me know how to proceed in this case for merging?
Regards
-Ayaz
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c
> b/drivers/gpu/drm/i915/gt/intel_mocs.c
> index 632e08a4592b..f5dde723f612 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> @@ -234,11 +234,17 @@ static const struct drm_i915_mocs_entry
> broxton_mocs_table[] = {
> L3_1_UC)
>
> static const struct drm_i915_mocs_entry tgl_mocs_table[] = {
> - /* Base - Error (Reserved for Non-Use) */
> - MOCS_ENTRY(0, 0x0, 0x0),
> - /* Base - Reserved */
> - MOCS_ENTRY(1, 0x0, 0x0),
>
> + /* NOTE:
> + * Reserved and unspecified MOCS indices have been set to (L3 + LCC).
> + * These reserved entries should never be used, they may be changed
> + * to low performant variants with better coherency in the future if
> + * more entries are needed. We are programming index
> I915_MOCS_PTE(1)
> + * only, __init_mocs_table() take care to program unused index with
> + * this entry.
> + */
> + MOCS_ENTRY(1, LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),
> + L3_3_WB),
> GEN11_MOCS_ENTRIES,
>
> /* Implicitly enable L1 - HDC:L1 + L3 + LLC */ @@ -265,6 +271,7 @@
> static const struct drm_i915_mocs_entry tgl_mocs_table[] = {
> MOCS_ENTRY(61,
> LE_1_UC | LE_TC_1_LLC,
> L3_3_WB),
> +
> };
>
> static const struct drm_i915_mocs_entry icl_mocs_table[] = {
> --
> 2.26.2
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH v4 1/1] drm/i915/gt: Initialize reserved and unspecified MOCS indices
2020-07-29 10:25 ` [Intel-gfx] [PATCH v4 1/1] " Ayaz A Siddiqui
2020-07-31 7:23 ` Siddiqui, Ayaz A
@ 2020-10-12 14:53 ` Joonas Lahtinen
1 sibling, 0 replies; 9+ messages in thread
From: Joonas Lahtinen @ 2020-10-12 14:53 UTC (permalink / raw)
To: Ayaz A Siddiqui, intel-gfx
Cc: Spruit Neil R, Mathew Alwin, Zhou Cheng, Lucas De Marchi,
Chris Wilson, Benemelis Mike G, Mcguire Russell W
Quoting Ayaz A Siddiqui (2020-07-29 13:25:39)
> In order to avoid functional breakage of mis-programmed applications that
> have grown to depend on unused MOCS entries, we are programming
> those entries to be equal to fully cached ("L3 + LLC") entry.
>
> These reserved and unspecified entries should not be used as they may be
> changed to less performant variants with better coherency in the future
> if more entries are needed.
>
> V2: As suggested by Lucas De Marchi to utilise __init_mocs_table for
> programming default value, setting I915_MOCS_PTE index of tgl_mocs_table
> with desired value.
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Tomasz Lis <tomasz.lis@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Francisco Jerez <currojerez@riseup.net>
> Cc: Mathew Alwin <alwin.mathew@intel.com>
> Cc: Mcguire Russell W <russell.w.mcguire@intel.com>
> Cc: Spruit Neil R <neil.r.spruit@intel.com>
> Cc: Zhou Cheng <cheng.zhou@intel.com>
> Cc: Benemelis Mike G <mike.g.benemelis@intel.com>
>
> Signed-off-by: Ayaz A Siddiqui <ayaz.siddiqui@intel.com>
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Regards, Joonas
> ---
> drivers/gpu/drm/i915/gt/intel_mocs.c | 15 +++++++++++----
> 1 file changed, 11 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
> index 632e08a4592b..f5dde723f612 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> @@ -234,11 +234,17 @@ static const struct drm_i915_mocs_entry broxton_mocs_table[] = {
> L3_1_UC)
>
> static const struct drm_i915_mocs_entry tgl_mocs_table[] = {
> - /* Base - Error (Reserved for Non-Use) */
> - MOCS_ENTRY(0, 0x0, 0x0),
> - /* Base - Reserved */
> - MOCS_ENTRY(1, 0x0, 0x0),
>
> + /* NOTE:
> + * Reserved and unspecified MOCS indices have been set to (L3 + LCC).
> + * These reserved entries should never be used, they may be changed
> + * to low performant variants with better coherency in the future if
> + * more entries are needed. We are programming index I915_MOCS_PTE(1)
> + * only, __init_mocs_table() take care to program unused index with
> + * this entry.
> + */
> + MOCS_ENTRY(1, LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),
> + L3_3_WB),
> GEN11_MOCS_ENTRIES,
>
> /* Implicitly enable L1 - HDC:L1 + L3 + LLC */
> @@ -265,6 +271,7 @@ static const struct drm_i915_mocs_entry tgl_mocs_table[] = {
> MOCS_ENTRY(61,
> LE_1_UC | LE_TC_1_LLC,
> L3_3_WB),
> +
> };
>
> static const struct drm_i915_mocs_entry icl_mocs_table[] = {
> --
> 2.26.2
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH v4 1/1] drm/i915/gt: Initialize reserved and unspecified MOCS indices
2020-07-31 7:23 ` Siddiqui, Ayaz A
@ 2020-10-12 16:55 ` Lucas De Marchi
2020-10-13 10:49 ` Chris Wilson
0 siblings, 1 reply; 9+ messages in thread
From: Lucas De Marchi @ 2020-10-12 16:55 UTC (permalink / raw)
To: Siddiqui, Ayaz A
Cc: Spruit, Neil R, Mathew, Alwin, Zhou, Cheng, intel-gfx,
Chris Wilson, Benemelis, Mike G, Mcguire, Russell W
On Fri, Jul 31, 2020 at 12:23:57AM -0700, Siddiqui, Ayaz A wrote:
>
>
>> -----Original Message-----
>> From: Siddiqui, Ayaz A <ayaz.siddiqui@intel.com>
>> Sent: Wednesday, July 29, 2020 3:56 PM
>> To: intel-gfx@lists.freedesktop.org
>> Cc: Siddiqui, Ayaz A <ayaz.siddiqui@intel.com>; Chris Wilson <chris@chris-
>> wilson.co.uk>; De Marchi, Lucas <lucas.demarchi@intel.com>; Lis, Tomasz
>> <tomasz.lis@intel.com>; Roper, Matthew D <matthew.d.roper@intel.com>;
>> Joonas Lahtinen <joonas.lahtinen@linux.intel.com>; Francisco Jerez
>> <currojerez@riseup.net>; Mathew, Alwin <alwin.mathew@intel.com>; Mcguire,
>> Russell W <russell.w.mcguire@intel.com>; Spruit, Neil R
>> <neil.r.spruit@intel.com>; Zhou, Cheng <cheng.zhou@intel.com>; Benemelis,
>> Mike G <mike.g.benemelis@intel.com>
>> Subject: [PATCH v4 1/1] drm/i915/gt: Initialize reserved and unspecified MOCS
>> indices
>>
>> In order to avoid functional breakage of mis-programmed applications that have
>> grown to depend on unused MOCS entries, we are programming those entries to
>> be equal to fully cached ("L3 + LLC") entry.
>>
>> These reserved and unspecified entries should not be used as they may be
>> changed to less performant variants with better coherency in the future if more
>> entries are needed.
>>
>> V2: As suggested by Lucas De Marchi to utilise __init_mocs_table for
>> programming default value, setting I915_MOCS_PTE index of tgl_mocs_table
>> with desired value.
>>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>> Cc: Tomasz Lis <tomasz.lis@intel.com>
>> Cc: Matt Roper <matthew.d.roper@intel.com>
>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>> Cc: Francisco Jerez <currojerez@riseup.net>
>> Cc: Mathew Alwin <alwin.mathew@intel.com>
>> Cc: Mcguire Russell W <russell.w.mcguire@intel.com>
>> Cc: Spruit Neil R <neil.r.spruit@intel.com>
>> Cc: Zhou Cheng <cheng.zhou@intel.com>
>> Cc: Benemelis Mike G <mike.g.benemelis@intel.com>
>>
>> Signed-off-by: Ayaz A Siddiqui <ayaz.siddiqui@intel.com>
>> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
>> ---
>> drivers/gpu/drm/i915/gt/intel_mocs.c | 15 +++++++++++----
>> 1 file changed, 11 insertions(+), 4 deletions(-)
>>
>
>I'm getting a false failure with this patch , which I tested locally and its passing
>with this patch. I think that this failure is blocking merge of this patch.
>Can Someone please let me know how to proceed in this case for merging?
If it's a false failure, you can go ahead and merge it. Better to reply
to the CI email how is it unrelated.
If you are not sure, you can re-trigger CI by going to the patchwork
page and asking it to test revision 5 again:
https://patchwork.freedesktop.org/series/78012/
Lucas De Marchi
>
>Regards
>-Ayaz
>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c
>> b/drivers/gpu/drm/i915/gt/intel_mocs.c
>> index 632e08a4592b..f5dde723f612 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
>> @@ -234,11 +234,17 @@ static const struct drm_i915_mocs_entry
>> broxton_mocs_table[] = {
>> L3_1_UC)
>>
>> static const struct drm_i915_mocs_entry tgl_mocs_table[] = {
>> - /* Base - Error (Reserved for Non-Use) */
>> - MOCS_ENTRY(0, 0x0, 0x0),
>> - /* Base - Reserved */
>> - MOCS_ENTRY(1, 0x0, 0x0),
>>
>> + /* NOTE:
>> + * Reserved and unspecified MOCS indices have been set to (L3 + LCC).
>> + * These reserved entries should never be used, they may be changed
>> + * to low performant variants with better coherency in the future if
>> + * more entries are needed. We are programming index
>> I915_MOCS_PTE(1)
>> + * only, __init_mocs_table() take care to program unused index with
>> + * this entry.
>> + */
>> + MOCS_ENTRY(1, LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),
>> + L3_3_WB),
>> GEN11_MOCS_ENTRIES,
>>
>> /* Implicitly enable L1 - HDC:L1 + L3 + LLC */ @@ -265,6 +271,7 @@
>> static const struct drm_i915_mocs_entry tgl_mocs_table[] = {
>> MOCS_ENTRY(61,
>> LE_1_UC | LE_TC_1_LLC,
>> L3_3_WB),
>> +
>> };
>>
>> static const struct drm_i915_mocs_entry icl_mocs_table[] = {
>> --
>> 2.26.2
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH v4 1/1] drm/i915/gt: Initialize reserved and unspecified MOCS indices
2020-10-12 16:55 ` Lucas De Marchi
@ 2020-10-13 10:49 ` Chris Wilson
0 siblings, 0 replies; 9+ messages in thread
From: Chris Wilson @ 2020-10-13 10:49 UTC (permalink / raw)
To: Siddiqui, Ayaz A, Lucas De Marchi
Cc: Spruit, Neil R, Mathew, Alwin, Zhou, Cheng, intel-gfx, Benemelis,
Mike G, Mcguire, Russell W
Quoting Lucas De Marchi (2020-10-12 17:55:03)
> On Fri, Jul 31, 2020 at 12:23:57AM -0700, Siddiqui, Ayaz A wrote:
> >
> >
> >> -----Original Message-----
> >> From: Siddiqui, Ayaz A <ayaz.siddiqui@intel.com>
> >> Sent: Wednesday, July 29, 2020 3:56 PM
> >> To: intel-gfx@lists.freedesktop.org
> >> Cc: Siddiqui, Ayaz A <ayaz.siddiqui@intel.com>; Chris Wilson <chris@chris-
> >> wilson.co.uk>; De Marchi, Lucas <lucas.demarchi@intel.com>; Lis, Tomasz
> >> <tomasz.lis@intel.com>; Roper, Matthew D <matthew.d.roper@intel.com>;
> >> Joonas Lahtinen <joonas.lahtinen@linux.intel.com>; Francisco Jerez
> >> <currojerez@riseup.net>; Mathew, Alwin <alwin.mathew@intel.com>; Mcguire,
> >> Russell W <russell.w.mcguire@intel.com>; Spruit, Neil R
> >> <neil.r.spruit@intel.com>; Zhou, Cheng <cheng.zhou@intel.com>; Benemelis,
> >> Mike G <mike.g.benemelis@intel.com>
> >> Subject: [PATCH v4 1/1] drm/i915/gt: Initialize reserved and unspecified MOCS
> >> indices
> >>
> >> In order to avoid functional breakage of mis-programmed applications that have
> >> grown to depend on unused MOCS entries, we are programming those entries to
> >> be equal to fully cached ("L3 + LLC") entry.
> >>
> >> These reserved and unspecified entries should not be used as they may be
> >> changed to less performant variants with better coherency in the future if more
> >> entries are needed.
> >>
> >> V2: As suggested by Lucas De Marchi to utilise __init_mocs_table for
> >> programming default value, setting I915_MOCS_PTE index of tgl_mocs_table
> >> with desired value.
> >>
> >> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> >> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> >> Cc: Tomasz Lis <tomasz.lis@intel.com>
> >> Cc: Matt Roper <matthew.d.roper@intel.com>
> >> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> >> Cc: Francisco Jerez <currojerez@riseup.net>
> >> Cc: Mathew Alwin <alwin.mathew@intel.com>
> >> Cc: Mcguire Russell W <russell.w.mcguire@intel.com>
> >> Cc: Spruit Neil R <neil.r.spruit@intel.com>
> >> Cc: Zhou Cheng <cheng.zhou@intel.com>
> >> Cc: Benemelis Mike G <mike.g.benemelis@intel.com>
> >>
> >> Signed-off-by: Ayaz A Siddiqui <ayaz.siddiqui@intel.com>
> >> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
> >> ---
> >> drivers/gpu/drm/i915/gt/intel_mocs.c | 15 +++++++++++----
> >> 1 file changed, 11 insertions(+), 4 deletions(-)
> >>
> >
> >I'm getting a false failure with this patch , which I tested locally and its passing
> >with this patch. I think that this failure is blocking merge of this patch.
> >Can Someone please let me know how to proceed in this case for merging?
>
> If it's a false failure, you can go ahead and merge it. Better to reply
> to the CI email how is it unrelated.
I would say the kms_frontbuffer_tracking is genuine fail as that is very
cache sensitive. And I've just pushed this to upstream, oops, so now the
problem is a little more urgent.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2020-10-13 10:50 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-07-29 10:25 [Intel-gfx] [PATCH v4 0/1] drm/i915/gt: Initialize reserved and unspecified MOCS indices Ayaz A Siddiqui
2020-07-29 10:25 ` [Intel-gfx] [PATCH v4 1/1] " Ayaz A Siddiqui
2020-07-31 7:23 ` Siddiqui, Ayaz A
2020-10-12 16:55 ` Lucas De Marchi
2020-10-13 10:49 ` Chris Wilson
2020-10-12 14:53 ` Joonas Lahtinen
2020-07-29 10:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Initialize reserved and unspecified MOCS indices (rev4) Patchwork
2020-07-29 13:09 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Initialize reserved and unspecified MOCS indices (rev5) Patchwork
2020-07-29 13:29 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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