* [Intel-gfx] [PATCH v5 0/2] drm/i915: Finish conversion to GRAPHICS_VER
@ 2021-06-06 4:50 Lucas De Marchi
2021-06-06 4:50 ` [Intel-gfx] [PATCH v5 1/2] drm/i915: replace IS_GEN and friends with GRAPHICS_VER Lucas De Marchi
` (9 more replies)
0 siblings, 10 replies; 12+ messages in thread
From: Lucas De Marchi @ 2021-06-06 4:50 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel
v3 is a resend from v2 (https://patchwork.freedesktop.org/series/90693/)
now with dri-devel Cc'ed. Notice that this patch series can be applied
splitting it up through the trees, it's not necessary to apply them
together. The intention is to apply first 3 patches on drm-intel-gt-next
and the remaining on drm-intel-next. I'm intentionally _not_ removing
the INTEL_GEN/IS_GEN/IS_GEN_RANGE macros now. A few days/weeks after
this is applied and when drm-intel-gt-next and drm-intel-next is back in
sync, we can remove any leftovers that went in and remove the macros via
a topic branch.
Latest version of previous series "drm/i915: Extend GEN renames to the
rest of the driver" (https://patchwork.freedesktop.org/series/88825/)
dropped one patch converting all the instances of IS_GEN() and
INTEL_GEN() to GRAPHICS_VER() due to the patches changing the
meaning of the macros IS_GRAPHICS_VER/GRAPHICS_VER and removal of
IS_GRAPHICS_RANGE().
I couldn't find a way to convince coccinelle to fix all places, so I
just did it manually in separate commits the places that were not
updated.
Finish the conversion splitting the changes so it can go to the
different branches (drm-intel-gt-next and drm-intel-next). I also split
the gvt changes, but I think it would be easier to take this directly on
drm-intel-next.
v2: update commit messages with the proper semantic patch (Matt Roper)
and regenerate the patches to also convert changes that got added in
between.
v3: resend with dri-devel Cc'ed since we are touching gt/gem/core. Also,
let's get an ack on merge strategy
v4: rebase and remove patches already applied
v5: rebase, remove patches already applied and remove changes that conflict
with drm-intel-gt-next - they will be removed converted later, together with
the removal of the old macros.
Lucas De Marchi (2):
drm/i915: replace IS_GEN and friends with GRAPHICS_VER
drm/i915: Add remaining conversions to GRAPHICS_VER
drivers/gpu/drm/i915/i915_cmd_parser.c | 10 +--
drivers/gpu/drm/i915/i915_debugfs.c | 30 +++----
drivers/gpu/drm/i915/i915_drv.c | 20 ++---
drivers/gpu/drm/i915/i915_drv.h | 37 +++++----
drivers/gpu/drm/i915/i915_gem.c | 4 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 80 +++++++++----------
drivers/gpu/drm/i915/i915_irq.c | 34 ++++----
drivers/gpu/drm/i915/i915_perf.c | 44 +++++-----
drivers/gpu/drm/i915/i915_pmu.c | 8 +-
drivers/gpu/drm/i915/i915_reg.h | 26 +++---
drivers/gpu/drm/i915/i915_request.c | 4 +-
drivers/gpu/drm/i915/i915_suspend.c | 16 ++--
drivers/gpu/drm/i915/i915_sysfs.c | 2 +-
drivers/gpu/drm/i915/i915_vgpu.c | 2 +-
drivers/gpu/drm/i915/intel_device_info.c | 22 ++---
drivers/gpu/drm/i915/intel_dram.c | 14 ++--
drivers/gpu/drm/i915/intel_pch.c | 10 +--
drivers/gpu/drm/i915/intel_pm.c | 14 ++--
drivers/gpu/drm/i915/intel_sideband.c | 2 +-
drivers/gpu/drm/i915/intel_uncore.c | 24 +++---
drivers/gpu/drm/i915/intel_wopcm.c | 10 +--
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 4 +-
drivers/gpu/drm/i915/selftests/i915_perf.c | 6 +-
drivers/gpu/drm/i915/selftests/i915_request.c | 8 +-
drivers/gpu/drm/i915/selftests/igt_spinner.c | 12 +--
drivers/gpu/drm/i915/selftests/intel_uncore.c | 2 +-
26 files changed, 222 insertions(+), 223 deletions(-)
--
2.31.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH v5 1/2] drm/i915: replace IS_GEN and friends with GRAPHICS_VER
2021-06-06 4:50 [Intel-gfx] [PATCH v5 0/2] drm/i915: Finish conversion to GRAPHICS_VER Lucas De Marchi
@ 2021-06-06 4:50 ` Lucas De Marchi
2021-06-06 4:50 ` [Intel-gfx] [PATCH v5 2/2] drm/i915: Add remaining conversions to GRAPHICS_VER Lucas De Marchi
` (8 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Lucas De Marchi @ 2021-06-06 4:50 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel
This was done by the following semantic patch:
@@ expression i915; @@
- INTEL_GEN(i915)
+ GRAPHICS_VER(i915)
@@ expression i915; expression E; @@
- INTEL_GEN(i915) >= E
+ GRAPHICS_VER(i915) >= E
@@ expression dev_priv; expression E; @@
- !IS_GEN(dev_priv, E)
+ GRAPHICS_VER(dev_priv) != E
@@ expression dev_priv; expression E; @@
- IS_GEN(dev_priv, E)
+ GRAPHICS_VER(dev_priv) == E
@@
expression dev_priv;
expression from, until;
@@
- IS_GEN_RANGE(dev_priv, from, until)
+ IS_GRAPHICS_VER(dev_priv, from, until)
@def@
expression E;
identifier id =~ "^gen$";
@@
- id = GRAPHICS_VER(E)
+ ver = GRAPHICS_VER(E)
@@
identifier def.id;
@@
- id
+ ver
It also takes care of renaming the variable we assign to GRAPHICS_VER()
so to use "ver" rather than "gen".
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 10 +--
drivers/gpu/drm/i915/i915_debugfs.c | 30 +++----
drivers/gpu/drm/i915/i915_drv.c | 20 ++---
drivers/gpu/drm/i915/i915_gem.c | 4 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 80 +++++++++----------
drivers/gpu/drm/i915/i915_irq.c | 34 ++++----
drivers/gpu/drm/i915/i915_perf.c | 44 +++++-----
drivers/gpu/drm/i915/i915_pmu.c | 8 +-
drivers/gpu/drm/i915/i915_request.c | 4 +-
drivers/gpu/drm/i915/i915_suspend.c | 16 ++--
drivers/gpu/drm/i915/i915_sysfs.c | 2 +-
drivers/gpu/drm/i915/i915_vgpu.c | 2 +-
drivers/gpu/drm/i915/intel_device_info.c | 22 ++---
drivers/gpu/drm/i915/intel_dram.c | 14 ++--
drivers/gpu/drm/i915/intel_pch.c | 10 +--
drivers/gpu/drm/i915/intel_pm.c | 14 ++--
drivers/gpu/drm/i915/intel_sideband.c | 2 +-
drivers/gpu/drm/i915/intel_uncore.c | 24 +++---
drivers/gpu/drm/i915/intel_wopcm.c | 10 +--
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 4 +-
drivers/gpu/drm/i915/selftests/i915_perf.c | 6 +-
drivers/gpu/drm/i915/selftests/i915_request.c | 8 +-
drivers/gpu/drm/i915/selftests/igt_spinner.c | 12 +--
drivers/gpu/drm/i915/selftests/intel_uncore.c | 2 +-
24 files changed, 191 insertions(+), 191 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 5b4b2bd46e7c..3992c25a191d 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -946,8 +946,8 @@ int intel_engine_init_cmd_parser(struct intel_engine_cs *engine)
int cmd_table_count;
int ret;
- if (!IS_GEN(engine->i915, 7) && !(IS_GEN(engine->i915, 9) &&
- engine->class == COPY_ENGINE_CLASS))
+ if (GRAPHICS_VER(engine->i915) != 7 && !(GRAPHICS_VER(engine->i915) == 9 &&
+ engine->class == COPY_ENGINE_CLASS))
return 0;
switch (engine->class) {
@@ -977,7 +977,7 @@ int intel_engine_init_cmd_parser(struct intel_engine_cs *engine)
break;
case COPY_ENGINE_CLASS:
engine->get_cmd_length_mask = gen7_blt_get_cmd_length_mask;
- if (IS_GEN(engine->i915, 9)) {
+ if (GRAPHICS_VER(engine->i915) == 9) {
cmd_tables = gen9_blt_cmd_table;
cmd_table_count = ARRAY_SIZE(gen9_blt_cmd_table);
engine->get_cmd_length_mask =
@@ -993,7 +993,7 @@ int intel_engine_init_cmd_parser(struct intel_engine_cs *engine)
cmd_table_count = ARRAY_SIZE(gen7_blt_cmd_table);
}
- if (IS_GEN(engine->i915, 9)) {
+ if (GRAPHICS_VER(engine->i915) == 9) {
engine->reg_tables = gen9_blt_reg_tables;
engine->reg_table_count =
ARRAY_SIZE(gen9_blt_reg_tables);
@@ -1537,7 +1537,7 @@ int intel_engine_cmd_parser(struct intel_engine_cs *engine,
if (IS_HASWELL(engine->i915))
flags = MI_BATCH_NON_SECURE_HSW;
- GEM_BUG_ON(!IS_GEN_RANGE(engine->i915, 6, 7));
+ GEM_BUG_ON(!IS_GRAPHICS_VER(engine->i915, 6, 7));
__gen6_emit_bb_start(batch_end,
batch_addr,
flags);
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index a4d8a836bd57..cc745751ac53 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -361,7 +361,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
- if (IS_GEN(dev_priv, 5)) {
+ if (GRAPHICS_VER(dev_priv) == 5) {
u16 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
u16 rgvstat = intel_uncore_read16(uncore, MEMSTAT_ILK);
@@ -408,7 +408,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
seq_printf(m,
"efficient (RPe) frequency: %d MHz\n",
intel_gpu_freq(rps, rps->efficient_freq));
- } else if (INTEL_GEN(dev_priv) >= 6) {
+ } else if (GRAPHICS_VER(dev_priv) >= 6) {
u32 rp_state_limits;
u32 gt_perf_status;
u32 rp_state_cap;
@@ -432,7 +432,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);
reqf = intel_uncore_read(&dev_priv->uncore, GEN6_RPNSWREQ);
- if (INTEL_GEN(dev_priv) >= 9)
+ if (GRAPHICS_VER(dev_priv) >= 9)
reqf >>= 23;
else {
reqf &= ~GEN6_TURBO_DISABLE;
@@ -458,7 +458,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
- if (INTEL_GEN(dev_priv) >= 11) {
+ if (GRAPHICS_VER(dev_priv) >= 11) {
pm_ier = intel_uncore_read(&dev_priv->uncore, GEN11_GPM_WGBOXPERF_INTR_ENABLE);
pm_imr = intel_uncore_read(&dev_priv->uncore, GEN11_GPM_WGBOXPERF_INTR_MASK);
/*
@@ -467,7 +467,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
*/
pm_isr = 0;
pm_iir = 0;
- } else if (INTEL_GEN(dev_priv) >= 8) {
+ } else if (GRAPHICS_VER(dev_priv) >= 8) {
pm_ier = intel_uncore_read(&dev_priv->uncore, GEN8_GT_IER(2));
pm_imr = intel_uncore_read(&dev_priv->uncore, GEN8_GT_IMR(2));
pm_isr = intel_uncore_read(&dev_priv->uncore, GEN8_GT_ISR(2));
@@ -490,14 +490,14 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
seq_printf(m, "PM IER=0x%08x IMR=0x%08x, MASK=0x%08x\n",
pm_ier, pm_imr, pm_mask);
- if (INTEL_GEN(dev_priv) <= 10)
+ if (GRAPHICS_VER(dev_priv) <= 10)
seq_printf(m, "PM ISR=0x%08x IIR=0x%08x\n",
pm_isr, pm_iir);
seq_printf(m, "pm_intrmsk_mbz: 0x%08x\n",
rps->pm_intrmsk_mbz);
seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
seq_printf(m, "Render p-state ratio: %d\n",
- (gt_perf_status & (INTEL_GEN(dev_priv) >= 9 ? 0x1ff00 : 0xff00)) >> 8);
+ (gt_perf_status & (GRAPHICS_VER(dev_priv) >= 9 ? 0x1ff00 : 0xff00)) >> 8);
seq_printf(m, "Render p-state VID: %d\n",
gt_perf_status & 0xff);
seq_printf(m, "Render p-state limit: %d\n",
@@ -538,20 +538,20 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
max_freq = (IS_GEN9_LP(dev_priv) ? rp_state_cap >> 0 :
rp_state_cap >> 16) & 0xff;
max_freq *= (IS_GEN9_BC(dev_priv) ||
- INTEL_GEN(dev_priv) >= 10 ? GEN9_FREQ_SCALER : 1);
+ GRAPHICS_VER(dev_priv) >= 10 ? GEN9_FREQ_SCALER : 1);
seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
intel_gpu_freq(rps, max_freq));
max_freq = (rp_state_cap & 0xff00) >> 8;
max_freq *= (IS_GEN9_BC(dev_priv) ||
- INTEL_GEN(dev_priv) >= 10 ? GEN9_FREQ_SCALER : 1);
+ GRAPHICS_VER(dev_priv) >= 10 ? GEN9_FREQ_SCALER : 1);
seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
intel_gpu_freq(rps, max_freq));
max_freq = (IS_GEN9_LP(dev_priv) ? rp_state_cap >> 16 :
rp_state_cap >> 0) & 0xff;
max_freq *= (IS_GEN9_BC(dev_priv) ||
- INTEL_GEN(dev_priv) >= 10 ? GEN9_FREQ_SCALER : 1);
+ GRAPHICS_VER(dev_priv) >= 10 ? GEN9_FREQ_SCALER : 1);
seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
intel_gpu_freq(rps, max_freq));
seq_printf(m, "Max overclocked frequency: %dMHz\n",
@@ -622,12 +622,12 @@ static int i915_swizzle_info(struct seq_file *m, void *data)
seq_puts(m, "L-shaped memory detected\n");
/* On BDW+, swizzling is not used. See detect_bit_6_swizzle() */
- if (INTEL_GEN(dev_priv) >= 8 || IS_VALLEYVIEW(dev_priv))
+ if (GRAPHICS_VER(dev_priv) >= 8 || IS_VALLEYVIEW(dev_priv))
return 0;
wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
- if (IS_GEN_RANGE(dev_priv, 3, 4)) {
+ if (IS_GRAPHICS_VER(dev_priv, 3, 4)) {
seq_printf(m, "DDC = 0x%08x\n",
intel_uncore_read(uncore, DCC));
seq_printf(m, "DDC2 = 0x%08x\n",
@@ -645,7 +645,7 @@ static int i915_swizzle_info(struct seq_file *m, void *data)
intel_uncore_read(uncore, MAD_DIMM_C2));
seq_printf(m, "TILECTL = 0x%08x\n",
intel_uncore_read(uncore, TILECTL));
- if (INTEL_GEN(dev_priv) >= 8)
+ if (GRAPHICS_VER(dev_priv) >= 8)
seq_printf(m, "GAMTARBMODE = 0x%08x\n",
intel_uncore_read(uncore, GAMTARBMODE));
else
@@ -956,7 +956,7 @@ static int i915_forcewake_open(struct inode *inode, struct file *file)
atomic_inc(>->user_wakeref);
intel_gt_pm_get(gt);
- if (INTEL_GEN(i915) >= 6)
+ if (GRAPHICS_VER(i915) >= 6)
intel_uncore_forcewake_user_get(gt->uncore);
return 0;
@@ -967,7 +967,7 @@ static int i915_forcewake_release(struct inode *inode, struct file *file)
struct drm_i915_private *i915 = inode->i_private;
struct intel_gt *gt = &i915->gt;
- if (INTEL_GEN(i915) >= 6)
+ if (GRAPHICS_VER(i915) >= 6)
intel_uncore_forcewake_user_put(&i915->uncore);
intel_gt_pm_put(gt);
atomic_dec(>->user_wakeref);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 30c349137be2..850b499c71c8 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -107,12 +107,12 @@ static int i915_get_bridge_dev(struct drm_i915_private *dev_priv)
static int
intel_alloc_mchbar_resource(struct drm_i915_private *dev_priv)
{
- int reg = INTEL_GEN(dev_priv) >= 4 ? MCHBAR_I965 : MCHBAR_I915;
+ int reg = GRAPHICS_VER(dev_priv) >= 4 ? MCHBAR_I965 : MCHBAR_I915;
u32 temp_lo, temp_hi = 0;
u64 mchbar_addr;
int ret;
- if (INTEL_GEN(dev_priv) >= 4)
+ if (GRAPHICS_VER(dev_priv) >= 4)
pci_read_config_dword(dev_priv->bridge_dev, reg + 4, &temp_hi);
pci_read_config_dword(dev_priv->bridge_dev, reg, &temp_lo);
mchbar_addr = ((u64)temp_hi << 32) | temp_lo;
@@ -139,7 +139,7 @@ intel_alloc_mchbar_resource(struct drm_i915_private *dev_priv)
return ret;
}
- if (INTEL_GEN(dev_priv) >= 4)
+ if (GRAPHICS_VER(dev_priv) >= 4)
pci_write_config_dword(dev_priv->bridge_dev, reg + 4,
upper_32_bits(dev_priv->mch_res.start));
@@ -152,7 +152,7 @@ intel_alloc_mchbar_resource(struct drm_i915_private *dev_priv)
static void
intel_setup_mchbar(struct drm_i915_private *dev_priv)
{
- int mchbar_reg = INTEL_GEN(dev_priv) >= 4 ? MCHBAR_I965 : MCHBAR_I915;
+ int mchbar_reg = GRAPHICS_VER(dev_priv) >= 4 ? MCHBAR_I965 : MCHBAR_I915;
u32 temp;
bool enabled;
@@ -191,7 +191,7 @@ intel_setup_mchbar(struct drm_i915_private *dev_priv)
static void
intel_teardown_mchbar(struct drm_i915_private *dev_priv)
{
- int mchbar_reg = INTEL_GEN(dev_priv) >= 4 ? MCHBAR_I965 : MCHBAR_I915;
+ int mchbar_reg = GRAPHICS_VER(dev_priv) >= 4 ? MCHBAR_I965 : MCHBAR_I915;
if (dev_priv->mchbar_need_disable) {
if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
@@ -483,7 +483,7 @@ static int i915_set_dma_info(struct drm_i915_private *i915)
goto mask_err;
/* overlay on gen2 is broken and can't address above 1G */
- if (IS_GEN(i915, 2))
+ if (GRAPHICS_VER(i915) == 2)
mask_size = 30;
/*
@@ -609,7 +609,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
* device. The kernel then disables that interrupt source and so
* prevents the other device from working properly.
*/
- if (INTEL_GEN(dev_priv) >= 5) {
+ if (GRAPHICS_VER(dev_priv) >= 5) {
if (pci_enable_msi(pdev) < 0)
drm_dbg(&dev_priv->drm, "can't enable MSI");
}
@@ -739,7 +739,7 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
intel_platform_name(INTEL_INFO(dev_priv)->platform),
intel_subplatform(RUNTIME_INFO(dev_priv),
INTEL_INFO(dev_priv)->platform),
- INTEL_GEN(dev_priv));
+ GRAPHICS_VER(dev_priv));
intel_device_info_print_static(INTEL_INFO(dev_priv), &p);
intel_device_info_print_runtime(RUNTIME_INFO(dev_priv), &p);
@@ -813,7 +813,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
*/
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
if (IS_ENABLED(CONFIG_DRM_I915_UNSTABLE_FAKE_LMEM)) {
- if (INTEL_GEN(i915) >= 9 && i915_selftest.live < 0 &&
+ if (GRAPHICS_VER(i915) >= 9 && i915_selftest.live < 0 &&
i915->params.fake_lmem_start) {
mkwrite_device_info(i915)->memory_regions =
REGION_SMEM | REGION_LMEM | REGION_STOLEN_SMEM;
@@ -1195,7 +1195,7 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation)
* Fujitsu FSC S7110
* Acer Aspire 1830T
*/
- if (!(hibernation && INTEL_GEN(dev_priv) < 6))
+ if (!(hibernation && GRAPHICS_VER(dev_priv) < 6))
pci_set_power_state(pdev, PCI_D3hot);
out:
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0993d706f067..589388dec48a 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -442,7 +442,7 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data,
/* PREAD is disallowed for all platforms after TGL-LP. This also
* covers all platforms with local memory.
*/
- if (INTEL_GEN(i915) >= 12 && !IS_TIGERLAKE(i915))
+ if (GRAPHICS_VER(i915) >= 12 && !IS_TIGERLAKE(i915))
return -EOPNOTSUPP;
if (args->size == 0)
@@ -722,7 +722,7 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
/* PWRITE is disallowed for all platforms after TGL-LP. This also
* covers all platforms with local memory.
*/
- if (INTEL_GEN(i915) >= 12 && !IS_TIGERLAKE(i915))
+ if (GRAPHICS_VER(i915) >= 12 && !IS_TIGERLAKE(i915))
return -EOPNOTSUPP;
if (args->size == 0)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 833d3e8b7631..35c97c39f125 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -435,13 +435,13 @@ static void error_print_instdone(struct drm_i915_error_state_buf *m,
err_printf(m, " INSTDONE: 0x%08x\n",
ee->instdone.instdone);
- if (ee->engine->class != RENDER_CLASS || INTEL_GEN(m->i915) <= 3)
+ if (ee->engine->class != RENDER_CLASS || GRAPHICS_VER(m->i915) <= 3)
return;
err_printf(m, " SC_INSTDONE: 0x%08x\n",
ee->instdone.slice_common);
- if (INTEL_GEN(m->i915) <= 6)
+ if (GRAPHICS_VER(m->i915) <= 6)
return;
for_each_instdone_slice_subslice(m->i915, sseu, slice, subslice)
@@ -454,7 +454,7 @@ static void error_print_instdone(struct drm_i915_error_state_buf *m,
slice, subslice,
ee->instdone.row[slice][subslice]);
- if (INTEL_GEN(m->i915) < 12)
+ if (GRAPHICS_VER(m->i915) < 12)
return;
err_printf(m, " SC_INSTDONE_EXTRA: 0x%08x\n",
@@ -543,7 +543,7 @@ static void error_print_engine(struct drm_i915_error_state_buf *m,
upper_32_bits(start), lower_32_bits(start),
upper_32_bits(end), lower_32_bits(end));
}
- if (INTEL_GEN(m->i915) >= 4) {
+ if (GRAPHICS_VER(m->i915) >= 4) {
err_printf(m, " BBADDR: 0x%08x_%08x\n",
(u32)(ee->bbaddr>>32), (u32)ee->bbaddr);
err_printf(m, " BB_STATE: 0x%08x\n", ee->bbstate);
@@ -552,14 +552,14 @@ static void error_print_engine(struct drm_i915_error_state_buf *m,
err_printf(m, " INSTPM: 0x%08x\n", ee->instpm);
err_printf(m, " FADDR: 0x%08x %08x\n", upper_32_bits(ee->faddr),
lower_32_bits(ee->faddr));
- if (INTEL_GEN(m->i915) >= 6) {
+ if (GRAPHICS_VER(m->i915) >= 6) {
err_printf(m, " RC PSMI: 0x%08x\n", ee->rc_psmi);
err_printf(m, " FAULT_REG: 0x%08x\n", ee->fault_reg);
}
if (HAS_PPGTT(m->i915)) {
err_printf(m, " GFX_MODE: 0x%08x\n", ee->vm_info.gfx_mode);
- if (INTEL_GEN(m->i915) >= 8) {
+ if (GRAPHICS_VER(m->i915) >= 8) {
int i;
for (i = 0; i < 4; i++)
err_printf(m, " PDP%d: 0x%016llx\n",
@@ -706,25 +706,25 @@ static void err_print_gt(struct drm_i915_error_state_buf *m,
for (i = 0; i < gt->nfence; i++)
err_printf(m, " fence[%d] = %08llx\n", i, gt->fence[i]);
- if (IS_GEN_RANGE(m->i915, 6, 11)) {
+ if (IS_GRAPHICS_VER(m->i915, 6, 11)) {
err_printf(m, "ERROR: 0x%08x\n", gt->error);
err_printf(m, "DONE_REG: 0x%08x\n", gt->done_reg);
}
- if (INTEL_GEN(m->i915) >= 8)
+ if (GRAPHICS_VER(m->i915) >= 8)
err_printf(m, "FAULT_TLB_DATA: 0x%08x 0x%08x\n",
gt->fault_data1, gt->fault_data0);
- if (IS_GEN(m->i915, 7))
+ if (GRAPHICS_VER(m->i915) == 7)
err_printf(m, "ERR_INT: 0x%08x\n", gt->err_int);
- if (IS_GEN_RANGE(m->i915, 8, 11))
+ if (IS_GRAPHICS_VER(m->i915, 8, 11))
err_printf(m, "GTT_CACHE_EN: 0x%08x\n", gt->gtt_cache);
- if (IS_GEN(m->i915, 12))
+ if (GRAPHICS_VER(m->i915) == 12)
err_printf(m, "AUX_ERR_DBG: 0x%08x\n", gt->aux_err);
- if (INTEL_GEN(m->i915) >= 12) {
+ if (GRAPHICS_VER(m->i915) >= 12) {
int i;
for (i = 0; i < GEN12_SFC_DONE_MAX; i++)
@@ -1092,12 +1092,12 @@ static void gt_record_fences(struct intel_gt_coredump *gt)
struct intel_uncore *uncore = gt->_gt->uncore;
int i;
- if (INTEL_GEN(uncore->i915) >= 6) {
+ if (GRAPHICS_VER(uncore->i915) >= 6) {
for (i = 0; i < ggtt->num_fences; i++)
gt->fence[i] =
intel_uncore_read64(uncore,
FENCE_REG_GEN6_LO(i));
- } else if (INTEL_GEN(uncore->i915) >= 4) {
+ } else if (GRAPHICS_VER(uncore->i915) >= 4) {
for (i = 0; i < ggtt->num_fences; i++)
gt->fence[i] =
intel_uncore_read64(uncore,
@@ -1115,20 +1115,20 @@ static void engine_record_registers(struct intel_engine_coredump *ee)
const struct intel_engine_cs *engine = ee->engine;
struct drm_i915_private *i915 = engine->i915;
- if (INTEL_GEN(i915) >= 6) {
+ if (GRAPHICS_VER(i915) >= 6) {
ee->rc_psmi = ENGINE_READ(engine, RING_PSMI_CTL);
- if (INTEL_GEN(i915) >= 12)
+ if (GRAPHICS_VER(i915) >= 12)
ee->fault_reg = intel_uncore_read(engine->uncore,
GEN12_RING_FAULT_REG);
- else if (INTEL_GEN(i915) >= 8)
+ else if (GRAPHICS_VER(i915) >= 8)
ee->fault_reg = intel_uncore_read(engine->uncore,
GEN8_RING_FAULT_REG);
else
ee->fault_reg = GEN6_RING_FAULT_REG_READ(engine);
}
- if (INTEL_GEN(i915) >= 4) {
+ if (GRAPHICS_VER(i915) >= 4) {
ee->esr = ENGINE_READ(engine, RING_ESR);
ee->faddr = ENGINE_READ(engine, RING_DMA_FADD);
ee->ipeir = ENGINE_READ(engine, RING_IPEIR);
@@ -1136,7 +1136,7 @@ static void engine_record_registers(struct intel_engine_coredump *ee)
ee->instps = ENGINE_READ(engine, RING_INSTPS);
ee->bbaddr = ENGINE_READ(engine, RING_BBADDR);
ee->ccid = ENGINE_READ(engine, CCID);
- if (INTEL_GEN(i915) >= 8) {
+ if (GRAPHICS_VER(i915) >= 8) {
ee->faddr |= (u64)ENGINE_READ(engine, RING_DMA_FADD_UDW) << 32;
ee->bbaddr |= (u64)ENGINE_READ(engine, RING_BBADDR_UDW) << 32;
}
@@ -1155,13 +1155,13 @@ static void engine_record_registers(struct intel_engine_coredump *ee)
ee->head = ENGINE_READ(engine, RING_HEAD);
ee->tail = ENGINE_READ(engine, RING_TAIL);
ee->ctl = ENGINE_READ(engine, RING_CTL);
- if (INTEL_GEN(i915) > 2)
+ if (GRAPHICS_VER(i915) > 2)
ee->mode = ENGINE_READ(engine, RING_MI_MODE);
if (!HWS_NEEDS_PHYSICAL(i915)) {
i915_reg_t mmio;
- if (IS_GEN(i915, 7)) {
+ if (GRAPHICS_VER(i915) == 7) {
switch (engine->id) {
default:
MISSING_CASE(engine->id);
@@ -1179,7 +1179,7 @@ static void engine_record_registers(struct intel_engine_coredump *ee)
mmio = VEBOX_HWS_PGA_GEN7;
break;
}
- } else if (IS_GEN(engine->i915, 6)) {
+ } else if (GRAPHICS_VER(engine->i915) == 6) {
mmio = RING_HWS_PGA_GEN6(engine->mmio_base);
} else {
/* XXX: gen8 returns to sanity */
@@ -1196,13 +1196,13 @@ static void engine_record_registers(struct intel_engine_coredump *ee)
ee->vm_info.gfx_mode = ENGINE_READ(engine, RING_MODE_GEN7);
- if (IS_GEN(i915, 6)) {
+ if (GRAPHICS_VER(i915) == 6) {
ee->vm_info.pp_dir_base =
ENGINE_READ(engine, RING_PP_DIR_BASE_READ);
- } else if (IS_GEN(i915, 7)) {
+ } else if (GRAPHICS_VER(i915) == 7) {
ee->vm_info.pp_dir_base =
ENGINE_READ(engine, RING_PP_DIR_BASE);
- } else if (INTEL_GEN(i915) >= 8) {
+ } else if (GRAPHICS_VER(i915) >= 8) {
u32 base = engine->mmio_base;
for (i = 0; i < 4; i++) {
@@ -1534,52 +1534,52 @@ static void gt_record_regs(struct intel_gt_coredump *gt)
gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE_VLV);
}
- if (IS_GEN(i915, 7))
+ if (GRAPHICS_VER(i915) == 7)
gt->err_int = intel_uncore_read(uncore, GEN7_ERR_INT);
- if (INTEL_GEN(i915) >= 12) {
+ if (GRAPHICS_VER(i915) >= 12) {
gt->fault_data0 = intel_uncore_read(uncore,
GEN12_FAULT_TLB_DATA0);
gt->fault_data1 = intel_uncore_read(uncore,
GEN12_FAULT_TLB_DATA1);
- } else if (INTEL_GEN(i915) >= 8) {
+ } else if (GRAPHICS_VER(i915) >= 8) {
gt->fault_data0 = intel_uncore_read(uncore,
GEN8_FAULT_TLB_DATA0);
gt->fault_data1 = intel_uncore_read(uncore,
GEN8_FAULT_TLB_DATA1);
}
- if (IS_GEN(i915, 6)) {
+ if (GRAPHICS_VER(i915) == 6) {
gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE);
gt->gab_ctl = intel_uncore_read(uncore, GAB_CTL);
gt->gfx_mode = intel_uncore_read(uncore, GFX_MODE);
}
/* 2: Registers which belong to multiple generations */
- if (INTEL_GEN(i915) >= 7)
+ if (GRAPHICS_VER(i915) >= 7)
gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE_MT);
- if (INTEL_GEN(i915) >= 6) {
+ if (GRAPHICS_VER(i915) >= 6) {
gt->derrmr = intel_uncore_read(uncore, DERRMR);
- if (INTEL_GEN(i915) < 12) {
+ if (GRAPHICS_VER(i915) < 12) {
gt->error = intel_uncore_read(uncore, ERROR_GEN6);
gt->done_reg = intel_uncore_read(uncore, DONE_REG);
}
}
/* 3: Feature specific registers */
- if (IS_GEN_RANGE(i915, 6, 7)) {
+ if (IS_GRAPHICS_VER(i915, 6, 7)) {
gt->gam_ecochk = intel_uncore_read(uncore, GAM_ECOCHK);
gt->gac_eco = intel_uncore_read(uncore, GAC_ECO_BITS);
}
- if (IS_GEN_RANGE(i915, 8, 11))
+ if (IS_GRAPHICS_VER(i915, 8, 11))
gt->gtt_cache = intel_uncore_read(uncore, HSW_GTT_CACHE_EN);
- if (IS_GEN(i915, 12))
+ if (GRAPHICS_VER(i915) == 12)
gt->aux_err = intel_uncore_read(uncore, GEN12_AUX_ERR_DBG);
- if (INTEL_GEN(i915) >= 12) {
+ if (GRAPHICS_VER(i915) >= 12) {
for (i = 0; i < GEN12_SFC_DONE_MAX; i++) {
gt->sfc_done[i] =
intel_uncore_read(uncore, GEN12_SFC_DONE(i));
@@ -1589,7 +1589,7 @@ static void gt_record_regs(struct intel_gt_coredump *gt)
}
/* 4: Everything else */
- if (INTEL_GEN(i915) >= 11) {
+ if (GRAPHICS_VER(i915) >= 11) {
gt->ier = intel_uncore_read(uncore, GEN8_DE_MISC_IER);
gt->gtier[0] =
intel_uncore_read(uncore,
@@ -1608,7 +1608,7 @@ static void gt_record_regs(struct intel_gt_coredump *gt)
intel_uncore_read(uncore,
GEN11_GUNIT_CSME_INTR_ENABLE);
gt->ngtier = 6;
- } else if (INTEL_GEN(i915) >= 8) {
+ } else if (GRAPHICS_VER(i915) >= 8) {
gt->ier = intel_uncore_read(uncore, GEN8_DE_MISC_IER);
for (i = 0; i < 4; i++)
gt->gtier[i] =
@@ -1618,7 +1618,7 @@ static void gt_record_regs(struct intel_gt_coredump *gt)
gt->ier = intel_uncore_read(uncore, DEIER);
gt->gtier[0] = intel_uncore_read(uncore, GTIER);
gt->ngtier = 1;
- } else if (IS_GEN(i915, 2)) {
+ } else if (GRAPHICS_VER(i915) == 2) {
gt->ier = intel_uncore_read16(uncore, GEN2_IER);
} else if (!IS_VALLEYVIEW(i915)) {
gt->ier = intel_uncore_read(uncore, GEN2_IER);
@@ -1674,7 +1674,7 @@ static const char *error_msg(struct i915_gpu_coredump *error)
len = scnprintf(error->error_msg, sizeof(error->error_msg),
"GPU HANG: ecode %d:%x:%08x",
- INTEL_GEN(error->i915), hung_classes,
+ GRAPHICS_VER(error->i915), hung_classes,
generate_ecode(first));
if (first && first->context.pid) {
/* Just show the first executing process, more is confusing */
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 9446a2758c3e..a11bdb667241 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2175,7 +2175,7 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg)
gt_iir = raw_reg_read(regs, GTIIR);
if (gt_iir) {
raw_reg_write(regs, GTIIR, gt_iir);
- if (INTEL_GEN(i915) >= 6)
+ if (GRAPHICS_VER(i915) >= 6)
gen6_gt_irq_handler(&i915->gt, gt_iir);
else
gen5_gt_irq_handler(&i915->gt, gt_iir);
@@ -2192,7 +2192,7 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg)
ret = IRQ_HANDLED;
}
- if (INTEL_GEN(i915) >= 6) {
+ if (GRAPHICS_VER(i915) >= 6) {
u32 pm_iir = raw_reg_read(regs, GEN6_PMIIR);
if (pm_iir) {
raw_reg_write(regs, GEN6_PMIIR, pm_iir);
@@ -3039,7 +3039,7 @@ static void ilk_irq_reset(struct drm_i915_private *dev_priv)
GEN3_IRQ_RESET(uncore, DE);
dev_priv->irq_mask = ~0u;
- if (IS_GEN(dev_priv, 7))
+ if (GRAPHICS_VER(dev_priv) == 7)
intel_uncore_write(uncore, GEN7_ERR_INT, 0xffffffff);
if (IS_HASWELL(dev_priv)) {
@@ -3658,7 +3658,7 @@ static void ilk_irq_postinstall(struct drm_i915_private *dev_priv)
struct intel_uncore *uncore = &dev_priv->uncore;
u32 display_mask, extra_mask;
- if (INTEL_GEN(dev_priv) >= 7) {
+ if (GRAPHICS_VER(dev_priv) >= 7) {
display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE_IVB |
DE_PCH_EVENT_IVB | DE_AUX_CHANNEL_A_IVB);
extra_mask = (DE_PIPEC_VBLANK_IVB | DE_PIPEB_VBLANK_IVB |
@@ -4330,7 +4330,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
dev_priv->l3_parity.remap_info[i] = NULL;
/* pre-gen11 the guc irqs bits are in the upper 16 bits of the pm reg */
- if (HAS_GT_UC(dev_priv) && INTEL_GEN(dev_priv) < 11)
+ if (HAS_GT_UC(dev_priv) && GRAPHICS_VER(dev_priv) < 11)
dev_priv->gt.pm_guc_events = GUC_INTR_GUC2HOST << 16;
if (!HAS_DISPLAY(dev_priv))
@@ -4401,18 +4401,18 @@ static irq_handler_t intel_irq_handler(struct drm_i915_private *dev_priv)
return cherryview_irq_handler;
else if (IS_VALLEYVIEW(dev_priv))
return valleyview_irq_handler;
- else if (IS_GEN(dev_priv, 4))
+ else if (GRAPHICS_VER(dev_priv) == 4)
return i965_irq_handler;
- else if (IS_GEN(dev_priv, 3))
+ else if (GRAPHICS_VER(dev_priv) == 3)
return i915_irq_handler;
else
return i8xx_irq_handler;
} else {
if (HAS_MASTER_UNIT_IRQ(dev_priv))
return dg1_irq_handler;
- if (INTEL_GEN(dev_priv) >= 11)
+ if (GRAPHICS_VER(dev_priv) >= 11)
return gen11_irq_handler;
- else if (INTEL_GEN(dev_priv) >= 8)
+ else if (GRAPHICS_VER(dev_priv) >= 8)
return gen8_irq_handler;
else
return ilk_irq_handler;
@@ -4426,16 +4426,16 @@ static void intel_irq_reset(struct drm_i915_private *dev_priv)
cherryview_irq_reset(dev_priv);
else if (IS_VALLEYVIEW(dev_priv))
valleyview_irq_reset(dev_priv);
- else if (IS_GEN(dev_priv, 4))
+ else if (GRAPHICS_VER(dev_priv) == 4)
i965_irq_reset(dev_priv);
- else if (IS_GEN(dev_priv, 3))
+ else if (GRAPHICS_VER(dev_priv) == 3)
i915_irq_reset(dev_priv);
else
i8xx_irq_reset(dev_priv);
} else {
- if (INTEL_GEN(dev_priv) >= 11)
+ if (GRAPHICS_VER(dev_priv) >= 11)
gen11_irq_reset(dev_priv);
- else if (INTEL_GEN(dev_priv) >= 8)
+ else if (GRAPHICS_VER(dev_priv) >= 8)
gen8_irq_reset(dev_priv);
else
ilk_irq_reset(dev_priv);
@@ -4449,16 +4449,16 @@ static void intel_irq_postinstall(struct drm_i915_private *dev_priv)
cherryview_irq_postinstall(dev_priv);
else if (IS_VALLEYVIEW(dev_priv))
valleyview_irq_postinstall(dev_priv);
- else if (IS_GEN(dev_priv, 4))
+ else if (GRAPHICS_VER(dev_priv) == 4)
i965_irq_postinstall(dev_priv);
- else if (IS_GEN(dev_priv, 3))
+ else if (GRAPHICS_VER(dev_priv) == 3)
i915_irq_postinstall(dev_priv);
else
i8xx_irq_postinstall(dev_priv);
} else {
- if (INTEL_GEN(dev_priv) >= 11)
+ if (GRAPHICS_VER(dev_priv) >= 11)
gen11_irq_postinstall(dev_priv);
- else if (INTEL_GEN(dev_priv) >= 8)
+ else if (GRAPHICS_VER(dev_priv) >= 8)
gen8_irq_postinstall(dev_priv);
else
ilk_irq_postinstall(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index cb03e4152d2d..9f94914958c3 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -719,7 +719,7 @@ static int gen8_append_oa_reports(struct i915_perf_stream *stream,
* it to userspace...
*/
reason = ((report32[0] >> OAREPORT_REASON_SHIFT) &
- (IS_GEN(stream->perf->i915, 12) ?
+ (GRAPHICS_VER(stream->perf->i915) == 12 ?
OAREPORT_REASON_MASK_EXTENDED :
OAREPORT_REASON_MASK));
@@ -734,7 +734,7 @@ static int gen8_append_oa_reports(struct i915_perf_stream *stream,
* understand that the ID has been squashed by the kernel.
*/
if (!(report32[0] & stream->perf->gen8_valid_ctx_bit) &&
- INTEL_GEN(stream->perf->i915) <= 11)
+ GRAPHICS_VER(stream->perf->i915) <= 11)
ctx_id = report32[2] = INVALID_CTX_ID;
/*
@@ -801,7 +801,7 @@ static int gen8_append_oa_reports(struct i915_perf_stream *stream,
if (start_offset != *offset) {
i915_reg_t oaheadptr;
- oaheadptr = IS_GEN(stream->perf->i915, 12) ?
+ oaheadptr = GRAPHICS_VER(stream->perf->i915) == 12 ?
GEN12_OAG_OAHEADPTR : GEN8_OAHEADPTR;
spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
@@ -854,7 +854,7 @@ static int gen8_oa_read(struct i915_perf_stream *stream,
if (drm_WARN_ON(&uncore->i915->drm, !stream->oa_buffer.vaddr))
return -EIO;
- oastatus_reg = IS_GEN(stream->perf->i915, 12) ?
+ oastatus_reg = GRAPHICS_VER(stream->perf->i915) == 12 ?
GEN12_OAG_OASTATUS : GEN8_OASTATUS;
oastatus = intel_uncore_read(uncore, oastatus_reg);
@@ -901,7 +901,7 @@ static int gen8_oa_read(struct i915_perf_stream *stream,
intel_uncore_rmw(uncore, oastatus_reg,
GEN8_OASTATUS_COUNTER_OVERFLOW |
GEN8_OASTATUS_REPORT_LOST,
- IS_GEN_RANGE(uncore->i915, 8, 11) ?
+ IS_GRAPHICS_VER(uncore->i915, 8, 11) ?
(GEN8_OASTATUS_HEAD_POINTER_WRAP |
GEN8_OASTATUS_TAIL_POINTER_WRAP) : 0);
}
@@ -1243,7 +1243,7 @@ static int oa_get_render_ctx_id(struct i915_perf_stream *stream)
if (IS_ERR(ce))
return PTR_ERR(ce);
- switch (INTEL_GEN(ce->engine->i915)) {
+ switch (GRAPHICS_VER(ce->engine->i915)) {
case 7: {
/*
* On Haswell we don't do any post processing of the reports
@@ -1297,7 +1297,7 @@ static int oa_get_render_ctx_id(struct i915_perf_stream *stream)
}
default:
- MISSING_CASE(INTEL_GEN(ce->engine->i915));
+ MISSING_CASE(GRAPHICS_VER(ce->engine->i915));
}
ce->tag = stream->specific_ctx_id;
@@ -1602,7 +1602,7 @@ static u32 *save_restore_register(struct i915_perf_stream *stream, u32 *cs,
cmd = save ? MI_STORE_REGISTER_MEM : MI_LOAD_REGISTER_MEM;
cmd |= MI_SRM_LRM_GLOBAL_GTT;
- if (INTEL_GEN(stream->perf->i915) >= 8)
+ if (GRAPHICS_VER(stream->perf->i915) >= 8)
cmd++;
for (d = 0; d < dword_count; d++) {
@@ -1731,7 +1731,7 @@ static int alloc_noa_wait(struct i915_perf_stream *stream)
*cs++ = i915_mmio_reg_offset(MI_PREDICATE_RESULT_1);
/* Restart from the beginning if we had timestamps roll over. */
- *cs++ = (INTEL_GEN(i915) < 8 ?
+ *cs++ = (GRAPHICS_VER(i915) < 8 ?
MI_BATCH_BUFFER_START :
MI_BATCH_BUFFER_START_GEN8) |
MI_BATCH_PREDICATE;
@@ -1768,7 +1768,7 @@ static int alloc_noa_wait(struct i915_perf_stream *stream)
*cs++ = i915_mmio_reg_offset(MI_PREDICATE_RESULT_1);
/* Predicate the jump. */
- *cs++ = (INTEL_GEN(i915) < 8 ?
+ *cs++ = (GRAPHICS_VER(i915) < 8 ?
MI_BATCH_BUFFER_START :
MI_BATCH_BUFFER_START_GEN8) |
MI_BATCH_PREDICATE;
@@ -1892,7 +1892,7 @@ alloc_oa_config_buffer(struct i915_perf_stream *stream,
oa_config->flex_regs_len);
/* Jump into the active wait. */
- *cs++ = (INTEL_GEN(stream->perf->i915) < 8 ?
+ *cs++ = (GRAPHICS_VER(stream->perf->i915) < 8 ?
MI_BATCH_BUFFER_START :
MI_BATCH_BUFFER_START_GEN8);
*cs++ = i915_ggtt_offset(stream->noa_wait);
@@ -2492,7 +2492,7 @@ gen8_enable_metric_set(struct i915_perf_stream *stream,
* be read back from automatically triggered reports, as part of the
* RPT_ID field.
*/
- if (IS_GEN_RANGE(stream->perf->i915, 9, 11)) {
+ if (IS_GRAPHICS_VER(stream->perf->i915, 9, 11)) {
intel_uncore_write(uncore, GEN8_OA_DEBUG,
_MASKED_BIT_ENABLE(GEN9_OA_DEBUG_DISABLE_CLK_RATIO_REPORTS |
GEN9_OA_DEBUG_INCLUDE_CLK_RATIO));
@@ -2797,7 +2797,7 @@ get_default_sseu_config(struct intel_sseu *out_sseu,
*out_sseu = intel_sseu_from_device_info(devinfo_sseu);
- if (IS_GEN(engine->i915, 11)) {
+ if (GRAPHICS_VER(engine->i915) == 11) {
/*
* We only need subslice count so it doesn't matter which ones
* we select - just turn off low bits in the amount of half of
@@ -2864,7 +2864,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream,
}
if (!(props->sample_flags & SAMPLE_OA_REPORT) &&
- (INTEL_GEN(perf->i915) < 12 || !stream->ctx)) {
+ (GRAPHICS_VER(perf->i915) < 12 || !stream->ctx)) {
DRM_DEBUG("Only OA report sampling supported\n");
return -EINVAL;
}
@@ -3006,7 +3006,7 @@ void i915_oa_init_reg_state(const struct intel_context *ce,
/* perf.exclusive_stream serialised by lrc_configure_all_contexts() */
stream = READ_ONCE(engine->i915->perf.exclusive_stream);
- if (stream && INTEL_GEN(stream->perf->i915) < 12)
+ if (stream && GRAPHICS_VER(stream->perf->i915) < 12)
gen8_update_reg_state_unlocked(ce, stream);
}
@@ -3443,7 +3443,7 @@ i915_perf_open_ioctl_locked(struct i915_perf *perf,
*/
if (IS_HASWELL(perf->i915) && specific_ctx)
privileged_op = false;
- else if (IS_GEN(perf->i915, 12) && specific_ctx &&
+ else if (GRAPHICS_VER(perf->i915) == 12 && specific_ctx &&
(props->sample_flags & SAMPLE_OA_REPORT) == 0)
privileged_op = false;
@@ -4119,7 +4119,7 @@ int i915_perf_add_config_ioctl(struct drm_device *dev, void *data,
}
oa_config->b_counter_regs = regs;
- if (INTEL_GEN(perf->i915) < 8) {
+ if (GRAPHICS_VER(perf->i915) < 8) {
if (args->n_flex_regs != 0) {
err = -EINVAL;
goto reg_err;
@@ -4365,7 +4365,7 @@ void i915_perf_init(struct drm_i915_private *i915)
*/
perf->ops.read = gen8_oa_read;
- if (IS_GEN_RANGE(i915, 8, 9)) {
+ if (IS_GRAPHICS_VER(i915, 8, 9)) {
perf->ops.is_valid_b_counter_reg =
gen7_is_valid_b_counter_addr;
perf->ops.is_valid_mux_reg =
@@ -4384,7 +4384,7 @@ void i915_perf_init(struct drm_i915_private *i915)
perf->ops.disable_metric_set = gen8_disable_metric_set;
perf->ops.oa_hw_tail_read = gen8_oa_hw_tail_read;
- if (IS_GEN(i915, 8)) {
+ if (GRAPHICS_VER(i915) == 8) {
perf->ctx_oactxctrl_offset = 0x120;
perf->ctx_flexeu0_offset = 0x2ce;
@@ -4395,7 +4395,7 @@ void i915_perf_init(struct drm_i915_private *i915)
perf->gen8_valid_ctx_bit = BIT(16);
}
- } else if (IS_GEN_RANGE(i915, 10, 11)) {
+ } else if (IS_GRAPHICS_VER(i915, 10, 11)) {
perf->ops.is_valid_b_counter_reg =
gen7_is_valid_b_counter_addr;
perf->ops.is_valid_mux_reg =
@@ -4409,7 +4409,7 @@ void i915_perf_init(struct drm_i915_private *i915)
perf->ops.disable_metric_set = gen10_disable_metric_set;
perf->ops.oa_hw_tail_read = gen8_oa_hw_tail_read;
- if (IS_GEN(i915, 10)) {
+ if (GRAPHICS_VER(i915) == 10) {
perf->ctx_oactxctrl_offset = 0x128;
perf->ctx_flexeu0_offset = 0x3de;
} else {
@@ -4417,7 +4417,7 @@ void i915_perf_init(struct drm_i915_private *i915)
perf->ctx_flexeu0_offset = 0x78e;
}
perf->gen8_valid_ctx_bit = BIT(16);
- } else if (IS_GEN(i915, 12)) {
+ } else if (GRAPHICS_VER(i915) == 12) {
perf->ops.is_valid_b_counter_reg =
gen12_is_valid_b_counter_addr;
perf->ops.is_valid_mux_reg =
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index b32d57a38d17..34d37d46a126 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -287,7 +287,7 @@ static bool exclusive_mmio_access(const struct drm_i915_private *i915)
* risk a machine hang. For a fun history lesson dig out the old
* userspace intel_gpu_top and run it on Ivybridge or Haswell!
*/
- return IS_GEN(i915, 7);
+ return GRAPHICS_VER(i915) == 7;
}
static void engine_sample(struct intel_engine_cs *engine, unsigned int period_ns)
@@ -463,7 +463,7 @@ engine_event_status(struct intel_engine_cs *engine,
case I915_SAMPLE_WAIT:
break;
case I915_SAMPLE_SEMA:
- if (INTEL_GEN(engine->i915) < 6)
+ if (GRAPHICS_VER(engine->i915) < 6)
return -ENODEV;
break;
default:
@@ -485,7 +485,7 @@ config_status(struct drm_i915_private *i915, u64 config)
return -ENODEV;
fallthrough;
case I915_PMU_REQUESTED_FREQUENCY:
- if (INTEL_GEN(i915) < 6)
+ if (GRAPHICS_VER(i915) < 6)
return -ENODEV;
break;
case I915_PMU_INTERRUPTS:
@@ -1145,7 +1145,7 @@ void i915_pmu_register(struct drm_i915_private *i915)
int ret = -ENOMEM;
- if (INTEL_GEN(i915) <= 2) {
+ if (GRAPHICS_VER(i915) <= 2) {
drm_info(&i915->drm, "PMU not supported for this GPU.");
return;
}
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 970d8f4986bb..a14ef8bbdc0b 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -1176,12 +1176,12 @@ __emit_semaphore_wait(struct i915_request *to,
struct i915_request *from,
u32 seqno)
{
- const int has_token = INTEL_GEN(to->engine->i915) >= 12;
+ const int has_token = GRAPHICS_VER(to->engine->i915) >= 12;
u32 hwsp_offset;
int len, err;
u32 *cs;
- GEM_BUG_ON(INTEL_GEN(to->engine->i915) < 8);
+ GEM_BUG_ON(GRAPHICS_VER(to->engine->i915) < 8);
GEM_BUG_ON(i915_request_has_initial_breadcrumb(to));
/* We need to pin the signaler's HWSP until we are finished reading. */
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 5fcc32821e18..f7b55f34dba8 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -38,14 +38,14 @@ static void intel_save_swf(struct drm_i915_private *dev_priv)
int i;
/* Scratch space */
- if (IS_GEN(dev_priv, 2) && IS_MOBILE(dev_priv)) {
+ if (GRAPHICS_VER(dev_priv) == 2 && IS_MOBILE(dev_priv)) {
for (i = 0; i < 7; i++) {
dev_priv->regfile.saveSWF0[i] = intel_de_read(dev_priv, SWF0(i));
dev_priv->regfile.saveSWF1[i] = intel_de_read(dev_priv, SWF1(i));
}
for (i = 0; i < 3; i++)
dev_priv->regfile.saveSWF3[i] = intel_de_read(dev_priv, SWF3(i));
- } else if (IS_GEN(dev_priv, 2)) {
+ } else if (GRAPHICS_VER(dev_priv) == 2) {
for (i = 0; i < 7; i++)
dev_priv->regfile.saveSWF1[i] = intel_de_read(dev_priv, SWF1(i));
} else if (HAS_GMCH(dev_priv)) {
@@ -63,14 +63,14 @@ static void intel_restore_swf(struct drm_i915_private *dev_priv)
int i;
/* Scratch space */
- if (IS_GEN(dev_priv, 2) && IS_MOBILE(dev_priv)) {
+ if (GRAPHICS_VER(dev_priv) == 2 && IS_MOBILE(dev_priv)) {
for (i = 0; i < 7; i++) {
intel_de_write(dev_priv, SWF0(i), dev_priv->regfile.saveSWF0[i]);
intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]);
}
for (i = 0; i < 3; i++)
intel_de_write(dev_priv, SWF3(i), dev_priv->regfile.saveSWF3[i]);
- } else if (IS_GEN(dev_priv, 2)) {
+ } else if (GRAPHICS_VER(dev_priv) == 2) {
for (i = 0; i < 7; i++)
intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]);
} else if (HAS_GMCH(dev_priv)) {
@@ -91,10 +91,10 @@ void i915_save_display(struct drm_i915_private *dev_priv)
return;
/* Display arbitration control */
- if (INTEL_GEN(dev_priv) <= 4)
+ if (GRAPHICS_VER(dev_priv) <= 4)
dev_priv->regfile.saveDSPARB = intel_de_read(dev_priv, DSPARB);
- if (IS_GEN(dev_priv, 4))
+ if (GRAPHICS_VER(dev_priv) == 4)
pci_read_config_word(pdev, GCDGMBUS,
&dev_priv->regfile.saveGCDGMBUS);
@@ -110,12 +110,12 @@ void i915_restore_display(struct drm_i915_private *dev_priv)
intel_restore_swf(dev_priv);
- if (IS_GEN(dev_priv, 4))
+ if (GRAPHICS_VER(dev_priv) == 4)
pci_write_config_word(pdev, GCDGMBUS,
dev_priv->regfile.saveGCDGMBUS);
/* Display arbitration */
- if (INTEL_GEN(dev_priv) <= 4)
+ if (GRAPHICS_VER(dev_priv) <= 4)
intel_de_write(dev_priv, DSPARB, dev_priv->regfile.saveDSPARB);
/* only restore FBC info on the platform that supports FBC*/
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
index 183517d1a73d..873bf996ceb5 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -595,7 +595,7 @@ void i915_setup_sysfs(struct drm_i915_private *dev_priv)
ret = 0;
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
ret = sysfs_create_files(&kdev->kobj, vlv_attrs);
- else if (INTEL_GEN(dev_priv) >= 6)
+ else if (GRAPHICS_VER(dev_priv) >= 6)
ret = sysfs_create_files(&kdev->kobj, gen6_attrs);
if (ret)
drm_err(&dev_priv->drm, "RPS sysfs setup failed\n");
diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c
index 172799277dd5..31a105bc1792 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.c
+++ b/drivers/gpu/drm/i915/i915_vgpu.c
@@ -74,7 +74,7 @@ void intel_vgpu_detect(struct drm_i915_private *dev_priv)
* we do not support VGT on older gens, return early so we don't have
* to consider differently numbered or sized MMIO bars
*/
- if (INTEL_GEN(dev_priv) < 6)
+ if (GRAPHICS_VER(dev_priv) < 6)
return;
shared_area = pci_iomap_range(pdev, 0, VGT_PVINFO_PAGE, VGT_PVINFO_SIZE);
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index e16599b67b83..7eaa92fee421 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -257,10 +257,10 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
if (IS_ADLS_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0))
for_each_pipe(dev_priv, pipe)
runtime->num_scalers[pipe] = 0;
- else if (INTEL_GEN(dev_priv) >= 10) {
+ else if (GRAPHICS_VER(dev_priv) >= 10) {
for_each_pipe(dev_priv, pipe)
runtime->num_scalers[pipe] = 2;
- } else if (IS_GEN(dev_priv, 9)) {
+ } else if (GRAPHICS_VER(dev_priv) == 9) {
runtime->num_scalers[PIPE_A] = 2;
runtime->num_scalers[PIPE_B] = 2;
runtime->num_scalers[PIPE_C] = 1;
@@ -271,10 +271,10 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
if (DISPLAY_VER(dev_priv) >= 13 || HAS_D12_PLANE_MINIMIZATION(dev_priv))
for_each_pipe(dev_priv, pipe)
runtime->num_sprites[pipe] = 4;
- else if (INTEL_GEN(dev_priv) >= 11)
+ else if (GRAPHICS_VER(dev_priv) >= 11)
for_each_pipe(dev_priv, pipe)
runtime->num_sprites[pipe] = 6;
- else if (IS_GEN(dev_priv, 10) || IS_GEMINILAKE(dev_priv))
+ else if (GRAPHICS_VER(dev_priv) == 10 || IS_GEMINILAKE(dev_priv))
for_each_pipe(dev_priv, pipe)
runtime->num_sprites[pipe] = 3;
else if (IS_BROXTON(dev_priv)) {
@@ -293,12 +293,12 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
for_each_pipe(dev_priv, pipe)
runtime->num_sprites[pipe] = 2;
- } else if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv)) {
+ } else if (GRAPHICS_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) {
for_each_pipe(dev_priv, pipe)
runtime->num_sprites[pipe] = 1;
}
- if (HAS_DISPLAY(dev_priv) && IS_GEN_RANGE(dev_priv, 7, 8) &&
+ if (HAS_DISPLAY(dev_priv) && IS_GRAPHICS_VER(dev_priv, 7, 8) &&
HAS_PCH_SPLIT(dev_priv)) {
u32 fuse_strap = intel_de_read(dev_priv, FUSE_STRAP);
u32 sfuse_strap = intel_de_read(dev_priv, SFUSE_STRAP);
@@ -325,7 +325,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
info->pipe_mask &= ~BIT(PIPE_C);
info->cpu_transcoder_mask &= ~BIT(TRANSCODER_C);
}
- } else if (HAS_DISPLAY(dev_priv) && INTEL_GEN(dev_priv) >= 9) {
+ } else if (HAS_DISPLAY(dev_priv) && GRAPHICS_VER(dev_priv) >= 9) {
u32 dfsm = intel_de_read(dev_priv, SKL_DFSM);
if (dfsm & SKL_DFSM_PIPE_A_DISABLE) {
@@ -340,7 +340,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
info->pipe_mask &= ~BIT(PIPE_C);
info->cpu_transcoder_mask &= ~BIT(TRANSCODER_C);
}
- if (INTEL_GEN(dev_priv) >= 12 &&
+ if (GRAPHICS_VER(dev_priv) >= 12 &&
(dfsm & TGL_DFSM_PIPE_D_DISABLE)) {
info->pipe_mask &= ~BIT(PIPE_D);
info->cpu_transcoder_mask &= ~BIT(TRANSCODER_D);
@@ -352,15 +352,15 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
if (dfsm & SKL_DFSM_DISPLAY_PM_DISABLE)
info->display.has_fbc = 0;
- if (INTEL_GEN(dev_priv) >= 11 && (dfsm & ICL_DFSM_DMC_DISABLE))
+ if (GRAPHICS_VER(dev_priv) >= 11 && (dfsm & ICL_DFSM_DMC_DISABLE))
info->display.has_dmc = 0;
- if (INTEL_GEN(dev_priv) >= 10 &&
+ if (GRAPHICS_VER(dev_priv) >= 10 &&
(dfsm & CNL_DFSM_DISPLAY_DSC_DISABLE))
info->display.has_dsc = 0;
}
- if (IS_GEN(dev_priv, 6) && intel_vtd_active()) {
+ if (GRAPHICS_VER(dev_priv) == 6 && intel_vtd_active()) {
drm_info(&dev_priv->drm,
"Disabling ppGTT for VT-d support\n");
info->ppgtt_type = INTEL_PPGTT_NONE;
diff --git a/drivers/gpu/drm/i915/intel_dram.c b/drivers/gpu/drm/i915/intel_dram.c
index 1e53c017c30d..50fdea84ba70 100644
--- a/drivers/gpu/drm/i915/intel_dram.c
+++ b/drivers/gpu/drm/i915/intel_dram.c
@@ -121,7 +121,7 @@ skl_dram_get_dimm_info(struct drm_i915_private *i915,
struct dram_dimm_info *dimm,
int channel, char dimm_name, u16 val)
{
- if (INTEL_GEN(i915) >= 10) {
+ if (GRAPHICS_VER(i915) >= 10) {
dimm->size = cnl_get_dimm_size(val);
dimm->width = cnl_get_dimm_width(val);
dimm->ranks = cnl_get_dimm_ranks(val);
@@ -422,7 +422,7 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv)
if (ret)
return ret;
- if (IS_GEN(dev_priv, 12)) {
+ if (GRAPHICS_VER(dev_priv) == 12) {
switch (val & 0xf) {
case 0:
dram_info->type = INTEL_DRAM_DDR4;
@@ -501,12 +501,12 @@ void intel_dram_detect(struct drm_i915_private *i915)
*/
dram_info->wm_lv_0_adjust_needed = !IS_GEN9_LP(i915);
- if (INTEL_GEN(i915) < 9 || !HAS_DISPLAY(i915))
+ if (GRAPHICS_VER(i915) < 9 || !HAS_DISPLAY(i915))
return;
- if (INTEL_GEN(i915) >= 12)
+ if (GRAPHICS_VER(i915) >= 12)
ret = gen12_get_dram_info(i915);
- else if (INTEL_GEN(i915) >= 11)
+ else if (GRAPHICS_VER(i915) >= 11)
ret = gen11_get_dram_info(i915);
else if (IS_GEN9_LP(i915))
ret = bxt_get_dram_info(i915);
@@ -535,7 +535,7 @@ void intel_dram_edram_detect(struct drm_i915_private *i915)
{
u32 edram_cap = 0;
- if (!(IS_HASWELL(i915) || IS_BROADWELL(i915) || INTEL_GEN(i915) >= 9))
+ if (!(IS_HASWELL(i915) || IS_BROADWELL(i915) || GRAPHICS_VER(i915) >= 9))
return;
edram_cap = __raw_uncore_read32(&i915->uncore, HSW_EDRAM_CAP);
@@ -549,7 +549,7 @@ void intel_dram_edram_detect(struct drm_i915_private *i915)
* The needed capability bits for size calculation are not there with
* pre gen9 so return 128MB always.
*/
- if (INTEL_GEN(i915) < 9)
+ if (GRAPHICS_VER(i915) < 9)
i915->edram_size_mb = 128;
else
i915->edram_size_mb = gen9_edram_size_mb(i915, edram_cap);
diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c
index 98a17dd1bda4..4e92ae19189e 100644
--- a/drivers/gpu/drm/i915/intel_pch.c
+++ b/drivers/gpu/drm/i915/intel_pch.c
@@ -13,17 +13,17 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
switch (id) {
case INTEL_PCH_IBX_DEVICE_ID_TYPE:
drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n");
- drm_WARN_ON(&dev_priv->drm, !IS_GEN(dev_priv, 5));
+ drm_WARN_ON(&dev_priv->drm, GRAPHICS_VER(dev_priv) != 5);
return PCH_IBX;
case INTEL_PCH_CPT_DEVICE_ID_TYPE:
drm_dbg_kms(&dev_priv->drm, "Found CougarPoint PCH\n");
drm_WARN_ON(&dev_priv->drm,
- !IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv));
+ GRAPHICS_VER(dev_priv) != 6 && !IS_IVYBRIDGE(dev_priv));
return PCH_CPT;
case INTEL_PCH_PPT_DEVICE_ID_TYPE:
drm_dbg_kms(&dev_priv->drm, "Found PantherPoint PCH\n");
drm_WARN_ON(&dev_priv->drm,
- !IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv));
+ GRAPHICS_VER(dev_priv) != 6 && !IS_IVYBRIDGE(dev_priv));
/* PantherPoint is CPT compatible */
return PCH_CPT;
case INTEL_PCH_LPT_DEVICE_ID_TYPE:
@@ -181,9 +181,9 @@ intel_virt_detect_pch(const struct drm_i915_private *dev_priv,
id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
- else if (IS_GEN(dev_priv, 6) || IS_IVYBRIDGE(dev_priv))
+ else if (GRAPHICS_VER(dev_priv) == 6 || IS_IVYBRIDGE(dev_priv))
id = INTEL_PCH_CPT_DEVICE_ID_TYPE;
- else if (IS_GEN(dev_priv, 5))
+ else if (GRAPHICS_VER(dev_priv) == 5)
id = INTEL_PCH_IBX_DEVICE_ID_TYPE;
if (id)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a385b8b7414f..7ce9537fa2c7 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7859,9 +7859,9 @@ void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
dev_priv->display.init_clock_gating = adlp_init_clock_gating;
else if (IS_DG1(dev_priv))
dev_priv->display.init_clock_gating = dg1_init_clock_gating;
- else if (IS_GEN(dev_priv, 12))
+ else if (GRAPHICS_VER(dev_priv) == 12)
dev_priv->display.init_clock_gating = gen12lp_init_clock_gating;
- else if (IS_GEN(dev_priv, 11))
+ else if (GRAPHICS_VER(dev_priv) == 11)
dev_priv->display.init_clock_gating = icl_init_clock_gating;
else if (IS_CANNONLAKE(dev_priv))
dev_priv->display.init_clock_gating = cnl_init_clock_gating;
@@ -7885,9 +7885,9 @@ void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
dev_priv->display.init_clock_gating = ivb_init_clock_gating;
else if (IS_VALLEYVIEW(dev_priv))
dev_priv->display.init_clock_gating = vlv_init_clock_gating;
- else if (IS_GEN(dev_priv, 6))
+ else if (GRAPHICS_VER(dev_priv) == 6)
dev_priv->display.init_clock_gating = gen6_init_clock_gating;
- else if (IS_GEN(dev_priv, 5))
+ else if (GRAPHICS_VER(dev_priv) == 5)
dev_priv->display.init_clock_gating = ilk_init_clock_gating;
else if (IS_G4X(dev_priv))
dev_priv->display.init_clock_gating = g4x_init_clock_gating;
@@ -7895,11 +7895,11 @@ void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
dev_priv->display.init_clock_gating = i965gm_init_clock_gating;
else if (IS_I965G(dev_priv))
dev_priv->display.init_clock_gating = i965g_init_clock_gating;
- else if (IS_GEN(dev_priv, 3))
+ else if (GRAPHICS_VER(dev_priv) == 3)
dev_priv->display.init_clock_gating = gen3_init_clock_gating;
else if (IS_I85X(dev_priv) || IS_I865G(dev_priv))
dev_priv->display.init_clock_gating = i85x_init_clock_gating;
- else if (IS_GEN(dev_priv, 2))
+ else if (GRAPHICS_VER(dev_priv) == 2)
dev_priv->display.init_clock_gating = i830_init_clock_gating;
else {
MISSING_CASE(INTEL_DEVID(dev_priv));
@@ -7913,7 +7913,7 @@ void intel_init_pm(struct drm_i915_private *dev_priv)
/* For cxsr */
if (IS_PINEVIEW(dev_priv))
pnv_get_mem_freq(dev_priv);
- else if (IS_GEN(dev_priv, 5))
+ else if (GRAPHICS_VER(dev_priv) == 5)
ilk_get_mem_freq(dev_priv);
if (intel_has_sagv(dev_priv))
diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c
index 0ec0cf191955..f0a82b37bd1a 100644
--- a/drivers/gpu/drm/i915/intel_sideband.c
+++ b/drivers/gpu/drm/i915/intel_sideband.c
@@ -430,7 +430,7 @@ static int __sandybridge_pcode_rw(struct drm_i915_private *i915,
if (is_read && val1)
*val1 = intel_uncore_read_fw(uncore, GEN6_PCODE_DATA1);
- if (INTEL_GEN(i915) > 6)
+ if (GRAPHICS_VER(i915) > 6)
return gen7_check_mailbox_status(mbox);
else
return gen6_check_mailbox_status(mbox);
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index b4aaf8b7109f..1bed8f666048 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1635,7 +1635,7 @@ static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
#define fw_domain_init(uncore__, id__, set__, ack__) \
(ret ?: (ret = __fw_domain_init((uncore__), (id__), (set__), (ack__))))
- if (INTEL_GEN(i915) >= 11) {
+ if (GRAPHICS_VER(i915) >= 11) {
/* we'll prune the domains of missing engines later */
intel_engine_mask_t emask = INTEL_INFO(i915)->platform_engine_mask;
int i;
@@ -1665,7 +1665,7 @@ static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
FORCEWAKE_MEDIA_VEBOX_GEN11(i),
FORCEWAKE_ACK_MEDIA_VEBOX_GEN11(i));
}
- } else if (IS_GEN_RANGE(i915, 9, 10)) {
+ } else if (IS_GRAPHICS_VER(i915, 9, 10)) {
uncore->funcs.force_wake_get = fw_domains_get_with_fallback;
uncore->funcs.force_wake_put = fw_domains_put;
fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
@@ -1733,7 +1733,7 @@ static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
FORCEWAKE, FORCEWAKE_ACK);
}
- } else if (IS_GEN(i915, 6)) {
+ } else if (GRAPHICS_VER(i915) == 6) {
uncore->funcs.force_wake_get =
fw_domains_get_with_thread_status;
uncore->funcs.force_wake_put = fw_domains_put;
@@ -1800,7 +1800,7 @@ static int uncore_mmio_setup(struct intel_uncore *uncore)
int mmio_bar;
int mmio_size;
- mmio_bar = IS_GEN(i915, 2) ? 1 : 0;
+ mmio_bar = GRAPHICS_VER(i915) == 2 ? 1 : 0;
/*
* Before gen4, the registers and the GTT are behind different BARs.
* However, from gen4 onwards, the registers and the GTT are shared
@@ -1810,7 +1810,7 @@ static int uncore_mmio_setup(struct intel_uncore *uncore)
* generations up to Ironlake.
* For dgfx chips register range is expanded to 4MB.
*/
- if (INTEL_GEN(i915) < 5)
+ if (GRAPHICS_VER(i915) < 5)
mmio_size = 512 * 1024;
else if (IS_DGFX(i915))
mmio_size = 4 * 1024 * 1024;
@@ -1849,7 +1849,7 @@ static void uncore_raw_init(struct intel_uncore *uncore)
if (intel_vgpu_active(uncore->i915)) {
ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, vgpu);
ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, vgpu);
- } else if (IS_GEN(uncore->i915, 5)) {
+ } else if (GRAPHICS_VER(uncore->i915) == 5) {
ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, gen5);
ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, gen5);
} else {
@@ -1870,7 +1870,7 @@ static int uncore_forcewake_init(struct intel_uncore *uncore)
return ret;
forcewake_early_sanitize(uncore, 0);
- if (IS_GEN_RANGE(i915, 6, 7)) {
+ if (IS_GRAPHICS_VER(i915, 6, 7)) {
ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen6);
if (IS_VALLEYVIEW(i915)) {
@@ -1879,7 +1879,7 @@ static int uncore_forcewake_init(struct intel_uncore *uncore)
} else {
ASSIGN_READ_MMIO_VFUNCS(uncore, gen6);
}
- } else if (IS_GEN(i915, 8)) {
+ } else if (GRAPHICS_VER(i915) == 8) {
if (IS_CHERRYVIEW(i915)) {
ASSIGN_FW_DOMAINS_TABLE(uncore, __chv_fw_ranges);
ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
@@ -1888,11 +1888,11 @@ static int uncore_forcewake_init(struct intel_uncore *uncore)
ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen8);
ASSIGN_READ_MMIO_VFUNCS(uncore, gen6);
}
- } else if (IS_GEN_RANGE(i915, 9, 10)) {
+ } else if (IS_GRAPHICS_VER(i915, 9, 10)) {
ASSIGN_FW_DOMAINS_TABLE(uncore, __gen9_fw_ranges);
ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
- } else if (IS_GEN(i915, 11)) {
+ } else if (GRAPHICS_VER(i915) == 11) {
ASSIGN_FW_DOMAINS_TABLE(uncore, __gen11_fw_ranges);
ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen11_fwtable);
ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
@@ -1952,7 +1952,7 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
uncore->flags |= UNCORE_HAS_DBG_UNCLAIMED;
- if (IS_GEN_RANGE(i915, 6, 7))
+ if (IS_GRAPHICS_VER(i915, 6, 7))
uncore->flags |= UNCORE_HAS_FIFO;
/* clear out unclaimed reg detection bit */
@@ -1979,7 +1979,7 @@ void intel_uncore_prune_engine_fw_domains(struct intel_uncore *uncore,
enum forcewake_domain_id domain_id;
int i;
- if (!intel_uncore_has_forcewake(uncore) || INTEL_GEN(uncore->i915) < 11)
+ if (!intel_uncore_has_forcewake(uncore) || GRAPHICS_VER(uncore->i915) < 11)
return;
for (i = 0; i < I915_MAX_VCS; i++) {
diff --git a/drivers/gpu/drm/i915/intel_wopcm.c b/drivers/gpu/drm/i915/intel_wopcm.c
index ec776591e1cf..8309455f13ea 100644
--- a/drivers/gpu/drm/i915/intel_wopcm.c
+++ b/drivers/gpu/drm/i915/intel_wopcm.c
@@ -81,7 +81,7 @@ void intel_wopcm_init_early(struct intel_wopcm *wopcm)
if (!HAS_GT_UC(i915))
return;
- if (INTEL_GEN(i915) >= 11)
+ if (GRAPHICS_VER(i915) >= 11)
wopcm->size = GEN11_WOPCM_SIZE;
else
wopcm->size = GEN9_WOPCM_SIZE;
@@ -93,7 +93,7 @@ static u32 context_reserved_size(struct drm_i915_private *i915)
{
if (IS_GEN9_LP(i915))
return BXT_WOPCM_RC6_CTX_RESERVED;
- else if (INTEL_GEN(i915) >= 10)
+ else if (GRAPHICS_VER(i915) >= 10)
return CNL_WOPCM_HW_CTX_RESERVED;
else
return 0;
@@ -145,11 +145,11 @@ static bool check_hw_restrictions(struct drm_i915_private *i915,
u32 guc_wopcm_base, u32 guc_wopcm_size,
u32 huc_fw_size)
{
- if (IS_GEN(i915, 9) && !gen9_check_dword_gap(i915, guc_wopcm_base,
- guc_wopcm_size))
+ if (GRAPHICS_VER(i915) == 9 && !gen9_check_dword_gap(i915, guc_wopcm_base,
+ guc_wopcm_size))
return false;
- if (IS_GEN(i915, 9) &&
+ if (GRAPHICS_VER(i915) == 9 &&
!gen9_check_huc_fw_fits(i915, guc_wopcm_size, huc_fw_size))
return false;
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index 0a1472bb12bc..f843a5040706 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -1884,9 +1884,9 @@ static int igt_cs_tlb(void *arg)
u32 *cs = batch + i * 64 / sizeof(*cs);
u64 addr = (vm->total - PAGE_SIZE) + i * sizeof(u32);
- GEM_BUG_ON(INTEL_GEN(i915) < 6);
+ GEM_BUG_ON(GRAPHICS_VER(i915) < 6);
cs[0] = MI_STORE_DWORD_IMM_GEN4;
- if (INTEL_GEN(i915) >= 8) {
+ if (GRAPHICS_VER(i915) >= 8) {
cs[1] = lower_32_bits(addr);
cs[2] = upper_32_bits(addr);
cs[3] = i;
diff --git a/drivers/gpu/drm/i915/selftests/i915_perf.c b/drivers/gpu/drm/i915/selftests/i915_perf.c
index bfb0290967a1..9e9a6cb1d9e5 100644
--- a/drivers/gpu/drm/i915/selftests/i915_perf.c
+++ b/drivers/gpu/drm/i915/selftests/i915_perf.c
@@ -98,7 +98,7 @@ test_stream(struct i915_perf *perf)
I915_ENGINE_CLASS_RENDER,
0),
.sample_flags = SAMPLE_OA_REPORT,
- .oa_format = IS_GEN(perf->i915, 12) ?
+ .oa_format = GRAPHICS_VER(perf->i915) == 12 ?
I915_OA_FORMAT_A32u40_A4u32_B8_C8 : I915_OA_FORMAT_C4_B8,
};
struct i915_perf_stream *stream;
@@ -162,7 +162,7 @@ static int write_timestamp(struct i915_request *rq, int slot)
return PTR_ERR(cs);
len = 5;
- if (INTEL_GEN(rq->engine->i915) >= 8)
+ if (GRAPHICS_VER(rq->engine->i915) >= 8)
len++;
*cs++ = GFX_OP_PIPE_CONTROL(len);
@@ -363,7 +363,7 @@ static int live_noa_gpr(void *arg)
}
cmd = MI_STORE_REGISTER_MEM;
- if (INTEL_GEN(i915) >= 8)
+ if (GRAPHICS_VER(i915) >= 8)
cmd++;
cmd |= MI_USE_GGTT;
diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests/i915_request.c
index eae0abd614cb..bd5c96a77ba3 100644
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -963,7 +963,7 @@ static int live_empty_request(void *arg)
static struct i915_vma *recursive_batch(struct drm_i915_private *i915)
{
struct drm_i915_gem_object *obj;
- const int gen = INTEL_GEN(i915);
+ const int ver = GRAPHICS_VER(i915);
struct i915_vma *vma;
u32 *cmd;
int err;
@@ -988,11 +988,11 @@ static struct i915_vma *recursive_batch(struct drm_i915_private *i915)
goto err;
}
- if (gen >= 8) {
+ if (ver >= 8) {
*cmd++ = MI_BATCH_BUFFER_START | 1 << 8 | 1;
*cmd++ = lower_32_bits(vma->node.start);
*cmd++ = upper_32_bits(vma->node.start);
- } else if (gen >= 6) {
+ } else if (ver >= 6) {
*cmd++ = MI_BATCH_BUFFER_START | 1 << 8;
*cmd++ = lower_32_bits(vma->node.start);
} else {
@@ -2482,7 +2482,7 @@ static int perf_request_latency(void *arg)
struct pm_qos_request qos;
int err = 0;
- if (INTEL_GEN(i915) < 8) /* per-engine CS timestamp, semaphores */
+ if (GRAPHICS_VER(i915) < 8) /* per-engine CS timestamp, semaphores */
return 0;
cpu_latency_qos_add_request(&qos, 0); /* disable cstates */
diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
index 5fe397b7d1d9..24d87d0fc747 100644
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
@@ -174,15 +174,15 @@ igt_spinner_create_request(struct igt_spinner *spin,
batch = spin->batch;
- if (INTEL_GEN(rq->engine->i915) >= 8) {
+ if (GRAPHICS_VER(rq->engine->i915) >= 8) {
*batch++ = MI_STORE_DWORD_IMM_GEN4;
*batch++ = lower_32_bits(hws_address(hws, rq));
*batch++ = upper_32_bits(hws_address(hws, rq));
- } else if (INTEL_GEN(rq->engine->i915) >= 6) {
+ } else if (GRAPHICS_VER(rq->engine->i915) >= 6) {
*batch++ = MI_STORE_DWORD_IMM_GEN4;
*batch++ = 0;
*batch++ = hws_address(hws, rq);
- } else if (INTEL_GEN(rq->engine->i915) >= 4) {
+ } else if (GRAPHICS_VER(rq->engine->i915) >= 4) {
*batch++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
*batch++ = 0;
*batch++ = hws_address(hws, rq);
@@ -194,11 +194,11 @@ igt_spinner_create_request(struct igt_spinner *spin,
*batch++ = arbitration_command;
- if (INTEL_GEN(rq->engine->i915) >= 8)
+ if (GRAPHICS_VER(rq->engine->i915) >= 8)
*batch++ = MI_BATCH_BUFFER_START | BIT(8) | 1;
else if (IS_HASWELL(rq->engine->i915))
*batch++ = MI_BATCH_BUFFER_START | MI_BATCH_PPGTT_HSW;
- else if (INTEL_GEN(rq->engine->i915) >= 6)
+ else if (GRAPHICS_VER(rq->engine->i915) >= 6)
*batch++ = MI_BATCH_BUFFER_START;
else
*batch++ = MI_BATCH_BUFFER_START | MI_BATCH_GTT;
@@ -216,7 +216,7 @@ igt_spinner_create_request(struct igt_spinner *spin,
}
flags = 0;
- if (INTEL_GEN(rq->engine->i915) <= 5)
+ if (GRAPHICS_VER(rq->engine->i915) <= 5)
flags |= I915_DISPATCH_SECURE;
err = engine->emit_bb_start(rq, vma->node.start, PAGE_SIZE, flags);
diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c b/drivers/gpu/drm/i915/selftests/intel_uncore.c
index f76c9bcec735..8ef9e6a4ad05 100644
--- a/drivers/gpu/drm/i915/selftests/intel_uncore.c
+++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c
@@ -321,7 +321,7 @@ static int live_fw_table(void *arg)
/* Confirm the table we load is still valid */
return intel_fw_table_check(gt->uncore->fw_domains_table,
gt->uncore->fw_domains_table_entries,
- INTEL_GEN(gt->i915) >= 9);
+ GRAPHICS_VER(gt->i915) >= 9);
}
int intel_uncore_live_selftests(struct drm_i915_private *i915)
--
2.31.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH v5 2/2] drm/i915: Add remaining conversions to GRAPHICS_VER
2021-06-06 4:50 [Intel-gfx] [PATCH v5 0/2] drm/i915: Finish conversion to GRAPHICS_VER Lucas De Marchi
2021-06-06 4:50 ` [Intel-gfx] [PATCH v5 1/2] drm/i915: replace IS_GEN and friends with GRAPHICS_VER Lucas De Marchi
@ 2021-06-06 4:50 ` Lucas De Marchi
2021-06-06 5:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Finish conversion " Patchwork
` (7 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Lucas De Marchi @ 2021-06-06 4:50 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel
For some reason coccinelle misses a few cases in header files with calls to
INTEL_GEN()/IS_GEN(). Do a manual conversion for those.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210605155356.4183026-6-lucas.demarchi@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 37 ++++++++++++++++-----------------
drivers/gpu/drm/i915/i915_reg.h | 26 +++++++++++------------
2 files changed, 31 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 91fda14f8f6c..38ff2fb89744 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1552,9 +1552,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
(IS_ALDERLAKE_P(__i915) && \
IS_GT_STEP(__i915, since, until))
-#define IS_LP(dev_priv) (INTEL_INFO(dev_priv)->is_lp)
-#define IS_GEN9_LP(dev_priv) (IS_GEN(dev_priv, 9) && IS_LP(dev_priv))
-#define IS_GEN9_BC(dev_priv) (IS_GEN(dev_priv, 9) && !IS_LP(dev_priv))
+#define IS_LP(dev_priv) (INTEL_INFO(dev_priv)->is_lp)
+#define IS_GEN9_LP(dev_priv) (GRAPHICS_VER(dev_priv) == 9 && IS_LP(dev_priv))
+#define IS_GEN9_BC(dev_priv) (GRAPHICS_VER(dev_priv) == 9 && !IS_LP(dev_priv))
#define __HAS_ENGINE(engine_mask, id) ((engine_mask) & BIT(id))
#define HAS_ENGINE(gt, id) __HAS_ENGINE((gt)->info.engine_mask, id)
@@ -1574,12 +1574,12 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
* The Gen7 cmdparser copies the scanned buffer to the ggtt for execution
* All later gens can run the final buffer from the ppgtt
*/
-#define CMDPARSER_USES_GGTT(dev_priv) IS_GEN(dev_priv, 7)
+#define CMDPARSER_USES_GGTT(dev_priv) (GRAPHICS_VER(dev_priv) == 7)
#define HAS_LLC(dev_priv) (INTEL_INFO(dev_priv)->has_llc)
#define HAS_SNOOP(dev_priv) (INTEL_INFO(dev_priv)->has_snoop)
#define HAS_EDRAM(dev_priv) ((dev_priv)->edram_size_mb)
-#define HAS_SECURE_BATCHES(dev_priv) (INTEL_GEN(dev_priv) < 6)
+#define HAS_SECURE_BATCHES(dev_priv) (GRAPHICS_VER(dev_priv) < 6)
#define HAS_WT(dev_priv) HAS_EDRAM(dev_priv)
#define HWS_NEEDS_PHYSICAL(dev_priv) (INTEL_INFO(dev_priv)->hws_needs_physical)
@@ -1612,7 +1612,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_BROKEN_CS_TLB(dev_priv) (IS_I830(dev_priv) || IS_I845G(dev_priv))
#define NEEDS_RC6_CTX_CORRUPTION_WA(dev_priv) \
- (IS_BROADWELL(dev_priv) || IS_GEN(dev_priv, 9))
+ (IS_BROADWELL(dev_priv) || GRAPHICS_VER(dev_priv) == 9)
/* WaRsDisableCoarsePowerGating:skl,cnl */
#define NEEDS_WaRsDisableCoarsePowerGating(dev_priv) \
@@ -1620,23 +1620,22 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
IS_SKL_GT3(dev_priv) || \
IS_SKL_GT4(dev_priv))
-#define HAS_GMBUS_IRQ(dev_priv) (INTEL_GEN(dev_priv) >= 4)
-#define HAS_GMBUS_BURST_READ(dev_priv) (INTEL_GEN(dev_priv) >= 10 || \
+#define HAS_GMBUS_IRQ(dev_priv) (GRAPHICS_VER(dev_priv) >= 4)
+#define HAS_GMBUS_BURST_READ(dev_priv) (GRAPHICS_VER(dev_priv) >= 10 || \
IS_GEMINILAKE(dev_priv) || \
IS_KABYLAKE(dev_priv))
/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
* rows, which changed the alignment requirements and fence programming.
*/
-#define HAS_128_BYTE_Y_TILING(dev_priv) (!IS_GEN(dev_priv, 2) && \
- !(IS_I915G(dev_priv) || \
- IS_I915GM(dev_priv)))
+#define HAS_128_BYTE_Y_TILING(dev_priv) (GRAPHICS_VER(dev_priv) != 2 && \
+ !(IS_I915G(dev_priv) || IS_I915GM(dev_priv)))
#define SUPPORTS_TV(dev_priv) (INTEL_INFO(dev_priv)->display.supports_tv)
#define I915_HAS_HOTPLUG(dev_priv) (INTEL_INFO(dev_priv)->display.has_hotplug)
-#define HAS_FW_BLC(dev_priv) (INTEL_GEN(dev_priv) > 2)
+#define HAS_FW_BLC(dev_priv) (GRAPHICS_VER(dev_priv) > 2)
#define HAS_FBC(dev_priv) (INTEL_INFO(dev_priv)->display.has_fbc)
-#define HAS_CUR_FBC(dev_priv) (!HAS_GMCH(dev_priv) && INTEL_GEN(dev_priv) >= 7)
+#define HAS_CUR_FBC(dev_priv) (!HAS_GMCH(dev_priv) && GRAPHICS_VER(dev_priv) >= 7)
#define HAS_IPS(dev_priv) (IS_HSW_ULT(dev_priv) || IS_BROADWELL(dev_priv))
@@ -1647,7 +1646,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_PSR(dev_priv) (INTEL_INFO(dev_priv)->display.has_psr)
#define HAS_PSR_HW_TRACKING(dev_priv) \
(INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
-#define HAS_PSR2_SEL_FETCH(dev_priv) (INTEL_GEN(dev_priv) >= 12)
+#define HAS_PSR2_SEL_FETCH(dev_priv) (GRAPHICS_VER(dev_priv) >= 12)
#define HAS_TRANSCODER(dev_priv, trans) ((INTEL_INFO(dev_priv)->cpu_transcoder_mask & BIT(trans)) != 0)
#define HAS_RC6(dev_priv) (INTEL_INFO(dev_priv)->has_rc6)
@@ -1658,7 +1657,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_DMC(dev_priv) (INTEL_INFO(dev_priv)->display.has_dmc)
-#define HAS_MSO(i915) (INTEL_GEN(i915) >= 12)
+#define HAS_MSO(i915) (GRAPHICS_VER(i915) >= 12)
#define HAS_RUNTIME_PM(dev_priv) (INTEL_INFO(dev_priv)->has_runtime_pm)
#define HAS_64BIT_RELOC(dev_priv) (INTEL_INFO(dev_priv)->has_64bit_reloc)
@@ -1677,7 +1676,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
-#define HAS_LSPCON(dev_priv) (IS_GEN_RANGE(dev_priv, 9, 10))
+#define HAS_LSPCON(dev_priv) (IS_GRAPHICS_VER(dev_priv, 9, 10))
/* DPF == dynamic parity feature */
#define HAS_L3_DPF(dev_priv) (INTEL_INFO(dev_priv)->has_l3_dpf)
@@ -1691,7 +1690,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->pipe_mask != 0)
-#define HAS_VRR(i915) (INTEL_GEN(i915) >= 12)
+#define HAS_VRR(i915) (GRAPHICS_VER(i915) >= 12)
/* Only valid when HAS_DISPLAY() is true */
#define INTEL_DISPLAY_ENABLED(dev_priv) \
@@ -1718,7 +1717,7 @@ static inline bool intel_vtd_active(void)
static inline bool intel_scanout_needs_vtd_wa(struct drm_i915_private *dev_priv)
{
- return INTEL_GEN(dev_priv) >= 6 && intel_vtd_active();
+ return GRAPHICS_VER(dev_priv) >= 6 && intel_vtd_active();
}
static inline bool
@@ -1940,7 +1939,7 @@ int remap_io_sg(struct vm_area_struct *vma,
static inline int intel_hws_csb_write_index(struct drm_i915_private *i915)
{
- if (INTEL_GEN(i915) >= 10)
+ if (GRAPHICS_VER(i915) >= 10)
return CNL_HWS_CSB_WRITE_INDEX;
else
return I915_HWS_CSB_WRITE_INDEX;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 24307c49085f..eb13c601d680 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9908,7 +9908,7 @@ enum skl_power_gate {
#define TRANS_HDCP_CONF(trans) _MMIO_TRANS(trans, _TRANSA_HDCP_CONF, \
_TRANSB_HDCP_CONF)
#define HDCP_CONF(dev_priv, trans, port) \
- (INTEL_GEN(dev_priv) >= 12 ? \
+ (GRAPHICS_VER(dev_priv) >= 12 ? \
TRANS_HDCP_CONF(trans) : \
PORT_HDCP_CONF(port))
@@ -9921,7 +9921,7 @@ enum skl_power_gate {
_TRANSA_HDCP_ANINIT, \
_TRANSB_HDCP_ANINIT)
#define HDCP_ANINIT(dev_priv, trans, port) \
- (INTEL_GEN(dev_priv) >= 12 ? \
+ (GRAPHICS_VER(dev_priv) >= 12 ? \
TRANS_HDCP_ANINIT(trans) : \
PORT_HDCP_ANINIT(port))
@@ -9931,7 +9931,7 @@ enum skl_power_gate {
#define TRANS_HDCP_ANLO(trans) _MMIO_TRANS(trans, _TRANSA_HDCP_ANLO, \
_TRANSB_HDCP_ANLO)
#define HDCP_ANLO(dev_priv, trans, port) \
- (INTEL_GEN(dev_priv) >= 12 ? \
+ (GRAPHICS_VER(dev_priv) >= 12 ? \
TRANS_HDCP_ANLO(trans) : \
PORT_HDCP_ANLO(port))
@@ -9941,7 +9941,7 @@ enum skl_power_gate {
#define TRANS_HDCP_ANHI(trans) _MMIO_TRANS(trans, _TRANSA_HDCP_ANHI, \
_TRANSB_HDCP_ANHI)
#define HDCP_ANHI(dev_priv, trans, port) \
- (INTEL_GEN(dev_priv) >= 12 ? \
+ (GRAPHICS_VER(dev_priv) >= 12 ? \
TRANS_HDCP_ANHI(trans) : \
PORT_HDCP_ANHI(port))
@@ -9952,7 +9952,7 @@ enum skl_power_gate {
_TRANSA_HDCP_BKSVLO, \
_TRANSB_HDCP_BKSVLO)
#define HDCP_BKSVLO(dev_priv, trans, port) \
- (INTEL_GEN(dev_priv) >= 12 ? \
+ (GRAPHICS_VER(dev_priv) >= 12 ? \
TRANS_HDCP_BKSVLO(trans) : \
PORT_HDCP_BKSVLO(port))
@@ -9963,7 +9963,7 @@ enum skl_power_gate {
_TRANSA_HDCP_BKSVHI, \
_TRANSB_HDCP_BKSVHI)
#define HDCP_BKSVHI(dev_priv, trans, port) \
- (INTEL_GEN(dev_priv) >= 12 ? \
+ (GRAPHICS_VER(dev_priv) >= 12 ? \
TRANS_HDCP_BKSVHI(trans) : \
PORT_HDCP_BKSVHI(port))
@@ -9974,7 +9974,7 @@ enum skl_power_gate {
_TRANSA_HDCP_RPRIME, \
_TRANSB_HDCP_RPRIME)
#define HDCP_RPRIME(dev_priv, trans, port) \
- (INTEL_GEN(dev_priv) >= 12 ? \
+ (GRAPHICS_VER(dev_priv) >= 12 ? \
TRANS_HDCP_RPRIME(trans) : \
PORT_HDCP_RPRIME(port))
@@ -9985,7 +9985,7 @@ enum skl_power_gate {
_TRANSA_HDCP_STATUS, \
_TRANSB_HDCP_STATUS)
#define HDCP_STATUS(dev_priv, trans, port) \
- (INTEL_GEN(dev_priv) >= 12 ? \
+ (GRAPHICS_VER(dev_priv) >= 12 ? \
TRANS_HDCP_STATUS(trans) : \
PORT_HDCP_STATUS(port))
@@ -10026,7 +10026,7 @@ enum skl_power_gate {
#define AUTH_FORCE_CLR_INPUTCTR BIT(19)
#define AUTH_CLR_KEYS BIT(18)
#define HDCP2_AUTH(dev_priv, trans, port) \
- (INTEL_GEN(dev_priv) >= 12 ? \
+ (GRAPHICS_VER(dev_priv) >= 12 ? \
TRANS_HDCP2_AUTH(trans) : \
PORT_HDCP2_AUTH(port))
@@ -10037,7 +10037,7 @@ enum skl_power_gate {
_TRANSB_HDCP2_CTL)
#define CTL_LINK_ENCRYPTION_REQ BIT(31)
#define HDCP2_CTL(dev_priv, trans, port) \
- (INTEL_GEN(dev_priv) >= 12 ? \
+ (GRAPHICS_VER(dev_priv) >= 12 ? \
TRANS_HDCP2_CTL(trans) : \
PORT_HDCP2_CTL(port))
@@ -10051,7 +10051,7 @@ enum skl_power_gate {
#define LINK_AUTH_STATUS BIT(21)
#define LINK_ENCRYPTION_STATUS BIT(20)
#define HDCP2_STATUS(dev_priv, trans, port) \
- (INTEL_GEN(dev_priv) >= 12 ? \
+ (GRAPHICS_VER(dev_priv) >= 12 ? \
TRANS_HDCP2_STATUS(trans) : \
PORT_HDCP2_STATUS(port))
@@ -10073,7 +10073,7 @@ enum skl_power_gate {
#define STREAM_ENCRYPTION_STATUS BIT(31)
#define STREAM_TYPE_STATUS BIT(30)
#define HDCP2_STREAM_STATUS(dev_priv, trans, port) \
- (INTEL_GEN(dev_priv) >= 12 ? \
+ (GRAPHICS_VER(dev_priv) >= 12 ? \
TRANS_HDCP2_STREAM_STATUS(trans) : \
PIPE_HDCP2_STREAM_STATUS(pipe))
@@ -10089,7 +10089,7 @@ enum skl_power_gate {
_TRANSB_HDCP2_AUTH_STREAM)
#define AUTH_STREAM_TYPE BIT(31)
#define HDCP2_AUTH_STREAM(dev_priv, trans, port) \
- (INTEL_GEN(dev_priv) >= 12 ? \
+ (GRAPHICS_VER(dev_priv) >= 12 ? \
TRANS_HDCP2_AUTH_STREAM(trans) : \
PORT_HDCP2_AUTH_STREAM(port))
--
2.31.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Finish conversion to GRAPHICS_VER
2021-06-06 4:50 [Intel-gfx] [PATCH v5 0/2] drm/i915: Finish conversion to GRAPHICS_VER Lucas De Marchi
2021-06-06 4:50 ` [Intel-gfx] [PATCH v5 1/2] drm/i915: replace IS_GEN and friends with GRAPHICS_VER Lucas De Marchi
2021-06-06 4:50 ` [Intel-gfx] [PATCH v5 2/2] drm/i915: Add remaining conversions to GRAPHICS_VER Lucas De Marchi
@ 2021-06-06 5:12 ` Patchwork
2021-06-06 5:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (6 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2021-06-06 5:12 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Finish conversion to GRAPHICS_VER
URL : https://patchwork.freedesktop.org/series/91064/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
59ddb8c3efcb drm/i915: replace IS_GEN and friends with GRAPHICS_VER
-:154: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#154: FILE: drivers/gpu/drm/i915/i915_debugfs.c:500:
+ (gt_perf_status & (GRAPHICS_VER(dev_priv) >= 9 ? 0x1ff00 : 0xff00)) >> 8);
total: 0 errors, 1 warnings, 0 checks, 1336 lines checked
9530f6c00d68 drm/i915: Add remaining conversions to GRAPHICS_VER
-:25: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#25: FILE: drivers/gpu/drm/i915/i915_drv.h:1556:
+#define IS_GEN9_LP(dev_priv) (GRAPHICS_VER(dev_priv) == 9 && IS_LP(dev_priv))
-:26: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#26: FILE: drivers/gpu/drm/i915/i915_drv.h:1557:
+#define IS_GEN9_BC(dev_priv) (GRAPHICS_VER(dev_priv) == 9 && !IS_LP(dev_priv))
-:61: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#61: FILE: drivers/gpu/drm/i915/i915_drv.h:1624:
+#define HAS_GMBUS_BURST_READ(dev_priv) (GRAPHICS_VER(dev_priv) >= 10 || \
IS_GEMINILAKE(dev_priv) || \
IS_KABYLAKE(dev_priv))
-:71: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#71: FILE: drivers/gpu/drm/i915/i915_drv.h:1631:
+#define HAS_128_BYTE_Y_TILING(dev_priv) (GRAPHICS_VER(dev_priv) != 2 && \
+ !(IS_I915G(dev_priv) || IS_I915GM(dev_priv)))
-:80: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#80: FILE: drivers/gpu/drm/i915/i915_drv.h:1638:
+#define HAS_CUR_FBC(dev_priv) (!HAS_GMCH(dev_priv) && GRAPHICS_VER(dev_priv) >= 7)
total: 0 errors, 0 warnings, 5 checks, 215 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Finish conversion to GRAPHICS_VER
2021-06-06 4:50 [Intel-gfx] [PATCH v5 0/2] drm/i915: Finish conversion to GRAPHICS_VER Lucas De Marchi
` (2 preceding siblings ...)
2021-06-06 5:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Finish conversion " Patchwork
@ 2021-06-06 5:42 ` Patchwork
2021-06-06 5:42 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
` (5 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2021-06-06 5:42 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 4695 bytes --]
== Series Details ==
Series: drm/i915: Finish conversion to GRAPHICS_VER
URL : https://patchwork.freedesktop.org/series/91064/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10179 -> Patchwork_20291
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/index.html
Known issues
------------
Here are the changes found in Patchwork_20291 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rpm@module-reload:
- fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([i915#1982] / [i915#2411])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/fi-tgl-y/igt@i915_pm_rpm@module-reload.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/fi-tgl-y/igt@i915_pm_rpm@module-reload.html
#### Warnings ####
* igt@runner@aborted:
- fi-skl-6600u: [FAIL][3] ([i915#1436] / [i915#2426] / [i915#3363]) -> [FAIL][4] ([i915#1436] / [i915#3363])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/fi-skl-6600u/igt@runner@aborted.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/fi-skl-6600u/igt@runner@aborted.html
- fi-kbl-soraka: [FAIL][5] ([i915#1436] / [i915#3363]) -> [FAIL][6] ([i915#1436] / [i915#2426] / [i915#3363])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/fi-kbl-soraka/igt@runner@aborted.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/fi-kbl-soraka/igt@runner@aborted.html
- fi-kbl-guc: [FAIL][7] ([i915#1436] / [i915#2426] / [i915#3363]) -> [FAIL][8] ([i915#1436] / [i915#3363])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/fi-kbl-guc/igt@runner@aborted.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/fi-kbl-guc/igt@runner@aborted.html
- fi-cfl-guc: [FAIL][9] ([i915#2426] / [i915#3363]) -> [FAIL][10] ([i915#3363])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/fi-cfl-guc/igt@runner@aborted.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/fi-cfl-guc/igt@runner@aborted.html
- fi-skl-6700k2: [FAIL][11] ([i915#1436] / [i915#2426] / [i915#3363]) -> [FAIL][12] ([i915#1436] / [i915#3363])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/fi-skl-6700k2/igt@runner@aborted.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/fi-skl-6700k2/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
[i915#3277]: https://gitlab.freedesktop.org/drm/intel/issues/3277
[i915#3283]: https://gitlab.freedesktop.org/drm/intel/issues/3283
[i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
Participating hosts (44 -> 39)
------------------------------
Missing (5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-bsw-nick fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_10179 -> Patchwork_20291
CI-20190529: 20190529
CI_DRM_10179: b2f3c1a4ca6d7e5eba5f85426cd6e49aee6d95e9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6098: 1fbc1e7d602f96a7f4e2b95057eef994656b8e74 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_20291: 9530f6c00d687aa3624643340385183a19233353 @ git://anongit.freedesktop.org/gfx-ci/linux
== Kernel 32bit build ==
Warning: Kernel 32bit buildtest failed:
https://intel-gfx-ci.01.org/Patchwork_20291/build_32bit.log
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready (#1)
MODPOST modules-only.symvers
ERROR: modpost: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
ERROR: modpost: "__divdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
scripts/Makefile.modpost:150: recipe for target 'modules-only.symvers' failed
make[1]: *** [modules-only.symvers] Error 1
make[1]: *** Deleting file 'modules-only.symvers'
Makefile:1759: recipe for target 'modules' failed
make: *** [modules] Error 2
== Linux commits ==
9530f6c00d68 drm/i915: Add remaining conversions to GRAPHICS_VER
59ddb8c3efcb drm/i915: replace IS_GEN and friends with GRAPHICS_VER
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/index.html
[-- Attachment #1.2: Type: text/html, Size: 6891 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915: Finish conversion to GRAPHICS_VER
2021-06-06 4:50 [Intel-gfx] [PATCH v5 0/2] drm/i915: Finish conversion to GRAPHICS_VER Lucas De Marchi
` (3 preceding siblings ...)
2021-06-06 5:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2021-06-06 5:42 ` Patchwork
2021-06-06 6:50 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
` (4 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2021-06-06 5:42 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Finish conversion to GRAPHICS_VER
URL : https://patchwork.freedesktop.org/series/91064/
State : warning
== Summary ==
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready (#1)
MODPOST modules-only.symvers
ERROR: modpost: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
ERROR: modpost: "__divdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
scripts/Makefile.modpost:150: recipe for target 'modules-only.symvers' failed
make[1]: *** [modules-only.symvers] Error 1
make[1]: *** Deleting file 'modules-only.symvers'
Makefile:1759: recipe for target 'modules' failed
make: *** [modules] Error 2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/build_32bit.log
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Finish conversion to GRAPHICS_VER
2021-06-06 4:50 [Intel-gfx] [PATCH v5 0/2] drm/i915: Finish conversion to GRAPHICS_VER Lucas De Marchi
` (4 preceding siblings ...)
2021-06-06 5:42 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
@ 2021-06-06 6:50 ` Patchwork
2021-06-07 6:16 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Finish conversion to GRAPHICS_VER (rev2) Patchwork
` (3 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2021-06-06 6:50 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 30266 bytes --]
== Series Details ==
Series: drm/i915: Finish conversion to GRAPHICS_VER
URL : https://patchwork.freedesktop.org/series/91064/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10179_full -> Patchwork_20291_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_20291_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_20291_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_20291_full:
### IGT changes ###
#### Possible regressions ####
* igt@syncobj_wait@wait-all-for-submit-snapshot:
- shard-skl: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl6/igt@syncobj_wait@wait-all-for-submit-snapshot.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl5/igt@syncobj_wait@wait-all-for-submit-snapshot.html
Known issues
------------
Here are the changes found in Patchwork_20291_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@preservation-s3@vecs0:
- shard-kbl: [PASS][3] -> [DMESG-WARN][4] ([i915#180]) +2 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl1/igt@gem_ctx_isolation@preservation-s3@vecs0.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl3/igt@gem_ctx_isolation@preservation-s3@vecs0.html
* igt@gem_ctx_persistence@smoketest:
- shard-snb: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#1099]) +2 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-snb5/igt@gem_ctx_persistence@smoketest.html
* igt@gem_ctx_ringsize@active@bcs0:
- shard-skl: [PASS][6] -> [INCOMPLETE][7] ([i915#3316])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl6/igt@gem_ctx_ringsize@active@bcs0.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl3/igt@gem_ctx_ringsize@active@bcs0.html
* igt@gem_eio@unwedge-stress:
- shard-tglb: [PASS][8] -> [TIMEOUT][9] ([i915#2369] / [i915#3063])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-tglb2/igt@gem_eio@unwedge-stress.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-tglb1/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar issue
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-tglb1/igt@gem_exec_fair@basic-flow@rcs0.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-tglb5/igt@gem_exec_fair@basic-flow@rcs0.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [PASS][12] -> [FAIL][13] ([i915#2842])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-iclb7/igt@gem_exec_fair@basic-none-share@rcs0.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-iclb7/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [PASS][14] -> [FAIL][15] ([i915#2842])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-glk1/igt@gem_exec_fair@basic-pace-share@rcs0.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_mmap_gtt@big-copy:
- shard-glk: [PASS][16] -> [FAIL][17] ([i915#307])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-glk6/igt@gem_mmap_gtt@big-copy.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-glk5/igt@gem_mmap_gtt@big-copy.html
* igt@gem_mmap_gtt@big-copy-xy:
- shard-skl: [PASS][18] -> [FAIL][19] ([i915#307])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl9/igt@gem_mmap_gtt@big-copy-xy.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl7/igt@gem_mmap_gtt@big-copy-xy.html
* igt@gem_userptr_blits@sync-overlap:
- shard-glk: [PASS][20] -> [DMESG-WARN][21] ([i915#118] / [i915#95])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-glk2/igt@gem_userptr_blits@sync-overlap.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-glk5/igt@gem_userptr_blits@sync-overlap.html
* igt@gem_userptr_blits@vma-merge:
- shard-kbl: NOTRUN -> [FAIL][22] ([i915#3318])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl7/igt@gem_userptr_blits@vma-merge.html
* igt@i915_pm_dc@dc6-dpms:
- shard-skl: NOTRUN -> [FAIL][23] ([i915#454])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl4/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_selftest@mock@requests:
- shard-skl: [PASS][24] -> [INCOMPLETE][25] ([i915#198])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl7/igt@i915_selftest@mock@requests.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl10/igt@i915_selftest@mock@requests.html
* igt@kms_big_fb@linear-32bpp-rotate-0:
- shard-iclb: [PASS][26] -> [DMESG-FAIL][27] ([i915#1226])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-iclb3/igt@kms_big_fb@linear-32bpp-rotate-0.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-iclb2/igt@kms_big_fb@linear-32bpp-rotate-0.html
* igt@kms_ccs@pipe-c-random-ccs-data:
- shard-skl: NOTRUN -> [SKIP][28] ([fdo#109271] / [fdo#111304])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl4/igt@kms_ccs@pipe-c-random-ccs-data.html
* igt@kms_chamelium@hdmi-hpd-with-enabled-mode:
- shard-snb: NOTRUN -> [SKIP][29] ([fdo#109271] / [fdo#111827]) +10 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-snb7/igt@kms_chamelium@hdmi-hpd-with-enabled-mode.html
* igt@kms_chamelium@vga-hpd:
- shard-skl: NOTRUN -> [SKIP][30] ([fdo#109271] / [fdo#111827]) +3 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl4/igt@kms_chamelium@vga-hpd.html
* igt@kms_color_chamelium@pipe-a-ctm-0-75:
- shard-kbl: NOTRUN -> [SKIP][31] ([fdo#109271] / [fdo#111827]) +9 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl1/igt@kms_color_chamelium@pipe-a-ctm-0-75.html
* igt@kms_color_chamelium@pipe-invalid-degamma-lut-sizes:
- shard-apl: NOTRUN -> [SKIP][32] ([fdo#109271] / [fdo#111827]) +4 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-apl8/igt@kms_color_chamelium@pipe-invalid-degamma-lut-sizes.html
* igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge:
- shard-snb: NOTRUN -> [SKIP][33] ([fdo#109271]) +208 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-snb2/igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge.html
* igt@kms_cursor_legacy@pipe-d-single-bo:
- shard-kbl: NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#533]) +2 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl7/igt@kms_cursor_legacy@pipe-d-single-bo.html
* igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@ab-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][35] -> [FAIL][36] ([i915#2122])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-glk6/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@ab-hdmi-a1-hdmi-a2.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-glk8/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
- shard-kbl: NOTRUN -> [DMESG-WARN][37] ([i915#180]) +3 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl3/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@b-dp1:
- shard-apl: NOTRUN -> [DMESG-WARN][38] ([i915#180])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible@b-dp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile:
- shard-kbl: NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#2642])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl7/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt:
- shard-skl: NOTRUN -> [SKIP][40] ([fdo#109271]) +64 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html
* igt@kms_panel_fitting@legacy:
- shard-kbl: NOTRUN -> [SKIP][41] ([fdo#109271]) +82 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl1/igt@kms_panel_fitting@legacy.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-apl: [PASS][42] -> [DMESG-WARN][43] ([i915#180])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-apl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-apl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb:
- shard-apl: NOTRUN -> [FAIL][44] ([i915#265])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-apl8/igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
- shard-skl: NOTRUN -> [FAIL][45] ([fdo#108145] / [i915#265])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-basic:
- shard-apl: NOTRUN -> [FAIL][46] ([fdo#108145] / [i915#265])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-apl8/igt@kms_plane_alpha_blend@pipe-c-alpha-basic.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
- shard-kbl: NOTRUN -> [FAIL][47] ([fdo#108145] / [i915#265])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl7/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [PASS][48] -> [FAIL][49] ([fdo#108145] / [i915#265])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3:
- shard-skl: NOTRUN -> [SKIP][50] ([fdo#109271] / [i915#658])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl4/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area-0:
- shard-apl: NOTRUN -> [SKIP][51] ([fdo#109271] / [i915#658])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-apl8/igt@kms_psr2_sf@plane-move-sf-dmg-area-0.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2:
- shard-kbl: NOTRUN -> [SKIP][52] ([fdo#109271] / [i915#658]) +2 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html
* igt@kms_psr@psr2_primary_mmap_gtt:
- shard-iclb: [PASS][53] -> [SKIP][54] ([fdo#109441]) +1 similar issue
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-iclb2/igt@kms_psr@psr2_primary_mmap_gtt.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-iclb6/igt@kms_psr@psr2_primary_mmap_gtt.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-skl: NOTRUN -> [SKIP][55] ([fdo#109271] / [i915#2437])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl4/igt@kms_writeback@writeback-invalid-parameters.html
* igt@kms_writeback@writeback-pixel-formats:
- shard-kbl: NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#2437])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl7/igt@kms_writeback@writeback-pixel-formats.html
* igt@nouveau_crc@pipe-b-ctx-flip-skip-current-frame:
- shard-apl: NOTRUN -> [SKIP][57] ([fdo#109271]) +85 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-apl8/igt@nouveau_crc@pipe-b-ctx-flip-skip-current-frame.html
* igt@sysfs_clients@create:
- shard-apl: NOTRUN -> [SKIP][58] ([fdo#109271] / [i915#2994]) +2 similar issues
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-apl8/igt@sysfs_clients@create.html
* igt@sysfs_clients@recycle:
- shard-kbl: NOTRUN -> [SKIP][59] ([fdo#109271] / [i915#2994])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl3/igt@sysfs_clients@recycle.html
* igt@sysfs_clients@split-10:
- shard-skl: NOTRUN -> [SKIP][60] ([fdo#109271] / [i915#2994]) +1 similar issue
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl3/igt@sysfs_clients@split-10.html
#### Possible fixes ####
* igt@gem_exec_fair@basic-none@vcs0:
- shard-kbl: [FAIL][61] ([i915#2842]) -> [PASS][62] +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl2/igt@gem_exec_fair@basic-none@vcs0.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl4/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [FAIL][63] ([i915#2849]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-iclb1/igt@gem_exec_fair@basic-throttle@rcs0.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-iclb5/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_mmap_gtt@cpuset-big-copy:
- shard-iclb: [FAIL][65] ([i915#2428]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-iclb3/igt@gem_mmap_gtt@cpuset-big-copy.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-iclb8/igt@gem_mmap_gtt@cpuset-big-copy.html
* igt@gem_mmap_offset@clear:
- shard-iclb: [FAIL][67] ([i915#3160]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-iclb1/igt@gem_mmap_offset@clear.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-iclb4/igt@gem_mmap_offset@clear.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-glk: [FAIL][69] ([i915#644]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-glk9/igt@gem_ppgtt@flink-and-close-vma-leak.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-glk4/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [DMESG-WARN][71] ([i915#1436] / [i915#716]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl10/igt@gen9_exec_parse@allowed-single.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl3/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_rpm@system-suspend-execbuf:
- shard-skl: [INCOMPLETE][73] ([i915#151]) -> [PASS][74]
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl3/igt@i915_pm_rpm@system-suspend-execbuf.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl4/igt@i915_pm_rpm@system-suspend-execbuf.html
* igt@kms_color@pipe-b-ctm-0-25:
- shard-skl: [DMESG-WARN][75] ([i915#1982]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl9/igt@kms_color@pipe-b-ctm-0-25.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl5/igt@kms_color@pipe-b-ctm-0-25.html
* igt@kms_cursor_crc@pipe-b-cursor-256x256-sliding:
- shard-skl: [FAIL][77] ([i915#3444]) -> [PASS][78] +1 similar issue
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl10/igt@kms_cursor_crc@pipe-b-cursor-256x256-sliding.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl10/igt@kms_cursor_crc@pipe-b-cursor-256x256-sliding.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-skl: [FAIL][79] ([i915#2346] / [i915#533]) -> [PASS][80]
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-kbl: [INCOMPLETE][81] ([i915#155] / [i915#180] / [i915#636]) -> [PASS][82]
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl1/igt@kms_fbcon_fbt@fbc-suspend.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl3/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-skl: [FAIL][83] ([i915#2122]) -> [PASS][84]
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl2/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl4/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [FAIL][85] ([i915#1188]) -> [PASS][86]
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl7/igt@kms_hdr@bpc-switch-suspend.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl6/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
- shard-kbl: [DMESG-WARN][87] ([i915#180]) -> [PASS][88] +7 similar issues
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [FAIL][89] ([fdo#108145] / [i915#265]) -> [PASS][90] +1 similar issue
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [SKIP][91] ([fdo#109642] / [fdo#111068] / [i915#658]) -> [PASS][92]
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-iclb6/igt@kms_psr2_su@frontbuffer.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_cursor_blt:
- shard-iclb: [SKIP][93] ([fdo#109441]) -> [PASS][94] +2 similar issues
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-iclb3/igt@kms_psr@psr2_cursor_blt.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-kbl: [DMESG-WARN][95] ([i915#180] / [i915#295]) -> [PASS][96]
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl1/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl3/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
#### Warnings ####
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-tglb: [FAIL][97] ([i915#2851]) -> [FAIL][98] ([i915#2842])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-tglb1/igt@gem_exec_fair@basic-pace@rcs0.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-tglb6/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-iclb: [SKIP][99] ([i915#588]) -> [SKIP][100] ([i915#658])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-iclb7/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][101] ([i915#2684]) -> [WARN][102] ([i915#1804] / [i915#2684])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-iclb1/igt@i915_pm_rc6_residency@rc6-fence.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-iclb4/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_selftest@live@execlists:
- shard-tglb: [INCOMPLETE][103] ([i915#3462]) -> [DMESG-FAIL][104] ([i915#3462])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-tglb8/igt@i915_selftest@live@execlists.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-tglb8/igt@i915_selftest@live@execlists.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3:
- shard-iclb: [SKIP][105] ([i915#658]) -> [SKIP][106] ([i915#2920])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-iclb6/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1:
- shard-iclb: [SKIP][107] ([i915#2920]) -> [SKIP][108] ([i915#658]) +1 similar issue
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-iclb6/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][109], [FAIL][110], [FAIL][111], [FAIL][112], [FAIL][113], [FAIL][114], [FAIL][115], [FAIL][116], [FAIL][117], [FAIL][118], [FAIL][119], [FAIL][120], [FAIL][121]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#2426] / [i915#3002] / [i915#3363] / [i915#602] / [i915#92]) -> ([FAIL][122], [FAIL][123], [FAIL][124], [FAIL][125], [FAIL][126], [FAIL][127], [FAIL][128], [FAIL][129], [FAIL][130]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#2426] / [i915#3002] / [i915#3363])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl1/igt@runner@aborted.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl1/igt@runner@aborted.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl2/igt@runner@aborted.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl1/igt@runner@aborted.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl2/igt@runner@aborted.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl4/igt@runner@aborted.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl1/igt@runner@aborted.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl7/igt@runner@aborted.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl4/igt@runner@aborted.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl3/igt@runner@aborted.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl1/igt@runner@aborted.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl1/igt@runner@aborted.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-kbl4/igt@runner@aborted.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl3/igt@runner@aborted.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl2/igt@runner@aborted.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl3/igt@runner@aborted.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl4/igt@runner@aborted.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl7/igt@runner@aborted.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl1/igt@runner@aborted.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl4/igt@runner@aborted.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl1/igt@runner@aborted.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-kbl3/igt@runner@aborted.html
- shard-iclb: ([FAIL][131], [FAIL][132], [FAIL][133], [FAIL][134]) ([i915#2426] / [i915#2782] / [i915#3002]) -> ([FAIL][135], [FAIL][136], [FAIL][137]) ([i915#2426] / [i915#3002])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-iclb5/igt@runner@aborted.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-iclb5/igt@runner@aborted.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-iclb6/igt@runner@aborted.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-iclb1/igt@runner@aborted.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-iclb7/igt@runner@aborted.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-iclb7/igt@runner@aborted.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-iclb6/igt@runner@aborted.html
- shard-apl: ([FAIL][138], [FAIL][139], [FAIL][140], [FAIL][141]) ([fdo#109271] / [i915#180] / [i915#2426] / [i915#3002] / [i915#3363]) -> ([FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#2426] / [i915#3002] / [i915#3363])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-apl2/igt@runner@aborted.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-apl1/igt@runner@aborted.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-apl7/igt@runner@aborted.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-apl7/igt@runner@aborted.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-apl2/igt@runner@aborted.html
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-apl2/igt@runner@aborted.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-apl3/igt@runner@aborted.html
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-apl8/igt@runner@aborted.html
- shard-skl: ([FAIL][146], [FAIL][147], [FAIL][148], [FAIL][149], [FAIL][150], [FAIL][151]) ([i915#1436] / [i915#2029] / [i915#2426] / [i915#3002] / [i915#3363]) -> ([FAIL][152], [FAIL][153], [FAIL][154], [FAIL][155]) ([i915#1436] / [i915#2722] / [i915#3002] / [i915#3363])
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl3/igt@runner@aborted.html
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl10/igt@runner@aborted.html
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl7/igt@runner@aborted.html
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl9/igt@runner@aborted.html
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl5/igt@runner@aborted.html
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10179/shard-skl4/igt@runner@aborted.html
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl10/igt@runner@aborted.html
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl7/igt@runner@aborted.html
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl9/igt@runner@aborted.html
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/shard-skl2/igt@runner@aborted.html
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111304]: https://bugs.freedesktop.org/show_bug.cgi?id=111304
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1226]: https://gitlab.freedesktop.org/drm/intel/issues/1226
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
[i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1804]: https://gitlab.freedesktop.org/drm/intel/issues/1804
[i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2346]: https://gitlab.freedesktop.org/drm
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20291/index.html
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Finish conversion to GRAPHICS_VER (rev2)
2021-06-06 4:50 [Intel-gfx] [PATCH v5 0/2] drm/i915: Finish conversion to GRAPHICS_VER Lucas De Marchi
` (5 preceding siblings ...)
2021-06-06 6:50 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2021-06-07 6:16 ` Patchwork
2021-06-07 6:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (2 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2021-06-07 6:16 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Finish conversion to GRAPHICS_VER (rev2)
URL : https://patchwork.freedesktop.org/series/91064/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
692bcf92f50c drm/i915: replace IS_GEN and friends with GRAPHICS_VER
-:154: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#154: FILE: drivers/gpu/drm/i915/i915_debugfs.c:500:
+ (gt_perf_status & (GRAPHICS_VER(dev_priv) >= 9 ? 0x1ff00 : 0xff00)) >> 8);
total: 0 errors, 1 warnings, 0 checks, 1336 lines checked
421b02ce1bd7 drm/i915: Add remaining conversions to GRAPHICS_VER
-:25: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#25: FILE: drivers/gpu/drm/i915/i915_drv.h:1556:
+#define IS_GEN9_LP(dev_priv) (GRAPHICS_VER(dev_priv) == 9 && IS_LP(dev_priv))
-:26: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#26: FILE: drivers/gpu/drm/i915/i915_drv.h:1557:
+#define IS_GEN9_BC(dev_priv) (GRAPHICS_VER(dev_priv) == 9 && !IS_LP(dev_priv))
-:61: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#61: FILE: drivers/gpu/drm/i915/i915_drv.h:1624:
+#define HAS_GMBUS_BURST_READ(dev_priv) (GRAPHICS_VER(dev_priv) >= 10 || \
IS_GEMINILAKE(dev_priv) || \
IS_KABYLAKE(dev_priv))
-:71: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#71: FILE: drivers/gpu/drm/i915/i915_drv.h:1631:
+#define HAS_128_BYTE_Y_TILING(dev_priv) (GRAPHICS_VER(dev_priv) != 2 && \
+ !(IS_I915G(dev_priv) || IS_I915GM(dev_priv)))
-:80: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#80: FILE: drivers/gpu/drm/i915/i915_drv.h:1638:
+#define HAS_CUR_FBC(dev_priv) (!HAS_GMCH(dev_priv) && GRAPHICS_VER(dev_priv) >= 7)
total: 0 errors, 0 warnings, 5 checks, 215 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Finish conversion to GRAPHICS_VER (rev2)
2021-06-06 4:50 [Intel-gfx] [PATCH v5 0/2] drm/i915: Finish conversion to GRAPHICS_VER Lucas De Marchi
` (6 preceding siblings ...)
2021-06-07 6:16 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Finish conversion to GRAPHICS_VER (rev2) Patchwork
@ 2021-06-07 6:45 ` Patchwork
2021-06-07 6:45 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2021-06-07 7:49 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
9 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2021-06-07 6:45 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
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== Series Details ==
Series: drm/i915: Finish conversion to GRAPHICS_VER (rev2)
URL : https://patchwork.freedesktop.org/series/91064/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10181 -> Patchwork_20292
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/index.html
Known issues
------------
Here are the changes found in Patchwork_20292 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u2: [PASS][1] -> [FAIL][2] ([i915#49])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
#### Possible fixes ####
* igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: [FAIL][3] ([i915#1372]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
#### Warnings ####
* igt@i915_selftest@live@execlists:
- fi-cfl-8109u: [DMESG-FAIL][5] ([i915#3462]) -> [INCOMPLETE][6] ([i915#3462])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/fi-cfl-8109u/igt@i915_selftest@live@execlists.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/fi-cfl-8109u/igt@i915_selftest@live@execlists.html
- fi-bsw-nick: [DMESG-FAIL][7] ([i915#3462]) -> [INCOMPLETE][8] ([i915#2782] / [i915#2940] / [i915#3462])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/fi-bsw-nick/igt@i915_selftest@live@execlists.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/fi-bsw-nick/igt@i915_selftest@live@execlists.html
* igt@runner@aborted:
- fi-cfl-8109u: [FAIL][9] ([i915#2426] / [i915#3363]) -> [FAIL][10] ([i915#3363])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/fi-cfl-8109u/igt@runner@aborted.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/fi-cfl-8109u/igt@runner@aborted.html
- fi-glk-dsi: [FAIL][11] ([i915#2426] / [i915#3363] / [k.org#202321]) -> [FAIL][12] ([i915#3363] / [k.org#202321])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/fi-glk-dsi/igt@runner@aborted.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/fi-glk-dsi/igt@runner@aborted.html
- fi-kbl-guc: [FAIL][13] ([i915#1436] / [i915#3363]) -> [FAIL][14] ([i915#1436] / [i915#2426] / [i915#3363])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/fi-kbl-guc/igt@runner@aborted.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/fi-kbl-guc/igt@runner@aborted.html
- fi-bxt-dsi: [FAIL][15] ([i915#3363]) -> [FAIL][16] ([i915#2426] / [i915#3363])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/fi-bxt-dsi/igt@runner@aborted.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/fi-bxt-dsi/igt@runner@aborted.html
- fi-kbl-7567u: [FAIL][17] ([i915#1436] / [i915#2426] / [i915#3363]) -> [FAIL][18] ([i915#1436] / [i915#3363])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/fi-kbl-7567u/igt@runner@aborted.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/fi-kbl-7567u/igt@runner@aborted.html
[i915#1372]: https://gitlab.freedesktop.org/drm/intel/issues/1372
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
[i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782
[i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
[i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
[i915#3462]: https://gitlab.freedesktop.org/drm/intel/issues/3462
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[k.org#202321]: https://bugzilla.kernel.org/show_bug.cgi?id=202321
Participating hosts (42 -> 38)
------------------------------
Missing (4): fi-ilk-m540 fi-bsw-cyan fi-bdw-samus fi-hsw-4200u
Build changes
-------------
* Linux: CI_DRM_10181 -> Patchwork_20292
CI-20190529: 20190529
CI_DRM_10181: f5cf555ad7ec448409bde5194c33b6a3ea8d000b @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6099: adb9ee4ed7206725cfe3589bf49f47f9dcf661f2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_20292: 421b02ce1bd73152e9d2dd6e4d5fb03c9ad51e9c @ git://anongit.freedesktop.org/gfx-ci/linux
== Kernel 32bit build ==
Warning: Kernel 32bit buildtest failed:
https://intel-gfx-ci.01.org/Patchwork_20292/build_32bit.log
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready (#1)
MODPOST modules-only.symvers
ERROR: modpost: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
ERROR: modpost: "__divdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
scripts/Makefile.modpost:150: recipe for target 'modules-only.symvers' failed
make[1]: *** [modules-only.symvers] Error 1
make[1]: *** Deleting file 'modules-only.symvers'
Makefile:1759: recipe for target 'modules' failed
make: *** [modules] Error 2
== Linux commits ==
421b02ce1bd7 drm/i915: Add remaining conversions to GRAPHICS_VER
692bcf92f50c drm/i915: replace IS_GEN and friends with GRAPHICS_VER
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/index.html
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915: Finish conversion to GRAPHICS_VER (rev2)
2021-06-06 4:50 [Intel-gfx] [PATCH v5 0/2] drm/i915: Finish conversion to GRAPHICS_VER Lucas De Marchi
` (7 preceding siblings ...)
2021-06-07 6:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2021-06-07 6:45 ` Patchwork
2021-06-07 7:49 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
9 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2021-06-07 6:45 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Finish conversion to GRAPHICS_VER (rev2)
URL : https://patchwork.freedesktop.org/series/91064/
State : warning
== Summary ==
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready (#1)
MODPOST modules-only.symvers
ERROR: modpost: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
ERROR: modpost: "__divdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
scripts/Makefile.modpost:150: recipe for target 'modules-only.symvers' failed
make[1]: *** [modules-only.symvers] Error 1
make[1]: *** Deleting file 'modules-only.symvers'
Makefile:1759: recipe for target 'modules' failed
make: *** [modules] Error 2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/build_32bit.log
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Finish conversion to GRAPHICS_VER (rev2)
2021-06-06 4:50 [Intel-gfx] [PATCH v5 0/2] drm/i915: Finish conversion to GRAPHICS_VER Lucas De Marchi
` (8 preceding siblings ...)
2021-06-07 6:45 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
@ 2021-06-07 7:49 ` Patchwork
9 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2021-06-07 7:49 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 30273 bytes --]
== Series Details ==
Series: drm/i915: Finish conversion to GRAPHICS_VER (rev2)
URL : https://patchwork.freedesktop.org/series/91064/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10181_full -> Patchwork_20292_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_20292_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_create@create-clear:
- shard-glk: [PASS][1] -> [FAIL][2] ([i915#1888] / [i915#3160])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-glk7/igt@gem_create@create-clear.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-glk9/igt@gem_create@create-clear.html
* igt@gem_create@create-massive:
- shard-kbl: NOTRUN -> [DMESG-WARN][3] ([i915#3002])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl2/igt@gem_create@create-massive.html
- shard-apl: NOTRUN -> [DMESG-WARN][4] ([i915#3002])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-apl6/igt@gem_create@create-massive.html
* igt@gem_ctx_persistence@clone:
- shard-snb: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#1099]) +4 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-snb2/igt@gem_ctx_persistence@clone.html
* igt@gem_eio@in-flight-suspend:
- shard-kbl: NOTRUN -> [DMESG-WARN][6] ([i915#180])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl2/igt@gem_eio@in-flight-suspend.html
* igt@gem_eio@unwedge-stress:
- shard-snb: NOTRUN -> [FAIL][7] ([i915#3354])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-snb5/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-deadline:
- shard-skl: NOTRUN -> [FAIL][8] ([i915#2846])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl1/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [PASS][9] -> [FAIL][10] ([i915#2842])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-iclb7/igt@gem_exec_fair@basic-none-share@rcs0.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-iclb4/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-kbl: [PASS][11] -> [FAIL][12] ([i915#2842])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-kbl7/igt@gem_exec_fair@basic-none@vcs1.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl1/igt@gem_exec_fair@basic-none@vcs1.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-tglb: [PASS][13] -> [FAIL][14] ([i915#2842])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-tglb3/igt@gem_exec_fair@basic-pace@rcs0.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-tglb8/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [PASS][15] -> [FAIL][16] ([i915#2849])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-iclb2/igt@gem_exec_fair@basic-throttle@rcs0.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-iclb1/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_reloc@basic-wide-active@bcs0:
- shard-skl: NOTRUN -> [FAIL][17] ([i915#2389]) +3 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl1/igt@gem_exec_reloc@basic-wide-active@bcs0.html
* igt@gem_exec_whisper@basic-contexts-priority:
- shard-iclb: [PASS][18] -> [INCOMPLETE][19] ([i915#1895])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-iclb6/igt@gem_exec_whisper@basic-contexts-priority.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-iclb7/igt@gem_exec_whisper@basic-contexts-priority.html
* igt@gem_huc_copy@huc-copy:
- shard-apl: NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#2190])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-apl8/igt@gem_huc_copy@huc-copy.html
* igt@gem_mmap_gtt@big-copy:
- shard-glk: [PASS][21] -> [FAIL][22] ([i915#307]) +1 similar issue
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-glk5/igt@gem_mmap_gtt@big-copy.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-glk4/igt@gem_mmap_gtt@big-copy.html
* igt@gem_mmap_gtt@cpuset-big-copy-odd:
- shard-iclb: [PASS][23] -> [FAIL][24] ([i915#2428])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-iclb2/igt@gem_mmap_gtt@cpuset-big-copy-odd.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-iclb1/igt@gem_mmap_gtt@cpuset-big-copy-odd.html
* igt@gem_pwrite@basic-exhaustion:
- shard-snb: NOTRUN -> [WARN][25] ([i915#2658])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-snb2/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_userptr_blits@unsync-unmap-cycles:
- shard-tglb: NOTRUN -> [SKIP][26] ([i915#3297]) +1 similar issue
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-tglb3/igt@gem_userptr_blits@unsync-unmap-cycles.html
* igt@gem_userptr_blits@vma-merge:
- shard-apl: NOTRUN -> [FAIL][27] ([i915#3318])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-apl6/igt@gem_userptr_blits@vma-merge.html
* igt@gen7_exec_parse@oacontrol-tracking:
- shard-tglb: NOTRUN -> [SKIP][28] ([fdo#109289])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-tglb3/igt@gen7_exec_parse@oacontrol-tracking.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [PASS][29] -> [DMESG-WARN][30] ([i915#1436] / [i915#1982] / [i915#716])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-skl2/igt@gen9_exec_parse@allowed-single.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl1/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_dc@dc6-dpms:
- shard-skl: NOTRUN -> [FAIL][31] ([i915#454])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl1/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp:
- shard-apl: NOTRUN -> [SKIP][32] ([fdo#109271] / [i915#1937])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-apl1/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html
* igt@i915_pm_lpsp@screens-disabled:
- shard-tglb: NOTRUN -> [SKIP][33] ([i915#1902])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-tglb3/igt@i915_pm_lpsp@screens-disabled.html
* igt@i915_pm_rpm@modeset-lpsp-stress:
- shard-apl: NOTRUN -> [SKIP][34] ([fdo#109271]) +216 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-apl1/igt@i915_pm_rpm@modeset-lpsp-stress.html
* igt@i915_selftest@live@hangcheck:
- shard-snb: [PASS][35] -> [INCOMPLETE][36] ([i915#2782])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-snb5/igt@i915_selftest@live@hangcheck.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-snb5/igt@i915_selftest@live@hangcheck.html
* igt@i915_suspend@fence-restore-untiled:
- shard-apl: [PASS][37] -> [DMESG-WARN][38] ([i915#180])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-apl7/igt@i915_suspend@fence-restore-untiled.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-apl8/igt@i915_suspend@fence-restore-untiled.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
- shard-tglb: NOTRUN -> [SKIP][39] ([i915#1769])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-tglb3/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
* igt@kms_big_fb@x-tiled-64bpp-rotate-90:
- shard-tglb: NOTRUN -> [SKIP][40] ([fdo#111614])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-tglb3/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-tglb: NOTRUN -> [SKIP][41] ([fdo#111615]) +1 similar issue
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-tglb3/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_ccs@pipe-a-ccs-on-another-bo:
- shard-snb: NOTRUN -> [SKIP][42] ([fdo#109271]) +255 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-snb5/igt@kms_ccs@pipe-a-ccs-on-another-bo.html
* igt@kms_chamelium@dp-mode-timings:
- shard-apl: NOTRUN -> [SKIP][43] ([fdo#109271] / [fdo#111827]) +17 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-apl1/igt@kms_chamelium@dp-mode-timings.html
* igt@kms_chamelium@hdmi-crc-multiple:
- shard-kbl: NOTRUN -> [SKIP][44] ([fdo#109271] / [fdo#111827]) +3 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl2/igt@kms_chamelium@hdmi-crc-multiple.html
* igt@kms_color@pipe-a-ctm-negative:
- shard-skl: [PASS][45] -> [DMESG-WARN][46] ([i915#1982]) +1 similar issue
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-skl2/igt@kms_color@pipe-a-ctm-negative.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl9/igt@kms_color@pipe-a-ctm-negative.html
* igt@kms_color_chamelium@pipe-b-ctm-max:
- shard-skl: NOTRUN -> [SKIP][47] ([fdo#109271] / [fdo#111827]) +8 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl6/igt@kms_color_chamelium@pipe-b-ctm-max.html
* igt@kms_color_chamelium@pipe-b-ctm-negative:
- shard-snb: NOTRUN -> [SKIP][48] ([fdo#109271] / [fdo#111827]) +14 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-snb5/igt@kms_color_chamelium@pipe-b-ctm-negative.html
* igt@kms_color_chamelium@pipe-c-degamma:
- shard-tglb: NOTRUN -> [SKIP][49] ([fdo#109284] / [fdo#111827]) +1 similar issue
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-tglb3/igt@kms_color_chamelium@pipe-c-degamma.html
* igt@kms_cursor_crc@pipe-a-cursor-256x256-random:
- shard-apl: NOTRUN -> [FAIL][50] ([i915#3444])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-apl1/igt@kms_cursor_crc@pipe-a-cursor-256x256-random.html
* igt@kms_cursor_crc@pipe-d-cursor-512x512-rapid-movement:
- shard-tglb: NOTRUN -> [SKIP][51] ([fdo#109279] / [i915#3359]) +2 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-tglb3/igt@kms_cursor_crc@pipe-d-cursor-512x512-rapid-movement.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-skl: [PASS][52] -> [FAIL][53] ([i915#2346] / [i915#533])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-skl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-varying-size:
- shard-skl: [PASS][54] -> [FAIL][55] ([i915#2346]) +1 similar issue
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-skl: [PASS][56] -> [INCOMPLETE][57] ([i915#198])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-skl9/igt@kms_fbcon_fbt@psr-suspend.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl5/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile:
- shard-apl: NOTRUN -> [SKIP][58] ([fdo#109271] / [i915#2642])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-apl3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs:
- shard-skl: NOTRUN -> [SKIP][59] ([fdo#109271] / [i915#2672])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl6/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html
- shard-apl: NOTRUN -> [SKIP][60] ([fdo#109271] / [i915#2672])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-apl1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [PASS][61] -> [DMESG-WARN][62] ([i915#180]) +3 similar issues
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-msflip-blt:
- shard-skl: NOTRUN -> [SKIP][63] ([fdo#109271]) +77 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-kbl: NOTRUN -> [SKIP][64] ([fdo#109271]) +44 similar issues
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-gtt:
- shard-tglb: NOTRUN -> [SKIP][65] ([fdo#111825]) +10 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-tglb3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt:
- shard-skl: [PASS][66] -> [FAIL][67] ([i915#49])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-skl1/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl4/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- shard-skl: NOTRUN -> [SKIP][68] ([fdo#109271] / [i915#533])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl1/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d:
- shard-apl: NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#533])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-apl3/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-basic:
- shard-apl: NOTRUN -> [FAIL][70] ([fdo#108145] / [i915#265]) +1 similar issue
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-apl1/igt@kms_plane_alpha_blend@pipe-a-alpha-basic.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [PASS][71] -> [FAIL][72] ([fdo#108145] / [i915#265]) +2 similar issues
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
- shard-skl: NOTRUN -> [FAIL][73] ([fdo#108145] / [i915#265])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2:
- shard-apl: NOTRUN -> [SKIP][74] ([fdo#109271] / [i915#658]) +6 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-apl8/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2:
- shard-skl: NOTRUN -> [SKIP][75] ([fdo#109271] / [i915#658]) +1 similar issue
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl6/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1:
- shard-kbl: NOTRUN -> [SKIP][76] ([fdo#109271] / [i915#658])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl3/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5:
- shard-tglb: NOTRUN -> [SKIP][77] ([i915#2920])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-tglb3/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html
* igt@kms_psr@psr2_cursor_blt:
- shard-iclb: [PASS][78] -> [SKIP][79] ([fdo#109441]) +1 similar issue
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-iclb1/igt@kms_psr@psr2_cursor_blt.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-tglb: NOTRUN -> [FAIL][80] ([i915#132])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-tglb3/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_setmode@basic:
- shard-snb: NOTRUN -> [FAIL][81] ([i915#31])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-snb5/igt@kms_setmode@basic.html
* igt@kms_sysfs_edid_timing:
- shard-apl: NOTRUN -> [FAIL][82] ([IGT#2])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-apl1/igt@kms_sysfs_edid_timing.html
- shard-skl: NOTRUN -> [FAIL][83] ([IGT#2])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl6/igt@kms_sysfs_edid_timing.html
* igt@kms_vblank@pipe-d-wait-idle:
- shard-kbl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#533])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl3/igt@kms_vblank@pipe-d-wait-idle.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-kbl: NOTRUN -> [SKIP][85] ([fdo#109271] / [i915#2437])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl2/igt@kms_writeback@writeback-invalid-parameters.html
* igt@nouveau_crc@pipe-c-ctx-flip-skip-current-frame:
- shard-tglb: NOTRUN -> [SKIP][86] ([i915#2530])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-tglb3/igt@nouveau_crc@pipe-c-ctx-flip-skip-current-frame.html
* igt@prime_nv_api@i915_self_import_to_different_fd:
- shard-tglb: NOTRUN -> [SKIP][87] ([fdo#109291]) +1 similar issue
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-tglb3/igt@prime_nv_api@i915_self_import_to_different_fd.html
* igt@sysfs_clients@create:
- shard-skl: NOTRUN -> [SKIP][88] ([fdo#109271] / [i915#2994])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl1/igt@sysfs_clients@create.html
* igt@sysfs_clients@fair-1:
- shard-apl: NOTRUN -> [SKIP][89] ([fdo#109271] / [i915#2994]) +3 similar issues
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-apl7/igt@sysfs_clients@fair-1.html
- shard-kbl: NOTRUN -> [SKIP][90] ([fdo#109271] / [i915#2994])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl2/igt@sysfs_clients@fair-1.html
* igt@sysfs_heartbeat_interval@mixed@rcs0:
- shard-skl: NOTRUN -> [FAIL][91] ([i915#1731])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl1/igt@sysfs_heartbeat_interval@mixed@rcs0.html
#### Possible fixes ####
* igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-glk: [FAIL][92] ([i915#2842]) -> [PASS][93]
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-glk4/igt@gem_exec_fair@basic-none-rrul@rcs0.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-glk5/igt@gem_exec_fair@basic-none-rrul@rcs0.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-apl: [SKIP][94] ([fdo#109271]) -> [PASS][95]
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-apl2/igt@gem_exec_fair@basic-none-share@rcs0.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-apl6/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-kbl: [FAIL][96] ([i915#2842]) -> [PASS][97] +1 similar issue
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-kbl1/igt@gem_exec_fair@basic-none-solo@rcs0.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl3/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [FAIL][98] ([i915#2842]) -> [PASS][99] +4 similar issues
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-tglb6/igt@gem_exec_fair@basic-pace-share@rcs0.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-tglb5/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl: [SKIP][100] ([fdo#109271]) -> [PASS][101]
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-kbl1/igt@gem_exec_fair@basic-pace@vecs0.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl7/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_exec_reloc@basic-wc-noreloc:
- shard-skl: [DMESG-WARN][102] ([i915#1982]) -> [PASS][103]
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-skl4/igt@gem_exec_reloc@basic-wc-noreloc.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl9/igt@gem_exec_reloc@basic-wc-noreloc.html
* igt@gem_mmap_gtt@big-copy-odd:
- shard-glk: [FAIL][104] ([i915#307]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-glk1/igt@gem_mmap_gtt@big-copy-odd.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-glk4/igt@gem_mmap_gtt@big-copy-odd.html
* igt@gem_mmap_offset@clear:
- shard-skl: [FAIL][106] ([i915#3160]) -> [PASS][107]
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-skl7/igt@gem_mmap_offset@clear.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-skl4/igt@gem_mmap_offset@clear.html
- shard-glk: [FAIL][108] ([i915#1888] / [i915#3160]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-glk5/igt@gem_mmap_offset@clear.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-glk7/igt@gem_mmap_offset@clear.html
- shard-iclb: [FAIL][110] ([i915#3160]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-iclb7/igt@gem_mmap_offset@clear.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-iclb3/igt@gem_mmap_offset@clear.html
* igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ab-hdmi-a1-hdmi-a2:
- shard-glk: [DMESG-WARN][112] ([i915#118] / [i915#95]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-glk2/igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ab-hdmi-a1-hdmi-a2.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-glk3/igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
- shard-kbl: [DMESG-WARN][114] ([i915#180]) -> [PASS][115] +7 similar issues
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-kbl1/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl2/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-render:
- shard-snb: [SKIP][116] ([fdo#109271]) -> [PASS][117] +3 similar issues
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-snb2/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-render.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-snb6/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-cpu:
- shard-tglb: [INCOMPLETE][118] -> [PASS][119]
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-cpu.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-cpu.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [SKIP][120] ([fdo#109642] / [fdo#111068] / [i915#658]) -> [PASS][121]
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-iclb8/igt@kms_psr2_su@frontbuffer.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_sprite_render:
- shard-iclb: [SKIP][122] ([fdo#109441]) -> [PASS][123]
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-iclb1/igt@kms_psr@psr2_sprite_render.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-iclb2/igt@kms_psr@psr2_sprite_render.html
#### Warnings ####
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][124] ([i915#1804] / [i915#2684]) -> [WARN][125] ([i915#2684])
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-iclb4/igt@i915_pm_rc6_residency@rc6-fence.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-iclb8/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_selftest@live@execlists:
- shard-tglb: [INCOMPLETE][126] ([i915#3462]) -> [DMESG-FAIL][127] ([i915#3462])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-tglb3/igt@i915_selftest@live@execlists.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-tglb1/igt@i915_selftest@live@execlists.html
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: [SKIP][128] ([fdo#109349]) -> [CRASH][129] ([i915#3494])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-iclb1/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area-1:
- shard-iclb: [SKIP][130] ([i915#2920]) -> [SKIP][131] ([i915#658]) +1 similar issue
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-iclb2/igt@kms_psr2_sf@plane-move-sf-dmg-area-1.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-iclb1/igt@kms_psr2_sf@plane-move-sf-dmg-area-1.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4:
- shard-iclb: [SKIP][132] ([i915#658]) -> [SKIP][133] ([i915#2920]) +1 similar issue
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-iclb1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][134], [FAIL][135], [FAIL][136], [FAIL][137], [FAIL][138], [FAIL][139], [FAIL][140], [FAIL][141], [FAIL][142]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#2426] / [i915#3002] / [i915#3363]) -> ([FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148], [FAIL][149], [FAIL][150], [FAIL][151], [FAIL][152]) ([fdo#109271] / [i915#1436] / [i915#1814] / [i915#2426] / [i915#3002] / [i915#3363] / [i915#602])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-kbl2/igt@runner@aborted.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-kbl1/igt@runner@aborted.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-kbl1/igt@runner@aborted.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-kbl1/igt@runner@aborted.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-kbl2/igt@runner@aborted.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-kbl3/igt@runner@aborted.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-kbl4/igt@runner@aborted.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-kbl4/igt@runner@aborted.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10181/shard-kbl4/igt@runner@aborted.html
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl7/igt@runner@aborted.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl7/igt@runner@aborted.html
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl7/igt@runner@aborted.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl7/igt@runner@aborted.html
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl7/igt@runner@aborted.html
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl4/igt@runner@aborted.html
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl4/igt@runner@aborted.html
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl1/igt@runner@aborted.html
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/shard-kbl2/igt@runner@abo
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20292/index.html
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915: Finish conversion to GRAPHICS_VER (rev2)
2021-06-05 15:53 [Intel-gfx] [PATCH v4 0/5] drm/i915: Finish conversion to GRAPHICS_VER Lucas De Marchi
@ 2021-06-05 16:46 ` Patchwork
0 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2021-06-05 16:46 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Finish conversion to GRAPHICS_VER (rev2)
URL : https://patchwork.freedesktop.org/series/90964/
State : warning
== Summary ==
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready (#1)
MODPOST modules-only.symvers
ERROR: modpost: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
ERROR: modpost: "__divdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
scripts/Makefile.modpost:150: recipe for target 'modules-only.symvers' failed
make[1]: *** [modules-only.symvers] Error 1
make[1]: *** Deleting file 'modules-only.symvers'
Makefile:1759: recipe for target 'modules' failed
make: *** [modules] Error 2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20290/build_32bit.log
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2021-06-07 7:49 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-06 4:50 [Intel-gfx] [PATCH v5 0/2] drm/i915: Finish conversion to GRAPHICS_VER Lucas De Marchi
2021-06-06 4:50 ` [Intel-gfx] [PATCH v5 1/2] drm/i915: replace IS_GEN and friends with GRAPHICS_VER Lucas De Marchi
2021-06-06 4:50 ` [Intel-gfx] [PATCH v5 2/2] drm/i915: Add remaining conversions to GRAPHICS_VER Lucas De Marchi
2021-06-06 5:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Finish conversion " Patchwork
2021-06-06 5:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-06-06 5:42 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2021-06-06 6:50 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-06-07 6:16 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Finish conversion to GRAPHICS_VER (rev2) Patchwork
2021-06-07 6:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-06-07 6:45 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2021-06-07 7:49 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
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2021-06-05 15:53 [Intel-gfx] [PATCH v4 0/5] drm/i915: Finish conversion to GRAPHICS_VER Lucas De Marchi
2021-06-05 16:46 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915: Finish conversion to GRAPHICS_VER (rev2) Patchwork
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