* [Intel-gfx] [PATCH 0/2] ADL DDI translation buffer updates
@ 2021-07-23 5:33 Matt Roper
2021-07-23 5:34 ` [Intel-gfx] [PATCH 1/2] drm/i915/adl_s: Update ddi buf translation tables Matt Roper
` (4 more replies)
0 siblings, 5 replies; 11+ messages in thread
From: Matt Roper @ 2021-07-23 5:33 UTC (permalink / raw)
To: intel-gfx
Both ADL-S and ADL-P have had some updates to their combo PHY DDI buf
translation tables.
Matt Roper (2):
drm/i915/adl_s: Update ddi buf translation tables
drm/i915/adl_p: Add ddi buf translation tables for combo PHY
.../drm/i915/display/intel_ddi_buf_trans.c | 148 +++++++++++++++---
1 file changed, 126 insertions(+), 22 deletions(-)
--
2.25.4
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^ permalink raw reply [flat|nested] 11+ messages in thread* [Intel-gfx] [PATCH 1/2] drm/i915/adl_s: Update ddi buf translation tables 2021-07-23 5:33 [Intel-gfx] [PATCH 0/2] ADL DDI translation buffer updates Matt Roper @ 2021-07-23 5:34 ` Matt Roper 2021-07-28 17:41 ` Souza, Jose 2021-07-23 5:34 ` [Intel-gfx] [PATCH 2/2] drm/i915/adl_p: Add ddi buf translation tables for combo PHY Matt Roper ` (3 subsequent siblings) 4 siblings, 1 reply; 11+ messages in thread From: Matt Roper @ 2021-07-23 5:34 UTC (permalink / raw) To: intel-gfx The hardware team updates the translation tables on 2021-06-23. Let's update the driver accordingly. Bspec: 49291 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> --- .../drm/i915/display/intel_ddi_buf_trans.c | 44 +++++++++---------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c index 63b1ae830d9a..cdd0df467287 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c @@ -1004,13 +1004,13 @@ static const union intel_ddi_buf_trans_entry _adls_combo_phy_ddi_translations_dp /* NT mV Trans mV db */ { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ - { .cnl = { 0xC, 0x63, 0x30, 0x00, 0x0F } }, /* 350 700 6.0 */ - { .cnl = { 0x6, 0x7F, 0x2B, 0x00, 0x14 } }, /* 350 900 8.2 */ + { .cnl = { 0xC, 0x63, 0x31, 0x00, 0x0E } }, /* 350 700 6.0 */ + { .cnl = { 0x6, 0x7F, 0x2C, 0x00, 0x13 } }, /* 350 900 8.2 */ { .cnl = { 0xA, 0x47, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ { .cnl = { 0xC, 0x63, 0x37, 0x00, 0x08 } }, /* 500 700 2.9 */ - { .cnl = { 0x6, 0x7F, 0x31, 0x00, 0x0E } }, /* 500 900 5.1 */ - { .cnl = { 0xC, 0x61, 0x3C, 0x00, 0x03 } }, /* 650 700 0.6 */ - { .cnl = { 0x6, 0x7B, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ + { .cnl = { 0x6, 0x73, 0x32, 0x00, 0x0D } }, /* 500 900 5.1 */ + { .cnl = { 0xC, 0x58, 0x3F, 0x00, 0x00 } }, /* 650 700 0.6 */ + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ }; @@ -1021,16 +1021,16 @@ static const struct intel_ddi_buf_trans adls_combo_phy_ddi_translations_dp_hbr2_ static const union intel_ddi_buf_trans_entry _adls_combo_phy_ddi_translations_edp_hbr2[] = { /* NT mV Trans mV db */ - { .cnl = { 0x9, 0x70, 0x3C, 0x00, 0x03 } }, /* 200 200 0.0 */ - { .cnl = { 0x9, 0x6D, 0x3A, 0x00, 0x05 } }, /* 200 250 1.9 */ - { .cnl = { 0x9, 0x7F, 0x36, 0x00, 0x09 } }, /* 200 300 3.5 */ - { .cnl = { 0x4, 0x59, 0x32, 0x00, 0x0D } }, /* 200 350 4.9 */ - { .cnl = { 0x2, 0x77, 0x3A, 0x00, 0x05 } }, /* 250 250 0.0 */ - { .cnl = { 0x2, 0x7F, 0x38, 0x00, 0x07 } }, /* 250 300 1.6 */ + { .cnl = { 0x9, 0x73, 0x3D, 0x00, 0x02 } }, /* 200 200 0.0 */ + { .cnl = { 0x9, 0x7A, 0x3C, 0x00, 0x03 } }, /* 200 250 1.9 */ + { .cnl = { 0x9, 0x7F, 0x3B, 0x00, 0x04 } }, /* 200 300 3.5 */ + { .cnl = { 0x4, 0x6C, 0x33, 0x00, 0x0C } }, /* 200 350 4.9 */ + { .cnl = { 0x2, 0x73, 0x3A, 0x00, 0x05 } }, /* 250 250 0.0 */ + { .cnl = { 0x2, 0x7C, 0x38, 0x00, 0x07 } }, /* 250 300 1.6 */ { .cnl = { 0x4, 0x5A, 0x36, 0x00, 0x09 } }, /* 250 350 2.9 */ - { .cnl = { 0x4, 0x5E, 0x3D, 0x00, 0x04 } }, /* 300 300 0.0 */ + { .cnl = { 0x4, 0x57, 0x3D, 0x00, 0x02 } }, /* 300 300 0.0 */ { .cnl = { 0x4, 0x65, 0x38, 0x00, 0x07 } }, /* 300 350 1.3 */ - { .cnl = { 0x4, 0x6F, 0x3A, 0x00, 0x05 } }, /* 350 350 0.0 */ + { .cnl = { 0x4, 0x6C, 0x3A, 0x00, 0x05 } }, /* 350 350 0.0 */ }; static const struct intel_ddi_buf_trans adls_combo_phy_ddi_translations_edp_hbr2 = { @@ -1040,15 +1040,15 @@ static const struct intel_ddi_buf_trans adls_combo_phy_ddi_translations_edp_hbr2 static const union intel_ddi_buf_trans_entry _adls_combo_phy_ddi_translations_edp_hbr3[] = { /* NT mV Trans mV db */ - { .cnl = { 0xA, 0x5E, 0x34, 0x00, 0x0B } }, /* 350 350 0.0 */ - { .cnl = { 0xA, 0x69, 0x32, 0x00, 0x0D } }, /* 350 500 3.1 */ - { .cnl = { 0xC, 0x74, 0x31, 0x00, 0x0E } }, /* 350 700 6.0 */ - { .cnl = { 0x6, 0x7F, 0x2E, 0x00, 0x11 } }, /* 350 900 8.2 */ - { .cnl = { 0xA, 0x5C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ - { .cnl = { 0xC, 0x7F, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ - { .cnl = { 0x6, 0x7F, 0x33, 0x00, 0x0C } }, /* 500 900 5.1 */ - { .cnl = { 0xC, 0x7F, 0x3F, 0x00, 0x00 } }, /* 650 700 0.6 */ - { .cnl = { 0x6, 0x7F, 0x3C, 0x00, 0x03 } }, /* 600 900 3.5 */ + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ + { .cnl = { 0xC, 0x63, 0x31, 0x00, 0x0E } }, /* 350 700 6.0 */ + { .cnl = { 0x6, 0x7F, 0x2C, 0x00, 0x13 } }, /* 350 900 8.2 */ + { .cnl = { 0xA, 0x47, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xC, 0x63, 0x37, 0x00, 0x08 } }, /* 500 700 2.9 */ + { .cnl = { 0x6, 0x73, 0x32, 0x00, 0x0D } }, /* 500 900 5.1 */ + { .cnl = { 0xC, 0x58, 0x3F, 0x00, 0x00 } }, /* 650 700 0.6 */ + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ }; -- 2.25.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/adl_s: Update ddi buf translation tables 2021-07-23 5:34 ` [Intel-gfx] [PATCH 1/2] drm/i915/adl_s: Update ddi buf translation tables Matt Roper @ 2021-07-28 17:41 ` Souza, Jose 0 siblings, 0 replies; 11+ messages in thread From: Souza, Jose @ 2021-07-28 17:41 UTC (permalink / raw) To: Roper, Matthew D, intel-gfx On Thu, 2021-07-22 at 22:34 -0700, Matt Roper wrote: > The hardware team updates the translation tables on 2021-06-23. Let's > update the driver accordingly. Reviewed-by: José Roberto de Souza <jose.souza@intel.com> > > Bspec: 49291 > Signed-off-by: Matt Roper <matthew.d.roper@intel.com> > --- > .../drm/i915/display/intel_ddi_buf_trans.c | 44 +++++++++---------- > 1 file changed, 22 insertions(+), 22 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c > index 63b1ae830d9a..cdd0df467287 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c > @@ -1004,13 +1004,13 @@ static const union intel_ddi_buf_trans_entry _adls_combo_phy_ddi_translations_dp > /* NT mV Trans mV db */ > { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ > - { .cnl = { 0xC, 0x63, 0x30, 0x00, 0x0F } }, /* 350 700 6.0 */ > - { .cnl = { 0x6, 0x7F, 0x2B, 0x00, 0x14 } }, /* 350 900 8.2 */ > + { .cnl = { 0xC, 0x63, 0x31, 0x00, 0x0E } }, /* 350 700 6.0 */ > + { .cnl = { 0x6, 0x7F, 0x2C, 0x00, 0x13 } }, /* 350 900 8.2 */ > { .cnl = { 0xA, 0x47, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > { .cnl = { 0xC, 0x63, 0x37, 0x00, 0x08 } }, /* 500 700 2.9 */ > - { .cnl = { 0x6, 0x7F, 0x31, 0x00, 0x0E } }, /* 500 900 5.1 */ > - { .cnl = { 0xC, 0x61, 0x3C, 0x00, 0x03 } }, /* 650 700 0.6 */ > - { .cnl = { 0x6, 0x7B, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ > + { .cnl = { 0x6, 0x73, 0x32, 0x00, 0x0D } }, /* 500 900 5.1 */ > + { .cnl = { 0xC, 0x58, 0x3F, 0x00, 0x00 } }, /* 650 700 0.6 */ > + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ > { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ > }; > > @@ -1021,16 +1021,16 @@ static const struct intel_ddi_buf_trans adls_combo_phy_ddi_translations_dp_hbr2_ > > static const union intel_ddi_buf_trans_entry _adls_combo_phy_ddi_translations_edp_hbr2[] = { > /* NT mV Trans mV db */ > - { .cnl = { 0x9, 0x70, 0x3C, 0x00, 0x03 } }, /* 200 200 0.0 */ > - { .cnl = { 0x9, 0x6D, 0x3A, 0x00, 0x05 } }, /* 200 250 1.9 */ > - { .cnl = { 0x9, 0x7F, 0x36, 0x00, 0x09 } }, /* 200 300 3.5 */ > - { .cnl = { 0x4, 0x59, 0x32, 0x00, 0x0D } }, /* 200 350 4.9 */ > - { .cnl = { 0x2, 0x77, 0x3A, 0x00, 0x05 } }, /* 250 250 0.0 */ > - { .cnl = { 0x2, 0x7F, 0x38, 0x00, 0x07 } }, /* 250 300 1.6 */ > + { .cnl = { 0x9, 0x73, 0x3D, 0x00, 0x02 } }, /* 200 200 0.0 */ > + { .cnl = { 0x9, 0x7A, 0x3C, 0x00, 0x03 } }, /* 200 250 1.9 */ > + { .cnl = { 0x9, 0x7F, 0x3B, 0x00, 0x04 } }, /* 200 300 3.5 */ > + { .cnl = { 0x4, 0x6C, 0x33, 0x00, 0x0C } }, /* 200 350 4.9 */ > + { .cnl = { 0x2, 0x73, 0x3A, 0x00, 0x05 } }, /* 250 250 0.0 */ > + { .cnl = { 0x2, 0x7C, 0x38, 0x00, 0x07 } }, /* 250 300 1.6 */ > { .cnl = { 0x4, 0x5A, 0x36, 0x00, 0x09 } }, /* 250 350 2.9 */ > - { .cnl = { 0x4, 0x5E, 0x3D, 0x00, 0x04 } }, /* 300 300 0.0 */ > + { .cnl = { 0x4, 0x57, 0x3D, 0x00, 0x02 } }, /* 300 300 0.0 */ > { .cnl = { 0x4, 0x65, 0x38, 0x00, 0x07 } }, /* 300 350 1.3 */ > - { .cnl = { 0x4, 0x6F, 0x3A, 0x00, 0x05 } }, /* 350 350 0.0 */ > + { .cnl = { 0x4, 0x6C, 0x3A, 0x00, 0x05 } }, /* 350 350 0.0 */ > }; > > static const struct intel_ddi_buf_trans adls_combo_phy_ddi_translations_edp_hbr2 = { > @@ -1040,15 +1040,15 @@ static const struct intel_ddi_buf_trans adls_combo_phy_ddi_translations_edp_hbr2 > > static const union intel_ddi_buf_trans_entry _adls_combo_phy_ddi_translations_edp_hbr3[] = { > /* NT mV Trans mV db */ > - { .cnl = { 0xA, 0x5E, 0x34, 0x00, 0x0B } }, /* 350 350 0.0 */ > - { .cnl = { 0xA, 0x69, 0x32, 0x00, 0x0D } }, /* 350 500 3.1 */ > - { .cnl = { 0xC, 0x74, 0x31, 0x00, 0x0E } }, /* 350 700 6.0 */ > - { .cnl = { 0x6, 0x7F, 0x2E, 0x00, 0x11 } }, /* 350 900 8.2 */ > - { .cnl = { 0xA, 0x5C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > - { .cnl = { 0xC, 0x7F, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ > - { .cnl = { 0x6, 0x7F, 0x33, 0x00, 0x0C } }, /* 500 900 5.1 */ > - { .cnl = { 0xC, 0x7F, 0x3F, 0x00, 0x00 } }, /* 650 700 0.6 */ > - { .cnl = { 0x6, 0x7F, 0x3C, 0x00, 0x03 } }, /* 600 900 3.5 */ > + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ > + { .cnl = { 0xC, 0x63, 0x31, 0x00, 0x0E } }, /* 350 700 6.0 */ > + { .cnl = { 0x6, 0x7F, 0x2C, 0x00, 0x13 } }, /* 350 900 8.2 */ > + { .cnl = { 0xA, 0x47, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > + { .cnl = { 0xC, 0x63, 0x37, 0x00, 0x08 } }, /* 500 700 2.9 */ > + { .cnl = { 0x6, 0x73, 0x32, 0x00, 0x0D } }, /* 500 900 5.1 */ > + { .cnl = { 0xC, 0x58, 0x3F, 0x00, 0x00 } }, /* 650 700 0.6 */ > + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ > { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ > }; > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915/adl_p: Add ddi buf translation tables for combo PHY 2021-07-23 5:33 [Intel-gfx] [PATCH 0/2] ADL DDI translation buffer updates Matt Roper 2021-07-23 5:34 ` [Intel-gfx] [PATCH 1/2] drm/i915/adl_s: Update ddi buf translation tables Matt Roper @ 2021-07-23 5:34 ` Matt Roper 2021-07-23 5:38 ` [Intel-gfx] [PATCH v2 " Matt Roper 2021-07-23 9:51 ` [Intel-gfx] [PATCH " kernel test robot 2021-07-23 6:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for ADL DDI translation buffer updates (rev2) Patchwork ` (2 subsequent siblings) 4 siblings, 2 replies; 11+ messages in thread From: Matt Roper @ 2021-07-23 5:34 UTC (permalink / raw) To: intel-gfx ADL-P now has its own set of DDI buf translation tables (except for eDP which appears to be the same as TGL). Add the new values (last updated in bspec 2021-07-22) to the driver. Bspec: 49291 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> --- .../drm/i915/display/intel_ddi_buf_trans.c | 104 ++++++++++++++++++ 1 file changed, 104 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c index cdd0df467287..fdc9b2e47541 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c @@ -1057,6 +1057,64 @@ static const struct intel_ddi_buf_trans adls_combo_phy_ddi_translations_edp_hbr3 .num_entries = ARRAY_SIZE(_adls_combo_phy_ddi_translations_edp_hbr3), }; +static const union intel_ddi_buf_trans_entry _adlp_combo_phy_ddi_translations_hdmi[] = { + /* NT mV Trans mV db */ + { .cnl = { 0x6, 0x60, 0x3F, 0x00, 0x00 } }, /* 400 400 0.0 */ + { .cnl = { 0x6, 0x68, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xA, 0x73, 0x3F, 0x00, 0x00 } }, /* 650 650 0.0 ALS */ + { .cnl = { 0xA, 0x78, 0x3F, 0x00, 0x00 } }, /* 800 800 0.0 */ + { .cnl = { 0xB, 0x7F, 0x3F, 0x00, 0x00 } }, /* 1000 1000 0.0 Re-timer */ + { .cnl = { 0xB, 0x7F, 0x3B, 0x00, 0x04 } }, /* Full Red -1.5 */ + { .cnl = { 0xB, 0x7F, 0x39, 0x00, 0x06 } }, /* Full Red -1.8 */ + { .cnl = { 0xB, 0x7F, 0x37, 0x00, 0x08 } }, /* Full Red -2.0 CRLS */ + { .cnl = { 0xB, 0x7F, 0x35, 0x00, 0x0A } }, /* Full Red -2.5 */ + { .cnl = { 0xB, 0x7F, 0x33, 0x00, 0x0C } }, /* Full Red -3.0 */ +}; + +static const struct intel_ddi_buf_trans adlp_combo_phy_ddi_translations_hdmi = { + .entries = _adlp_combo_phy_ddi_translations_hdmi, + .num_entries = ARRAY_SIZE(_adlp_combo_phy_ddi_translations_hdmi), + .hdmi_default_entry = ARRAY_SIZE(_adlp_combo_phy_ddi_translations_hdmi) - 1, +}; + +static const union intel_ddi_buf_trans_entry _adlp_combo_phy_ddi_translations_dp_hbr[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ + { .cnl = { 0xC, 0x71, 0x31, 0x00, 0x0E } }, /* 350 700 6.0 */ + { .cnl = { 0x6, 0x7F, 0x2C, 0x00, 0x13 } }, /* 350 900 8.2 */ + { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ + { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1 */ + { .cnl = { 0xC, 0x73, 0x3E, 0x00, 0x01 } }, /* 650 700 0.6 */ + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ +}; + +static const struct intel_ddi_buf_trans adlp_combo_phy_ddi_translations_dp_hbr = { + .entries = _adlp_combo_phy_ddi_translations_dp_hbr, + .num_entries = ARRAY_SIZE(_adlp_combo_phy_ddi_translations_dp_hbr), +}; + +static const union intel_ddi_buf_trans_entry _adlp_combo_phy_ddi_translations_dp_hbr2_hbr3[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ + { .cnl = { 0xC, 0x71, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ + { .cnl = { 0x6, 0x7F, 0x2B, 0x00, 0x14 } }, /* 350 900 8.2 */ + { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ + { .cnl = { 0x6, 0x7F, 0x30, 0x00, 0x0F } }, /* 500 900 5.1 */ + { .cnl = { 0xC, 0x63, 0x3F, 0x00, 0x00 } }, /* 650 700 0.6 */ + { .cnl = { 0x6, 0x7F, 0x38, 0x00, 0x07 } }, /* 600 900 3.5 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ +}; + +static const struct intel_ddi_buf_trans adlp_combo_phy_ddi_translations_dp_hbr2_hbr3 = { + .entries = _adlp_combo_phy_ddi_translations_dp_hbr2_hbr3, + .num_entries = ARRAY_SIZE(_adlp_combo_phy_ddi_translations_dp_hbr2_hbr3), +}; + static const union intel_ddi_buf_trans_entry _adlp_dkl_phy_ddi_translations_dp_hbr[] = { /* VS pre-emp Non-trans mV Pre-emph dB */ { .dkl = { 0x7, 0x0, 0x01 } }, /* 0 0 400mV 0 dB */ @@ -1661,6 +1719,52 @@ adls_get_combo_buf_trans(struct intel_encoder *encoder, return adls_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); } +static const struct intel_ddi_buf_trans * +adlp_get_combo_buf_trans_dp(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + int *n_entries) +{ + if (crtc_state->port_clock > 270000) + return intel_get_buf_trans(&adlp_combo_phy_ddi_translations_dp_hbr2_hbr3, n_entries); + else + return intel_get_buf_trans(&adlp_combo_phy_ddi_translations_dp_hbr, n_entries); +} + +static const struct intel_ddi_buf_trans * +adlp_get_combo_buf_trans_edp(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + int *n_entries) +{ + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); + + if (crtc_state->port_clock > 540000) { + return intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3, + n_entries); + } else if (dev_priv->vbt.edp.hobl && !intel_dp->hobl_failed) { + return intel_get_buf_trans(&tgl_combo_phy_ddi_translations_edp_hbr2_hobl, + n_entries); + } else if (dev_priv->vbt.edp.low_vswing) { + return intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr2, + n_entries); + } + + return adlp_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); +} + +static const struct intel_ddi_buf_trans * +adlp_get_combo_buf_trans(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + int *n_entries) +{ + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) + return intel_get_buf_trans(&adlp_combo_phy_ddi_translations_hdmi, n_entries); + else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) + return adlp_get_combo_buf_trans_edp(encoder, crtc_state, n_entries); + else + return adlp_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); +} + static const struct intel_ddi_buf_trans * tgl_get_dkl_buf_trans_dp(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, -- 2.25.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [Intel-gfx] [PATCH v2 2/2] drm/i915/adl_p: Add ddi buf translation tables for combo PHY 2021-07-23 5:34 ` [Intel-gfx] [PATCH 2/2] drm/i915/adl_p: Add ddi buf translation tables for combo PHY Matt Roper @ 2021-07-23 5:38 ` Matt Roper 2021-07-23 8:00 ` Almahallawy, Khaled 2021-07-28 17:57 ` Souza, Jose 2021-07-23 9:51 ` [Intel-gfx] [PATCH " kernel test robot 1 sibling, 2 replies; 11+ messages in thread From: Matt Roper @ 2021-07-23 5:38 UTC (permalink / raw) To: intel-gfx ADL-P now has its own set of DDI buf translation tables (except for eDP which appears to be the same as TGL). Add the new values (last updated in bspec 2021-07-22) to the driver. v2: - Actually hook up the new tables via encoder->get_buf_trans() Bspec: 49291 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> --- .../drm/i915/display/intel_ddi_buf_trans.c | 106 +++++++++++++++++- 1 file changed, 105 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c index cdd0df467287..7bf80b72733d 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c @@ -1057,6 +1057,64 @@ static const struct intel_ddi_buf_trans adls_combo_phy_ddi_translations_edp_hbr3 .num_entries = ARRAY_SIZE(_adls_combo_phy_ddi_translations_edp_hbr3), }; +static const union intel_ddi_buf_trans_entry _adlp_combo_phy_ddi_translations_hdmi[] = { + /* NT mV Trans mV db */ + { .cnl = { 0x6, 0x60, 0x3F, 0x00, 0x00 } }, /* 400 400 0.0 */ + { .cnl = { 0x6, 0x68, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xA, 0x73, 0x3F, 0x00, 0x00 } }, /* 650 650 0.0 ALS */ + { .cnl = { 0xA, 0x78, 0x3F, 0x00, 0x00 } }, /* 800 800 0.0 */ + { .cnl = { 0xB, 0x7F, 0x3F, 0x00, 0x00 } }, /* 1000 1000 0.0 Re-timer */ + { .cnl = { 0xB, 0x7F, 0x3B, 0x00, 0x04 } }, /* Full Red -1.5 */ + { .cnl = { 0xB, 0x7F, 0x39, 0x00, 0x06 } }, /* Full Red -1.8 */ + { .cnl = { 0xB, 0x7F, 0x37, 0x00, 0x08 } }, /* Full Red -2.0 CRLS */ + { .cnl = { 0xB, 0x7F, 0x35, 0x00, 0x0A } }, /* Full Red -2.5 */ + { .cnl = { 0xB, 0x7F, 0x33, 0x00, 0x0C } }, /* Full Red -3.0 */ +}; + +static const struct intel_ddi_buf_trans adlp_combo_phy_ddi_translations_hdmi = { + .entries = _adlp_combo_phy_ddi_translations_hdmi, + .num_entries = ARRAY_SIZE(_adlp_combo_phy_ddi_translations_hdmi), + .hdmi_default_entry = ARRAY_SIZE(_adlp_combo_phy_ddi_translations_hdmi) - 1, +}; + +static const union intel_ddi_buf_trans_entry _adlp_combo_phy_ddi_translations_dp_hbr[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ + { .cnl = { 0xC, 0x71, 0x31, 0x00, 0x0E } }, /* 350 700 6.0 */ + { .cnl = { 0x6, 0x7F, 0x2C, 0x00, 0x13 } }, /* 350 900 8.2 */ + { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ + { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1 */ + { .cnl = { 0xC, 0x73, 0x3E, 0x00, 0x01 } }, /* 650 700 0.6 */ + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ +}; + +static const struct intel_ddi_buf_trans adlp_combo_phy_ddi_translations_dp_hbr = { + .entries = _adlp_combo_phy_ddi_translations_dp_hbr, + .num_entries = ARRAY_SIZE(_adlp_combo_phy_ddi_translations_dp_hbr), +}; + +static const union intel_ddi_buf_trans_entry _adlp_combo_phy_ddi_translations_dp_hbr2_hbr3[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ + { .cnl = { 0xC, 0x71, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ + { .cnl = { 0x6, 0x7F, 0x2B, 0x00, 0x14 } }, /* 350 900 8.2 */ + { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ + { .cnl = { 0x6, 0x7F, 0x30, 0x00, 0x0F } }, /* 500 900 5.1 */ + { .cnl = { 0xC, 0x63, 0x3F, 0x00, 0x00 } }, /* 650 700 0.6 */ + { .cnl = { 0x6, 0x7F, 0x38, 0x00, 0x07 } }, /* 600 900 3.5 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ +}; + +static const struct intel_ddi_buf_trans adlp_combo_phy_ddi_translations_dp_hbr2_hbr3 = { + .entries = _adlp_combo_phy_ddi_translations_dp_hbr2_hbr3, + .num_entries = ARRAY_SIZE(_adlp_combo_phy_ddi_translations_dp_hbr2_hbr3), +}; + static const union intel_ddi_buf_trans_entry _adlp_dkl_phy_ddi_translations_dp_hbr[] = { /* VS pre-emp Non-trans mV Pre-emph dB */ { .dkl = { 0x7, 0x0, 0x01 } }, /* 0 0 400mV 0 dB */ @@ -1661,6 +1719,52 @@ adls_get_combo_buf_trans(struct intel_encoder *encoder, return adls_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); } +static const struct intel_ddi_buf_trans * +adlp_get_combo_buf_trans_dp(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + int *n_entries) +{ + if (crtc_state->port_clock > 270000) + return intel_get_buf_trans(&adlp_combo_phy_ddi_translations_dp_hbr2_hbr3, n_entries); + else + return intel_get_buf_trans(&adlp_combo_phy_ddi_translations_dp_hbr, n_entries); +} + +static const struct intel_ddi_buf_trans * +adlp_get_combo_buf_trans_edp(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + int *n_entries) +{ + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); + + if (crtc_state->port_clock > 540000) { + return intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3, + n_entries); + } else if (dev_priv->vbt.edp.hobl && !intel_dp->hobl_failed) { + return intel_get_buf_trans(&tgl_combo_phy_ddi_translations_edp_hbr2_hobl, + n_entries); + } else if (dev_priv->vbt.edp.low_vswing) { + return intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr2, + n_entries); + } + + return adlp_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); +} + +static const struct intel_ddi_buf_trans * +adlp_get_combo_buf_trans(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + int *n_entries) +{ + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) + return intel_get_buf_trans(&adlp_combo_phy_ddi_translations_hdmi, n_entries); + else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) + return adlp_get_combo_buf_trans_edp(encoder, crtc_state, n_entries); + else + return adlp_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); +} + static const struct intel_ddi_buf_trans * tgl_get_dkl_buf_trans_dp(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, @@ -1738,7 +1842,7 @@ void intel_ddi_buf_trans_init(struct intel_encoder *encoder) if (IS_ALDERLAKE_P(i915)) { if (intel_phy_is_combo(i915, phy)) - encoder->get_buf_trans = tgl_get_combo_buf_trans; + encoder->get_buf_trans = adlp_get_combo_buf_trans; else encoder->get_buf_trans = adlp_get_dkl_buf_trans; } else if (IS_ALDERLAKE_S(i915)) { -- 2.25.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH v2 2/2] drm/i915/adl_p: Add ddi buf translation tables for combo PHY 2021-07-23 5:38 ` [Intel-gfx] [PATCH v2 " Matt Roper @ 2021-07-23 8:00 ` Almahallawy, Khaled 2021-07-28 17:57 ` Souza, Jose 1 sibling, 0 replies; 11+ messages in thread From: Almahallawy, Khaled @ 2021-07-23 8:00 UTC (permalink / raw) To: Roper, Matthew D, intel-gfx Thank you for the patch. HDMI, DP HBR and HBR2_HBR3 tables match the spces. Acked-by: Khaled Almahallawy <khaled.almahallawy@intel.com> On Thu, 2021-07-22 at 22:38 -0700, Matt Roper wrote: > ADL-P now has its own set of DDI buf translation tables (except for > eDP > which appears to be the same as TGL). Add the new values (last > updated > in bspec 2021-07-22) to the driver. > > v2: > - Actually hook up the new tables via encoder->get_buf_trans() > > Bspec: 49291 > Signed-off-by: Matt Roper <matthew.d.roper@intel.com> > --- > .../drm/i915/display/intel_ddi_buf_trans.c | 106 > +++++++++++++++++- > 1 file changed, 105 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c > b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c > index cdd0df467287..7bf80b72733d 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c > @@ -1057,6 +1057,64 @@ static const struct intel_ddi_buf_trans > adls_combo_phy_ddi_translations_edp_hbr3 > .num_entries = > ARRAY_SIZE(_adls_combo_phy_ddi_translations_edp_hbr3), > }; > > +static const union intel_ddi_buf_trans_entry > _adlp_combo_phy_ddi_translations_hdmi[] = { > + /* NT mV Trans > mV db */ > + { .cnl = { 0x6, 0x60, 0x3F, 0x00, 0x00 } }, /* 400 40 > 0 0.0 */ > + { .cnl = { 0x6, 0x68, 0x3F, 0x00, 0x00 } }, /* 500 50 > 0 0.0 */ > + { .cnl = { 0xA, 0x73, 0x3F, 0x00, 0x00 } }, /* 650 65 > 0 0.0 ALS */ > + { .cnl = { 0xA, 0x78, 0x3F, 0x00, 0x00 } }, /* 800 80 > 0 0.0 */ > + { .cnl = { 0xB, 0x7F, 0x3F, 0x00, 0x00 } }, /* > 1000 1000 0.0 Re-timer */ > + { .cnl = { 0xB, 0x7F, 0x3B, 0x00, 0x04 } }, /* > Full Red -1.5 */ > + { .cnl = { 0xB, 0x7F, 0x39, 0x00, 0x06 } }, /* > Full Red -1.8 */ > + { .cnl = { 0xB, 0x7F, 0x37, 0x00, 0x08 } }, /* > Full Red -2.0 CRLS */ > + { .cnl = { 0xB, 0x7F, 0x35, 0x00, 0x0A } }, /* > Full Red -2.5 */ > + { .cnl = { 0xB, 0x7F, 0x33, 0x00, 0x0C } }, /* > Full Red -3.0 */ > +}; > + > +static const struct intel_ddi_buf_trans > adlp_combo_phy_ddi_translations_hdmi = { > + .entries = _adlp_combo_phy_ddi_translations_hdmi, > + .num_entries = > ARRAY_SIZE(_adlp_combo_phy_ddi_translations_hdmi), > + .hdmi_default_entry = > ARRAY_SIZE(_adlp_combo_phy_ddi_translations_hdmi) - 1, > +}; > + > +static const union intel_ddi_buf_trans_entry > _adlp_combo_phy_ddi_translations_dp_hbr[] = { > + /* NT mV Trans > mV db */ > + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* > 350 350 0.0 */ > + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* > 350 500 3.1 */ > + { .cnl = { 0xC, 0x71, 0x31, 0x00, 0x0E } }, /* > 350 700 6.0 */ > + { .cnl = { 0x6, 0x7F, 0x2C, 0x00, 0x13 } }, /* > 350 900 8.2 */ > + { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* > 500 500 0.0 */ > + { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* > 500 700 2.9 */ > + { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* > 500 900 5.1 */ > + { .cnl = { 0xC, 0x73, 0x3E, 0x00, 0x01 } }, /* > 650 700 0.6 */ > + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* > 600 900 3.5 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* > 900 900 0.0 */ > +}; > + > +static const struct intel_ddi_buf_trans > adlp_combo_phy_ddi_translations_dp_hbr = { > + .entries = _adlp_combo_phy_ddi_translations_dp_hbr, > + .num_entries = > ARRAY_SIZE(_adlp_combo_phy_ddi_translations_dp_hbr), > +}; > + > +static const union intel_ddi_buf_trans_entry > _adlp_combo_phy_ddi_translations_dp_hbr2_hbr3[] = { > + /* NT mV Trans > mV db */ > + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* > 350 350 0.0 */ > + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* > 350 500 3.1 */ > + { .cnl = { 0xC, 0x71, 0x2F, 0x00, 0x10 } }, /* > 350 700 6.0 */ > + { .cnl = { 0x6, 0x7F, 0x2B, 0x00, 0x14 } }, /* > 350 900 8.2 */ > + { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* > 500 500 0.0 */ > + { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* > 500 700 2.9 */ > + { .cnl = { 0x6, 0x7F, 0x30, 0x00, 0x0F } }, /* > 500 900 5.1 */ > + { .cnl = { 0xC, 0x63, 0x3F, 0x00, 0x00 } }, /* > 650 700 0.6 */ > + { .cnl = { 0x6, 0x7F, 0x38, 0x00, 0x07 } }, /* > 600 900 3.5 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* > 900 900 0.0 */ > +}; > + > +static const struct intel_ddi_buf_trans > adlp_combo_phy_ddi_translations_dp_hbr2_hbr3 = { > + .entries = _adlp_combo_phy_ddi_translations_dp_hbr2_hbr3, > + .num_entries = > ARRAY_SIZE(_adlp_combo_phy_ddi_translations_dp_hbr2_hbr3), > +}; > + > static const union intel_ddi_buf_trans_entry > _adlp_dkl_phy_ddi_translations_dp_hbr[] = { > /* VS pre-emp Non-trans mV > Pre-emph dB */ > { .dkl = { 0x7, 0x0, 0x01 } }, /* 0 0 400mV > 0 dB */ > @@ -1661,6 +1719,52 @@ adls_get_combo_buf_trans(struct intel_encoder > *encoder, > return adls_get_combo_buf_trans_dp(encoder, crtc_state, > n_entries); > } > > +static const struct intel_ddi_buf_trans * > +adlp_get_combo_buf_trans_dp(struct intel_encoder *encoder, > + const struct intel_crtc_state *crtc_state, > + int *n_entries) > +{ > + if (crtc_state->port_clock > 270000) > + return > intel_get_buf_trans(&adlp_combo_phy_ddi_translations_dp_hbr2_hbr3, > n_entries); > + else > + return > intel_get_buf_trans(&adlp_combo_phy_ddi_translations_dp_hbr, > n_entries); > +} > + > +static const struct intel_ddi_buf_trans * > +adlp_get_combo_buf_trans_edp(struct intel_encoder *encoder, > + const struct intel_crtc_state *crtc_state, > + int *n_entries) > +{ > + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); > + > + if (crtc_state->port_clock > 540000) { > + return > intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3, > + n_entries); > + } else if (dev_priv->vbt.edp.hobl && !intel_dp->hobl_failed) { > + return > intel_get_buf_trans(&tgl_combo_phy_ddi_translations_edp_hbr2_hobl, > + n_entries); > + } else if (dev_priv->vbt.edp.low_vswing) { > + return > intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr2, > + n_entries); > + } > + > + return adlp_get_combo_buf_trans_dp(encoder, crtc_state, > n_entries); > +} > + > +static const struct intel_ddi_buf_trans * > +adlp_get_combo_buf_trans(struct intel_encoder *encoder, > + const struct intel_crtc_state *crtc_state, > + int *n_entries) > +{ > + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) > + return > intel_get_buf_trans(&adlp_combo_phy_ddi_translations_hdmi, > n_entries); > + else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) > + return adlp_get_combo_buf_trans_edp(encoder, > crtc_state, n_entries); > + else > + return adlp_get_combo_buf_trans_dp(encoder, crtc_state, > n_entries); > +} > + > static const struct intel_ddi_buf_trans * > tgl_get_dkl_buf_trans_dp(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > @@ -1738,7 +1842,7 @@ void intel_ddi_buf_trans_init(struct > intel_encoder *encoder) > > if (IS_ALDERLAKE_P(i915)) { > if (intel_phy_is_combo(i915, phy)) > - encoder->get_buf_trans = > tgl_get_combo_buf_trans; > + encoder->get_buf_trans = > adlp_get_combo_buf_trans; > else > encoder->get_buf_trans = > adlp_get_dkl_buf_trans; > } else if (IS_ALDERLAKE_S(i915)) { _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH v2 2/2] drm/i915/adl_p: Add ddi buf translation tables for combo PHY 2021-07-23 5:38 ` [Intel-gfx] [PATCH v2 " Matt Roper 2021-07-23 8:00 ` Almahallawy, Khaled @ 2021-07-28 17:57 ` Souza, Jose 1 sibling, 0 replies; 11+ messages in thread From: Souza, Jose @ 2021-07-28 17:57 UTC (permalink / raw) To: Roper, Matthew D, intel-gfx On Thu, 2021-07-22 at 22:38 -0700, Matt Roper wrote: > ADL-P now has its own set of DDI buf translation tables (except for eDP > which appears to be the same as TGL). Add the new values (last updated > in bspec 2021-07-22) to the driver. > > v2: > - Actually hook up the new tables via encoder->get_buf_trans() > > Bspec: 49291 > Signed-off-by: Matt Roper <matthew.d.roper@intel.com> > --- > .../drm/i915/display/intel_ddi_buf_trans.c | 106 +++++++++++++++++- > 1 file changed, 105 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c > index cdd0df467287..7bf80b72733d 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c > @@ -1057,6 +1057,64 @@ static const struct intel_ddi_buf_trans adls_combo_phy_ddi_translations_edp_hbr3 > .num_entries = ARRAY_SIZE(_adls_combo_phy_ddi_translations_edp_hbr3), > }; > > +static const union intel_ddi_buf_trans_entry _adlp_combo_phy_ddi_translations_hdmi[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0x6, 0x60, 0x3F, 0x00, 0x00 } }, /* 400 400 0.0 */ > + { .cnl = { 0x6, 0x68, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > + { .cnl = { 0xA, 0x73, 0x3F, 0x00, 0x00 } }, /* 650 650 0.0 ALS */ > + { .cnl = { 0xA, 0x78, 0x3F, 0x00, 0x00 } }, /* 800 800 0.0 */ > + { .cnl = { 0xB, 0x7F, 0x3F, 0x00, 0x00 } }, /* 1000 1000 0.0 Re-timer */ > + { .cnl = { 0xB, 0x7F, 0x3B, 0x00, 0x04 } }, /* Full Red -1.5 */ > + { .cnl = { 0xB, 0x7F, 0x39, 0x00, 0x06 } }, /* Full Red -1.8 */ > + { .cnl = { 0xB, 0x7F, 0x37, 0x00, 0x08 } }, /* Full Red -2.0 CRLS */ > + { .cnl = { 0xB, 0x7F, 0x35, 0x00, 0x0A } }, /* Full Red -2.5 */ > + { .cnl = { 0xB, 0x7F, 0x33, 0x00, 0x0C } }, /* Full Red -3.0 */ > +}; > + > +static const struct intel_ddi_buf_trans adlp_combo_phy_ddi_translations_hdmi = { > + .entries = _adlp_combo_phy_ddi_translations_hdmi, > + .num_entries = ARRAY_SIZE(_adlp_combo_phy_ddi_translations_hdmi), > + .hdmi_default_entry = ARRAY_SIZE(_adlp_combo_phy_ddi_translations_hdmi) - 1, > +}; > + > +static const union intel_ddi_buf_trans_entry _adlp_combo_phy_ddi_translations_dp_hbr[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ > + { .cnl = { 0xC, 0x71, 0x31, 0x00, 0x0E } }, /* 350 700 6.0 */ > + { .cnl = { 0x6, 0x7F, 0x2C, 0x00, 0x13 } }, /* 350 900 8.2 */ > + { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > + { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ > + { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1 */ > + { .cnl = { 0xC, 0x73, 0x3E, 0x00, 0x01 } }, /* 650 700 0.6 */ > + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ > +}; > + > +static const struct intel_ddi_buf_trans adlp_combo_phy_ddi_translations_dp_hbr = { > + .entries = _adlp_combo_phy_ddi_translations_dp_hbr, > + .num_entries = ARRAY_SIZE(_adlp_combo_phy_ddi_translations_dp_hbr), > +}; > + > +static const union intel_ddi_buf_trans_entry _adlp_combo_phy_ddi_translations_dp_hbr2_hbr3[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ > + { .cnl = { 0xC, 0x71, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ > + { .cnl = { 0x6, 0x7F, 0x2B, 0x00, 0x14 } }, /* 350 900 8.2 */ > + { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > + { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ > + { .cnl = { 0x6, 0x7F, 0x30, 0x00, 0x0F } }, /* 500 900 5.1 */ > + { .cnl = { 0xC, 0x63, 0x3F, 0x00, 0x00 } }, /* 650 700 0.6 */ > + { .cnl = { 0x6, 0x7F, 0x38, 0x00, 0x07 } }, /* 600 900 3.5 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ > +}; > + > +static const struct intel_ddi_buf_trans adlp_combo_phy_ddi_translations_dp_hbr2_hbr3 = { > + .entries = _adlp_combo_phy_ddi_translations_dp_hbr2_hbr3, > + .num_entries = ARRAY_SIZE(_adlp_combo_phy_ddi_translations_dp_hbr2_hbr3), > +}; > + > static const union intel_ddi_buf_trans_entry _adlp_dkl_phy_ddi_translations_dp_hbr[] = { > /* VS pre-emp Non-trans mV Pre-emph dB */ > { .dkl = { 0x7, 0x0, 0x01 } }, /* 0 0 400mV 0 dB */ > @@ -1661,6 +1719,52 @@ adls_get_combo_buf_trans(struct intel_encoder *encoder, > return adls_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); > } > > +static const struct intel_ddi_buf_trans * > +adlp_get_combo_buf_trans_dp(struct intel_encoder *encoder, > + const struct intel_crtc_state *crtc_state, > + int *n_entries) > +{ > + if (crtc_state->port_clock > 270000) > + return intel_get_buf_trans(&adlp_combo_phy_ddi_translations_dp_hbr2_hbr3, n_entries); > + else > + return intel_get_buf_trans(&adlp_combo_phy_ddi_translations_dp_hbr, n_entries); > +} > + > +static const struct intel_ddi_buf_trans * > +adlp_get_combo_buf_trans_edp(struct intel_encoder *encoder, > + const struct intel_crtc_state *crtc_state, > + int *n_entries) > +{ > + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); > + > + if (crtc_state->port_clock > 540000) { > + return intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3, > + n_entries); > + } else if (dev_priv->vbt.edp.hobl && !intel_dp->hobl_failed) { > + return intel_get_buf_trans(&tgl_combo_phy_ddi_translations_edp_hbr2_hobl, > + n_entries); > + } else if (dev_priv->vbt.edp.low_vswing) { > + return intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr2, > + n_entries); > + } The content of the tables matches with adl-p ones but the naming is wrong regarding the HBR version of the reused tables. Maybe would be better add something like below and point to those intel_ddi_buf_trans for HBR3 and "up to HBR2". static const struct intel_ddi_buf_trans adlp_combo_phy_ddi_translations_edp_hbr3 = { .entries = icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3, .num_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3), }; With that: Reviewed-by: José Roberto de Souza <jose.souza@intel.com> > + > + return adlp_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); > +} > + > +static const struct intel_ddi_buf_trans * > +adlp_get_combo_buf_trans(struct intel_encoder *encoder, > + const struct intel_crtc_state *crtc_state, > + int *n_entries) > +{ > + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) > + return intel_get_buf_trans(&adlp_combo_phy_ddi_translations_hdmi, n_entries); > + else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) > + return adlp_get_combo_buf_trans_edp(encoder, crtc_state, n_entries); > + else > + return adlp_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); > +} > + > static const struct intel_ddi_buf_trans * > tgl_get_dkl_buf_trans_dp(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > @@ -1738,7 +1842,7 @@ void intel_ddi_buf_trans_init(struct intel_encoder *encoder) > > if (IS_ALDERLAKE_P(i915)) { > if (intel_phy_is_combo(i915, phy)) > - encoder->get_buf_trans = tgl_get_combo_buf_trans; > + encoder->get_buf_trans = adlp_get_combo_buf_trans; > else > encoder->get_buf_trans = adlp_get_dkl_buf_trans; > } else if (IS_ALDERLAKE_S(i915)) { _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/adl_p: Add ddi buf translation tables for combo PHY 2021-07-23 5:34 ` [Intel-gfx] [PATCH 2/2] drm/i915/adl_p: Add ddi buf translation tables for combo PHY Matt Roper 2021-07-23 5:38 ` [Intel-gfx] [PATCH v2 " Matt Roper @ 2021-07-23 9:51 ` kernel test robot 1 sibling, 0 replies; 11+ messages in thread From: kernel test robot @ 2021-07-23 9:51 UTC (permalink / raw) To: Matt Roper, intel-gfx; +Cc: clang-built-linux, kbuild-all [-- Attachment #1: Type: text/plain, Size: 2676 bytes --] Hi Matt, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on drm-tip/drm-tip next-20210722] [cannot apply to v5.14-rc2] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Matt-Roper/ADL-DDI-translation-buffer-updates/20210723-133603 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: x86_64-randconfig-r036-20210723 (attached as .config) compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 9625ca5b602616b2f5584e8a49ba93c52c141e40) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install x86_64 cross compiling tool for clang build # apt-get install binutils-x86-64-linux-gnu # https://github.com/0day-ci/linux/commit/68ee32b7d0fc372136f130d55cd937fc6b9bbbd9 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Matt-Roper/ADL-DDI-translation-buffer-updates/20210723-133603 git checkout 68ee32b7d0fc372136f130d55cd937fc6b9bbbd9 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>): >> drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1756:1: error: unused function 'adlp_get_combo_buf_trans' [-Werror,-Wunused-function] adlp_get_combo_buf_trans(struct intel_encoder *encoder, ^ 1 error generated. vim +/adlp_get_combo_buf_trans +1756 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c 1754 1755 static const struct intel_ddi_buf_trans * > 1756 adlp_get_combo_buf_trans(struct intel_encoder *encoder, 1757 const struct intel_crtc_state *crtc_state, 1758 int *n_entries) 1759 { 1760 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) 1761 return intel_get_buf_trans(&adlp_combo_phy_ddi_translations_hdmi, n_entries); 1762 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) 1763 return adlp_get_combo_buf_trans_edp(encoder, crtc_state, n_entries); 1764 else 1765 return adlp_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); 1766 } 1767 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org [-- Attachment #2: .config.gz --] [-- Type: application/gzip, Size: 34836 bytes --] [-- Attachment #3: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for ADL DDI translation buffer updates (rev2) 2021-07-23 5:33 [Intel-gfx] [PATCH 0/2] ADL DDI translation buffer updates Matt Roper 2021-07-23 5:34 ` [Intel-gfx] [PATCH 1/2] drm/i915/adl_s: Update ddi buf translation tables Matt Roper 2021-07-23 5:34 ` [Intel-gfx] [PATCH 2/2] drm/i915/adl_p: Add ddi buf translation tables for combo PHY Matt Roper @ 2021-07-23 6:31 ` Patchwork 2021-07-23 7:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-07-23 11:04 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 4 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2021-07-23 6:31 UTC (permalink / raw) To: Matt Roper; +Cc: intel-gfx == Series Details == Series: ADL DDI translation buffer updates (rev2) URL : https://patchwork.freedesktop.org/series/92921/ State : warning == Summary == $ dim checkpatch origin/drm-tip faad50971bdd drm/i915/adl_s: Update ddi buf translation tables 43e59f118335 drm/i915/adl_p: Add ddi buf translation tables for combo PHY -:95: WARNING:LONG_LINE: line length of 101 exceeds 100 columns #95: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1728: + return intel_get_buf_trans(&adlp_combo_phy_ddi_translations_dp_hbr2_hbr3, n_entries); total: 0 errors, 1 warnings, 0 checks, 124 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for ADL DDI translation buffer updates (rev2) 2021-07-23 5:33 [Intel-gfx] [PATCH 0/2] ADL DDI translation buffer updates Matt Roper ` (2 preceding siblings ...) 2021-07-23 6:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for ADL DDI translation buffer updates (rev2) Patchwork @ 2021-07-23 7:01 ` Patchwork 2021-07-23 11:04 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 4 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2021-07-23 7:01 UTC (permalink / raw) To: Matt Roper; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 2238 bytes --] == Series Details == Series: ADL DDI translation buffer updates (rev2) URL : https://patchwork.freedesktop.org/series/92921/ State : success == Summary == CI Bug Log - changes from CI_DRM_10376 -> Patchwork_20688 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/index.html Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_20688: ### IGT changes ### #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@i915_selftest@live@gt_timelines: - {fi-tgl-dsi}: [PASS][1] -> [DMESG-WARN][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/fi-tgl-dsi/igt@i915_selftest@live@gt_timelines.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/fi-tgl-dsi/igt@i915_selftest@live@gt_timelines.html Known issues ------------ Here are the changes found in Patchwork_20688 that come from known issues: ### IGT changes ### {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888 [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867 Participating hosts (38 -> 35) ------------------------------ Missing (3): fi-ilk-m540 fi-bdw-samus fi-hsw-4200u Build changes ------------- * Linux: CI_DRM_10376 -> Patchwork_20688 CI-20190529: 20190529 CI_DRM_10376: 299bd09eafa6bf94ac922867ee0c797f8e569d3b @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6147: f3994c2cd99a1acfe991a8cc838a387dcb36598a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_20688: 43e59f118335f3b00de582e633bb5074319b1c58 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 43e59f118335 drm/i915/adl_p: Add ddi buf translation tables for combo PHY faad50971bdd drm/i915/adl_s: Update ddi buf translation tables == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/index.html [-- Attachment #1.2: Type: text/html, Size: 2715 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for ADL DDI translation buffer updates (rev2) 2021-07-23 5:33 [Intel-gfx] [PATCH 0/2] ADL DDI translation buffer updates Matt Roper ` (3 preceding siblings ...) 2021-07-23 7:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork @ 2021-07-23 11:04 ` Patchwork 4 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2021-07-23 11:04 UTC (permalink / raw) To: Matt Roper; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 30261 bytes --] == Series Details == Series: ADL DDI translation buffer updates (rev2) URL : https://patchwork.freedesktop.org/series/92921/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10376_full -> Patchwork_20688_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_20688_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_20688_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_20688_full: ### IGT changes ### #### Possible regressions #### * igt@i915_pm_dc@dc5-dpms: - shard-kbl: NOTRUN -> [FAIL][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-kbl3/igt@i915_pm_dc@dc5-dpms.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-msflip-blt: - shard-tglb: [PASS][2] -> [INCOMPLETE][3] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-tglb2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-msflip-blt.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-tglb7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-msflip-blt.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-pwrite: - shard-skl: [PASS][4] -> [FAIL][5] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-skl5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-pwrite.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-pwrite.html #### Warnings #### * igt@gem_exec_fair@basic-none-solo@rcs0: - shard-tglb: [FAIL][6] ([i915#2842]) -> [FAIL][7] [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-tglb5/igt@gem_exec_fair@basic-none-solo@rcs0.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-tglb6/igt@gem_exec_fair@basic-none-solo@rcs0.html #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@gem_exec_suspend@basic-s3: - {shard-rkl}: NOTRUN -> [DMESG-WARN][8] [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-2/igt@gem_exec_suspend@basic-s3.html * igt@i915_pm_rpm@debugfs-forcewake-user: - {shard-rkl}: NOTRUN -> [SKIP][9] +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-2/igt@i915_pm_rpm@debugfs-forcewake-user.html * {igt@kms_dsc@basic-dsc-enable}: - shard-iclb: NOTRUN -> [SKIP][10] [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-iclb1/igt@kms_dsc@basic-dsc-enable.html * igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend: - {shard-rkl}: [SKIP][11] ([i915#1845]) -> [DMESG-WARN][12] +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-rkl-2/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-6/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html * igt@kms_vblank@pipe-c-ts-continuation-modeset-rpm: - {shard-rkl}: [SKIP][13] ([i915#1845]) -> [SKIP][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-rkl-5/igt@kms_vblank@pipe-c-ts-continuation-modeset-rpm.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-6/igt@kms_vblank@pipe-c-ts-continuation-modeset-rpm.html Known issues ------------ Here are the changes found in Patchwork_20688_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@debugfs_test@read_all_entries_display_on: - shard-skl: [PASS][15] -> [DMESG-WARN][16] ([i915#1982]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-skl5/igt@debugfs_test@read_all_entries_display_on.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl10/igt@debugfs_test@read_all_entries_display_on.html * igt@gem_ctx_persistence@legacy-engines-mixed: - shard-snb: NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#1099]) +5 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-snb5/igt@gem_ctx_persistence@legacy-engines-mixed.html * igt@gem_eio@unwedge-stress: - shard-skl: NOTRUN -> [TIMEOUT][18] ([i915#2369] / [i915#3063]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl9/igt@gem_eio@unwedge-stress.html * igt@gem_exec_fair@basic-none-rrul@rcs0: - shard-glk: [PASS][19] -> [FAIL][20] ([i915#2842]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-glk5/igt@gem_exec_fair@basic-none-rrul@rcs0.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-glk4/igt@gem_exec_fair@basic-none-rrul@rcs0.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-apl: [PASS][21] -> [SKIP][22] ([fdo#109271]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-apl8/igt@gem_exec_fair@basic-none-share@rcs0.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-apl2/igt@gem_exec_fair@basic-none-share@rcs0.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-tglb: [PASS][23] -> [FAIL][24] ([i915#2842]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-tglb1/igt@gem_exec_fair@basic-pace@rcs0.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-tglb1/igt@gem_exec_fair@basic-pace@rcs0.html * igt@gem_exec_fair@basic-pace@vecs0: - shard-kbl: [PASS][25] -> [FAIL][26] ([i915#2842]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-kbl4/igt@gem_exec_fair@basic-pace@vecs0.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-kbl4/igt@gem_exec_fair@basic-pace@vecs0.html - shard-iclb: [PASS][27] -> [FAIL][28] ([i915#2842]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-iclb3/igt@gem_exec_fair@basic-pace@vecs0.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-iclb5/igt@gem_exec_fair@basic-pace@vecs0.html * igt@gem_mmap_gtt@cpuset-big-copy: - shard-iclb: [PASS][29] -> [FAIL][30] ([i915#2428]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-iclb4/igt@gem_mmap_gtt@cpuset-big-copy.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-iclb5/igt@gem_mmap_gtt@cpuset-big-copy.html * igt@gem_mmap_gtt@cpuset-big-copy-odd: - shard-glk: [PASS][31] -> [FAIL][32] ([i915#1888] / [i915#307]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-glk2/igt@gem_mmap_gtt@cpuset-big-copy-odd.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-glk4/igt@gem_mmap_gtt@cpuset-big-copy-odd.html * igt@gem_pwrite@basic-exhaustion: - shard-snb: NOTRUN -> [WARN][33] ([i915#2658]) [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-snb5/igt@gem_pwrite@basic-exhaustion.html - shard-apl: NOTRUN -> [WARN][34] ([i915#2658]) [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-apl3/igt@gem_pwrite@basic-exhaustion.html * igt@gem_userptr_blits@dmabuf-sync: - shard-apl: NOTRUN -> [SKIP][35] ([fdo#109271] / [i915#3323]) [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-apl1/igt@gem_userptr_blits@dmabuf-sync.html * igt@gem_userptr_blits@input-checking: - shard-apl: NOTRUN -> [DMESG-WARN][36] ([i915#3002]) +1 similar issue [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-apl3/igt@gem_userptr_blits@input-checking.html * igt@gem_userptr_blits@vma-merge: - shard-snb: NOTRUN -> [FAIL][37] ([i915#2724]) [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-snb2/igt@gem_userptr_blits@vma-merge.html * igt@gen7_exec_parse@basic-offset: - shard-apl: NOTRUN -> [SKIP][38] ([fdo#109271]) +225 similar issues [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-apl3/igt@gen7_exec_parse@basic-offset.html * igt@i915_selftest@live@hangcheck: - shard-snb: [PASS][39] -> [INCOMPLETE][40] ([i915#2782]) [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-snb6/igt@i915_selftest@live@hangcheck.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-snb5/igt@i915_selftest@live@hangcheck.html * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip: - shard-apl: NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#3777]) +1 similar issue [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-apl7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs: - shard-snb: NOTRUN -> [SKIP][42] ([fdo#109271]) +362 similar issues [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-snb2/igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs.html * igt@kms_ccs@pipe-d-random-ccs-data-yf_tiled_ccs: - shard-tglb: NOTRUN -> [SKIP][43] ([i915#3689]) [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-tglb6/igt@kms_ccs@pipe-d-random-ccs-data-yf_tiled_ccs.html * igt@kms_chamelium@hdmi-crc-fast: - shard-apl: NOTRUN -> [SKIP][44] ([fdo#109271] / [fdo#111827]) +18 similar issues [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-apl3/igt@kms_chamelium@hdmi-crc-fast.html * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red: - shard-snb: NOTRUN -> [SKIP][45] ([fdo#109271] / [fdo#111827]) +20 similar issues [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-snb5/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html - shard-kbl: NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +12 similar issues [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-kbl2/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html * igt@kms_color_chamelium@pipe-b-ctm-max: - shard-skl: NOTRUN -> [SKIP][47] ([fdo#109271] / [fdo#111827]) +1 similar issue [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl9/igt@kms_color_chamelium@pipe-b-ctm-max.html * igt@kms_content_protection@lic: - shard-apl: NOTRUN -> [TIMEOUT][48] ([i915#1319]) [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-apl7/igt@kms_content_protection@lic.html * igt@kms_content_protection@uevent: - shard-kbl: NOTRUN -> [FAIL][49] ([i915#2105]) [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-kbl4/igt@kms_content_protection@uevent.html * igt@kms_cursor_crc@pipe-b-cursor-32x32-onscreen: - shard-skl: NOTRUN -> [SKIP][50] ([fdo#109271]) +51 similar issues [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl6/igt@kms_cursor_crc@pipe-b-cursor-32x32-onscreen.html * igt@kms_cursor_crc@pipe-d-cursor-256x256-onscreen: - shard-kbl: NOTRUN -> [SKIP][51] ([fdo#109271]) +120 similar issues [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-kbl2/igt@kms_cursor_crc@pipe-d-cursor-256x256-onscreen.html * igt@kms_cursor_legacy@pipe-d-torture-bo: - shard-apl: NOTRUN -> [SKIP][52] ([fdo#109271] / [i915#533]) +4 similar issues [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-apl2/igt@kms_cursor_legacy@pipe-d-torture-bo.html * igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-untiled: - shard-skl: [PASS][53] -> [FAIL][54] ([fdo#108145]) [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-skl5/igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-untiled.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl3/igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-untiled.html * igt@kms_fbcon_fbt@fbc-suspend: - shard-apl: NOTRUN -> [INCOMPLETE][55] ([i915#180] / [i915#1982]) [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-apl2/igt@kms_fbcon_fbt@fbc-suspend.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2: - shard-glk: [PASS][56] -> [FAIL][57] ([i915#79]) [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html * igt@kms_flip@2x-plain-flip-ts-check@ac-hdmi-a1-hdmi-a2: - shard-glk: [PASS][58] -> [FAIL][59] ([i915#2122]) [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-glk1/igt@kms_flip@2x-plain-flip-ts-check@ac-hdmi-a1-hdmi-a2.html [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-glk7/igt@kms_flip@2x-plain-flip-ts-check@ac-hdmi-a1-hdmi-a2.html * igt@kms_flip@flip-vs-suspend@c-dp1: - shard-kbl: [PASS][60] -> [DMESG-WARN][61] ([i915#180]) +4 similar issues [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-kbl2/igt@kms_flip@flip-vs-suspend@c-dp1.html [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-kbl3/igt@kms_flip@flip-vs-suspend@c-dp1.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-blt: - shard-tglb: NOTRUN -> [SKIP][62] ([fdo#111825]) [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-tglb3/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-blt.html * igt@kms_hdr@bpc-switch-suspend: - shard-skl: [PASS][63] -> [FAIL][64] ([i915#1188]) [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-skl1/igt@kms_hdr@bpc-switch-suspend.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl2/igt@kms_hdr@bpc-switch-suspend.html * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence: - shard-skl: NOTRUN -> [SKIP][65] ([fdo#109271] / [i915#533]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl9/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: - shard-apl: NOTRUN -> [DMESG-WARN][66] ([i915#180]) +1 similar issue [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-apl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html * igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb: - shard-apl: NOTRUN -> [FAIL][67] ([i915#265]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-apl3/igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: [PASS][68] -> [FAIL][69] ([fdo#108145] / [i915#265]) +1 similar issue [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl3/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min: - shard-skl: NOTRUN -> [FAIL][70] ([fdo#108145] / [i915#265]) [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html * igt@kms_plane_alpha_blend@pipe-c-alpha-basic: - shard-apl: NOTRUN -> [FAIL][71] ([fdo#108145] / [i915#265]) [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-apl2/igt@kms_plane_alpha_blend@pipe-c-alpha-basic.html * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb: - shard-kbl: NOTRUN -> [FAIL][72] ([fdo#108145] / [i915#265]) +1 similar issue [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-kbl3/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-1: - shard-apl: NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#658]) +4 similar issues [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-apl7/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-1.html * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3: - shard-kbl: NOTRUN -> [SKIP][74] ([fdo#109271] / [i915#658]) +2 similar issues [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-kbl1/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3.html * igt@kms_psr2_sf@plane-move-sf-dmg-area-0: - shard-skl: NOTRUN -> [SKIP][75] ([fdo#109271] / [i915#658]) [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl9/igt@kms_psr2_sf@plane-move-sf-dmg-area-0.html * igt@kms_psr2_su@page_flip: - shard-iclb: [PASS][76] -> [SKIP][77] ([fdo#109642] / [fdo#111068] / [i915#658]) [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-iclb2/igt@kms_psr2_su@page_flip.html [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-iclb6/igt@kms_psr2_su@page_flip.html * igt@kms_psr@psr2_cursor_mmap_cpu: - shard-iclb: [PASS][78] -> [SKIP][79] ([fdo#109441]) +2 similar issues [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-iclb6/igt@kms_psr@psr2_cursor_mmap_cpu.html * igt@kms_vblank@pipe-a-ts-continuation-suspend: - shard-kbl: [PASS][80] -> [DMESG-WARN][81] ([i915#180] / [i915#295]) [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-kbl6/igt@kms_vblank@pipe-a-ts-continuation-suspend.html [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html * igt@kms_vblank@pipe-b-ts-continuation-suspend: - shard-skl: [PASS][82] -> [INCOMPLETE][83] ([i915#198] / [i915#2828]) [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-skl6/igt@kms_vblank@pipe-b-ts-continuation-suspend.html [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl4/igt@kms_vblank@pipe-b-ts-continuation-suspend.html * igt@kms_writeback@writeback-pixel-formats: - shard-apl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#2437]) [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-apl1/igt@kms_writeback@writeback-pixel-formats.html * igt@sysfs_clients@fair-1: - shard-kbl: NOTRUN -> [SKIP][85] ([fdo#109271] / [i915#2994]) [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-kbl2/igt@sysfs_clients@fair-1.html * igt@sysfs_clients@pidname: - shard-apl: NOTRUN -> [SKIP][86] ([fdo#109271] / [i915#2994]) +3 similar issues [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-apl7/igt@sysfs_clients@pidname.html * igt@sysfs_clients@split-50: - shard-skl: NOTRUN -> [SKIP][87] ([fdo#109271] / [i915#2994]) [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl9/igt@sysfs_clients@split-50.html #### Possible fixes #### * igt@drm_import_export@prime: - shard-kbl: [INCOMPLETE][88] ([i915#2944]) -> [PASS][89] [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-kbl3/igt@drm_import_export@prime.html [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-kbl4/igt@drm_import_export@prime.html * igt@gem_ctx_isolation@preservation-s3@bcs0: - shard-kbl: [DMESG-WARN][90] ([i915#180]) -> [PASS][91] +5 similar issues [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-kbl4/igt@gem_ctx_isolation@preservation-s3@bcs0.html [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-kbl6/igt@gem_ctx_isolation@preservation-s3@bcs0.html * igt@gem_ctx_persistence@engines-hostile@rcs0: - {shard-rkl}: [FAIL][92] ([i915#2410]) -> [PASS][93] [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-rkl-2/igt@gem_ctx_persistence@engines-hostile@rcs0.html [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-2/igt@gem_ctx_persistence@engines-hostile@rcs0.html * igt@gem_eio@unwedge-stress: - shard-iclb: [TIMEOUT][94] ([i915#2369] / [i915#2481] / [i915#3070]) -> [PASS][95] [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-iclb8/igt@gem_eio@unwedge-stress.html [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-iclb2/igt@gem_eio@unwedge-stress.html * igt@gem_exec_fair@basic-deadline: - {shard-rkl}: [FAIL][96] ([i915#2846]) -> [PASS][97] [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-rkl-5/igt@gem_exec_fair@basic-deadline.html [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-1/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-tglb: [FAIL][98] ([i915#2842]) -> [PASS][99] +1 similar issue [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-tglb1/igt@gem_exec_fair@basic-flow@rcs0.html [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-tglb5/igt@gem_exec_fair@basic-flow@rcs0.html * igt@gem_exec_fair@basic-pace@bcs0: - shard-iclb: [FAIL][100] ([i915#2842]) -> [PASS][101] [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-iclb3/igt@gem_exec_fair@basic-pace@bcs0.html [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-iclb5/igt@gem_exec_fair@basic-pace@bcs0.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-kbl: [SKIP][102] ([fdo#109271]) -> [PASS][103] [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-kbl4/igt@gem_exec_fair@basic-pace@rcs0.html [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-kbl4/igt@gem_exec_fair@basic-pace@rcs0.html * igt@gem_exec_schedule@u-independent@vcs1: - shard-tglb: [FAIL][104] ([i915#3795]) -> [PASS][105] [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-tglb7/igt@gem_exec_schedule@u-independent@vcs1.html [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-tglb3/igt@gem_exec_schedule@u-independent@vcs1.html * igt@gem_exec_whisper@basic-queues-all: - shard-glk: [DMESG-WARN][106] ([i915#118] / [i915#95]) -> [PASS][107] +1 similar issue [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-glk8/igt@gem_exec_whisper@basic-queues-all.html [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-glk2/igt@gem_exec_whisper@basic-queues-all.html * igt@gen9_exec_parse@allowed-single: - shard-skl: [DMESG-WARN][108] ([i915#1436] / [i915#716]) -> [PASS][109] [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-skl5/igt@gen9_exec_parse@allowed-single.html [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl3/igt@gen9_exec_parse@allowed-single.html * igt@i915_pm_backlight@basic-brightness: - {shard-rkl}: [SKIP][110] ([i915#3012]) -> [PASS][111] [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-rkl-5/igt@i915_pm_backlight@basic-brightness.html [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-6/igt@i915_pm_backlight@basic-brightness.html * igt@i915_selftest@live@execlists: - {shard-rkl}: [DMESG-FAIL][112] -> [PASS][113] [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-rkl-1/igt@i915_selftest@live@execlists.html [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-5/igt@i915_selftest@live@execlists.html * igt@kms_big_fb@x-tiled-8bpp-rotate-0: - {shard-rkl}: [SKIP][114] ([i915#3638]) -> [PASS][115] +1 similar issue [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-rkl-5/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-6/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip: - {shard-rkl}: [SKIP][116] ([i915#3721]) -> [PASS][117] +2 similar issues [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-rkl-5/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-6/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html * igt@kms_big_fb@y-tiled-16bpp-rotate-90: - {shard-rkl}: [SKIP][118] ([fdo#111614]) -> [PASS][119] [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-rkl-2/igt@kms_big_fb@y-tiled-16bpp-rotate-90.html [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-6/igt@kms_big_fb@y-tiled-16bpp-rotate-90.html * igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_rc_ccs_cc: - {shard-rkl}: [FAIL][120] ([i915#3678]) -> [PASS][121] +6 similar issues [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-rkl-5/igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_rc_ccs_cc.html [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-6/igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_rc_ccs_cc.html * igt@kms_color@pipe-a-ctm-0-5: - shard-skl: [DMESG-WARN][122] ([i915#1982]) -> [PASS][123] [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-skl9/igt@kms_color@pipe-a-ctm-0-5.html [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl1/igt@kms_color@pipe-a-ctm-0-5.html * igt@kms_color@pipe-c-ctm-max: - {shard-rkl}: [SKIP][124] ([i915#1149] / [i915#1849]) -> [PASS][125] +3 similar issues [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-rkl-5/igt@kms_color@pipe-c-ctm-max.html [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-6/igt@kms_color@pipe-c-ctm-max.html * igt@kms_concurrent@pipe-a: - {shard-rkl}: [SKIP][126] ([i915#1845]) -> [PASS][127] +23 similar issues [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-rkl-2/igt@kms_concurrent@pipe-a.html [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-6/igt@kms_concurrent@pipe-a.html * igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen: - shard-skl: [FAIL][128] ([i915#3444]) -> [PASS][129] [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-skl8/igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen.html [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl8/igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen.html * igt@kms_cursor_crc@pipe-b-cursor-64x64-random: - {shard-rkl}: [SKIP][130] ([fdo#112022]) -> [PASS][131] +8 similar issues [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-rkl-2/igt@kms_cursor_crc@pipe-b-cursor-64x64-random.html [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-6/igt@kms_cursor_crc@pipe-b-cursor-64x64-random.html * igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions: - {shard-rkl}: [SKIP][132] ([fdo#111825]) -> [PASS][133] +1 similar issue [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-rkl-2/igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions.html [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-6/igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-skl: [FAIL][134] ([i915#2346] / [i915#533]) -> [PASS][135] [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-skl8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_draw_crc@draw-method-xrgb8888-blt-ytiled: - shard-skl: [FAIL][136] ([i915#3451]) -> [PASS][137] [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-skl8/igt@kms_draw_crc@draw-method-xrgb8888-blt-ytiled.html [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-skl8/igt@kms_draw_crc@draw-method-xrgb8888-blt-ytiled.html * igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-ytiled: - {shard-rkl}: [SKIP][138] ([fdo#111314]) -> [PASS][139] +4 similar issues [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-rkl-2/igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-ytiled.html [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-6/igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-ytiled.html * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1: - shard-apl: [DMESG-WARN][140] ([i915#180]) -> [PASS][141] +1 similar issue [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-wc: - {shard-rkl}: [SKIP][142] ([i915#1849]) -> [PASS][143] +25 similar issues [142]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10376/shard-rkl-2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-wc.html [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-wc.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - shard-skl: [FAIL][144] ([i915#53]) -> [PASS][145] == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20688/index.html [-- Attachment #1.2: Type: text/html, Size: 33368 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2021-07-28 17:57 UTC | newest] Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-07-23 5:33 [Intel-gfx] [PATCH 0/2] ADL DDI translation buffer updates Matt Roper 2021-07-23 5:34 ` [Intel-gfx] [PATCH 1/2] drm/i915/adl_s: Update ddi buf translation tables Matt Roper 2021-07-28 17:41 ` Souza, Jose 2021-07-23 5:34 ` [Intel-gfx] [PATCH 2/2] drm/i915/adl_p: Add ddi buf translation tables for combo PHY Matt Roper 2021-07-23 5:38 ` [Intel-gfx] [PATCH v2 " Matt Roper 2021-07-23 8:00 ` Almahallawy, Khaled 2021-07-28 17:57 ` Souza, Jose 2021-07-23 9:51 ` [Intel-gfx] [PATCH " kernel test robot 2021-07-23 6:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for ADL DDI translation buffer updates (rev2) Patchwork 2021-07-23 7:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-07-23 11:04 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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