* [Intel-gfx] [PATCH v2 0/2] Correction to QGV related register addresses
@ 2023-03-22 14:20 Vinod Govindapillai
2023-03-22 14:20 ` [Intel-gfx] [PATCH v2 1/2] drm/i915/reg: fix QGV points register access offsets Vinod Govindapillai
` (4 more replies)
0 siblings, 5 replies; 8+ messages in thread
From: Vinod Govindapillai @ 2023-03-22 14:20 UTC (permalink / raw)
To: intel-gfx; +Cc: ville.syrjala
Wrong offsets are calculated to read QGV points from mem ss. Also
a wrong register address is used to get the dagv block time. Fix
these two issues.
Vinod Govindapillai (2):
drm/i915/reg: fix QGV points register access offsets
drm/i915/reg: use the correct register to access SAGV block time
drivers/gpu/drm/i915/i915_reg.h | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH v2 1/2] drm/i915/reg: fix QGV points register access offsets
2023-03-22 14:20 [Intel-gfx] [PATCH v2 0/2] Correction to QGV related register addresses Vinod Govindapillai
@ 2023-03-22 14:20 ` Vinod Govindapillai
2023-03-22 14:36 ` Ville Syrjälä
2023-03-22 14:20 ` [Intel-gfx] [PATCH v2 2/2] drm/i915/reg: use the correct register to access SAGV block time Vinod Govindapillai
` (3 subsequent siblings)
4 siblings, 1 reply; 8+ messages in thread
From: Vinod Govindapillai @ 2023-03-22 14:20 UTC (permalink / raw)
To: intel-gfx; +Cc: ville.syrjala
Wrong offsets are calculated to read QGV point registers. Fix it
to read from the correct registers.
v2: Avoid magic number and better handling the second bitgroup
Bspec: 64602
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d22ffd7a32dc..74468ed9dc9d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7724,12 +7724,13 @@ enum skl_power_gate {
#define MTL_N_OF_POPULATED_CH_MASK REG_GENMASK(7, 4)
#define MTL_DDR_TYPE_MASK REG_GENMASK(3, 0)
-#define MTL_MEM_SS_INFO_QGV_POINT_LOW(point) _MMIO(0x45710 + (point) * 2)
+#define MTL_MEM_SS_INFO_QGV_POINT_OFFSET 0x45710
+#define MTL_MEM_SS_INFO_QGV_POINT_LOW(point) _MMIO(MTL_MEM_SS_INFO_QGV_POINT_OFFSET + (point) * 2 * 0x4)
#define MTL_TRCD_MASK REG_GENMASK(31, 24)
#define MTL_TRP_MASK REG_GENMASK(23, 16)
#define MTL_DCLK_MASK REG_GENMASK(15, 0)
-#define MTL_MEM_SS_INFO_QGV_POINT_HIGH(point) _MMIO(0x45714 + (point) * 2)
+#define MTL_MEM_SS_INFO_QGV_POINT_HIGH(point) _MMIO(MTL_MEM_SS_INFO_QGV_POINT_OFFSET + 4 + (point) * 2 * 0x4)
#define MTL_TRAS_MASK REG_GENMASK(16, 8)
#define MTL_TRDPRE_MASK REG_GENMASK(7, 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH v2 2/2] drm/i915/reg: use the correct register to access SAGV block time
2023-03-22 14:20 [Intel-gfx] [PATCH v2 0/2] Correction to QGV related register addresses Vinod Govindapillai
2023-03-22 14:20 ` [Intel-gfx] [PATCH v2 1/2] drm/i915/reg: fix QGV points register access offsets Vinod Govindapillai
@ 2023-03-22 14:20 ` Vinod Govindapillai
2023-03-22 15:23 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Correction to QGV related register addresses (rev2) Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 8+ messages in thread
From: Vinod Govindapillai @ 2023-03-22 14:20 UTC (permalink / raw)
To: intel-gfx; +Cc: ville.syrjala
Wrong register address is used to read the SAG block time. Fix
the register address according to the bspec.
Bspec: 64608
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 74468ed9dc9d..2f73421c32c6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7716,7 +7716,7 @@ enum skl_power_gate {
#define MTL_LATENCY_LEVEL_EVEN_MASK REG_GENMASK(12, 0)
#define MTL_LATENCY_LEVEL_ODD_MASK REG_GENMASK(28, 16)
-#define MTL_LATENCY_SAGV _MMIO(0x4578b)
+#define MTL_LATENCY_SAGV _MMIO(0x4578c)
#define MTL_LATENCY_QCLK_SAGV REG_GENMASK(12, 0)
#define MTL_MEM_SS_INFO_GLOBAL _MMIO(0x45700)
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/reg: fix QGV points register access offsets
2023-03-22 14:20 ` [Intel-gfx] [PATCH v2 1/2] drm/i915/reg: fix QGV points register access offsets Vinod Govindapillai
@ 2023-03-22 14:36 ` Ville Syrjälä
2023-03-23 11:48 ` Govindapillai, Vinod
0 siblings, 1 reply; 8+ messages in thread
From: Ville Syrjälä @ 2023-03-22 14:36 UTC (permalink / raw)
To: Vinod Govindapillai; +Cc: intel-gfx, ville.syrjala
On Wed, Mar 22, 2023 at 04:20:50PM +0200, Vinod Govindapillai wrote:
> Wrong offsets are calculated to read QGV point registers. Fix it
> to read from the correct registers.
>
> v2: Avoid magic number and better handling the second bitgroup
>
> Bspec: 64602
>
> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index d22ffd7a32dc..74468ed9dc9d 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7724,12 +7724,13 @@ enum skl_power_gate {
> #define MTL_N_OF_POPULATED_CH_MASK REG_GENMASK(7, 4)
> #define MTL_DDR_TYPE_MASK REG_GENMASK(3, 0)
>
> -#define MTL_MEM_SS_INFO_QGV_POINT_LOW(point) _MMIO(0x45710 + (point) * 2)
> +#define MTL_MEM_SS_INFO_QGV_POINT_OFFSET 0x45710
> +#define MTL_MEM_SS_INFO_QGV_POINT_LOW(point) _MMIO(MTL_MEM_SS_INFO_QGV_POINT_OFFSET + (point) * 2 * 0x4)
> #define MTL_TRCD_MASK REG_GENMASK(31, 24)
> #define MTL_TRP_MASK REG_GENMASK(23, 16)
> #define MTL_DCLK_MASK REG_GENMASK(15, 0)
>
> -#define MTL_MEM_SS_INFO_QGV_POINT_HIGH(point) _MMIO(0x45714 + (point) * 2)
> +#define MTL_MEM_SS_INFO_QGV_POINT_HIGH(point) _MMIO(MTL_MEM_SS_INFO_QGV_POINT_OFFSET + 4 + (point) * 2 * 0x4)
The normal style is to just do '(point) * 8' and '(point) * 8 + 4'
> #define MTL_TRAS_MASK REG_GENMASK(16, 8)
> #define MTL_TRDPRE_MASK REG_GENMASK(7, 0)
>
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Correction to QGV related register addresses (rev2)
2023-03-22 14:20 [Intel-gfx] [PATCH v2 0/2] Correction to QGV related register addresses Vinod Govindapillai
2023-03-22 14:20 ` [Intel-gfx] [PATCH v2 1/2] drm/i915/reg: fix QGV points register access offsets Vinod Govindapillai
2023-03-22 14:20 ` [Intel-gfx] [PATCH v2 2/2] drm/i915/reg: use the correct register to access SAGV block time Vinod Govindapillai
@ 2023-03-22 15:23 ` Patchwork
2023-03-22 15:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-22 20:18 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2023-03-22 15:23 UTC (permalink / raw)
To: Vinod Govindapillai; +Cc: intel-gfx
== Series Details ==
Series: Correction to QGV related register addresses (rev2)
URL : https://patchwork.freedesktop.org/series/115473/
State : warning
== Summary ==
Error: dim checkpatch failed
fb0563a71e40 drm/i915/reg: fix QGV points register access offsets
-:26: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#26: FILE: drivers/gpu/drm/i915/i915_reg.h:7728:
+#define MTL_MEM_SS_INFO_QGV_POINT_LOW(point) _MMIO(MTL_MEM_SS_INFO_QGV_POINT_OFFSET + (point) * 2 * 0x4)
-:32: WARNING:LONG_LINE: line length of 111 exceeds 100 columns
#32: FILE: drivers/gpu/drm/i915/i915_reg.h:7733:
+#define MTL_MEM_SS_INFO_QGV_POINT_HIGH(point) _MMIO(MTL_MEM_SS_INFO_QGV_POINT_OFFSET + 4 + (point) * 2 * 0x4)
total: 0 errors, 2 warnings, 0 checks, 15 lines checked
a0bdaca0de64 drm/i915/reg: use the correct register to access SAGV block time
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Correction to QGV related register addresses (rev2)
2023-03-22 14:20 [Intel-gfx] [PATCH v2 0/2] Correction to QGV related register addresses Vinod Govindapillai
` (2 preceding siblings ...)
2023-03-22 15:23 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Correction to QGV related register addresses (rev2) Patchwork
@ 2023-03-22 15:37 ` Patchwork
2023-03-22 20:18 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2023-03-22 15:37 UTC (permalink / raw)
To: Vinod Govindapillai; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 2773 bytes --]
== Series Details ==
Series: Correction to QGV related register addresses (rev2)
URL : https://patchwork.freedesktop.org/series/115473/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12897 -> Patchwork_115473v2
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/index.html
Participating hosts (36 -> 34)
------------------------------
Missing (2): fi-kbl-guc fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_115473v2 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@mman:
- bat-rpls-1: [PASS][1] -> [TIMEOUT][2] ([i915#6794])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/bat-rpls-1/igt@i915_selftest@live@mman.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/bat-rpls-1/igt@i915_selftest@live@mman.html
* igt@i915_selftest@live@slpc:
- bat-rpls-2: NOTRUN -> [DMESG-FAIL][3] ([i915#6997] / [i915#7913])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/bat-rpls-2/igt@i915_selftest@live@slpc.html
#### Possible fixes ####
* igt@i915_pm_rps@basic-api:
- bat-dg2-11: [FAIL][4] -> [PASS][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/bat-dg2-11/igt@i915_pm_rps@basic-api.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/bat-dg2-11/igt@i915_pm_rps@basic-api.html
* igt@i915_selftest@live@mman:
- bat-rpls-2: [TIMEOUT][6] ([i915#6794]) -> [PASS][7]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/bat-rpls-2/igt@i915_selftest@live@mman.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/bat-rpls-2/igt@i915_selftest@live@mman.html
[i915#6794]: https://gitlab.freedesktop.org/drm/intel/issues/6794
[i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
Build changes
-------------
* Linux: CI_DRM_12897 -> Patchwork_115473v2
CI-20190529: 20190529
CI_DRM_12897: 48de8fde637e7fb42e44046fbb3f33199d36ea6b @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7211: c0cc1de7b2f4041ca68960362aa55f881d416bac @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_115473v2: 48de8fde637e7fb42e44046fbb3f33199d36ea6b @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
e004edea9813 drm/i915/reg: use the correct register to access SAGV block time
9c16d862ecd8 drm/i915/reg: fix QGV points register access offsets
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/index.html
[-- Attachment #2: Type: text/html, Size: 3543 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for Correction to QGV related register addresses (rev2)
2023-03-22 14:20 [Intel-gfx] [PATCH v2 0/2] Correction to QGV related register addresses Vinod Govindapillai
` (3 preceding siblings ...)
2023-03-22 15:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2023-03-22 20:18 ` Patchwork
4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2023-03-22 20:18 UTC (permalink / raw)
To: Vinod Govindapillai; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 22127 bytes --]
== Series Details ==
Series: Correction to QGV related register addresses (rev2)
URL : https://patchwork.freedesktop.org/series/115473/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12897_full -> Patchwork_115473v2_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (7 -> 7)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_115473v2_full:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_cursor_legacy@forked-bo@pipe-b:
- {shard-rkl}: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-rkl-3/igt@kms_cursor_legacy@forked-bo@pipe-b.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-rkl-6/igt@kms_cursor_legacy@forked-bo@pipe-b.html
* igt@kms_cursor_legacy@single-bo@pipe-b:
- {shard-tglu}: [PASS][3] -> [INCOMPLETE][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-tglu-8/igt@kms_cursor_legacy@single-bo@pipe-b.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-tglu-1/igt@kms_cursor_legacy@single-bo@pipe-b.html
* {igt@xe_noexec_ping_pong}:
- {shard-dg1}: NOTRUN -> [SKIP][5]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-dg1-14/igt@xe_noexec_ping_pong.html
Known issues
------------
Here are the changes found in Patchwork_115473v2_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-apl: [PASS][6] -> [FAIL][7] ([i915#2842])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-apl6/igt@gem_exec_fair@basic-pace-share@rcs0.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-apl7/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_lmem_swapping@verify-random-ccs:
- shard-glk: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4613])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-glk6/igt@gem_lmem_swapping@verify-random-ccs.html
* igt@gen9_exec_parse@allowed-all:
- shard-apl: [PASS][9] -> [ABORT][10] ([i915#5566]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-apl1/igt@gen9_exec_parse@allowed-all.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-apl1/igt@gen9_exec_parse@allowed-all.html
* igt@i915_pm_rpm@gem-execbuf-stress-pc8:
- shard-glk: NOTRUN -> [SKIP][11] ([fdo#109271]) +17 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-glk6/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html
* igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_rc_ccs_cc:
- shard-glk: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#3886]) +1 similar issue
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-glk6/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_cursor_crc@cursor-suspend@pipe-a-dp-1:
- shard-apl: [PASS][13] -> [ABORT][14] ([i915#180])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-apl1/igt@kms_cursor_crc@cursor-suspend@pipe-a-dp-1.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-apl2/igt@kms_cursor_crc@cursor-suspend@pipe-a-dp-1.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-glk: [PASS][15] -> [FAIL][16] ([i915#2346])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-glk7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-glk8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
- shard-apl: [PASS][17] -> [FAIL][18] ([i915#2346])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-apl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
#### Possible fixes ####
* igt@fbdev@eof:
- {shard-tglu}: [SKIP][19] ([i915#2582]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-tglu-10/igt@fbdev@eof.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-tglu-7/igt@fbdev@eof.html
* igt@gem_eio@in-flight-suspend:
- {shard-rkl}: [FAIL][21] ([fdo#103375]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-rkl-4/igt@gem_eio@in-flight-suspend.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-rkl-2/igt@gem_eio@in-flight-suspend.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [FAIL][23] ([i915#2842]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-apl3/igt@gem_exec_fair@basic-none-solo@rcs0.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-apl2/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- {shard-rkl}: [FAIL][25] ([i915#2842]) -> [PASS][26] +2 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-rkl-1/igt@gem_exec_fair@basic-pace@rcs0.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-rkl-5/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-glk: [FAIL][27] ([i915#2842]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-glk9/igt@gem_exec_fair@basic-pace@vecs0.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-glk8/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_exec_reloc@basic-gtt:
- {shard-rkl}: [SKIP][29] ([i915#3281]) -> [PASS][30] +10 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-rkl-1/igt@gem_exec_reloc@basic-gtt.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-rkl-5/igt@gem_exec_reloc@basic-gtt.html
* igt@gem_readwrite@beyond-eob:
- {shard-rkl}: [SKIP][31] ([i915#3282]) -> [PASS][32] +1 similar issue
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-rkl-1/igt@gem_readwrite@beyond-eob.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-rkl-5/igt@gem_readwrite@beyond-eob.html
* igt@gen9_exec_parse@unaligned-access:
- {shard-rkl}: [SKIP][33] ([i915#2527]) -> [PASS][34] +2 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-rkl-2/igt@gen9_exec_parse@unaligned-access.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-rkl-5/igt@gen9_exec_parse@unaligned-access.html
* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- {shard-dg1}: [FAIL][35] ([i915#3591]) -> [PASS][36] +1 similar issue
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-dg1-18/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-dg1-16/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
* igt@i915_pm_rpm@cursor:
- {shard-rkl}: [SKIP][37] ([i915#1849]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-rkl-3/igt@i915_pm_rpm@cursor.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-rkl-6/igt@i915_pm_rpm@cursor.html
* igt@i915_pm_rpm@dpms-mode-unset-lpsp:
- {shard-tglu}: [SKIP][39] ([i915#1397]) -> [PASS][40] +1 similar issue
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-tglu-10/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-tglu-3/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
* igt@i915_pm_rpm@modeset-lpsp:
- {shard-rkl}: [SKIP][41] ([i915#1397]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-rkl-3/igt@i915_pm_rpm@modeset-lpsp.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-rkl-6/igt@i915_pm_rpm@modeset-lpsp.html
* igt@i915_pm_rpm@system-suspend-modeset:
- {shard-rkl}: [SKIP][43] ([fdo#109308]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-rkl-5/igt@i915_pm_rpm@system-suspend-modeset.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-rkl-6/igt@i915_pm_rpm@system-suspend-modeset.html
* igt@i915_selftest@live@gt_heartbeat:
- shard-apl: [DMESG-FAIL][45] ([i915#5334]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-apl1/igt@i915_selftest@live@gt_heartbeat.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-apl1/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_atomic@plane-overlay-legacy:
- {shard-rkl}: [SKIP][47] ([i915#1845] / [i915#4098]) -> [PASS][48] +18 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-rkl-5/igt@kms_atomic@plane-overlay-legacy.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-rkl-6/igt@kms_atomic@plane-overlay-legacy.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- {shard-tglu}: [SKIP][49] ([i915#1845] / [i915#7651]) -> [PASS][50] +9 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-tglu-9/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-tglu-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs:
- {shard-tglu}: [SKIP][51] ([i915#1845]) -> [PASS][52] +39 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-tglu-10/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-tglu-3/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-apl: [FAIL][53] ([i915#2346]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@single-move@pipe-b:
- {shard-rkl}: [INCOMPLETE][55] -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-rkl-6/igt@kms_cursor_legacy@single-move@pipe-b.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-rkl-4/igt@kms_cursor_legacy@single-move@pipe-b.html
* igt@kms_frontbuffer_tracking@fbc-1p-rte:
- {shard-tglu}: [SKIP][57] ([i915#1849]) -> [PASS][58] +12 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-tglu-10/igt@kms_frontbuffer_tracking@fbc-1p-rte.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-tglu-3/igt@kms_frontbuffer_tracking@fbc-1p-rte.html
* igt@kms_frontbuffer_tracking@psr-modesetfrombusy:
- {shard-rkl}: [SKIP][59] ([i915#1849] / [i915#4098]) -> [PASS][60] +10 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-modesetfrombusy.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-modesetfrombusy.html
* igt@kms_psr@primary_render:
- {shard-rkl}: [SKIP][61] ([i915#1072]) -> [PASS][62] +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-rkl-3/igt@kms_psr@primary_render.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-rkl-6/igt@kms_psr@primary_render.html
* igt@perf@stress-open-close:
- shard-glk: [ABORT][63] ([i915#5213]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-glk4/igt@perf@stress-open-close.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-glk6/igt@perf@stress-open-close.html
* igt@testdisplay:
- {shard-rkl}: [SKIP][65] ([i915#4098]) -> [PASS][66] +1 similar issue
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12897/shard-rkl-5/igt@testdisplay.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/shard-rkl-6/igt@testdisplay.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1850]: https://gitlab.freedesktop.org/drm/intel/issues/1850
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3547]: https://gitlab.freedesktop.org/drm/intel/issues/3547
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3639]: https://gitlab.freedesktop.org/drm/intel/issues/3639
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936
[i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5213]: https://gitlab.freedesktop.org/drm/intel/issues/5213
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6258]: https://gitlab.freedesktop.org/drm/intel/issues/6258
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7037]: https://gitlab.freedesktop.org/drm/intel/issues/7037
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7128]: https://gitlab.freedesktop.org/drm/intel/issues/7128
[i915#7294]: https://gitlab.freedesktop.org/drm/intel/issues/7294
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
[i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7949]: https://gitlab.freedesktop.org/drm/intel/issues/7949
[i915#7957]: https://gitlab.freedesktop.org/drm/intel/issues/7957
[i915#7959]: https://gitlab.freedesktop.org/drm/intel/issues/7959
[i915#7981]: https://gitlab.freedesktop.org/drm/intel/issues/7981
[i915#8152]: https://gitlab.freedesktop.org/drm/intel/issues/8152
[i915#8154]: https://gitlab.freedesktop.org/drm/intel/issues/8154
[i915#8155]: https://gitlab.freedesktop.org/drm/intel/issues/8155
[i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
[i915#8282]: https://gitlab.freedesktop.org/drm/intel/issues/8282
Build changes
-------------
* Linux: CI_DRM_12897 -> Patchwork_115473v2
CI-20190529: 20190529
CI_DRM_12897: 48de8fde637e7fb42e44046fbb3f33199d36ea6b @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7211: c0cc1de7b2f4041ca68960362aa55f881d416bac @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_115473v2: 48de8fde637e7fb42e44046fbb3f33199d36ea6b @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115473v2/index.html
[-- Attachment #2: Type: text/html, Size: 17695 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/reg: fix QGV points register access offsets
2023-03-22 14:36 ` Ville Syrjälä
@ 2023-03-23 11:48 ` Govindapillai, Vinod
0 siblings, 0 replies; 8+ messages in thread
From: Govindapillai, Vinod @ 2023-03-23 11:48 UTC (permalink / raw)
To: ville.syrjala; +Cc: intel-gfx
On Wed, 2023-03-22 at 16:36 +0200, Ville Syrjälä wrote:
> On Wed, Mar 22, 2023 at 04:20:50PM +0200, Vinod Govindapillai wrote:
> > Wrong offsets are calculated to read QGV point registers. Fix it
> > to read from the correct registers.
> >
> > v2: Avoid magic number and better handling the second bitgroup
> >
> > Bspec: 64602
> >
> > Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> > Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 5 +++--
> > 1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index d22ffd7a32dc..74468ed9dc9d 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -7724,12 +7724,13 @@ enum skl_power_gate {
> > #define MTL_N_OF_POPULATED_CH_MASK REG_GENMASK(7, 4)
> > #define MTL_DDR_TYPE_MASK REG_GENMASK(3, 0)
> >
> > -#define MTL_MEM_SS_INFO_QGV_POINT_LOW(point) _MMIO(0x45710 + (point) * 2)
> > +#define MTL_MEM_SS_INFO_QGV_POINT_OFFSET 0x45710
> > +#define MTL_MEM_SS_INFO_QGV_POINT_LOW(point) _MMIO(MTL_MEM_SS_INFO_QGV_POINT_OFFSET + (point)
> > * 2 * 0x4)
> > #define MTL_TRCD_MASK REG_GENMASK(31, 24)
> > #define MTL_TRP_MASK REG_GENMASK(23, 16)
> > #define MTL_DCLK_MASK REG_GENMASK(15, 0)
> >
> > -#define MTL_MEM_SS_INFO_QGV_POINT_HIGH(point) _MMIO(0x45714 + (point) * 2)
> > +#define MTL_MEM_SS_INFO_QGV_POINT_HIGH(point) _MMIO(MTL_MEM_SS_INFO_QGV_POINT_OFFSET + 4 +
> > (point) * 2 * 0x4)
>
> The normal style is to just do '(point) * 8' and '(point) * 8 + 4'
Thanks Ville. Update and v3 sent
BR
vinod
>
> > #define MTL_TRAS_MASK REG_GENMASK(16, 8)
> > #define MTL_TRDPRE_MASK REG_GENMASK(7, 0)
> >
> > --
> > 2.34.1
>
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2023-03-23 11:48 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-03-22 14:20 [Intel-gfx] [PATCH v2 0/2] Correction to QGV related register addresses Vinod Govindapillai
2023-03-22 14:20 ` [Intel-gfx] [PATCH v2 1/2] drm/i915/reg: fix QGV points register access offsets Vinod Govindapillai
2023-03-22 14:36 ` Ville Syrjälä
2023-03-23 11:48 ` Govindapillai, Vinod
2023-03-22 14:20 ` [Intel-gfx] [PATCH v2 2/2] drm/i915/reg: use the correct register to access SAGV block time Vinod Govindapillai
2023-03-22 15:23 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Correction to QGV related register addresses (rev2) Patchwork
2023-03-22 15:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-22 20:18 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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