* [PATCH 1/3] intel_reg_dumper: Fix pipe name in comment
@ 2012-08-23 13:04 Damien Lespiau
2012-08-23 13:04 ` [PATCH 2/3] intel_reg_dumper: Dump FDI_RX_DEBUG registers Damien Lespiau
2012-08-23 13:04 ` [PATCH 3/3] intel_reg_dumper: Dump FDI_RX_DEBUG2 registers Damien Lespiau
0 siblings, 2 replies; 7+ messages in thread
From: Damien Lespiau @ 2012-08-23 13:04 UTC (permalink / raw)
To: intel-gfx
From: Damien Lespiau <damien.lespiau@intel.com>
What seems to be a copy/paste typo.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
tools/intel_reg_dumper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c
index a994f00..f6392e2 100644
--- a/tools/intel_reg_dumper.c
+++ b/tools/intel_reg_dumper.c
@@ -1588,7 +1588,7 @@ static struct reg_debug ironlake_debug_regs[] = {
DEFINEREG(FDI_PLL_FREQ_CTL),
- /* pipe B */
+ /* pipe A */
DEFINEREG2(PIPEACONF, i830_debug_pipeconf),
--
1.7.11.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/3] intel_reg_dumper: Dump FDI_RX_DEBUG registers
2012-08-23 13:04 [PATCH 1/3] intel_reg_dumper: Fix pipe name in comment Damien Lespiau
@ 2012-08-23 13:04 ` Damien Lespiau
2012-08-23 23:14 ` Ben Widawsky
2012-08-23 13:04 ` [PATCH 3/3] intel_reg_dumper: Dump FDI_RX_DEBUG2 registers Damien Lespiau
1 sibling, 1 reply; 7+ messages in thread
From: Damien Lespiau @ 2012-08-23 13:04 UTC (permalink / raw)
To: intel-gfx
From: Damien Lespiau <damien.lespiau@intel.com>
This reports which lanes are locked.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
lib/intel_reg.h | 8 ++++++++
tools/intel_reg_dumper.c | 21 +++++++++++++++++++++
2 files changed, 29 insertions(+)
diff --git a/lib/intel_reg.h b/lib/intel_reg.h
index ffded64..0796cb5 100644
--- a/lib/intel_reg.h
+++ b/lib/intel_reg.h
@@ -3381,6 +3381,14 @@ typedef enum {
#define FDI_RXC_TUSIZE1 0xf2030
#define FDI_RXC_TUSIZE2 0xf2038
+#define FDI_RXA_DEBUG 0xf0020
+#define FDI_RXB_DEBUG 0xf1020
+#define FDI_RXC_DEBUG 0xf2020
+#define FDI_RX_DEBUG_L3_BIT_LOCKED (1<<29)
+#define FDI_RX_DEBUG_L2_BIT_LOCKED (1<<28)
+#define FDI_RX_DEBUG_L1_BIT_LOCKED (1<<27)
+#define FDI_RX_DEBUG_L0_BIT_LOCKED (1<<26)
+
/* FDI_RX interrupt register format */
#define FDI_RX_INTER_LANE_ALIGN (1<<10)
#define FDI_RX_SYMBOL_LOCK (1<<9) /* train 2 */
diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c
index f6392e2..7f6eaaa 100644
--- a/tools/intel_reg_dumper.c
+++ b/tools/intel_reg_dumper.c
@@ -1310,6 +1310,23 @@ DEBUGSTRING(ironlake_debug_fdi_rx_misc)
snprintf(result, len, "FDI Delay %d", val & ((1 << 13) - 1));
}
+DEBUGSTRING(ironlake_debug_fdi_rx_debug)
+{
+ int l0_locked = val & FDI_RX_DEBUG_L0_BIT_LOCKED;
+ int l1_locked = val & FDI_RX_DEBUG_L1_BIT_LOCKED;
+ int l2_locked = val & FDI_RX_DEBUG_L2_BIT_LOCKED;
+ int l3_locked = val & FDI_RX_DEBUG_L3_BIT_LOCKED;
+ const char *none = "";
+
+ if (l0_locked + l1_locked + l2_locked + l3_locked == 0)
+ none = "none";
+
+ snprintf(result, len, "bit locked lanes: %s%s%s%s%s",
+ l0_locked ? "0 " : "", l1_locked ? "1 " : "",
+ l2_locked ? "2 " : "", l3_locked ? "3 " : "",
+ none);
+}
+
DEBUGSTRING(ironlake_debug_transconf)
{
const char *enable = val & TRANS_ENABLE ? "enable" : "disable";
@@ -1793,6 +1810,10 @@ static struct reg_debug ironlake_debug_regs[] = {
DEFINEREG(FDI_RXB_IIR),
DEFINEREG(FDI_RXB_IMR),
+ DEFINEREG2(FDI_RXA_DEBUG, ironlake_debug_fdi_rx_debug),
+ DEFINEREG2(FDI_RXB_DEBUG, ironlake_debug_fdi_rx_debug),
+ DEFINEREG2(FDI_RXC_DEBUG, ironlake_debug_fdi_rx_debug),
+
DEFINEREG2(PCH_ADPA, i830_debug_adpa),
DEFINEREG2(HDMIB, ironlake_debug_hdmi),
DEFINEREG2(HDMIC, ironlake_debug_hdmi),
--
1.7.11.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/3] intel_reg_dumper: Dump FDI_RX_DEBUG2 registers
2012-08-23 13:04 [PATCH 1/3] intel_reg_dumper: Fix pipe name in comment Damien Lespiau
2012-08-23 13:04 ` [PATCH 2/3] intel_reg_dumper: Dump FDI_RX_DEBUG registers Damien Lespiau
@ 2012-08-23 13:04 ` Damien Lespiau
2012-08-23 23:26 ` Ben Widawsky
1 sibling, 1 reply; 7+ messages in thread
From: Damien Lespiau @ 2012-08-23 13:04 UTC (permalink / raw)
To: intel-gfx
From: Damien Lespiau <damien.lespiau@intel.com>
This register gives information about which lanes are symbol locked
along with a bunch of possible training failures.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
lib/intel_reg.h | 36 +++++++++++++++++++++
tools/intel_reg_dumper.c | 84 ++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 120 insertions(+)
diff --git a/lib/intel_reg.h b/lib/intel_reg.h
index 0796cb5..fa9e866 100644
--- a/lib/intel_reg.h
+++ b/lib/intel_reg.h
@@ -3389,6 +3389,42 @@ typedef enum {
#define FDI_RX_DEBUG_L1_BIT_LOCKED (1<<27)
#define FDI_RX_DEBUG_L0_BIT_LOCKED (1<<26)
+#define FDI_RXA_DEBUG2 0xf0024
+#define FDI_RXB_DEBUG2 0xf1024
+#define FDI_RXC_DEBUG2 0xf2024
+#define FDI_RX_L3_SYMBOL_LOCKED (1<<31)
+#define FDI_RX_L2_SYMBOL_LOCKED (1<<30)
+#define FDI_RX_L1_SYMBOL_LOCKED (1<<29)
+#define FDI_RX_L0_SYMBOL_LOCKED (1<<28)
+#define FDI_RX_L3_TP2_FAIL (1<<27)
+#define FDI_RX_L2_TP2_FAIL (1<<26)
+#define FDI_RX_L1_TP2_FAIL (1<<25)
+#define FDI_RX_L0_TP2_FAIL (1<<24)
+#define FDI_RX_L3_FS_ERROR (1<<23)
+#define FDI_RX_L2_FS_ERROR (1<<22)
+#define FDI_RX_L1_FS_ERROR (1<<21)
+#define FDI_RX_L0_FS_ERROR (1<<20)
+#define FDI_RX_L3_FE_ERROR (1<<19)
+#define FDI_RX_L2_FE_ERROR (1<<18)
+#define FDI_RX_L1_FE_ERROR (1<<17)
+#define FDI_RX_L0_FE_ERROR (1<<16)
+#define FDI_RX_L3_BER_HIGH (1<<15)
+#define FDI_RX_L2_BER_HIGH (1<<14)
+#define FDI_RX_L1_BER_HIGH (1<<13)
+#define FDI_RX_L0_BER_HIGH (1<<12)
+#define FDI_RX_L3_BIT_LOCK_TIMEOUT (1<<11)
+#define FDI_RX_L2_BIT_LOCK_TIMEOUT (1<<10)
+#define FDI_RX_L1_BIT_LOCK_TIMEOUT (1<<9)
+#define FDI_RX_L0_BIT_LOCK_TIMEOUT (1<<8)
+#define FDI_RX_L3_NOT_ALIGNED (1<<7)
+#define FDI_RX_L2_NOT_ALIGNED (1<<6)
+#define FDI_RX_L1_NOT_ALIGNED (1<<5)
+#define FDI_RX_L0_NOT_ALIGNED (1<<4)
+#define FDI_RX_L3_XCLOCK_OVERFLOW (1<<3)
+#define FDI_RX_L2_XCLOCK_OVERFLOW (1<<2)
+#define FDI_RX_L1_XCLOCK_OVERFLOW (1<<1)
+#define FDI_RX_L0_XCLOCK_OVERFLOW (1<<0)
+
/* FDI_RX interrupt register format */
#define FDI_RX_INTER_LANE_ALIGN (1<<10)
#define FDI_RX_SYMBOL_LOCK (1<<9) /* train 2 */
diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c
index 7f6eaaa..b27ae0d 100644
--- a/tools/intel_reg_dumper.c
+++ b/tools/intel_reg_dumper.c
@@ -1327,6 +1327,87 @@ DEBUGSTRING(ironlake_debug_fdi_rx_debug)
none);
}
+DEBUGSTRING(ironlake_debug_fdi_rx_debug2)
+{
+ int l0_locked = val & FDI_RX_L0_SYMBOL_LOCKED;
+ int l1_locked = val & FDI_RX_L1_SYMBOL_LOCKED;
+ int l2_locked = val & FDI_RX_L2_SYMBOL_LOCKED;
+ int l3_locked = val & FDI_RX_L3_SYMBOL_LOCKED;
+ const char *none = "";
+ int l0_fs_error = val & FDI_RX_L0_FS_ERROR;
+ int l1_fs_error = val & FDI_RX_L1_FS_ERROR;
+ int l2_fs_error = val & FDI_RX_L2_FS_ERROR;
+ int l3_fs_error = val & FDI_RX_L3_FS_ERROR;
+ int fs_error;
+ int l0_fe_error = val & FDI_RX_L0_FE_ERROR;
+ int l1_fe_error = val & FDI_RX_L1_FE_ERROR;
+ int l2_fe_error = val & FDI_RX_L2_FE_ERROR;
+ int l3_fe_error = val & FDI_RX_L3_FE_ERROR;
+ int fe_error;
+ int l0_ber_high = val & FDI_RX_L0_BER_HIGH;
+ int l1_ber_high = val & FDI_RX_L1_BER_HIGH;
+ int l2_ber_high = val & FDI_RX_L2_BER_HIGH;
+ int l3_ber_high = val & FDI_RX_L3_BER_HIGH;
+ int ber_high;
+ int l0_bit_lock_to = val & FDI_RX_L0_BIT_LOCK_TIMEOUT;
+ int l1_bit_lock_to = val & FDI_RX_L1_BIT_LOCK_TIMEOUT;
+ int l2_bit_lock_to = val & FDI_RX_L2_BIT_LOCK_TIMEOUT;
+ int l3_bit_lock_to = val & FDI_RX_L3_BIT_LOCK_TIMEOUT;
+ int bit_lock_to;
+ int l0_not_aligned = val & FDI_RX_L0_NOT_ALIGNED;
+ int l1_not_aligned = val & FDI_RX_L1_NOT_ALIGNED;
+ int l2_not_aligned = val & FDI_RX_L2_NOT_ALIGNED;
+ int l3_not_aligned = val & FDI_RX_L3_NOT_ALIGNED;
+ int not_aligned;
+ int l0_xclock_overflow = val & FDI_RX_L0_XCLOCK_OVERFLOW;
+ int l1_xclock_overflow = val & FDI_RX_L1_XCLOCK_OVERFLOW;
+ int l2_xclock_overflow = val & FDI_RX_L2_XCLOCK_OVERFLOW;
+ int l3_xclock_overflow = val & FDI_RX_L3_XCLOCK_OVERFLOW;
+ int xclock_overflow;
+
+ if (l0_locked + l1_locked + l2_locked + l3_locked == 0)
+ none = "none";
+ fs_error = l0_fs_error + l1_fs_error + l2_fs_error + l3_fs_error;
+ fe_error = l0_fe_error + l1_fe_error + l2_fe_error + l3_fe_error;
+ ber_high = l0_ber_high + l1_ber_high + l2_ber_high + l3_ber_high;
+ bit_lock_to = l0_bit_lock_to + l1_bit_lock_to + l2_bit_lock_to +
+ l3_bit_lock_to;
+ not_aligned = l0_not_aligned + l1_not_aligned + l2_not_aligned +
+ l3_not_aligned;
+ xclock_overflow = l0_xclock_overflow + l1_xclock_overflow +
+ l2_xclock_overflow + l3_xclock_overflow;
+
+ snprintf(result, len,
+ "symbol locked lanes: %s%s%s%s%s"
+ "%s%s%s%s%s"
+ "%s%s%s%s%s"
+ "%s%s%s%s%s"
+ "%s%s%s%s%s"
+ "%s%s%s%s%s"
+ "%s%s%s%s%s",
+ l0_locked ? "0 " : "", l1_locked ? "1 " : "",
+ l2_locked ? "2 " : "", l3_locked ? "3 " : "",
+ none,
+ fs_error ? ", FS error on lanes " : "",
+ l0_fs_error ? "0 ": "", l1_fs_error ? "1 " : "",
+ l2_fs_error ? "2 ": "", l3_fs_error ? "3 " : "",
+ fe_error ? ", FE error on lanes " : "",
+ l0_fe_error ? "0 ": "", l1_fe_error ? "1 " : "",
+ l2_fe_error ? "2 ": "", l3_fe_error ? "3 " : "",
+ ber_high ? ", BER high for lanes " : "",
+ l0_ber_high ? "0 ": "", l1_ber_high ? "1 " : "",
+ l2_ber_high ? "2 ": "", l3_ber_high ? "3 " : "",
+ bit_lock_to ? ", bit lock timeout on lanes " : "",
+ l0_bit_lock_to ? "0 ": "", l1_bit_lock_to ? "1 " : "",
+ l2_bit_lock_to ? "2 ": "", l3_bit_lock_to ? "3 " : "",
+ not_aligned ? ", lanes not aligned: " : "",
+ l0_not_aligned ? "0 ": "", l1_not_aligned ? "1 " : "",
+ l2_not_aligned ? "2 ": "", l3_not_aligned ? "3 " : "",
+ xclock_overflow ? ", cross clock overflow on lanes " : "",
+ l0_xclock_overflow ? "0 ": "", l1_xclock_overflow ? "1 " : "",
+ l2_xclock_overflow ? "2 ": "", l3_xclock_overflow ? "3 " : "");
+}
+
DEBUGSTRING(ironlake_debug_transconf)
{
const char *enable = val & TRANS_ENABLE ? "enable" : "disable";
@@ -1811,8 +1892,11 @@ static struct reg_debug ironlake_debug_regs[] = {
DEFINEREG(FDI_RXB_IMR),
DEFINEREG2(FDI_RXA_DEBUG, ironlake_debug_fdi_rx_debug),
+ DEFINEREG2(FDI_RXA_DEBUG2, ironlake_debug_fdi_rx_debug2),
DEFINEREG2(FDI_RXB_DEBUG, ironlake_debug_fdi_rx_debug),
+ DEFINEREG2(FDI_RXB_DEBUG2, ironlake_debug_fdi_rx_debug2),
DEFINEREG2(FDI_RXC_DEBUG, ironlake_debug_fdi_rx_debug),
+ DEFINEREG2(FDI_RXC_DEBUG2, ironlake_debug_fdi_rx_debug2),
DEFINEREG2(PCH_ADPA, i830_debug_adpa),
DEFINEREG2(HDMIB, ironlake_debug_hdmi),
--
1.7.11.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 2/3] intel_reg_dumper: Dump FDI_RX_DEBUG registers
2012-08-23 13:04 ` [PATCH 2/3] intel_reg_dumper: Dump FDI_RX_DEBUG registers Damien Lespiau
@ 2012-08-23 23:14 ` Ben Widawsky
2012-08-29 12:50 ` Lespiau, Damien
0 siblings, 1 reply; 7+ messages in thread
From: Ben Widawsky @ 2012-08-23 23:14 UTC (permalink / raw)
To: Damien Lespiau; +Cc: intel-gfx
On 2012-08-23 06:04, Damien Lespiau wrote:
> From: Damien Lespiau <damien.lespiau@intel.com>
>
> This reports which lanes are locked.
>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
> lib/intel_reg.h | 8 ++++++++
> tools/intel_reg_dumper.c | 21 +++++++++++++++++++++
> 2 files changed, 29 insertions(+)
>
> diff --git a/lib/intel_reg.h b/lib/intel_reg.h
> index ffded64..0796cb5 100644
> --- a/lib/intel_reg.h
> +++ b/lib/intel_reg.h
> @@ -3381,6 +3381,14 @@ typedef enum {
> #define FDI_RXC_TUSIZE1 0xf2030
> #define FDI_RXC_TUSIZE2 0xf2038
>
> +#define FDI_RXA_DEBUG 0xf0020
> +#define FDI_RXB_DEBUG 0xf1020
> +#define FDI_RXC_DEBUG 0xf2020
> +#define FDI_RX_DEBUG_L3_BIT_LOCKED (1<<29)
> +#define FDI_RX_DEBUG_L2_BIT_LOCKED (1<<28)
> +#define FDI_RX_DEBUG_L1_BIT_LOCKED (1<<27)
> +#define FDI_RX_DEBUG_L0_BIT_LOCKED (1<<26)
> +
> /* FDI_RX interrupt register format */
> #define FDI_RX_INTER_LANE_ALIGN (1<<10)
> #define FDI_RX_SYMBOL_LOCK (1<<9) /* train 2 */
My only gripe with this patch is in the naming. Can you please use
something find-able in the BSPEC, like: FDI_RX_DEBUG_B instead of
FDI_RXB_DEBUG
> diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c
> index f6392e2..7f6eaaa 100644
> --- a/tools/intel_reg_dumper.c
> +++ b/tools/intel_reg_dumper.c
> @@ -1310,6 +1310,23 @@ DEBUGSTRING(ironlake_debug_fdi_rx_misc)
> snprintf(result, len, "FDI Delay %d", val & ((1 << 13) - 1));
> }
>
> +DEBUGSTRING(ironlake_debug_fdi_rx_debug)
> +{
> + int l0_locked = val & FDI_RX_DEBUG_L0_BIT_LOCKED;
> + int l1_locked = val & FDI_RX_DEBUG_L1_BIT_LOCKED;
> + int l2_locked = val & FDI_RX_DEBUG_L2_BIT_LOCKED;
> + int l3_locked = val & FDI_RX_DEBUG_L3_BIT_LOCKED;
> + const char *none = "";
> +
> + if (l0_locked + l1_locked + l2_locked + l3_locked == 0)
> + none = "none";
> +
> + snprintf(result, len, "bit locked lanes: %s%s%s%s%s",
> + l0_locked ? "0 " : "", l1_locked ? "1 " : "",
> + l2_locked ? "2 " : "", l3_locked ? "3 " : "",
> + none);
> +}
> +
> DEBUGSTRING(ironlake_debug_transconf)
> {
> const char *enable = val & TRANS_ENABLE ? "enable" : "disable";
> @@ -1793,6 +1810,10 @@ static struct reg_debug ironlake_debug_regs[]
> = {
> DEFINEREG(FDI_RXB_IIR),
> DEFINEREG(FDI_RXB_IMR),
>
> + DEFINEREG2(FDI_RXA_DEBUG, ironlake_debug_fdi_rx_debug),
> + DEFINEREG2(FDI_RXB_DEBUG, ironlake_debug_fdi_rx_debug),
> + DEFINEREG2(FDI_RXC_DEBUG, ironlake_debug_fdi_rx_debug),
> +
> DEFINEREG2(PCH_ADPA, i830_debug_adpa),
> DEFINEREG2(HDMIB, ironlake_debug_hdmi),
> DEFINEREG2(HDMIC, ironlake_debug_hdmi),
--
Ben Widawsky, Intel Open Source Technology Center
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 3/3] intel_reg_dumper: Dump FDI_RX_DEBUG2 registers
2012-08-23 13:04 ` [PATCH 3/3] intel_reg_dumper: Dump FDI_RX_DEBUG2 registers Damien Lespiau
@ 2012-08-23 23:26 ` Ben Widawsky
0 siblings, 0 replies; 7+ messages in thread
From: Ben Widawsky @ 2012-08-23 23:26 UTC (permalink / raw)
To: Damien Lespiau; +Cc: intel-gfx
On 2012-08-23 06:04, Damien Lespiau wrote:
> From: Damien Lespiau <damien.lespiau@intel.com>
>
> This register gives information about which lanes are symbol locked
> along with a bunch of possible training failures.
>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
I don't know where a bunch of these bit definitions came from, I cannot
find them in the bspec. Also, I'd like the name change I mentioned in
patch 2. I've put some bikesheds below, but you only need to change them
if you agree.
Acked-by: Ben Widawsky <ben@bwidawsk.net>
> ---
> lib/intel_reg.h | 36 +++++++++++++++++++++
> tools/intel_reg_dumper.c | 84
> ++++++++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 120 insertions(+)
>
> diff --git a/lib/intel_reg.h b/lib/intel_reg.h
> index 0796cb5..fa9e866 100644
> --- a/lib/intel_reg.h
> +++ b/lib/intel_reg.h
> @@ -3389,6 +3389,42 @@ typedef enum {
> #define FDI_RX_DEBUG_L1_BIT_LOCKED (1<<27)
> #define FDI_RX_DEBUG_L0_BIT_LOCKED (1<<26)
>
> +#define FDI_RXA_DEBUG2 0xf0024
> +#define FDI_RXB_DEBUG2 0xf1024
> +#define FDI_RXC_DEBUG2 0xf2024
> +#define FDI_RX_L3_SYMBOL_LOCKED (1<<31)
> +#define FDI_RX_L2_SYMBOL_LOCKED (1<<30)
> +#define FDI_RX_L1_SYMBOL_LOCKED (1<<29)
> +#define FDI_RX_L0_SYMBOL_LOCKED (1<<28)
> +#define FDI_RX_L3_TP2_FAIL (1<<27)
> +#define FDI_RX_L2_TP2_FAIL (1<<26)
> +#define FDI_RX_L1_TP2_FAIL (1<<25)
> +#define FDI_RX_L0_TP2_FAIL (1<<24)
> +#define FDI_RX_L3_FS_ERROR (1<<23)
> +#define FDI_RX_L2_FS_ERROR (1<<22)
> +#define FDI_RX_L1_FS_ERROR (1<<21)
> +#define FDI_RX_L0_FS_ERROR (1<<20)
> +#define FDI_RX_L3_FE_ERROR (1<<19)
> +#define FDI_RX_L2_FE_ERROR (1<<18)
> +#define FDI_RX_L1_FE_ERROR (1<<17)
> +#define FDI_RX_L0_FE_ERROR (1<<16)
> +#define FDI_RX_L3_BER_HIGH (1<<15)
> +#define FDI_RX_L2_BER_HIGH (1<<14)
> +#define FDI_RX_L1_BER_HIGH (1<<13)
> +#define FDI_RX_L0_BER_HIGH (1<<12)
> +#define FDI_RX_L3_BIT_LOCK_TIMEOUT (1<<11)
> +#define FDI_RX_L2_BIT_LOCK_TIMEOUT (1<<10)
> +#define FDI_RX_L1_BIT_LOCK_TIMEOUT (1<<9)
> +#define FDI_RX_L0_BIT_LOCK_TIMEOUT (1<<8)
> +#define FDI_RX_L3_NOT_ALIGNED (1<<7)
> +#define FDI_RX_L2_NOT_ALIGNED (1<<6)
> +#define FDI_RX_L1_NOT_ALIGNED (1<<5)
> +#define FDI_RX_L0_NOT_ALIGNED (1<<4)
> +#define FDI_RX_L3_XCLOCK_OVERFLOW (1<<3)
> +#define FDI_RX_L2_XCLOCK_OVERFLOW (1<<2)
> +#define FDI_RX_L1_XCLOCK_OVERFLOW (1<<1)
> +#define FDI_RX_L0_XCLOCK_OVERFLOW (1<<0)
> +
> /* FDI_RX interrupt register format */
> #define FDI_RX_INTER_LANE_ALIGN (1<<10)
> #define FDI_RX_SYMBOL_LOCK (1<<9) /* train 2 */
> diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c
> index 7f6eaaa..b27ae0d 100644
> --- a/tools/intel_reg_dumper.c
> +++ b/tools/intel_reg_dumper.c
> @@ -1327,6 +1327,87 @@ DEBUGSTRING(ironlake_debug_fdi_rx_debug)
> none);
> }
>
> +DEBUGSTRING(ironlake_debug_fdi_rx_debug2)
> +{
> + int l0_locked = val & FDI_RX_L0_SYMBOL_LOCKED;
> + int l1_locked = val & FDI_RX_L1_SYMBOL_LOCKED;
> + int l2_locked = val & FDI_RX_L2_SYMBOL_LOCKED;
> + int l3_locked = val & FDI_RX_L3_SYMBOL_LOCKED;
> + const char *none = "";
> + int l0_fs_error = val & FDI_RX_L0_FS_ERROR;
> + int l1_fs_error = val & FDI_RX_L1_FS_ERROR;
> + int l2_fs_error = val & FDI_RX_L2_FS_ERROR;
> + int l3_fs_error = val & FDI_RX_L3_FS_ERROR;
> + int fs_error;
> + int l0_fe_error = val & FDI_RX_L0_FE_ERROR;
> + int l1_fe_error = val & FDI_RX_L1_FE_ERROR;
> + int l2_fe_error = val & FDI_RX_L2_FE_ERROR;
> + int l3_fe_error = val & FDI_RX_L3_FE_ERROR;
> + int fe_error;
> + int l0_ber_high = val & FDI_RX_L0_BER_HIGH;
> + int l1_ber_high = val & FDI_RX_L1_BER_HIGH;
> + int l2_ber_high = val & FDI_RX_L2_BER_HIGH;
> + int l3_ber_high = val & FDI_RX_L3_BER_HIGH;
> + int ber_high;
> + int l0_bit_lock_to = val & FDI_RX_L0_BIT_LOCK_TIMEOUT;
> + int l1_bit_lock_to = val & FDI_RX_L1_BIT_LOCK_TIMEOUT;
> + int l2_bit_lock_to = val & FDI_RX_L2_BIT_LOCK_TIMEOUT;
> + int l3_bit_lock_to = val & FDI_RX_L3_BIT_LOCK_TIMEOUT;
> + int bit_lock_to;
> + int l0_not_aligned = val & FDI_RX_L0_NOT_ALIGNED;
> + int l1_not_aligned = val & FDI_RX_L1_NOT_ALIGNED;
> + int l2_not_aligned = val & FDI_RX_L2_NOT_ALIGNED;
> + int l3_not_aligned = val & FDI_RX_L3_NOT_ALIGNED;
> + int not_aligned;
> + int l0_xclock_overflow = val & FDI_RX_L0_XCLOCK_OVERFLOW;
> + int l1_xclock_overflow = val & FDI_RX_L1_XCLOCK_OVERFLOW;
> + int l2_xclock_overflow = val & FDI_RX_L2_XCLOCK_OVERFLOW;
> + int l3_xclock_overflow = val & FDI_RX_L3_XCLOCK_OVERFLOW;
> + int xclock_overflow;
Really a string would have been good enough and much nicer code. For
instance:
Char output[33];
memset(output, 0, sizeof(output));
output[0] = val & FDI_RX_L0_SYMBOL_LOCKED ? 'L' : 'l"
output[1] = val & FDI_RX_L0_SYMBOL_LOCKED ? 'L' : 'l"
...
printf("%s\n", output);
> +
> + if (l0_locked + l1_locked + l2_locked + l3_locked == 0)
> + none = "none";
> + fs_error = l0_fs_error + l1_fs_error + l2_fs_error + l3_fs_error;
> + fe_error = l0_fe_error + l1_fe_error + l2_fe_error + l3_fe_error;
> + ber_high = l0_ber_high + l1_ber_high + l2_ber_high + l3_ber_high;
> + bit_lock_to = l0_bit_lock_to + l1_bit_lock_to + l2_bit_lock_to +
> + l3_bit_lock_to;
> + not_aligned = l0_not_aligned + l1_not_aligned + l2_not_aligned +
> + l3_not_aligned;
> + xclock_overflow = l0_xclock_overflow + l1_xclock_overflow +
> + l2_xclock_overflow + l3_xclock_overflow;
I think using | instead of + is a bit more common.
> +
> + snprintf(result, len,
> + "symbol locked lanes: %s%s%s%s%s"
> + "%s%s%s%s%s"
> + "%s%s%s%s%s"
> + "%s%s%s%s%s"
> + "%s%s%s%s%s"
> + "%s%s%s%s%s"
> + "%s%s%s%s%s",
> + l0_locked ? "0 " : "", l1_locked ? "1 " : "",
> + l2_locked ? "2 " : "", l3_locked ? "3 " : "",
> + none,
> + fs_error ? ", FS error on lanes " : "",
> + l0_fs_error ? "0 ": "", l1_fs_error ? "1 " : "",
> + l2_fs_error ? "2 ": "", l3_fs_error ? "3 " : "",
> + fe_error ? ", FE error on lanes " : "",
> + l0_fe_error ? "0 ": "", l1_fe_error ? "1 " : "",
> + l2_fe_error ? "2 ": "", l3_fe_error ? "3 " : "",
> + ber_high ? ", BER high for lanes " : "",
> + l0_ber_high ? "0 ": "", l1_ber_high ? "1 " : "",
> + l2_ber_high ? "2 ": "", l3_ber_high ? "3 " : "",
> + bit_lock_to ? ", bit lock timeout on lanes " : "",
> + l0_bit_lock_to ? "0 ": "", l1_bit_lock_to ? "1 " : "",
> + l2_bit_lock_to ? "2 ": "", l3_bit_lock_to ? "3 " : "",
> + not_aligned ? ", lanes not aligned: " : "",
> + l0_not_aligned ? "0 ": "", l1_not_aligned ? "1 " : "",
> + l2_not_aligned ? "2 ": "", l3_not_aligned ? "3 " : "",
> + xclock_overflow ? ", cross clock overflow on lanes " : "",
> + l0_xclock_overflow ? "0 ": "", l1_xclock_overflow ? "1 " : "",
> + l2_xclock_overflow ? "2 ": "", l3_xclock_overflow ? "3 " : "");
> +}
> +
> DEBUGSTRING(ironlake_debug_transconf)
> {
> const char *enable = val & TRANS_ENABLE ? "enable" : "disable";
> @@ -1811,8 +1892,11 @@ static struct reg_debug ironlake_debug_regs[]
> = {
> DEFINEREG(FDI_RXB_IMR),
>
> DEFINEREG2(FDI_RXA_DEBUG, ironlake_debug_fdi_rx_debug),
> + DEFINEREG2(FDI_RXA_DEBUG2, ironlake_debug_fdi_rx_debug2),
> DEFINEREG2(FDI_RXB_DEBUG, ironlake_debug_fdi_rx_debug),
> + DEFINEREG2(FDI_RXB_DEBUG2, ironlake_debug_fdi_rx_debug2),
> DEFINEREG2(FDI_RXC_DEBUG, ironlake_debug_fdi_rx_debug),
> + DEFINEREG2(FDI_RXC_DEBUG2, ironlake_debug_fdi_rx_debug2),
>
> DEFINEREG2(PCH_ADPA, i830_debug_adpa),
> DEFINEREG2(HDMIB, ironlake_debug_hdmi),
--
Ben Widawsky, Intel Open Source Technology Center
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/3] intel_reg_dumper: Dump FDI_RX_DEBUG registers
2012-08-23 23:14 ` Ben Widawsky
@ 2012-08-29 12:50 ` Lespiau, Damien
2012-08-29 15:49 ` Ben Widawsky
0 siblings, 1 reply; 7+ messages in thread
From: Lespiau, Damien @ 2012-08-29 12:50 UTC (permalink / raw)
To: Ben Widawsky; +Cc: intel-gfx
On Fri, Aug 24, 2012 at 12:14 AM, Ben Widawsky <ben@bwidawsk.net> wrote:
>> +#define FDI_RXA_DEBUG 0xf0020
>> +#define FDI_RXB_DEBUG 0xf1020
[snip]
> My only gripe with this patch is in the naming. Can you please use something
> find-able in the BSPEC, like: FDI_RX_DEBUG_B instead of FDI_RXB_DEBUG
I used the same convention as all the others FDI_[R,T]x_[A,B,C]_*
registers, if you look closely: FDX_TXA_CTL, FDX_TXA_MISC, ... I
believe this is because those registers have been introduced with
ironlake and the ILK spec names them like this while later specs adopt
the _A, _B, _C suffixes. I went for consistency.
--
Damien
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/3] intel_reg_dumper: Dump FDI_RX_DEBUG registers
2012-08-29 12:50 ` Lespiau, Damien
@ 2012-08-29 15:49 ` Ben Widawsky
0 siblings, 0 replies; 7+ messages in thread
From: Ben Widawsky @ 2012-08-29 15:49 UTC (permalink / raw)
To: Lespiau, Damien; +Cc: intel-gfx
On Wed, 29 Aug 2012 13:50:42 +0100
"Lespiau, Damien" <damien.lespiau@intel.com> wrote:
> On Fri, Aug 24, 2012 at 12:14 AM, Ben Widawsky <ben@bwidawsk.net>
> wrote:
> >> +#define FDI_RXA_DEBUG 0xf0020
> >> +#define FDI_RXB_DEBUG 0xf1020
>
> [snip]
>
> > My only gripe with this patch is in the naming. Can you please use
> > something find-able in the BSPEC, like: FDI_RX_DEBUG_B instead of
> > FDI_RXB_DEBUG
>
> I used the same convention as all the others FDI_[R,T]x_[A,B,C]_*
> registers, if you look closely: FDX_TXA_CTL, FDX_TXA_MISC, ... I
> believe this is because those registers have been introduced with
> ironlake and the ILK spec names them like this while later specs adopt
> the _A, _B, _C suffixes. I went for consistency.
>
Generally, I agree with this approach, but in this case I'd rather
shift everything over to the new naming instead.
--
Ben Widawsky, Intel Open Source Technology Center
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2012-08-29 15:49 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-08-23 13:04 [PATCH 1/3] intel_reg_dumper: Fix pipe name in comment Damien Lespiau
2012-08-23 13:04 ` [PATCH 2/3] intel_reg_dumper: Dump FDI_RX_DEBUG registers Damien Lespiau
2012-08-23 23:14 ` Ben Widawsky
2012-08-29 12:50 ` Lespiau, Damien
2012-08-29 15:49 ` Ben Widawsky
2012-08-23 13:04 ` [PATCH 3/3] intel_reg_dumper: Dump FDI_RX_DEBUG2 registers Damien Lespiau
2012-08-23 23:26 ` Ben Widawsky
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