* [PATCH] DRM/i915: Don't delete DPLL Multiplier during DAC init.
@ 2012-10-14 14:33 Egbert Eich
2012-10-16 7:33 ` Daniel Vetter
0 siblings, 1 reply; 2+ messages in thread
From: Egbert Eich @ 2012-10-14 14:33 UTC (permalink / raw)
To: intel-gfx; +Cc: Egbert Eich
The DPLL multipiler is set up in intel_display.c:i9xx_update_pll()
called from i9xx_crtc_mode_set().
There the DPLL multiplier is adjusted so that the SDVO gets a sufficient
bus clock.
When cloning a CRTC between an SDVO driven encoder and the standard
DAC the DAC setup code reseted the multiplier value to 1 thus undoing
the correct setup. There is no need to touch the multiplier in the DAC
setup code: the correct value (i.e. 1 in case no SDVO encoder is used)
is set by i9xx_update_pll() already.
A comment at the code suggested that this code is a left over from the
days when there was no setup for clone modes.
Signed-off-by: Egbert Eich <eich@suse.de>
---
drivers/gpu/drm/i915/intel_crt.c | 15 +--------------
1 files changed, 1 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index c42b980..ae3a3d5 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -220,20 +220,7 @@ static void intel_crt_mode_set(struct drm_encoder *encoder,
intel_encoder_to_crt(to_intel_encoder(encoder));
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct drm_i915_private *dev_priv = dev->dev_private;
- int dpll_md_reg;
- u32 adpa, dpll_md;
-
- dpll_md_reg = DPLL_MD(intel_crtc->pipe);
-
- /*
- * Disable separate mode multiplier used when cloning SDVO to CRT
- * XXX this needs to be adjusted when we really are cloning
- */
- if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
- dpll_md = I915_READ(dpll_md_reg);
- I915_WRITE(dpll_md_reg,
- dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
- }
+ u32 adpa;
adpa = ADPA_HOTPLUG_BITS;
if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
--
1.7.6.3
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] DRM/i915: Don't delete DPLL Multiplier during DAC init.
2012-10-14 14:33 [PATCH] DRM/i915: Don't delete DPLL Multiplier during DAC init Egbert Eich
@ 2012-10-16 7:33 ` Daniel Vetter
0 siblings, 0 replies; 2+ messages in thread
From: Daniel Vetter @ 2012-10-16 7:33 UTC (permalink / raw)
To: Egbert Eich; +Cc: intel-gfx
On Sun, Oct 14, 2012 at 04:33:11PM +0200, Egbert Eich wrote:
> The DPLL multipiler is set up in intel_display.c:i9xx_update_pll()
> called from i9xx_crtc_mode_set().
> There the DPLL multiplier is adjusted so that the SDVO gets a sufficient
> bus clock.
> When cloning a CRTC between an SDVO driven encoder and the standard
> DAC the DAC setup code reseted the multiplier value to 1 thus undoing
> the correct setup. There is no need to touch the multiplier in the DAC
> setup code: the correct value (i.e. 1 in case no SDVO encoder is used)
> is set by i9xx_update_pll() already.
> A comment at the code suggested that this code is a left over from the
> days when there was no setup for clone modes.
>
> Signed-off-by: Egbert Eich <eich@suse.de>
Picked up for -fixes, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 2+ messages in thread
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