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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 04/22] drm/i915: implement WaGTEnableMiFlush on VLV
Date: Tue, 5 Feb 2013 17:31:02 +0200
Message-ID: <20130205153102.GX9135@intel.com> (raw)
In-Reply-To: <1359809786-26434-5-git-send-email-jbarnes@virtuousgeek.org>

On Sat, Feb 02, 2013 at 01:56:08PM +0100, Jesse Barnes wrote:
> We don't generally use MI_FLUSH these days, but this bit may affect
> other flushing logic, so set it to be safe.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_ringbuffer.c |    3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 2bd074a..5a9e26a 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -511,6 +511,9 @@ static int init_render_ring(struct intel_ring_buffer *ring)
>  			I915_WRITE(GFX_MODE_GEN7,
>  				   _MASKED_BIT_DISABLE(GFX_TLB_INVALIDATE_ALWAYS) |
>  				   _MASKED_BIT_ENABLE(GFX_REPLAY_MODE));
> +		if (IS_VALLEYVIEW(dev))
> +			I915_WRITE(MI_MODE, I915_READ(MI_MODE) |
> +				   _MASKED_BIT_ENABLE(MI_FLUSH_ENABLE));

Include a comment with the WA name?

Also this WA seems to be present since SNB. So should the check be for
'gen>=6' instead of VLV? Hmm. It seems that used to be the case actually
and then the WA was removed in commit:

 commit 8d79c3490aecfe6e51f0ba6f9780746fb1434954
 Author: Eric Anholt <eric@anholt.net>
 Date:   Thu Jan 19 10:50:05 2012 -0800

    drm/i915: Remove the MI_FLUSH_ENABLE setting.
    
    We have always been using the wrong bit -- it's bit 12.  However, the
    bit also doesn't do anything -- hardware has always accepted the
    MI_FLUSH command even when it was specced not to.
    
    Given that there is only one MI_FLUSH emitted in all of the driver
    stack on gen6+ (in i965_video.c of the 2d driver, and it should be
    using other code to do its flush instead), just remove the MI_FLUSH
    enable instead of trying to fix it.
    
    Signed-off-by: Eric Anholt <eric@anholt.net>
    Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
    Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
    Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Looks like the wrong bit part was fixed at some point.

This patch needs to be refreshed anyway since the code was shuffled
around a bit.

>  	}
>  
>  	if (INTEL_INFO(dev)->gen >= 5) {
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC

  reply index

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-02-02 12:56 Updated VLV patchset Jesse Barnes
2013-02-02 12:56 ` [PATCH 01/22] drm/i915: add more VLV IDs Jesse Barnes
2013-02-02 17:30   ` Rodrigo Vivi
2013-02-02 17:35     ` Jesse Barnes
2013-02-02 12:56 ` [PATCH 02/22] drm/i915: remove VLV MSI IRQ hack Jesse Barnes
2013-02-02 12:56 ` [PATCH 03/22] drm/i915: add UCGCTL4 to display reg check on VLV Jesse Barnes
2013-02-06 12:53   ` Jani Nikula
2013-02-06 13:08     ` Jani Nikula
2013-02-02 12:56 ` [PATCH 04/22] drm/i915: implement WaGTEnableMiFlush " Jesse Barnes
2013-02-05 15:31   ` Ville Syrjälä [this message]
2013-02-02 12:56 ` [PATCH 05/22] drm/i915: enable force wake, disable LLC " Jesse Barnes
2013-02-05 15:33   ` Ville Syrjälä
2013-02-06 11:35   ` Jani Nikula
2013-02-02 12:56 ` [PATCH 06/22] drm/i915: add power context allocation and setup " Jesse Barnes
2013-02-05 18:01   ` Ville Syrjälä
2013-02-05 18:14     ` Jesse Barnes
2013-02-06 13:06   ` Jani Nikula
2013-02-02 12:56 ` [PATCH 07/22] drm/i915: new register for IS_DISPLAYREG Jesse Barnes
2013-02-06 13:11   ` Jani Nikula
2013-02-02 12:56 ` [PATCH 08/22] drm/i915: allow force wake on VLV Jesse Barnes
2013-02-02 12:56 ` [PATCH 09/22] drm/i915: more clock gating disables " Jesse Barnes
2013-02-02 12:56 ` [PATCH 10/22] drm/i915: don't init LVDS " Jesse Barnes
2013-02-06 13:19   ` Jani Nikula
2013-02-06 13:34     ` Daniel Vetter
2013-03-06 14:27     ` Daniel Vetter
2013-02-02 12:56 ` [PATCH 11/22] drm/i915: fixup port enumeration " Jesse Barnes
2013-02-02 12:56 ` [PATCH 12/22] drm/i915: Fix VLV hdmi limits Jesse Barnes
2013-02-02 12:56 ` [PATCH 13/22] drm/i915: update DPIO constants for VLV Jesse Barnes
2013-02-02 12:56 ` [PATCH 14/22] drm/i915: add HMDI workarounds on VLV Jesse Barnes
2013-02-02 12:56 ` [PATCH 15/22] drm/i915: move DPIO init to init and resume, not unload Jesse Barnes
2013-02-02 12:56 ` [PATCH 16/22] drm/i915: VLV hack: Disable wm for VLV Jesse Barnes
2013-02-02 12:56 ` [PATCH 17/22] drm/i915: VLV hack: force DP to report connected Jesse Barnes
2013-02-02 12:56 ` [PATCH 18/22] drm/i915: add flush control reg to IS_DISPLAYREG check Jesse Barnes
2013-02-02 12:56 ` [PATCH 19/22] drm/i915: use gen6 stolen check on VLV Jesse Barnes
2013-02-02 12:56 ` [PATCH 20/22] drm/i915: add Punit read/write routines for VLV Jesse Barnes
2013-02-05 17:44   ` Jani Nikula
2013-02-02 12:56 ` [PATCH 21/22] drm/i915: add media well to VLV force wake routines Jesse Barnes
2013-02-02 12:56 ` [PATCH 22/22] drm/i915: turbo & RC6 support for VLV Jesse Barnes

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