From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org, igvt-g@lists.01.org, "Wang,
Zhi A" <zhi.a.wang@intel.com>,
"Tian, Kevin" <kevin.tian@intel.com>,
joonas.lahtinen@linux.intel.com
Subject: Re: About the iGVT-g's requirement to pin guest contexts in VM
Date: Mon, 24 Aug 2015 11:23:13 +0100 [thread overview]
Message-ID: <20150824102313.GC25712@nuc-i3427.alporthouse.com> (raw)
In-Reply-To: <20150824100428.GA25816@zlv-hp-dev>
On Mon, Aug 24, 2015 at 06:04:28PM +0800, Zhiyuan Lv wrote:
> Hi Chris,
>
> On Thu, Aug 20, 2015 at 09:36:00AM +0100, Chris Wilson wrote:
> > On Thu, Aug 20, 2015 at 03:45:21PM +0800, Zhiyuan Lv wrote:
> > > Intel GVT-g will perform EXECLIST context shadowing and ring buffer
> > > shadowing. The shadow copy is created when guest creates a context.
> > > If a context changes its LRCA address, the hypervisor is hard to know
> > > whether it is a new context or not. We always pin context objects to
> > > global GTT to make life easier.
> >
> > Nak. Please explain why we need to workaround a bug in the host. We
> > cannot pin the context as that breaks userspace (e.g. synmark) who can
> > and will try to use more contexts than we have room.
>
> Could you have a look at below reasons and kindly give us your inputs?
>
> 1, Due to the GGTT partitioning, the global graphics memory available
> inside virtual machines is much smaller than native case. We cannot
> support some graphics memory intensive workloads anyway. So it looks
> affordable to just pin contexts which do not take much GGTT.
Wrong. It exposes the guest to a trivial denial-of-service attack. A
smaller GGTT does not actually limit clients (there is greater aperture
pressure and some paths are less likely but an individual client will
function just fine).
> 2, Our hypervisor needs to change i915 guest context in the shadow
> context implementation. That part will be tricky if the context is not
> always pinned. One scenario is that when a context finishes running,
> we need to copy shadow context, which has been updated by hardware, to
> guest context. The hypervisor knows context finishing by context
> interrupt, but that time shrinker may have unpin the context and its
> backing storage may have been swap-out. Such copy may fail.
That is just a bug in your code. Firstly allowing swapout on an object
you still are using, secondly not being able to swapin.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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next prev parent reply other threads:[~2015-08-24 10:23 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-20 7:45 [PATCH 0/7] drm/intel: guest i915 changes for Broadwell to run inside VM with Intel GVT-g Zhiyuan Lv
2015-08-20 7:45 ` [PATCH 1/7] drm/i915: preallocate pdps for 32 bit vgpu Zhiyuan Lv
2015-08-20 10:56 ` Joonas Lahtinen
2015-08-26 13:21 ` Mika Kuoppala
2015-08-20 7:45 ` [PATCH 2/7] drm/i915: Enable full ppgtt for vgpu Zhiyuan Lv
2015-08-20 10:57 ` Joonas Lahtinen
2015-08-26 8:47 ` Daniel Vetter
2015-08-27 2:28 ` Zhiyuan Lv
2015-09-02 8:06 ` Daniel Vetter
2015-08-20 7:45 ` [PATCH 3/7] drm/i915: Always enable execlists on BDW " Zhiyuan Lv
2015-08-20 8:34 ` Chris Wilson
2015-08-20 8:55 ` Zhiyuan Lv
2015-08-20 9:22 ` Chris Wilson
2015-08-20 9:40 ` Zhiyuan Lv
2015-08-20 11:23 ` Joonas Lahtinen
2015-08-21 2:24 ` Zhiyuan Lv
2015-08-24 12:36 ` Joonas Lahtinen
2015-08-26 8:50 ` Daniel Vetter
2015-08-27 2:49 ` Zhiyuan Lv
2015-09-02 8:06 ` Daniel Vetter
2015-08-21 5:37 ` [iGVT-g] " Tian, Kevin
2015-08-20 7:45 ` [PATCH 4/7] drm/i915: always pin lrc context for vgpu with Intel GVT-g Zhiyuan Lv
2015-08-20 8:36 ` Chris Wilson
2015-08-20 9:16 ` Zhiyuan Lv
2015-08-21 6:13 ` Zhiyuan Lv
2015-08-24 10:04 ` About the iGVT-g's requirement to pin guest contexts in VM Zhiyuan Lv
2015-08-24 10:23 ` Chris Wilson [this message]
2015-08-24 17:18 ` Wang, Zhi A
2015-08-26 16:42 ` Wang, Zhi A
2015-08-25 0:17 ` Zhiyuan Lv
2015-08-26 8:56 ` Daniel Vetter
2015-08-27 1:50 ` Zhiyuan Lv
2015-09-02 8:19 ` Daniel Vetter
2015-09-02 9:20 ` Zhiyuan Lv
2015-09-02 9:40 ` Daniel Vetter
2015-08-20 7:45 ` [PATCH 5/7] drm/i915: Update PV INFO page definition for Intel GVT-g Zhiyuan Lv
2015-08-20 12:58 ` Joonas Lahtinen
2015-08-21 2:27 ` Zhiyuan Lv
2015-08-20 7:45 ` [PATCH 6/7] drm/i915: guest i915 notification for Intel-GVTg Zhiyuan Lv
2015-08-20 13:11 ` Joonas Lahtinen
2015-08-21 2:39 ` Zhiyuan Lv
2015-08-20 7:45 ` [PATCH 7/7] drm/i915: Allow Broadwell guest with Intel GVT-g Zhiyuan Lv
2015-08-20 13:15 ` Joonas Lahtinen
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