From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 3/5] drm/i915: Prefer to use the pipe to index the ddb entries
Date: Wed, 15 Jan 2020 21:08:11 +0200 [thread overview]
Message-ID: <20200115190813.17971-3-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20200115190813.17971-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Let's use the pipe rather than the silly 'i' iterator from
for_each_oldnew_intel_crtc_in_state() for indexing the ddb
entries array. Maybe one day we can assume c99 and hide the
'i' entirely from sight.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 20 +++++++++++---------
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e68af024e13c..64a377d61ce0 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15106,15 +15106,17 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
int i;
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
+ enum pipe pipe = crtc->pipe;
+
if (!new_crtc_state->hw.active)
continue;
/* ignore allocations for crtc's that have been turned off. */
if (!needs_modeset(new_crtc_state)) {
- entries[i] = old_crtc_state->wm.skl.ddb;
- update_pipes |= BIT(crtc->pipe);
+ entries[pipe] = old_crtc_state->wm.skl.ddb;
+ update_pipes |= BIT(pipe);
} else {
- modeset_pipes |= BIT(crtc->pipe);
+ modeset_pipes |= BIT(pipe);
}
}
@@ -15140,10 +15142,10 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
continue;
if (skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
- entries, num_pipes, i))
+ entries, num_pipes, pipe))
continue;
- entries[i] = new_crtc_state->wm.skl.ddb;
+ entries[pipe] = new_crtc_state->wm.skl.ddb;
update_pipes &= ~BIT(pipe);
intel_update_crtc(crtc, state, old_crtc_state,
@@ -15178,9 +15180,9 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
continue;
WARN_ON(skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
- entries, num_pipes, i));
+ entries, num_pipes, pipe));
- entries[i] = new_crtc_state->wm.skl.ddb;
+ entries[pipe] = new_crtc_state->wm.skl.ddb;
modeset_pipes &= ~BIT(pipe);
if (is_trans_port_sync_mode(new_crtc_state)) {
@@ -15213,9 +15215,9 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
continue;
WARN_ON(skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
- entries, num_pipes, i));
+ entries, num_pipes, pipe));
- entries[i] = new_crtc_state->wm.skl.ddb;
+ entries[pipe] = new_crtc_state->wm.skl.ddb;
modeset_pipes &= ~BIT(pipe);
intel_update_crtc(crtc, state, old_crtc_state, new_crtc_state);
--
2.24.1
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next prev parent reply other threads:[~2020-01-15 19:08 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-15 19:08 [Intel-gfx] [PATCH 1/5] drm/i915: Fix post-fastset modeset check for port sync Ville Syrjala
2020-01-15 19:08 ` [Intel-gfx] [PATCH 2/5] drm/i915: Clear most of crtc state when disabling the crtc Ville Syrjala
2020-01-16 0:14 ` Souza, Jose
2020-01-15 19:08 ` Ville Syrjala [this message]
2020-01-16 0:19 ` [Intel-gfx] [PATCH 3/5] drm/i915: Prefer to use the pipe to index the ddb entries Souza, Jose
2020-01-15 19:08 ` [Intel-gfx] [PATCH 4/5] drm/i915: Use PIPE_CONF_CHECK_X() for sync_mode_slaves_mask Ville Syrjala
2020-01-16 0:19 ` Souza, Jose
2020-01-16 0:37 ` Manasi Navare
2020-01-15 19:08 ` [Intel-gfx] [PATCH 5/5] drm/i915: Move encoder variable to tighter scope Ville Syrjala
2020-01-16 0:20 ` Souza, Jose
2020-01-15 19:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Fix post-fastset modeset check for port sync Patchwork
2020-01-15 19:48 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2020-01-16 0:05 ` [Intel-gfx] [PATCH 1/5] " Souza, Jose
2020-01-16 10:56 ` Ville Syrjälä
2020-01-16 18:15 ` Souza, Jose
2020-01-18 8:05 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] " Patchwork
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